[deliverable/linux.git] / drivers / net / gianfar_mii.h

/*
 * drivers/net/gianfar_mii.h
 *
 * Gianfar Ethernet Driver -- MII Management Bus Implementation
 * Driver for the MDIO bus controller in the Gianfar register space
 *
 * Author: Andy Fleming
 * Maintainer: Kumar Gala
 *
 * Copyright (c) 2002-2004 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 */
#ifndef __GIANFAR_MII_H
#define __GIANFAR_MII_H

struct gfar_private; /* forward ref */

#define MIIMIND_BUSY            0x00000001
#define MIIMIND_NOTVALID        0x00000004

#define MII_READ_COMMAND       0x00000001

#define GFAR_SUPPORTED (SUPPORTED_10baseT_Half \
		| SUPPORTED_10baseT_Full \
		| SUPPORTED_100baseT_Half \
		| SUPPORTED_100baseT_Full \
		| SUPPORTED_Autoneg \
		| SUPPORTED_MII)

struct gfar_mii {
	u32	miimcfg;	/* 0x.520 - MII Management Config Register */
	u32	miimcom;	/* 0x.524 - MII Management Command Register */
	u32	miimadd;	/* 0x.528 - MII Management Address Register */
	u32	miimcon;	/* 0x.52c - MII Management Control Register */
	u32	miimstat;	/* 0x.530 - MII Management Status Register */
	u32	miimind;	/* 0x.534 - MII Management Indicator Register */
};

int gfar_mdio_read(struct mii_bus *bus, int mii_id, int regnum);
int gfar_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
int gfar_local_mdio_write(struct gfar_mii __iomem *regs, int mii_id,
			  int regnum, u16 value);
int gfar_local_mdio_read(struct gfar_mii __iomem *regs, int mii_id, int regnum);
struct mii_bus *gfar_get_miibus(const struct gfar_private *priv);
int __init gfar_mdio_init(void);
void gfar_mdio_exit(void);

void gfar_mdio_bus_name(char *name, struct device_node *np);
#endif /* GIANFAR_PHY_H */
Commit	Line	Data
6aa20a22	1	/*
bb40dcbb AF	2	* drivers/net/gianfar_mii.h
	3	*
	4	* Gianfar Ethernet Driver -- MII Management Bus Implementation
	5	* Driver for the MDIO bus controller in the Gianfar register space
	6	*
	7	* Author: Andy Fleming
4c8d3d99	8	* Maintainer: Kumar Gala
bb40dcbb AF	9	*
	10	* Copyright (c) 2002-2004 Freescale Semiconductor, Inc.
	11	*
	12	* This program is free software; you can redistribute it and/or modify it
	13	* under the terms of the GNU General Public License as published by the
	14	* Free Software Foundation; either version 2 of the License, or (at your
	15	* option) any later version.
	16	*
	17	*/
	18	#ifndef __GIANFAR_MII_H
	19	#define __GIANFAR_MII_H
	20
c132419e TP	21	struct gfar_private; /* forward ref */
c132419e TP	22
bb40dcbb AF	23	#define MIIMIND_BUSY 0x00000001
	24	#define MIIMIND_NOTVALID 0x00000004
	25
	26	#define MII_READ_COMMAND 0x00000001
	27
	28	#define GFAR_SUPPORTED (SUPPORTED_10baseT_Half \
7f7f5316	29	\| SUPPORTED_10baseT_Full \
bb40dcbb AF	30	\| SUPPORTED_100baseT_Half \
	31	\| SUPPORTED_100baseT_Full \
	32	\| SUPPORTED_Autoneg \
	33	\| SUPPORTED_MII)
	34
	35	struct gfar_mii {
	36	u32 miimcfg; /* 0x.520 - MII Management Config Register */
	37	u32 miimcom; /* 0x.524 - MII Management Command Register */
	38	u32 miimadd; /* 0x.528 - MII Management Address Register */
	39	u32 miimcon; /* 0x.52c - MII Management Control Register */
	40	u32 miimstat; /* 0x.530 - MII Management Status Register */
	41	u32 miimind; /* 0x.534 - MII Management Indicator Register */
	42	};
	43
	44	int gfar_mdio_read(struct mii_bus *bus, int mii_id, int regnum);
	45	int gfar_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
d0313587 PG	46	int gfar_local_mdio_write(struct gfar_mii __iomem *regs, int mii_id,
	47	int regnum, u16 value);
	48	int gfar_local_mdio_read(struct gfar_mii __iomem *regs, int mii_id, int regnum);
c132419e	49	struct mii_bus gfar_get_miibus(const struct gfar_private priv);
bb40dcbb	50	int __init gfar_mdio_init(void);
b9daf6c0	51	void gfar_mdio_exit(void);
b31a1d8b AF	52
b31a1d8b AF	53	void gfar_mdio_bus_name(char name, struct device_node np);
bb40dcbb	54	#endif /* GIANFAR_PHY_H */