Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /********************************************************************* |
2 | * | |
3 | * Filename: ali-ircc.h | |
4 | * Version: 0.5 | |
5 | * Description: Driver for the ALI M1535D and M1543C FIR Controller | |
6 | * Status: Experimental. | |
7 | * Author: Benjamin Kong <benjamin_kong@ali.com.tw> | |
8 | * Created at: 2000/10/16 03:46PM | |
9 | * Modified at: 2001/1/3 02:55PM | |
10 | * Modified by: Benjamin Kong <benjamin_kong@ali.com.tw> | |
11 | * Modified at: 2003/11/6 and support for ALi south-bridge chipsets M1563 | |
12 | * Modified by: Clear Zhang <clear_zhang@ali.com.tw> | |
13 | * | |
14 | * Copyright (c) 2000 Benjamin Kong <benjamin_kong@ali.com.tw> | |
15 | * All Rights Reserved | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or | |
18 | * modify it under the terms of the GNU General Public License as | |
19 | * published by the Free Software Foundation; either version 2 of | |
20 | * the License, or (at your option) any later version. | |
21 | * | |
22 | ********************************************************************/ | |
23 | ||
24 | #include <linux/module.h> | |
5a0e3ad6 | 25 | #include <linux/gfp.h> |
1da177e4 LT |
26 | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/types.h> | |
29 | #include <linux/skbuff.h> | |
30 | #include <linux/netdevice.h> | |
31 | #include <linux/ioport.h> | |
32 | #include <linux/delay.h> | |
1da177e4 | 33 | #include <linux/init.h> |
a6b7a407 | 34 | #include <linux/interrupt.h> |
1da177e4 LT |
35 | #include <linux/rtnetlink.h> |
36 | #include <linux/serial_reg.h> | |
37 | #include <linux/dma-mapping.h> | |
898b1d16 | 38 | #include <linux/platform_device.h> |
1da177e4 LT |
39 | |
40 | #include <asm/io.h> | |
41 | #include <asm/dma.h> | |
42 | #include <asm/byteorder.h> | |
43 | ||
1da177e4 LT |
44 | #include <net/irda/wrapper.h> |
45 | #include <net/irda/irda.h> | |
46 | #include <net/irda/irda_device.h> | |
47 | ||
48 | #include "ali-ircc.h" | |
49 | ||
50 | #define CHIP_IO_EXTENT 8 | |
51 | #define BROKEN_DONGLE_ID | |
52 | ||
898b1d16 SO |
53 | #define ALI_IRCC_DRIVER_NAME "ali-ircc" |
54 | ||
55 | /* Power Management */ | |
56 | static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state); | |
57 | static int ali_ircc_resume(struct platform_device *dev); | |
58 | ||
59 | static struct platform_driver ali_ircc_driver = { | |
60 | .suspend = ali_ircc_suspend, | |
61 | .resume = ali_ircc_resume, | |
62 | .driver = { | |
63 | .name = ALI_IRCC_DRIVER_NAME, | |
72abb461 | 64 | .owner = THIS_MODULE, |
898b1d16 SO |
65 | }, |
66 | }; | |
1da177e4 LT |
67 | |
68 | /* Module parameters */ | |
69 | static int qos_mtt_bits = 0x07; /* 1 ms or more */ | |
70 | ||
71 | /* Use BIOS settions by default, but user may supply module parameters */ | |
72 | static unsigned int io[] = { ~0, ~0, ~0, ~0 }; | |
73 | static unsigned int irq[] = { 0, 0, 0, 0 }; | |
74 | static unsigned int dma[] = { 0, 0, 0, 0 }; | |
75 | ||
76 | static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info); | |
77 | static int ali_ircc_init_43(ali_chip_t *chip, chipio_t *info); | |
78 | static int ali_ircc_init_53(ali_chip_t *chip, chipio_t *info); | |
79 | ||
25985edc | 80 | /* These are the currently known ALi south-bridge chipsets, the only one difference |
1da177e4 LT |
81 | * is that M1543C doesn't support HP HDSL-3600 |
82 | */ | |
83 | static ali_chip_t chips[] = | |
84 | { | |
85 | { "M1543", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x43, ali_ircc_probe_53, ali_ircc_init_43 }, | |
86 | { "M1535", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x53, ali_ircc_probe_53, ali_ircc_init_53 }, | |
87 | { "M1563", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x63, ali_ircc_probe_53, ali_ircc_init_53 }, | |
88 | { NULL } | |
89 | }; | |
90 | ||
91 | /* Max 4 instances for now */ | |
92 | static struct ali_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL }; | |
93 | ||
94 | /* Dongle Types */ | |
95 | static char *dongle_types[] = { | |
96 | "TFDS6000", | |
97 | "HP HSDL-3600", | |
98 | "HP HSDL-1100", | |
99 | "No dongle connected", | |
100 | }; | |
101 | ||
102 | /* Some prototypes */ | |
103 | static int ali_ircc_open(int i, chipio_t *info); | |
104 | ||
105 | static int ali_ircc_close(struct ali_ircc_cb *self); | |
106 | ||
107 | static int ali_ircc_setup(chipio_t *info); | |
108 | static int ali_ircc_is_receiving(struct ali_ircc_cb *self); | |
109 | static int ali_ircc_net_open(struct net_device *dev); | |
110 | static int ali_ircc_net_close(struct net_device *dev); | |
111 | static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |
1da177e4 | 112 | static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud); |
1da177e4 LT |
113 | |
114 | /* SIR function */ | |
6518bbb8 SH |
115 | static netdev_tx_t ali_ircc_sir_hard_xmit(struct sk_buff *skb, |
116 | struct net_device *dev); | |
1da177e4 LT |
117 | static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self); |
118 | static void ali_ircc_sir_receive(struct ali_ircc_cb *self); | |
119 | static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self); | |
120 | static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len); | |
121 | static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed); | |
122 | ||
123 | /* FIR function */ | |
6518bbb8 SH |
124 | static netdev_tx_t ali_ircc_fir_hard_xmit(struct sk_buff *skb, |
125 | struct net_device *dev); | |
1da177e4 LT |
126 | static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 speed); |
127 | static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self); | |
128 | static int ali_ircc_dma_receive(struct ali_ircc_cb *self); | |
129 | static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self); | |
130 | static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self); | |
131 | static void ali_ircc_dma_xmit(struct ali_ircc_cb *self); | |
132 | ||
133 | /* My Function */ | |
134 | static int ali_ircc_read_dongle_id (int i, chipio_t *info); | |
135 | static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed); | |
136 | ||
137 | /* ALi chip function */ | |
138 | static void SIR2FIR(int iobase); | |
139 | static void FIR2SIR(int iobase); | |
140 | static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable); | |
141 | ||
142 | /* | |
143 | * Function ali_ircc_init () | |
144 | * | |
145 | * Initialize chip. Find out whay kinds of chips we are dealing with | |
0b1974de | 146 | * and their configuration registers address |
1da177e4 LT |
147 | */ |
148 | static int __init ali_ircc_init(void) | |
149 | { | |
150 | ali_chip_t *chip; | |
151 | chipio_t info; | |
9c6c6795 | 152 | int ret; |
1da177e4 LT |
153 | int cfg, cfg_base; |
154 | int reg, revision; | |
155 | int i = 0; | |
156 | ||
a97a6f10 | 157 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
898b1d16 SO |
158 | |
159 | ret = platform_driver_register(&ali_ircc_driver); | |
160 | if (ret) { | |
161 | IRDA_ERROR("%s, Can't register driver!\n", | |
162 | ALI_IRCC_DRIVER_NAME); | |
163 | return ret; | |
164 | } | |
165 | ||
9c6c6795 | 166 | ret = -ENODEV; |
1da177e4 LT |
167 | |
168 | /* Probe for all the ALi chipsets we know about */ | |
169 | for (chip= chips; chip->name; chip++, i++) | |
170 | { | |
a97a6f10 | 171 | IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__, chip->name); |
1da177e4 LT |
172 | |
173 | /* Try all config registers for this chip */ | |
174 | for (cfg=0; cfg<2; cfg++) | |
175 | { | |
176 | cfg_base = chip->cfg[cfg]; | |
177 | if (!cfg_base) | |
178 | continue; | |
179 | ||
180 | memset(&info, 0, sizeof(chipio_t)); | |
181 | info.cfg_base = cfg_base; | |
182 | info.fir_base = io[i]; | |
183 | info.dma = dma[i]; | |
184 | info.irq = irq[i]; | |
185 | ||
186 | ||
187 | /* Enter Configuration */ | |
188 | outb(chip->entr1, cfg_base); | |
189 | outb(chip->entr2, cfg_base); | |
190 | ||
191 | /* Select Logical Device 5 Registers (UART2) */ | |
192 | outb(0x07, cfg_base); | |
193 | outb(0x05, cfg_base+1); | |
194 | ||
195 | /* Read Chip Identification Register */ | |
196 | outb(chip->cid_index, cfg_base); | |
197 | reg = inb(cfg_base+1); | |
198 | ||
199 | if (reg == chip->cid_value) | |
200 | { | |
a97a6f10 | 201 | IRDA_DEBUG(2, "%s(), Chip found at 0x%03x\n", __func__, cfg_base); |
1da177e4 LT |
202 | |
203 | outb(0x1F, cfg_base); | |
204 | revision = inb(cfg_base+1); | |
a97a6f10 | 205 | IRDA_DEBUG(2, "%s(), Found %s chip, revision=%d\n", __func__, |
1da177e4 LT |
206 | chip->name, revision); |
207 | ||
208 | /* | |
209 | * If the user supplies the base address, then | |
210 | * we init the chip, if not we probe the values | |
211 | * set by the BIOS | |
212 | */ | |
213 | if (io[i] < 2000) | |
214 | { | |
215 | chip->init(chip, &info); | |
216 | } | |
217 | else | |
218 | { | |
219 | chip->probe(chip, &info); | |
220 | } | |
221 | ||
222 | if (ali_ircc_open(i, &info) == 0) | |
223 | ret = 0; | |
224 | i++; | |
225 | } | |
226 | else | |
227 | { | |
a97a6f10 | 228 | IRDA_DEBUG(2, "%s(), No %s chip at 0x%03x\n", __func__, chip->name, cfg_base); |
1da177e4 LT |
229 | } |
230 | /* Exit configuration */ | |
231 | outb(0xbb, cfg_base); | |
232 | } | |
233 | } | |
234 | ||
a97a6f10 | 235 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
898b1d16 SO |
236 | |
237 | if (ret) | |
238 | platform_driver_unregister(&ali_ircc_driver); | |
239 | ||
1da177e4 LT |
240 | return ret; |
241 | } | |
242 | ||
243 | /* | |
244 | * Function ali_ircc_cleanup () | |
245 | * | |
246 | * Close all configured chips | |
247 | * | |
248 | */ | |
249 | static void __exit ali_ircc_cleanup(void) | |
250 | { | |
251 | int i; | |
252 | ||
a97a6f10 | 253 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 | 254 | |
9c3bd683 | 255 | for (i=0; i < ARRAY_SIZE(dev_self); i++) { |
1da177e4 LT |
256 | if (dev_self[i]) |
257 | ali_ircc_close(dev_self[i]); | |
258 | } | |
259 | ||
898b1d16 SO |
260 | platform_driver_unregister(&ali_ircc_driver); |
261 | ||
a97a6f10 | 262 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
263 | } |
264 | ||
2d44a222 SH |
265 | static const struct net_device_ops ali_ircc_sir_ops = { |
266 | .ndo_open = ali_ircc_net_open, | |
267 | .ndo_stop = ali_ircc_net_close, | |
268 | .ndo_start_xmit = ali_ircc_sir_hard_xmit, | |
269 | .ndo_do_ioctl = ali_ircc_net_ioctl, | |
270 | }; | |
271 | ||
272 | static const struct net_device_ops ali_ircc_fir_ops = { | |
273 | .ndo_open = ali_ircc_net_open, | |
274 | .ndo_stop = ali_ircc_net_close, | |
275 | .ndo_start_xmit = ali_ircc_fir_hard_xmit, | |
276 | .ndo_do_ioctl = ali_ircc_net_ioctl, | |
277 | }; | |
278 | ||
1da177e4 LT |
279 | /* |
280 | * Function ali_ircc_open (int i, chipio_t *inf) | |
281 | * | |
282 | * Open driver instance | |
283 | * | |
284 | */ | |
285 | static int ali_ircc_open(int i, chipio_t *info) | |
286 | { | |
287 | struct net_device *dev; | |
288 | struct ali_ircc_cb *self; | |
1da177e4 LT |
289 | int dongle_id; |
290 | int err; | |
291 | ||
a97a6f10 | 292 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
9c3bd683 BH |
293 | |
294 | if (i >= ARRAY_SIZE(dev_self)) { | |
295 | IRDA_ERROR("%s(), maximum number of supported chips reached!\n", | |
a97a6f10 | 296 | __func__); |
9c3bd683 BH |
297 | return -ENOMEM; |
298 | } | |
1da177e4 LT |
299 | |
300 | /* Set FIR FIFO and DMA Threshold */ | |
301 | if ((ali_ircc_setup(info)) == -1) | |
302 | return -1; | |
303 | ||
304 | dev = alloc_irdadev(sizeof(*self)); | |
305 | if (dev == NULL) { | |
306 | IRDA_ERROR("%s(), can't allocate memory for control block!\n", | |
a97a6f10 | 307 | __func__); |
1da177e4 LT |
308 | return -ENOMEM; |
309 | } | |
310 | ||
4cf1653a | 311 | self = netdev_priv(dev); |
1da177e4 LT |
312 | self->netdev = dev; |
313 | spin_lock_init(&self->lock); | |
314 | ||
315 | /* Need to store self somewhere */ | |
316 | dev_self[i] = self; | |
317 | self->index = i; | |
318 | ||
319 | /* Initialize IO */ | |
320 | self->io.cfg_base = info->cfg_base; /* In ali_ircc_probe_53 assign */ | |
321 | self->io.fir_base = info->fir_base; /* info->sir_base = info->fir_base */ | |
322 | self->io.sir_base = info->sir_base; /* ALi SIR and FIR use the same address */ | |
323 | self->io.irq = info->irq; | |
324 | self->io.fir_ext = CHIP_IO_EXTENT; | |
325 | self->io.dma = info->dma; | |
326 | self->io.fifo_size = 16; /* SIR: 16, FIR: 32 Benjamin 2000/11/1 */ | |
327 | ||
328 | /* Reserve the ioports that we need */ | |
898b1d16 SO |
329 | if (!request_region(self->io.fir_base, self->io.fir_ext, |
330 | ALI_IRCC_DRIVER_NAME)) { | |
a97a6f10 | 331 | IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", __func__, |
1da177e4 LT |
332 | self->io.fir_base); |
333 | err = -ENODEV; | |
334 | goto err_out1; | |
335 | } | |
336 | ||
337 | /* Initialize QoS for this device */ | |
338 | irda_init_max_qos_capabilies(&self->qos); | |
339 | ||
340 | /* The only value we must override it the baudrate */ | |
341 | self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600| | |
342 | IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8); // benjamin 2000/11/8 05:27PM | |
343 | ||
344 | self->qos.min_turn_time.bits = qos_mtt_bits; | |
345 | ||
346 | irda_qos_bits_to_value(&self->qos); | |
347 | ||
348 | /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */ | |
349 | self->rx_buff.truesize = 14384; | |
350 | self->tx_buff.truesize = 14384; | |
351 | ||
352 | /* Allocate memory if needed */ | |
353 | self->rx_buff.head = | |
ede23fa8 JP |
354 | dma_zalloc_coherent(NULL, self->rx_buff.truesize, |
355 | &self->rx_buff_dma, GFP_KERNEL); | |
1da177e4 LT |
356 | if (self->rx_buff.head == NULL) { |
357 | err = -ENOMEM; | |
358 | goto err_out2; | |
359 | } | |
1da177e4 LT |
360 | |
361 | self->tx_buff.head = | |
ede23fa8 JP |
362 | dma_zalloc_coherent(NULL, self->tx_buff.truesize, |
363 | &self->tx_buff_dma, GFP_KERNEL); | |
1da177e4 LT |
364 | if (self->tx_buff.head == NULL) { |
365 | err = -ENOMEM; | |
366 | goto err_out3; | |
367 | } | |
1da177e4 LT |
368 | |
369 | self->rx_buff.in_frame = FALSE; | |
370 | self->rx_buff.state = OUTSIDE_FRAME; | |
371 | self->tx_buff.data = self->tx_buff.head; | |
372 | self->rx_buff.data = self->rx_buff.head; | |
373 | ||
374 | /* Reset Tx queue info */ | |
375 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
376 | self->tx_fifo.tail = self->tx_buff.head; | |
377 | ||
1da177e4 | 378 | /* Override the network functions we need to use */ |
2d44a222 | 379 | dev->netdev_ops = &ali_ircc_sir_ops; |
1da177e4 LT |
380 | |
381 | err = register_netdev(dev); | |
382 | if (err) { | |
a97a6f10 | 383 | IRDA_ERROR("%s(), register_netdev() failed!\n", __func__); |
1da177e4 LT |
384 | goto err_out4; |
385 | } | |
386 | IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); | |
387 | ||
388 | /* Check dongle id */ | |
389 | dongle_id = ali_ircc_read_dongle_id(i, info); | |
a97a6f10 | 390 | IRDA_MESSAGE("%s(), %s, Found dongle: %s\n", __func__, |
898b1d16 | 391 | ALI_IRCC_DRIVER_NAME, dongle_types[dongle_id]); |
1da177e4 LT |
392 | |
393 | self->io.dongle_id = dongle_id; | |
1da177e4 | 394 | |
a97a6f10 | 395 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
396 | |
397 | return 0; | |
398 | ||
399 | err_out4: | |
400 | dma_free_coherent(NULL, self->tx_buff.truesize, | |
401 | self->tx_buff.head, self->tx_buff_dma); | |
402 | err_out3: | |
403 | dma_free_coherent(NULL, self->rx_buff.truesize, | |
404 | self->rx_buff.head, self->rx_buff_dma); | |
405 | err_out2: | |
406 | release_region(self->io.fir_base, self->io.fir_ext); | |
407 | err_out1: | |
408 | dev_self[i] = NULL; | |
409 | free_netdev(dev); | |
410 | return err; | |
411 | } | |
412 | ||
413 | ||
414 | /* | |
415 | * Function ali_ircc_close (self) | |
416 | * | |
417 | * Close driver instance | |
418 | * | |
419 | */ | |
420 | static int __exit ali_ircc_close(struct ali_ircc_cb *self) | |
421 | { | |
422 | int iobase; | |
423 | ||
a97a6f10 | 424 | IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
425 | |
426 | IRDA_ASSERT(self != NULL, return -1;); | |
427 | ||
428 | iobase = self->io.fir_base; | |
429 | ||
430 | /* Remove netdevice */ | |
431 | unregister_netdev(self->netdev); | |
432 | ||
433 | /* Release the PORT that this driver is using */ | |
a97a6f10 | 434 | IRDA_DEBUG(4, "%s(), Releasing Region %03x\n", __func__, self->io.fir_base); |
1da177e4 LT |
435 | release_region(self->io.fir_base, self->io.fir_ext); |
436 | ||
437 | if (self->tx_buff.head) | |
438 | dma_free_coherent(NULL, self->tx_buff.truesize, | |
439 | self->tx_buff.head, self->tx_buff_dma); | |
440 | ||
441 | if (self->rx_buff.head) | |
442 | dma_free_coherent(NULL, self->rx_buff.truesize, | |
443 | self->rx_buff.head, self->rx_buff_dma); | |
444 | ||
445 | dev_self[self->index] = NULL; | |
446 | free_netdev(self->netdev); | |
447 | ||
a97a6f10 | 448 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
449 | |
450 | return 0; | |
451 | } | |
452 | ||
453 | /* | |
454 | * Function ali_ircc_init_43 (chip, info) | |
455 | * | |
456 | * Initialize the ALi M1543 chip. | |
457 | */ | |
458 | static int ali_ircc_init_43(ali_chip_t *chip, chipio_t *info) | |
459 | { | |
460 | /* All controller information like I/O address, DMA channel, IRQ | |
461 | * are set by BIOS | |
462 | */ | |
463 | ||
464 | return 0; | |
465 | } | |
466 | ||
467 | /* | |
468 | * Function ali_ircc_init_53 (chip, info) | |
469 | * | |
470 | * Initialize the ALi M1535 chip. | |
471 | */ | |
472 | static int ali_ircc_init_53(ali_chip_t *chip, chipio_t *info) | |
473 | { | |
474 | /* All controller information like I/O address, DMA channel, IRQ | |
475 | * are set by BIOS | |
476 | */ | |
477 | ||
478 | return 0; | |
479 | } | |
480 | ||
481 | /* | |
482 | * Function ali_ircc_probe_53 (chip, info) | |
483 | * | |
484 | * Probes for the ALi M1535D or M1535 | |
485 | */ | |
486 | static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info) | |
487 | { | |
488 | int cfg_base = info->cfg_base; | |
489 | int hi, low, reg; | |
490 | ||
a97a6f10 | 491 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
492 | |
493 | /* Enter Configuration */ | |
494 | outb(chip->entr1, cfg_base); | |
495 | outb(chip->entr2, cfg_base); | |
496 | ||
497 | /* Select Logical Device 5 Registers (UART2) */ | |
498 | outb(0x07, cfg_base); | |
499 | outb(0x05, cfg_base+1); | |
500 | ||
501 | /* Read address control register */ | |
502 | outb(0x60, cfg_base); | |
503 | hi = inb(cfg_base+1); | |
504 | outb(0x61, cfg_base); | |
505 | low = inb(cfg_base+1); | |
506 | info->fir_base = (hi<<8) + low; | |
507 | ||
508 | info->sir_base = info->fir_base; | |
509 | ||
a97a6f10 | 510 | IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__, info->fir_base); |
1da177e4 LT |
511 | |
512 | /* Read IRQ control register */ | |
513 | outb(0x70, cfg_base); | |
514 | reg = inb(cfg_base+1); | |
515 | info->irq = reg & 0x0f; | |
a97a6f10 | 516 | IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq); |
1da177e4 LT |
517 | |
518 | /* Read DMA channel */ | |
519 | outb(0x74, cfg_base); | |
520 | reg = inb(cfg_base+1); | |
521 | info->dma = reg & 0x07; | |
522 | ||
523 | if(info->dma == 0x04) | |
a97a6f10 | 524 | IRDA_WARNING("%s(), No DMA channel assigned !\n", __func__); |
1da177e4 | 525 | else |
a97a6f10 | 526 | IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma); |
1da177e4 LT |
527 | |
528 | /* Read Enabled Status */ | |
529 | outb(0x30, cfg_base); | |
530 | reg = inb(cfg_base+1); | |
531 | info->enabled = (reg & 0x80) && (reg & 0x01); | |
a97a6f10 | 532 | IRDA_DEBUG(2, "%s(), probing enabled=%d\n", __func__, info->enabled); |
1da177e4 LT |
533 | |
534 | /* Read Power Status */ | |
535 | outb(0x22, cfg_base); | |
536 | reg = inb(cfg_base+1); | |
537 | info->suspended = (reg & 0x20); | |
a97a6f10 | 538 | IRDA_DEBUG(2, "%s(), probing suspended=%d\n", __func__, info->suspended); |
1da177e4 LT |
539 | |
540 | /* Exit configuration */ | |
541 | outb(0xbb, cfg_base); | |
542 | ||
a97a6f10 | 543 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
544 | |
545 | return 0; | |
546 | } | |
547 | ||
548 | /* | |
549 | * Function ali_ircc_setup (info) | |
550 | * | |
551 | * Set FIR FIFO and DMA Threshold | |
552 | * Returns non-negative on success. | |
553 | * | |
554 | */ | |
555 | static int ali_ircc_setup(chipio_t *info) | |
556 | { | |
557 | unsigned char tmp; | |
558 | int version; | |
559 | int iobase = info->fir_base; | |
560 | ||
a97a6f10 | 561 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
562 | |
563 | /* Locking comments : | |
564 | * Most operations here need to be protected. We are called before | |
565 | * the device instance is created in ali_ircc_open(), therefore | |
566 | * nobody can bother us - Jean II */ | |
567 | ||
568 | /* Switch to FIR space */ | |
569 | SIR2FIR(iobase); | |
570 | ||
571 | /* Master Reset */ | |
572 | outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM | |
573 | ||
574 | /* Read FIR ID Version Register */ | |
575 | switch_bank(iobase, BANK3); | |
576 | version = inb(iobase+FIR_ID_VR); | |
577 | ||
578 | /* Should be 0x00 in the M1535/M1535D */ | |
579 | if(version != 0x00) | |
580 | { | |
898b1d16 SO |
581 | IRDA_ERROR("%s, Wrong chip version %02x\n", |
582 | ALI_IRCC_DRIVER_NAME, version); | |
1da177e4 LT |
583 | return -1; |
584 | } | |
585 | ||
1da177e4 LT |
586 | /* Set FIR FIFO Threshold Register */ |
587 | switch_bank(iobase, BANK1); | |
588 | outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR); | |
589 | ||
590 | /* Set FIR DMA Threshold Register */ | |
591 | outb(RX_DMA_Threshold, iobase+FIR_DMA_TR); | |
592 | ||
593 | /* CRC enable */ | |
594 | switch_bank(iobase, BANK2); | |
595 | outb(inb(iobase+FIR_IRDA_CR) | IRDA_CR_CRC, iobase+FIR_IRDA_CR); | |
596 | ||
597 | /* NDIS driver set TX Length here BANK2 Alias 3, Alias4*/ | |
598 | ||
599 | /* Switch to Bank 0 */ | |
600 | switch_bank(iobase, BANK0); | |
601 | ||
602 | tmp = inb(iobase+FIR_LCR_B); | |
603 | tmp &=~0x20; // disable SIP | |
604 | tmp |= 0x80; // these two steps make RX mode | |
605 | tmp &= 0xbf; | |
606 | outb(tmp, iobase+FIR_LCR_B); | |
607 | ||
608 | /* Disable Interrupt */ | |
609 | outb(0x00, iobase+FIR_IER); | |
610 | ||
611 | ||
612 | /* Switch to SIR space */ | |
613 | FIR2SIR(iobase); | |
614 | ||
898b1d16 SO |
615 | IRDA_MESSAGE("%s, driver loaded (Benjamin Kong)\n", |
616 | ALI_IRCC_DRIVER_NAME); | |
1da177e4 LT |
617 | |
618 | /* Enable receive interrupts */ | |
619 | // outb(UART_IER_RDI, iobase+UART_IER); //benjamin 2000/11/23 01:25PM | |
620 | // Turn on the interrupts in ali_ircc_net_open | |
621 | ||
a97a6f10 | 622 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
623 | |
624 | return 0; | |
625 | } | |
626 | ||
627 | /* | |
628 | * Function ali_ircc_read_dongle_id (int index, info) | |
629 | * | |
3f79410c | 630 | * Try to read dongle identification. This procedure needs to be executed |
1da177e4 LT |
631 | * once after power-on/reset. It also needs to be used whenever you suspect |
632 | * that the user may have plugged/unplugged the IrDA Dongle. | |
633 | */ | |
634 | static int ali_ircc_read_dongle_id (int i, chipio_t *info) | |
635 | { | |
636 | int dongle_id, reg; | |
637 | int cfg_base = info->cfg_base; | |
638 | ||
a97a6f10 | 639 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
640 | |
641 | /* Enter Configuration */ | |
642 | outb(chips[i].entr1, cfg_base); | |
643 | outb(chips[i].entr2, cfg_base); | |
644 | ||
645 | /* Select Logical Device 5 Registers (UART2) */ | |
646 | outb(0x07, cfg_base); | |
647 | outb(0x05, cfg_base+1); | |
648 | ||
649 | /* Read Dongle ID */ | |
650 | outb(0xf0, cfg_base); | |
651 | reg = inb(cfg_base+1); | |
652 | dongle_id = ((reg>>6)&0x02) | ((reg>>5)&0x01); | |
a97a6f10 | 653 | IRDA_DEBUG(2, "%s(), probing dongle_id=%d, dongle_types=%s\n", __func__, |
1da177e4 LT |
654 | dongle_id, dongle_types[dongle_id]); |
655 | ||
656 | /* Exit configuration */ | |
657 | outb(0xbb, cfg_base); | |
658 | ||
a97a6f10 | 659 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
660 | |
661 | return dongle_id; | |
662 | } | |
663 | ||
664 | /* | |
665 | * Function ali_ircc_interrupt (irq, dev_id, regs) | |
666 | * | |
667 | * An interrupt from the chip has arrived. Time to do some work | |
668 | * | |
669 | */ | |
7d12e780 | 670 | static irqreturn_t ali_ircc_interrupt(int irq, void *dev_id) |
1da177e4 | 671 | { |
c31f28e7 | 672 | struct net_device *dev = dev_id; |
1da177e4 LT |
673 | struct ali_ircc_cb *self; |
674 | int ret; | |
675 | ||
a97a6f10 | 676 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 | 677 | |
4cf1653a | 678 | self = netdev_priv(dev); |
1da177e4 LT |
679 | |
680 | spin_lock(&self->lock); | |
681 | ||
682 | /* Dispatch interrupt handler for the current speed */ | |
683 | if (self->io.speed > 115200) | |
684 | ret = ali_ircc_fir_interrupt(self); | |
685 | else | |
686 | ret = ali_ircc_sir_interrupt(self); | |
687 | ||
688 | spin_unlock(&self->lock); | |
689 | ||
a97a6f10 | 690 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
691 | return ret; |
692 | } | |
693 | /* | |
694 | * Function ali_ircc_fir_interrupt(irq, struct ali_ircc_cb *self) | |
695 | * | |
696 | * Handle MIR/FIR interrupt | |
697 | * | |
698 | */ | |
699 | static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self) | |
700 | { | |
701 | __u8 eir, OldMessageCount; | |
702 | int iobase, tmp; | |
703 | ||
a97a6f10 | 704 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
705 | |
706 | iobase = self->io.fir_base; | |
707 | ||
708 | switch_bank(iobase, BANK0); | |
709 | self->InterruptID = inb(iobase+FIR_IIR); | |
710 | self->BusStatus = inb(iobase+FIR_BSR); | |
711 | ||
712 | OldMessageCount = (self->LineStatus + 1) & 0x07; | |
713 | self->LineStatus = inb(iobase+FIR_LSR); | |
714 | //self->ier = inb(iobase+FIR_IER); 2000/12/1 04:32PM | |
715 | eir = self->InterruptID & self->ier; /* Mask out the interesting ones */ | |
716 | ||
a97a6f10 HH |
717 | IRDA_DEBUG(1, "%s(), self->InterruptID = %x\n", __func__,self->InterruptID); |
718 | IRDA_DEBUG(1, "%s(), self->LineStatus = %x\n", __func__,self->LineStatus); | |
719 | IRDA_DEBUG(1, "%s(), self->ier = %x\n", __func__,self->ier); | |
720 | IRDA_DEBUG(1, "%s(), eir = %x\n", __func__,eir); | |
1da177e4 LT |
721 | |
722 | /* Disable interrupts */ | |
723 | SetCOMInterrupts(self, FALSE); | |
724 | ||
725 | /* Tx or Rx Interrupt */ | |
726 | ||
727 | if (eir & IIR_EOM) | |
728 | { | |
729 | if (self->io.direction == IO_XMIT) /* TX */ | |
730 | { | |
a97a6f10 | 731 | IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Tx) *******\n", __func__); |
1da177e4 LT |
732 | |
733 | if(ali_ircc_dma_xmit_complete(self)) | |
734 | { | |
735 | if (irda_device_txqueue_empty(self->netdev)) | |
736 | { | |
737 | /* Prepare for receive */ | |
738 | ali_ircc_dma_receive(self); | |
739 | self->ier = IER_EOM; | |
740 | } | |
741 | } | |
742 | else | |
743 | { | |
744 | self->ier = IER_EOM; | |
745 | } | |
746 | ||
747 | } | |
748 | else /* RX */ | |
749 | { | |
a97a6f10 | 750 | IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Rx) *******\n", __func__); |
1da177e4 LT |
751 | |
752 | if(OldMessageCount > ((self->LineStatus+1) & 0x07)) | |
753 | { | |
754 | self->rcvFramesOverflow = TRUE; | |
19299b34 | 755 | IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE ********\n", __func__); |
1da177e4 LT |
756 | } |
757 | ||
758 | if (ali_ircc_dma_receive_complete(self)) | |
759 | { | |
19299b34 | 760 | IRDA_DEBUG(1, "%s(), ******* receive complete ********\n", __func__); |
1da177e4 LT |
761 | |
762 | self->ier = IER_EOM; | |
763 | } | |
764 | else | |
765 | { | |
19299b34 | 766 | IRDA_DEBUG(1, "%s(), ******* Not receive complete ********\n", __func__); |
1da177e4 LT |
767 | |
768 | self->ier = IER_EOM | IER_TIMER; | |
769 | } | |
770 | ||
771 | } | |
772 | } | |
773 | /* Timer Interrupt */ | |
774 | else if (eir & IIR_TIMER) | |
775 | { | |
776 | if(OldMessageCount > ((self->LineStatus+1) & 0x07)) | |
777 | { | |
778 | self->rcvFramesOverflow = TRUE; | |
19299b34 | 779 | IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE *******\n", __func__); |
1da177e4 LT |
780 | } |
781 | /* Disable Timer */ | |
782 | switch_bank(iobase, BANK1); | |
783 | tmp = inb(iobase+FIR_CR); | |
784 | outb( tmp& ~CR_TIMER_EN, iobase+FIR_CR); | |
785 | ||
786 | /* Check if this is a Tx timer interrupt */ | |
787 | if (self->io.direction == IO_XMIT) | |
788 | { | |
789 | ali_ircc_dma_xmit(self); | |
790 | ||
791 | /* Interrupt on EOM */ | |
792 | self->ier = IER_EOM; | |
793 | ||
794 | } | |
795 | else /* Rx */ | |
796 | { | |
797 | if(ali_ircc_dma_receive_complete(self)) | |
798 | { | |
799 | self->ier = IER_EOM; | |
800 | } | |
801 | else | |
802 | { | |
803 | self->ier = IER_EOM | IER_TIMER; | |
804 | } | |
805 | } | |
806 | } | |
807 | ||
808 | /* Restore Interrupt */ | |
809 | SetCOMInterrupts(self, TRUE); | |
810 | ||
a97a6f10 | 811 | IRDA_DEBUG(1, "%s(), ----------------- End ---------------\n", __func__); |
1da177e4 LT |
812 | return IRQ_RETVAL(eir); |
813 | } | |
814 | ||
815 | /* | |
816 | * Function ali_ircc_sir_interrupt (irq, self, eir) | |
817 | * | |
818 | * Handle SIR interrupt | |
819 | * | |
820 | */ | |
821 | static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self) | |
822 | { | |
823 | int iobase; | |
824 | int iir, lsr; | |
825 | ||
a97a6f10 | 826 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
827 | |
828 | iobase = self->io.sir_base; | |
829 | ||
830 | iir = inb(iobase+UART_IIR) & UART_IIR_ID; | |
831 | if (iir) { | |
832 | /* Clear interrupt */ | |
833 | lsr = inb(iobase+UART_LSR); | |
834 | ||
a97a6f10 | 835 | IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n", __func__, |
1da177e4 LT |
836 | iir, lsr, iobase); |
837 | ||
838 | switch (iir) | |
839 | { | |
840 | case UART_IIR_RLSI: | |
a97a6f10 | 841 | IRDA_DEBUG(2, "%s(), RLSI\n", __func__); |
1da177e4 LT |
842 | break; |
843 | case UART_IIR_RDI: | |
844 | /* Receive interrupt */ | |
845 | ali_ircc_sir_receive(self); | |
846 | break; | |
847 | case UART_IIR_THRI: | |
848 | if (lsr & UART_LSR_THRE) | |
849 | { | |
850 | /* Transmitter ready for data */ | |
851 | ali_ircc_sir_write_wakeup(self); | |
852 | } | |
853 | break; | |
854 | default: | |
a97a6f10 | 855 | IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n", __func__, iir); |
1da177e4 LT |
856 | break; |
857 | } | |
858 | ||
859 | } | |
860 | ||
861 | ||
a97a6f10 | 862 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
863 | |
864 | return IRQ_RETVAL(iir); | |
865 | } | |
866 | ||
867 | ||
868 | /* | |
869 | * Function ali_ircc_sir_receive (self) | |
870 | * | |
871 | * Receive one frame from the infrared port | |
872 | * | |
873 | */ | |
874 | static void ali_ircc_sir_receive(struct ali_ircc_cb *self) | |
875 | { | |
876 | int boguscount = 0; | |
877 | int iobase; | |
878 | ||
a97a6f10 | 879 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
880 | IRDA_ASSERT(self != NULL, return;); |
881 | ||
882 | iobase = self->io.sir_base; | |
883 | ||
884 | /* | |
885 | * Receive all characters in Rx FIFO, unwrap and unstuff them. | |
886 | * async_unwrap_char will deliver all found frames | |
887 | */ | |
888 | do { | |
af049081 | 889 | async_unwrap_char(self->netdev, &self->netdev->stats, &self->rx_buff, |
1da177e4 LT |
890 | inb(iobase+UART_RX)); |
891 | ||
892 | /* Make sure we don't stay here too long */ | |
893 | if (boguscount++ > 32) { | |
a97a6f10 | 894 | IRDA_DEBUG(2,"%s(), breaking!\n", __func__); |
1da177e4 LT |
895 | break; |
896 | } | |
897 | } while (inb(iobase+UART_LSR) & UART_LSR_DR); | |
898 | ||
a97a6f10 | 899 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
900 | } |
901 | ||
902 | /* | |
903 | * Function ali_ircc_sir_write_wakeup (tty) | |
904 | * | |
905 | * Called by the driver when there's room for more data. If we have | |
906 | * more packets to send, we send them here. | |
907 | * | |
908 | */ | |
909 | static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self) | |
910 | { | |
911 | int actual = 0; | |
912 | int iobase; | |
913 | ||
914 | IRDA_ASSERT(self != NULL, return;); | |
915 | ||
a97a6f10 | 916 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
917 | |
918 | iobase = self->io.sir_base; | |
919 | ||
920 | /* Finished with frame? */ | |
921 | if (self->tx_buff.len > 0) | |
922 | { | |
923 | /* Write data left in transmit buffer */ | |
924 | actual = ali_ircc_sir_write(iobase, self->io.fifo_size, | |
925 | self->tx_buff.data, self->tx_buff.len); | |
926 | self->tx_buff.data += actual; | |
927 | self->tx_buff.len -= actual; | |
928 | } | |
929 | else | |
930 | { | |
931 | if (self->new_speed) | |
932 | { | |
933 | /* We must wait until all data are gone */ | |
934 | while(!(inb(iobase+UART_LSR) & UART_LSR_TEMT)) | |
a97a6f10 | 935 | IRDA_DEBUG(1, "%s(), UART_LSR_THRE\n", __func__ ); |
1da177e4 | 936 | |
a97a6f10 | 937 | IRDA_DEBUG(1, "%s(), Changing speed! self->new_speed = %d\n", __func__ , self->new_speed); |
1da177e4 LT |
938 | ali_ircc_change_speed(self, self->new_speed); |
939 | self->new_speed = 0; | |
940 | ||
941 | // benjamin 2000/11/10 06:32PM | |
942 | if (self->io.speed > 115200) | |
943 | { | |
19299b34 | 944 | IRDA_DEBUG(2, "%s(), ali_ircc_change_speed from UART_LSR_TEMT\n", __func__ ); |
1da177e4 LT |
945 | |
946 | self->ier = IER_EOM; | |
947 | // SetCOMInterrupts(self, TRUE); | |
948 | return; | |
949 | } | |
950 | } | |
951 | else | |
952 | { | |
953 | netif_wake_queue(self->netdev); | |
954 | } | |
955 | ||
af049081 | 956 | self->netdev->stats.tx_packets++; |
1da177e4 LT |
957 | |
958 | /* Turn on receive interrupts */ | |
959 | outb(UART_IER_RDI, iobase+UART_IER); | |
960 | } | |
961 | ||
a97a6f10 | 962 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
963 | } |
964 | ||
965 | static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud) | |
966 | { | |
967 | struct net_device *dev = self->netdev; | |
968 | int iobase; | |
969 | ||
a97a6f10 | 970 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 | 971 | |
19299b34 | 972 | IRDA_DEBUG(2, "%s(), setting speed = %d\n", __func__ , baud); |
1da177e4 LT |
973 | |
974 | /* This function *must* be called with irq off and spin-lock. | |
975 | * - Jean II */ | |
976 | ||
977 | iobase = self->io.fir_base; | |
978 | ||
979 | SetCOMInterrupts(self, FALSE); // 2000/11/24 11:43AM | |
980 | ||
981 | /* Go to MIR, FIR Speed */ | |
982 | if (baud > 115200) | |
983 | { | |
984 | ||
985 | ||
986 | ali_ircc_fir_change_speed(self, baud); | |
987 | ||
988 | /* Install FIR xmit handler*/ | |
2d44a222 | 989 | dev->netdev_ops = &ali_ircc_fir_ops; |
1da177e4 LT |
990 | |
991 | /* Enable Interuupt */ | |
992 | self->ier = IER_EOM; // benjamin 2000/11/20 07:24PM | |
993 | ||
d82603c6 | 994 | /* Be ready for incoming frames */ |
1da177e4 LT |
995 | ali_ircc_dma_receive(self); // benajmin 2000/11/8 07:46PM not complete |
996 | } | |
997 | /* Go to SIR Speed */ | |
998 | else | |
999 | { | |
1000 | ali_ircc_sir_change_speed(self, baud); | |
1001 | ||
1002 | /* Install SIR xmit handler*/ | |
2d44a222 | 1003 | dev->netdev_ops = &ali_ircc_sir_ops; |
1da177e4 LT |
1004 | } |
1005 | ||
1006 | ||
1007 | SetCOMInterrupts(self, TRUE); // 2000/11/24 11:43AM | |
1008 | ||
1009 | netif_wake_queue(self->netdev); | |
1010 | ||
a97a6f10 | 1011 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1012 | } |
1013 | ||
1014 | static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 baud) | |
1015 | { | |
1016 | ||
1017 | int iobase; | |
c2fd03a0 | 1018 | struct ali_ircc_cb *self = priv; |
1da177e4 LT |
1019 | struct net_device *dev; |
1020 | ||
a97a6f10 | 1021 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1022 | |
1023 | IRDA_ASSERT(self != NULL, return;); | |
1024 | ||
1025 | dev = self->netdev; | |
1026 | iobase = self->io.fir_base; | |
1027 | ||
a97a6f10 | 1028 | IRDA_DEBUG(1, "%s(), self->io.speed = %d, change to speed = %d\n", __func__ ,self->io.speed,baud); |
1da177e4 LT |
1029 | |
1030 | /* Come from SIR speed */ | |
1031 | if(self->io.speed <=115200) | |
1032 | { | |
1033 | SIR2FIR(iobase); | |
1034 | } | |
1035 | ||
1036 | /* Update accounting for new speed */ | |
1037 | self->io.speed = baud; | |
1038 | ||
1039 | // Set Dongle Speed mode | |
1040 | ali_ircc_change_dongle_speed(self, baud); | |
1041 | ||
a97a6f10 | 1042 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1043 | } |
1044 | ||
1045 | /* | |
1046 | * Function ali_sir_change_speed (self, speed) | |
1047 | * | |
1048 | * Set speed of IrDA port to specified baudrate | |
1049 | * | |
1050 | */ | |
1051 | static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed) | |
1052 | { | |
c2fd03a0 | 1053 | struct ali_ircc_cb *self = priv; |
1da177e4 LT |
1054 | unsigned long flags; |
1055 | int iobase; | |
1056 | int fcr; /* FIFO control reg */ | |
1057 | int lcr; /* Line control reg */ | |
1058 | int divisor; | |
1059 | ||
a97a6f10 | 1060 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 | 1061 | |
a97a6f10 | 1062 | IRDA_DEBUG(1, "%s(), Setting speed to: %d\n", __func__ , speed); |
1da177e4 LT |
1063 | |
1064 | IRDA_ASSERT(self != NULL, return;); | |
1065 | ||
1066 | iobase = self->io.sir_base; | |
1067 | ||
1068 | /* Come from MIR or FIR speed */ | |
1069 | if(self->io.speed >115200) | |
1070 | { | |
1071 | // Set Dongle Speed mode first | |
1072 | ali_ircc_change_dongle_speed(self, speed); | |
1073 | ||
1074 | FIR2SIR(iobase); | |
1075 | } | |
1076 | ||
1077 | // Clear Line and Auxiluary status registers 2000/11/24 11:47AM | |
1078 | ||
1079 | inb(iobase+UART_LSR); | |
1080 | inb(iobase+UART_SCR); | |
1081 | ||
1082 | /* Update accounting for new speed */ | |
1083 | self->io.speed = speed; | |
1084 | ||
1085 | spin_lock_irqsave(&self->lock, flags); | |
1086 | ||
1087 | divisor = 115200/speed; | |
1088 | ||
1089 | fcr = UART_FCR_ENABLE_FIFO; | |
1090 | ||
1091 | /* | |
1092 | * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and | |
1093 | * almost 1,7 ms at 19200 bps. At speeds above that we can just forget | |
1094 | * about this timeout since it will always be fast enough. | |
1095 | */ | |
1096 | if (self->io.speed < 38400) | |
1097 | fcr |= UART_FCR_TRIGGER_1; | |
1098 | else | |
1099 | fcr |= UART_FCR_TRIGGER_14; | |
1100 | ||
1101 | /* IrDA ports use 8N1 */ | |
1102 | lcr = UART_LCR_WLEN8; | |
1103 | ||
1104 | outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */ | |
1105 | outb(divisor & 0xff, iobase+UART_DLL); /* Set speed */ | |
1106 | outb(divisor >> 8, iobase+UART_DLM); | |
1107 | outb(lcr, iobase+UART_LCR); /* Set 8N1 */ | |
1108 | outb(fcr, iobase+UART_FCR); /* Enable FIFO's */ | |
1109 | ||
25985edc | 1110 | /* without this, the connection will be broken after come back from FIR speed, |
1da177e4 LT |
1111 | but with this, the SIR connection is harder to established */ |
1112 | outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR); | |
1113 | ||
1114 | spin_unlock_irqrestore(&self->lock, flags); | |
1115 | ||
a97a6f10 | 1116 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1117 | } |
1118 | ||
1119 | static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed) | |
1120 | { | |
1121 | ||
c2fd03a0 | 1122 | struct ali_ircc_cb *self = priv; |
1da177e4 LT |
1123 | int iobase,dongle_id; |
1124 | int tmp = 0; | |
1125 | ||
a97a6f10 | 1126 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1127 | |
1128 | iobase = self->io.fir_base; /* or iobase = self->io.sir_base; */ | |
1129 | dongle_id = self->io.dongle_id; | |
1130 | ||
1131 | /* We are already locked, no need to do it again */ | |
1132 | ||
a97a6f10 | 1133 | IRDA_DEBUG(1, "%s(), Set Speed for %s , Speed = %d\n", __func__ , dongle_types[dongle_id], speed); |
1da177e4 LT |
1134 | |
1135 | switch_bank(iobase, BANK2); | |
1136 | tmp = inb(iobase+FIR_IRDA_CR); | |
1137 | ||
1138 | /* IBM type dongle */ | |
1139 | if(dongle_id == 0) | |
1140 | { | |
1141 | if(speed == 4000000) | |
1142 | { | |
1143 | // __ __ | |
1144 | // SD/MODE __| |__ __ | |
1145 | // __ __ | |
1146 | // IRTX __ __| |__ | |
1147 | // T1 T2 T3 T4 T5 | |
1148 | ||
1149 | tmp &= ~IRDA_CR_HDLC; // HDLC=0 | |
1150 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1151 | ||
1152 | switch_bank(iobase, BANK2); | |
1153 | outb(tmp, iobase+FIR_IRDA_CR); | |
1154 | ||
1155 | // T1 -> SD/MODE:0 IRTX:0 | |
1156 | tmp &= ~0x09; | |
1157 | tmp |= 0x02; | |
1158 | outb(tmp, iobase+FIR_IRDA_CR); | |
1159 | udelay(2); | |
1160 | ||
1161 | // T2 -> SD/MODE:1 IRTX:0 | |
1162 | tmp &= ~0x01; | |
1163 | tmp |= 0x0a; | |
1164 | outb(tmp, iobase+FIR_IRDA_CR); | |
1165 | udelay(2); | |
1166 | ||
1167 | // T3 -> SD/MODE:1 IRTX:1 | |
1168 | tmp |= 0x0b; | |
1169 | outb(tmp, iobase+FIR_IRDA_CR); | |
1170 | udelay(2); | |
1171 | ||
1172 | // T4 -> SD/MODE:0 IRTX:1 | |
1173 | tmp &= ~0x08; | |
1174 | tmp |= 0x03; | |
1175 | outb(tmp, iobase+FIR_IRDA_CR); | |
1176 | udelay(2); | |
1177 | ||
1178 | // T5 -> SD/MODE:0 IRTX:0 | |
1179 | tmp &= ~0x09; | |
1180 | tmp |= 0x02; | |
1181 | outb(tmp, iobase+FIR_IRDA_CR); | |
1182 | udelay(2); | |
1183 | ||
1184 | // reset -> Normal TX output Signal | |
1185 | outb(tmp & ~0x02, iobase+FIR_IRDA_CR); | |
1186 | } | |
1187 | else /* speed <=1152000 */ | |
1188 | { | |
1189 | // __ | |
1190 | // SD/MODE __| |__ | |
1191 | // | |
1192 | // IRTX ________ | |
1193 | // T1 T2 T3 | |
1194 | ||
1195 | /* MIR 115200, 57600 */ | |
1196 | if (speed==1152000) | |
1197 | { | |
1198 | tmp |= 0xA0; //HDLC=1, 1.152Mbps=1 | |
1199 | } | |
1200 | else | |
1201 | { | |
1202 | tmp &=~0x80; //HDLC 0.576Mbps | |
1203 | tmp |= 0x20; //HDLC=1, | |
1204 | } | |
1205 | ||
1206 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1207 | ||
1208 | switch_bank(iobase, BANK2); | |
1209 | outb(tmp, iobase+FIR_IRDA_CR); | |
1210 | ||
1211 | /* MIR 115200, 57600 */ | |
1212 | ||
1213 | //switch_bank(iobase, BANK2); | |
1214 | // T1 -> SD/MODE:0 IRTX:0 | |
1215 | tmp &= ~0x09; | |
1216 | tmp |= 0x02; | |
1217 | outb(tmp, iobase+FIR_IRDA_CR); | |
1218 | udelay(2); | |
1219 | ||
1220 | // T2 -> SD/MODE:1 IRTX:0 | |
1221 | tmp &= ~0x01; | |
1222 | tmp |= 0x0a; | |
1223 | outb(tmp, iobase+FIR_IRDA_CR); | |
1224 | ||
1225 | // T3 -> SD/MODE:0 IRTX:0 | |
1226 | tmp &= ~0x09; | |
1227 | tmp |= 0x02; | |
1228 | outb(tmp, iobase+FIR_IRDA_CR); | |
1229 | udelay(2); | |
1230 | ||
1231 | // reset -> Normal TX output Signal | |
1232 | outb(tmp & ~0x02, iobase+FIR_IRDA_CR); | |
1233 | } | |
1234 | } | |
1235 | else if (dongle_id == 1) /* HP HDSL-3600 */ | |
1236 | { | |
1237 | switch(speed) | |
1238 | { | |
1239 | case 4000000: | |
1240 | tmp &= ~IRDA_CR_HDLC; // HDLC=0 | |
1241 | break; | |
1242 | ||
1243 | case 1152000: | |
1244 | tmp |= 0xA0; // HDLC=1, 1.152Mbps=1 | |
1245 | break; | |
1246 | ||
1247 | case 576000: | |
1248 | tmp &=~0x80; // HDLC 0.576Mbps | |
1249 | tmp |= 0x20; // HDLC=1, | |
1250 | break; | |
1251 | } | |
1252 | ||
1253 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1254 | ||
1255 | switch_bank(iobase, BANK2); | |
1256 | outb(tmp, iobase+FIR_IRDA_CR); | |
1257 | } | |
1258 | else /* HP HDSL-1100 */ | |
1259 | { | |
1260 | if(speed <= 115200) /* SIR */ | |
1261 | { | |
1262 | ||
1263 | tmp &= ~IRDA_CR_FIR_SIN; // HP sin select = 0 | |
1264 | ||
1265 | switch_bank(iobase, BANK2); | |
1266 | outb(tmp, iobase+FIR_IRDA_CR); | |
1267 | } | |
1268 | else /* MIR FIR */ | |
1269 | { | |
1270 | ||
1271 | switch(speed) | |
1272 | { | |
1273 | case 4000000: | |
1274 | tmp &= ~IRDA_CR_HDLC; // HDLC=0 | |
1275 | break; | |
1276 | ||
1277 | case 1152000: | |
1278 | tmp |= 0xA0; // HDLC=1, 1.152Mbps=1 | |
1279 | break; | |
1280 | ||
1281 | case 576000: | |
1282 | tmp &=~0x80; // HDLC 0.576Mbps | |
1283 | tmp |= 0x20; // HDLC=1, | |
1284 | break; | |
1285 | } | |
1286 | ||
1287 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1288 | tmp |= IRDA_CR_FIR_SIN; // HP sin select = 1 | |
1289 | ||
1290 | switch_bank(iobase, BANK2); | |
1291 | outb(tmp, iobase+FIR_IRDA_CR); | |
1292 | } | |
1293 | } | |
1294 | ||
1295 | switch_bank(iobase, BANK0); | |
1296 | ||
a97a6f10 | 1297 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1298 | } |
1299 | ||
1300 | /* | |
1301 | * Function ali_ircc_sir_write (driver) | |
1302 | * | |
1303 | * Fill Tx FIFO with transmit data | |
1304 | * | |
1305 | */ | |
1306 | static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len) | |
1307 | { | |
1308 | int actual = 0; | |
1309 | ||
a97a6f10 | 1310 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1311 | |
1312 | /* Tx FIFO should be empty! */ | |
1313 | if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) { | |
a97a6f10 | 1314 | IRDA_DEBUG(0, "%s(), failed, fifo not empty!\n", __func__ ); |
1da177e4 LT |
1315 | return 0; |
1316 | } | |
1317 | ||
1318 | /* Fill FIFO with current frame */ | |
1319 | while ((fifo_size-- > 0) && (actual < len)) { | |
1320 | /* Transmit next byte */ | |
1321 | outb(buf[actual], iobase+UART_TX); | |
1322 | ||
1323 | actual++; | |
1324 | } | |
1325 | ||
a97a6f10 | 1326 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1327 | return actual; |
1328 | } | |
1329 | ||
1330 | /* | |
1331 | * Function ali_ircc_net_open (dev) | |
1332 | * | |
1333 | * Start the device | |
1334 | * | |
1335 | */ | |
1336 | static int ali_ircc_net_open(struct net_device *dev) | |
1337 | { | |
1338 | struct ali_ircc_cb *self; | |
1339 | int iobase; | |
1340 | char hwname[32]; | |
1341 | ||
a97a6f10 | 1342 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1343 | |
1344 | IRDA_ASSERT(dev != NULL, return -1;); | |
1345 | ||
4cf1653a | 1346 | self = netdev_priv(dev); |
1da177e4 LT |
1347 | |
1348 | IRDA_ASSERT(self != NULL, return 0;); | |
1349 | ||
1350 | iobase = self->io.fir_base; | |
1351 | ||
1352 | /* Request IRQ and install Interrupt Handler */ | |
1353 | if (request_irq(self->io.irq, ali_ircc_interrupt, 0, dev->name, dev)) | |
1354 | { | |
898b1d16 SO |
1355 | IRDA_WARNING("%s, unable to allocate irq=%d\n", |
1356 | ALI_IRCC_DRIVER_NAME, | |
1da177e4 LT |
1357 | self->io.irq); |
1358 | return -EAGAIN; | |
1359 | } | |
1360 | ||
1361 | /* | |
1362 | * Always allocate the DMA channel after the IRQ, and clean up on | |
1363 | * failure. | |
1364 | */ | |
1365 | if (request_dma(self->io.dma, dev->name)) { | |
898b1d16 SO |
1366 | IRDA_WARNING("%s, unable to allocate dma=%d\n", |
1367 | ALI_IRCC_DRIVER_NAME, | |
1da177e4 | 1368 | self->io.dma); |
a997cbb3 | 1369 | free_irq(self->io.irq, dev); |
1da177e4 LT |
1370 | return -EAGAIN; |
1371 | } | |
1372 | ||
1373 | /* Turn on interrups */ | |
1374 | outb(UART_IER_RDI , iobase+UART_IER); | |
1375 | ||
1376 | /* Ready to play! */ | |
1377 | netif_start_queue(dev); //benjamin by irport | |
1378 | ||
1379 | /* Give self a hardware name */ | |
1380 | sprintf(hwname, "ALI-FIR @ 0x%03x", self->io.fir_base); | |
1381 | ||
1382 | /* | |
1383 | * Open new IrLAP layer instance, now that everything should be | |
1384 | * initialized properly | |
1385 | */ | |
1386 | self->irlap = irlap_open(dev, &self->qos, hwname); | |
1387 | ||
a97a6f10 | 1388 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1389 | |
1390 | return 0; | |
1391 | } | |
1392 | ||
1393 | /* | |
1394 | * Function ali_ircc_net_close (dev) | |
1395 | * | |
1396 | * Stop the device | |
1397 | * | |
1398 | */ | |
1399 | static int ali_ircc_net_close(struct net_device *dev) | |
1400 | { | |
1401 | ||
1402 | struct ali_ircc_cb *self; | |
1403 | //int iobase; | |
1404 | ||
a97a6f10 | 1405 | IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1406 | |
1407 | IRDA_ASSERT(dev != NULL, return -1;); | |
1408 | ||
4cf1653a | 1409 | self = netdev_priv(dev); |
1da177e4 LT |
1410 | IRDA_ASSERT(self != NULL, return 0;); |
1411 | ||
1412 | /* Stop device */ | |
1413 | netif_stop_queue(dev); | |
1414 | ||
1415 | /* Stop and remove instance of IrLAP */ | |
1416 | if (self->irlap) | |
1417 | irlap_close(self->irlap); | |
1418 | self->irlap = NULL; | |
1419 | ||
1420 | disable_dma(self->io.dma); | |
1421 | ||
1422 | /* Disable interrupts */ | |
1423 | SetCOMInterrupts(self, FALSE); | |
1424 | ||
1425 | free_irq(self->io.irq, dev); | |
1426 | free_dma(self->io.dma); | |
1427 | ||
a97a6f10 | 1428 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1429 | |
1430 | return 0; | |
1431 | } | |
1432 | ||
1433 | /* | |
1434 | * Function ali_ircc_fir_hard_xmit (skb, dev) | |
1435 | * | |
1436 | * Transmit the frame | |
1437 | * | |
1438 | */ | |
6518bbb8 SH |
1439 | static netdev_tx_t ali_ircc_fir_hard_xmit(struct sk_buff *skb, |
1440 | struct net_device *dev) | |
1da177e4 LT |
1441 | { |
1442 | struct ali_ircc_cb *self; | |
1443 | unsigned long flags; | |
1444 | int iobase; | |
1445 | __u32 speed; | |
1446 | int mtt, diff; | |
1447 | ||
a97a6f10 | 1448 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 | 1449 | |
4cf1653a | 1450 | self = netdev_priv(dev); |
1da177e4 LT |
1451 | iobase = self->io.fir_base; |
1452 | ||
1453 | netif_stop_queue(dev); | |
1454 | ||
1455 | /* Make sure tests *& speed change are atomic */ | |
1456 | spin_lock_irqsave(&self->lock, flags); | |
1457 | ||
1458 | /* Note : you should make sure that speed changes are not going | |
1459 | * to corrupt any outgoing frame. Look at nsc-ircc for the gory | |
1460 | * details - Jean II */ | |
1461 | ||
1462 | /* Check if we need to change the speed */ | |
1463 | speed = irda_get_next_speed(skb); | |
1464 | if ((speed != self->io.speed) && (speed != -1)) { | |
1465 | /* Check for empty frame */ | |
1466 | if (!skb->len) { | |
1467 | ali_ircc_change_speed(self, speed); | |
1468 | dev->trans_start = jiffies; | |
1469 | spin_unlock_irqrestore(&self->lock, flags); | |
1470 | dev_kfree_skb(skb); | |
6ed10654 | 1471 | return NETDEV_TX_OK; |
1da177e4 LT |
1472 | } else |
1473 | self->new_speed = speed; | |
1474 | } | |
1475 | ||
1476 | /* Register and copy this frame to DMA memory */ | |
1477 | self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail; | |
1478 | self->tx_fifo.queue[self->tx_fifo.free].len = skb->len; | |
1479 | self->tx_fifo.tail += skb->len; | |
1480 | ||
af049081 | 1481 | dev->stats.tx_bytes += skb->len; |
1da177e4 | 1482 | |
d626f62b ACM |
1483 | skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start, |
1484 | skb->len); | |
1da177e4 LT |
1485 | self->tx_fifo.len++; |
1486 | self->tx_fifo.free++; | |
1487 | ||
1488 | /* Start transmit only if there is currently no transmit going on */ | |
1489 | if (self->tx_fifo.len == 1) | |
1490 | { | |
1491 | /* Check if we must wait the min turn time or not */ | |
1492 | mtt = irda_get_mtt(skb); | |
1493 | ||
1494 | if (mtt) | |
1495 | { | |
1496 | /* Check how much time we have used already */ | |
1497 | do_gettimeofday(&self->now); | |
1498 | ||
1499 | diff = self->now.tv_usec - self->stamp.tv_usec; | |
1500 | /* self->stamp is set from ali_ircc_dma_receive_complete() */ | |
1501 | ||
19299b34 | 1502 | IRDA_DEBUG(1, "%s(), ******* diff = %d *******\n", __func__ , diff); |
1da177e4 LT |
1503 | |
1504 | if (diff < 0) | |
1505 | diff += 1000000; | |
1506 | ||
1507 | /* Check if the mtt is larger than the time we have | |
1508 | * already used by all the protocol processing | |
1509 | */ | |
1510 | if (mtt > diff) | |
1511 | { | |
1512 | mtt -= diff; | |
1513 | ||
1514 | /* | |
1515 | * Use timer if delay larger than 1000 us, and | |
1516 | * use udelay for smaller values which should | |
1517 | * be acceptable | |
1518 | */ | |
1519 | if (mtt > 500) | |
1520 | { | |
1521 | /* Adjust for timer resolution */ | |
1522 | mtt = (mtt+250) / 500; /* 4 discard, 5 get advanced, Let's round off */ | |
1523 | ||
a97a6f10 | 1524 | IRDA_DEBUG(1, "%s(), ************** mtt = %d ***********\n", __func__ , mtt); |
1da177e4 LT |
1525 | |
1526 | /* Setup timer */ | |
1527 | if (mtt == 1) /* 500 us */ | |
1528 | { | |
1529 | switch_bank(iobase, BANK1); | |
1530 | outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); | |
1531 | } | |
1532 | else if (mtt == 2) /* 1 ms */ | |
1533 | { | |
1534 | switch_bank(iobase, BANK1); | |
1535 | outb(TIMER_IIR_1ms, iobase+FIR_TIMER_IIR); | |
1536 | } | |
1537 | else /* > 2ms -> 4ms */ | |
1538 | { | |
1539 | switch_bank(iobase, BANK1); | |
1540 | outb(TIMER_IIR_2ms, iobase+FIR_TIMER_IIR); | |
1541 | } | |
1542 | ||
1543 | ||
1544 | /* Start timer */ | |
1545 | outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR); | |
1546 | self->io.direction = IO_XMIT; | |
1547 | ||
1548 | /* Enable timer interrupt */ | |
1549 | self->ier = IER_TIMER; | |
1550 | SetCOMInterrupts(self, TRUE); | |
1551 | ||
1552 | /* Timer will take care of the rest */ | |
1553 | goto out; | |
1554 | } | |
1555 | else | |
1556 | udelay(mtt); | |
1557 | } // if (if (mtt > diff) | |
1558 | }// if (mtt) | |
1559 | ||
1560 | /* Enable EOM interrupt */ | |
1561 | self->ier = IER_EOM; | |
1562 | SetCOMInterrupts(self, TRUE); | |
1563 | ||
1564 | /* Transmit frame */ | |
1565 | ali_ircc_dma_xmit(self); | |
1566 | } // if (self->tx_fifo.len == 1) | |
1567 | ||
1568 | out: | |
1569 | ||
1570 | /* Not busy transmitting anymore if window is not full */ | |
1571 | if (self->tx_fifo.free < MAX_TX_WINDOW) | |
1572 | netif_wake_queue(self->netdev); | |
1573 | ||
1574 | /* Restore bank register */ | |
1575 | switch_bank(iobase, BANK0); | |
1576 | ||
1577 | dev->trans_start = jiffies; | |
1578 | spin_unlock_irqrestore(&self->lock, flags); | |
1579 | dev_kfree_skb(skb); | |
1580 | ||
a97a6f10 | 1581 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
6ed10654 | 1582 | return NETDEV_TX_OK; |
1da177e4 LT |
1583 | } |
1584 | ||
1585 | ||
1586 | static void ali_ircc_dma_xmit(struct ali_ircc_cb *self) | |
1587 | { | |
1588 | int iobase, tmp; | |
1589 | unsigned char FIFO_OPTI, Hi, Lo; | |
1590 | ||
1591 | ||
a97a6f10 | 1592 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1593 | |
1594 | iobase = self->io.fir_base; | |
1595 | ||
1596 | /* FIFO threshold , this method comes from NDIS5 code */ | |
1597 | ||
1598 | if(self->tx_fifo.queue[self->tx_fifo.ptr].len < TX_FIFO_Threshold) | |
1599 | FIFO_OPTI = self->tx_fifo.queue[self->tx_fifo.ptr].len-1; | |
1600 | else | |
1601 | FIFO_OPTI = TX_FIFO_Threshold; | |
1602 | ||
1603 | /* Disable DMA */ | |
1604 | switch_bank(iobase, BANK1); | |
1605 | outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); | |
1606 | ||
1607 | self->io.direction = IO_XMIT; | |
1608 | ||
1609 | irda_setup_dma(self->io.dma, | |
1610 | ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start - | |
1611 | self->tx_buff.head) + self->tx_buff_dma, | |
1612 | self->tx_fifo.queue[self->tx_fifo.ptr].len, | |
1613 | DMA_TX_MODE); | |
1614 | ||
1615 | /* Reset Tx FIFO */ | |
1616 | switch_bank(iobase, BANK0); | |
1617 | outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A); | |
1618 | ||
1619 | /* Set Tx FIFO threshold */ | |
1620 | if (self->fifo_opti_buf!=FIFO_OPTI) | |
1621 | { | |
1622 | switch_bank(iobase, BANK1); | |
1623 | outb(FIFO_OPTI, iobase+FIR_FIFO_TR) ; | |
1624 | self->fifo_opti_buf=FIFO_OPTI; | |
1625 | } | |
1626 | ||
1627 | /* Set Tx DMA threshold */ | |
1628 | switch_bank(iobase, BANK1); | |
1629 | outb(TX_DMA_Threshold, iobase+FIR_DMA_TR); | |
1630 | ||
1631 | /* Set max Tx frame size */ | |
1632 | Hi = (self->tx_fifo.queue[self->tx_fifo.ptr].len >> 8) & 0x0f; | |
1633 | Lo = self->tx_fifo.queue[self->tx_fifo.ptr].len & 0xff; | |
1634 | switch_bank(iobase, BANK2); | |
1635 | outb(Hi, iobase+FIR_TX_DSR_HI); | |
1636 | outb(Lo, iobase+FIR_TX_DSR_LO); | |
1637 | ||
1638 | /* Disable SIP , Disable Brick Wall (we don't support in TX mode), Change to TX mode */ | |
1639 | switch_bank(iobase, BANK0); | |
1640 | tmp = inb(iobase+FIR_LCR_B); | |
1641 | tmp &= ~0x20; // Disable SIP | |
1642 | outb(((unsigned char)(tmp & 0x3f) | LCR_B_TX_MODE) & ~LCR_B_BW, iobase+FIR_LCR_B); | |
19299b34 | 1643 | IRDA_DEBUG(1, "%s(), *** Change to TX mode: FIR_LCR_B = 0x%x ***\n", __func__ , inb(iobase+FIR_LCR_B)); |
1da177e4 LT |
1644 | |
1645 | outb(0, iobase+FIR_LSR); | |
1646 | ||
1647 | /* Enable DMA and Burst Mode */ | |
1648 | switch_bank(iobase, BANK1); | |
1649 | outb(inb(iobase+FIR_CR) | CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR); | |
1650 | ||
1651 | switch_bank(iobase, BANK0); | |
1652 | ||
a97a6f10 | 1653 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1654 | } |
1655 | ||
1656 | static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self) | |
1657 | { | |
1658 | int iobase; | |
1659 | int ret = TRUE; | |
1660 | ||
a97a6f10 | 1661 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1662 | |
1663 | iobase = self->io.fir_base; | |
1664 | ||
1665 | /* Disable DMA */ | |
1666 | switch_bank(iobase, BANK1); | |
1667 | outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); | |
1668 | ||
1669 | /* Check for underrun! */ | |
1670 | switch_bank(iobase, BANK0); | |
1671 | if((inb(iobase+FIR_LSR) & LSR_FRAME_ABORT) == LSR_FRAME_ABORT) | |
1672 | ||
1673 | { | |
a97a6f10 | 1674 | IRDA_ERROR("%s(), ********* LSR_FRAME_ABORT *********\n", __func__); |
af049081 SH |
1675 | self->netdev->stats.tx_errors++; |
1676 | self->netdev->stats.tx_fifo_errors++; | |
1da177e4 LT |
1677 | } |
1678 | else | |
1679 | { | |
af049081 | 1680 | self->netdev->stats.tx_packets++; |
1da177e4 LT |
1681 | } |
1682 | ||
1683 | /* Check if we need to change the speed */ | |
1684 | if (self->new_speed) | |
1685 | { | |
1686 | ali_ircc_change_speed(self, self->new_speed); | |
1687 | self->new_speed = 0; | |
1688 | } | |
1689 | ||
1690 | /* Finished with this frame, so prepare for next */ | |
1691 | self->tx_fifo.ptr++; | |
1692 | self->tx_fifo.len--; | |
1693 | ||
1694 | /* Any frames to be sent back-to-back? */ | |
1695 | if (self->tx_fifo.len) | |
1696 | { | |
1697 | ali_ircc_dma_xmit(self); | |
1698 | ||
1699 | /* Not finished yet! */ | |
1700 | ret = FALSE; | |
1701 | } | |
1702 | else | |
1703 | { /* Reset Tx FIFO info */ | |
1704 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
1705 | self->tx_fifo.tail = self->tx_buff.head; | |
1706 | } | |
1707 | ||
1708 | /* Make sure we have room for more frames */ | |
1709 | if (self->tx_fifo.free < MAX_TX_WINDOW) { | |
1710 | /* Not busy transmitting anymore */ | |
1711 | /* Tell the network layer, that we can accept more frames */ | |
1712 | netif_wake_queue(self->netdev); | |
1713 | } | |
1714 | ||
1715 | switch_bank(iobase, BANK0); | |
1716 | ||
a97a6f10 | 1717 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1718 | return ret; |
1719 | } | |
1720 | ||
1721 | /* | |
1722 | * Function ali_ircc_dma_receive (self) | |
1723 | * | |
1724 | * Get ready for receiving a frame. The device will initiate a DMA | |
1725 | * if it starts to receive a frame. | |
1726 | * | |
1727 | */ | |
1728 | static int ali_ircc_dma_receive(struct ali_ircc_cb *self) | |
1729 | { | |
1730 | int iobase, tmp; | |
1731 | ||
a97a6f10 | 1732 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1733 | |
1734 | iobase = self->io.fir_base; | |
1735 | ||
1736 | /* Reset Tx FIFO info */ | |
1737 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
1738 | self->tx_fifo.tail = self->tx_buff.head; | |
1739 | ||
1740 | /* Disable DMA */ | |
1741 | switch_bank(iobase, BANK1); | |
1742 | outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); | |
1743 | ||
1744 | /* Reset Message Count */ | |
1745 | switch_bank(iobase, BANK0); | |
1746 | outb(0x07, iobase+FIR_LSR); | |
1747 | ||
1748 | self->rcvFramesOverflow = FALSE; | |
1749 | ||
1750 | self->LineStatus = inb(iobase+FIR_LSR) ; | |
1751 | ||
1752 | /* Reset Rx FIFO info */ | |
1753 | self->io.direction = IO_RECV; | |
1754 | self->rx_buff.data = self->rx_buff.head; | |
1755 | ||
1756 | /* Reset Rx FIFO */ | |
1757 | // switch_bank(iobase, BANK0); | |
1758 | outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A); | |
1759 | ||
1760 | self->st_fifo.len = self->st_fifo.pending_bytes = 0; | |
1761 | self->st_fifo.tail = self->st_fifo.head = 0; | |
1762 | ||
1763 | irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize, | |
1764 | DMA_RX_MODE); | |
1765 | ||
1766 | /* Set Receive Mode,Brick Wall */ | |
1767 | //switch_bank(iobase, BANK0); | |
1768 | tmp = inb(iobase+FIR_LCR_B); | |
1769 | outb((unsigned char)(tmp &0x3f) | LCR_B_RX_MODE | LCR_B_BW , iobase + FIR_LCR_B); // 2000/12/1 05:16PM | |
19299b34 | 1770 | IRDA_DEBUG(1, "%s(), *** Change To RX mode: FIR_LCR_B = 0x%x ***\n", __func__ , inb(iobase+FIR_LCR_B)); |
1da177e4 LT |
1771 | |
1772 | /* Set Rx Threshold */ | |
1773 | switch_bank(iobase, BANK1); | |
1774 | outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR); | |
1775 | outb(RX_DMA_Threshold, iobase+FIR_DMA_TR); | |
1776 | ||
1777 | /* Enable DMA and Burst Mode */ | |
1778 | // switch_bank(iobase, BANK1); | |
1779 | outb(CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR); | |
1780 | ||
1781 | switch_bank(iobase, BANK0); | |
a97a6f10 | 1782 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1783 | return 0; |
1784 | } | |
1785 | ||
1786 | static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self) | |
1787 | { | |
1788 | struct st_fifo *st_fifo; | |
1789 | struct sk_buff *skb; | |
1790 | __u8 status, MessageCount; | |
1791 | int len, i, iobase, val; | |
1792 | ||
a97a6f10 | 1793 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1794 | |
1795 | st_fifo = &self->st_fifo; | |
1796 | iobase = self->io.fir_base; | |
1797 | ||
1798 | switch_bank(iobase, BANK0); | |
1799 | MessageCount = inb(iobase+ FIR_LSR)&0x07; | |
1800 | ||
1801 | if (MessageCount > 0) | |
70f23fd6 | 1802 | IRDA_DEBUG(0, "%s(), Message count = %d,\n", __func__ , MessageCount); |
1da177e4 LT |
1803 | |
1804 | for (i=0; i<=MessageCount; i++) | |
1805 | { | |
1806 | /* Bank 0 */ | |
1807 | switch_bank(iobase, BANK0); | |
1808 | status = inb(iobase+FIR_LSR); | |
1809 | ||
1810 | switch_bank(iobase, BANK2); | |
1811 | len = inb(iobase+FIR_RX_DSR_HI) & 0x0f; | |
1812 | len = len << 8; | |
1813 | len |= inb(iobase+FIR_RX_DSR_LO); | |
1814 | ||
a97a6f10 HH |
1815 | IRDA_DEBUG(1, "%s(), RX Length = 0x%.2x,\n", __func__ , len); |
1816 | IRDA_DEBUG(1, "%s(), RX Status = 0x%.2x,\n", __func__ , status); | |
1da177e4 LT |
1817 | |
1818 | if (st_fifo->tail >= MAX_RX_WINDOW) { | |
a97a6f10 | 1819 | IRDA_DEBUG(0, "%s(), window is full!\n", __func__ ); |
1da177e4 LT |
1820 | continue; |
1821 | } | |
1822 | ||
1823 | st_fifo->entries[st_fifo->tail].status = status; | |
1824 | st_fifo->entries[st_fifo->tail].len = len; | |
1825 | st_fifo->pending_bytes += len; | |
1826 | st_fifo->tail++; | |
1827 | st_fifo->len++; | |
1828 | } | |
1829 | ||
1830 | for (i=0; i<=MessageCount; i++) | |
1831 | { | |
1832 | /* Get first entry */ | |
1833 | status = st_fifo->entries[st_fifo->head].status; | |
1834 | len = st_fifo->entries[st_fifo->head].len; | |
1835 | st_fifo->pending_bytes -= len; | |
1836 | st_fifo->head++; | |
1837 | st_fifo->len--; | |
1838 | ||
1839 | /* Check for errors */ | |
1840 | if ((status & 0xd8) || self->rcvFramesOverflow || (len==0)) | |
1841 | { | |
19299b34 | 1842 | IRDA_DEBUG(0,"%s(), ************* RX Errors ************\n", __func__ ); |
1da177e4 LT |
1843 | |
1844 | /* Skip frame */ | |
af049081 | 1845 | self->netdev->stats.rx_errors++; |
1da177e4 LT |
1846 | |
1847 | self->rx_buff.data += len; | |
1848 | ||
1849 | if (status & LSR_FIFO_UR) | |
1850 | { | |
af049081 | 1851 | self->netdev->stats.rx_frame_errors++; |
19299b34 | 1852 | IRDA_DEBUG(0,"%s(), ************* FIFO Errors ************\n", __func__ ); |
1da177e4 LT |
1853 | } |
1854 | if (status & LSR_FRAME_ERROR) | |
1855 | { | |
af049081 | 1856 | self->netdev->stats.rx_frame_errors++; |
19299b34 | 1857 | IRDA_DEBUG(0,"%s(), ************* FRAME Errors ************\n", __func__ ); |
1da177e4 LT |
1858 | } |
1859 | ||
1860 | if (status & LSR_CRC_ERROR) | |
1861 | { | |
af049081 | 1862 | self->netdev->stats.rx_crc_errors++; |
19299b34 | 1863 | IRDA_DEBUG(0,"%s(), ************* CRC Errors ************\n", __func__ ); |
1da177e4 LT |
1864 | } |
1865 | ||
1866 | if(self->rcvFramesOverflow) | |
1867 | { | |
af049081 | 1868 | self->netdev->stats.rx_frame_errors++; |
19299b34 | 1869 | IRDA_DEBUG(0,"%s(), ************* Overran DMA buffer ************\n", __func__ ); |
1da177e4 LT |
1870 | } |
1871 | if(len == 0) | |
1872 | { | |
af049081 | 1873 | self->netdev->stats.rx_frame_errors++; |
19299b34 | 1874 | IRDA_DEBUG(0,"%s(), ********** Receive Frame Size = 0 *********\n", __func__ ); |
1da177e4 LT |
1875 | } |
1876 | } | |
1877 | else | |
1878 | { | |
1879 | ||
1880 | if (st_fifo->pending_bytes < 32) | |
1881 | { | |
1882 | switch_bank(iobase, BANK0); | |
1883 | val = inb(iobase+FIR_BSR); | |
1884 | if ((val& BSR_FIFO_NOT_EMPTY)== 0x80) | |
1885 | { | |
19299b34 | 1886 | IRDA_DEBUG(0, "%s(), ************* BSR_FIFO_NOT_EMPTY ************\n", __func__ ); |
1da177e4 LT |
1887 | |
1888 | /* Put this entry back in fifo */ | |
1889 | st_fifo->head--; | |
1890 | st_fifo->len++; | |
1891 | st_fifo->pending_bytes += len; | |
1892 | st_fifo->entries[st_fifo->head].status = status; | |
1893 | st_fifo->entries[st_fifo->head].len = len; | |
1894 | ||
1895 | /* | |
1896 | * DMA not finished yet, so try again | |
1897 | * later, set timer value, resolution | |
1898 | * 500 us | |
1899 | */ | |
1900 | ||
1901 | switch_bank(iobase, BANK1); | |
1902 | outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); // 2001/1/2 05:07PM | |
1903 | ||
1904 | /* Enable Timer */ | |
1905 | outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR); | |
1906 | ||
1907 | return FALSE; /* I'll be back! */ | |
1908 | } | |
1909 | } | |
1910 | ||
1911 | /* | |
1912 | * Remember the time we received this frame, so we can | |
1913 | * reduce the min turn time a bit since we will know | |
1914 | * how much time we have used for protocol processing | |
1915 | */ | |
1916 | do_gettimeofday(&self->stamp); | |
1917 | ||
1918 | skb = dev_alloc_skb(len+1); | |
1919 | if (skb == NULL) | |
1920 | { | |
1921 | IRDA_WARNING("%s(), memory squeeze, " | |
1922 | "dropping frame.\n", | |
a97a6f10 | 1923 | __func__); |
af049081 | 1924 | self->netdev->stats.rx_dropped++; |
1da177e4 LT |
1925 | |
1926 | return FALSE; | |
1927 | } | |
1928 | ||
1929 | /* Make sure IP header gets aligned */ | |
1930 | skb_reserve(skb, 1); | |
1931 | ||
1932 | /* Copy frame without CRC, CRC is removed by hardware*/ | |
1933 | skb_put(skb, len); | |
27d7ff46 | 1934 | skb_copy_to_linear_data(skb, self->rx_buff.data, len); |
1da177e4 LT |
1935 | |
1936 | /* Move to next frame */ | |
1937 | self->rx_buff.data += len; | |
af049081 SH |
1938 | self->netdev->stats.rx_bytes += len; |
1939 | self->netdev->stats.rx_packets++; | |
1da177e4 LT |
1940 | |
1941 | skb->dev = self->netdev; | |
459a98ed | 1942 | skb_reset_mac_header(skb); |
1da177e4 LT |
1943 | skb->protocol = htons(ETH_P_IRDA); |
1944 | netif_rx(skb); | |
1da177e4 LT |
1945 | } |
1946 | } | |
1947 | ||
1948 | switch_bank(iobase, BANK0); | |
1949 | ||
a97a6f10 | 1950 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1951 | return TRUE; |
1952 | } | |
1953 | ||
1954 | ||
1955 | ||
1956 | /* | |
1957 | * Function ali_ircc_sir_hard_xmit (skb, dev) | |
1958 | * | |
1959 | * Transmit the frame! | |
1960 | * | |
1961 | */ | |
6518bbb8 SH |
1962 | static netdev_tx_t ali_ircc_sir_hard_xmit(struct sk_buff *skb, |
1963 | struct net_device *dev) | |
1da177e4 LT |
1964 | { |
1965 | struct ali_ircc_cb *self; | |
1966 | unsigned long flags; | |
1967 | int iobase; | |
1968 | __u32 speed; | |
1969 | ||
a97a6f10 | 1970 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 | 1971 | |
ec634fe3 | 1972 | IRDA_ASSERT(dev != NULL, return NETDEV_TX_OK;); |
1da177e4 | 1973 | |
4cf1653a | 1974 | self = netdev_priv(dev); |
ec634fe3 | 1975 | IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;); |
1da177e4 LT |
1976 | |
1977 | iobase = self->io.sir_base; | |
1978 | ||
1979 | netif_stop_queue(dev); | |
1980 | ||
1981 | /* Make sure tests *& speed change are atomic */ | |
1982 | spin_lock_irqsave(&self->lock, flags); | |
1983 | ||
1984 | /* Note : you should make sure that speed changes are not going | |
1985 | * to corrupt any outgoing frame. Look at nsc-ircc for the gory | |
1986 | * details - Jean II */ | |
1987 | ||
1988 | /* Check if we need to change the speed */ | |
1989 | speed = irda_get_next_speed(skb); | |
1990 | if ((speed != self->io.speed) && (speed != -1)) { | |
1991 | /* Check for empty frame */ | |
1992 | if (!skb->len) { | |
1993 | ali_ircc_change_speed(self, speed); | |
1994 | dev->trans_start = jiffies; | |
1995 | spin_unlock_irqrestore(&self->lock, flags); | |
1996 | dev_kfree_skb(skb); | |
6ed10654 | 1997 | return NETDEV_TX_OK; |
1da177e4 LT |
1998 | } else |
1999 | self->new_speed = speed; | |
2000 | } | |
2001 | ||
2002 | /* Init tx buffer */ | |
2003 | self->tx_buff.data = self->tx_buff.head; | |
2004 | ||
2005 | /* Copy skb to tx_buff while wrapping, stuffing and making CRC */ | |
2006 | self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data, | |
2007 | self->tx_buff.truesize); | |
2008 | ||
af049081 | 2009 | self->netdev->stats.tx_bytes += self->tx_buff.len; |
1da177e4 LT |
2010 | |
2011 | /* Turn on transmit finished interrupt. Will fire immediately! */ | |
2012 | outb(UART_IER_THRI, iobase+UART_IER); | |
2013 | ||
2014 | dev->trans_start = jiffies; | |
2015 | spin_unlock_irqrestore(&self->lock, flags); | |
2016 | ||
2017 | dev_kfree_skb(skb); | |
2018 | ||
a97a6f10 | 2019 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 | 2020 | |
6ed10654 | 2021 | return NETDEV_TX_OK; |
1da177e4 LT |
2022 | } |
2023 | ||
2024 | ||
2025 | /* | |
2026 | * Function ali_ircc_net_ioctl (dev, rq, cmd) | |
2027 | * | |
2028 | * Process IOCTL commands for this device | |
2029 | * | |
2030 | */ | |
2031 | static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
2032 | { | |
2033 | struct if_irda_req *irq = (struct if_irda_req *) rq; | |
2034 | struct ali_ircc_cb *self; | |
2035 | unsigned long flags; | |
2036 | int ret = 0; | |
2037 | ||
a97a6f10 | 2038 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
2039 | |
2040 | IRDA_ASSERT(dev != NULL, return -1;); | |
2041 | ||
4cf1653a | 2042 | self = netdev_priv(dev); |
1da177e4 LT |
2043 | |
2044 | IRDA_ASSERT(self != NULL, return -1;); | |
2045 | ||
a97a6f10 | 2046 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__ , dev->name, cmd); |
1da177e4 LT |
2047 | |
2048 | switch (cmd) { | |
2049 | case SIOCSBANDWIDTH: /* Set bandwidth */ | |
a97a6f10 | 2050 | IRDA_DEBUG(1, "%s(), SIOCSBANDWIDTH\n", __func__ ); |
1da177e4 LT |
2051 | /* |
2052 | * This function will also be used by IrLAP to change the | |
2053 | * speed, so we still must allow for speed change within | |
2054 | * interrupt context. | |
2055 | */ | |
2056 | if (!in_interrupt() && !capable(CAP_NET_ADMIN)) | |
2057 | return -EPERM; | |
2058 | ||
2059 | spin_lock_irqsave(&self->lock, flags); | |
2060 | ali_ircc_change_speed(self, irq->ifr_baudrate); | |
2061 | spin_unlock_irqrestore(&self->lock, flags); | |
2062 | break; | |
2063 | case SIOCSMEDIABUSY: /* Set media busy */ | |
a97a6f10 | 2064 | IRDA_DEBUG(1, "%s(), SIOCSMEDIABUSY\n", __func__ ); |
1da177e4 LT |
2065 | if (!capable(CAP_NET_ADMIN)) |
2066 | return -EPERM; | |
2067 | irda_device_set_media_busy(self->netdev, TRUE); | |
2068 | break; | |
2069 | case SIOCGRECEIVING: /* Check if we are receiving right now */ | |
a97a6f10 | 2070 | IRDA_DEBUG(2, "%s(), SIOCGRECEIVING\n", __func__ ); |
1da177e4 LT |
2071 | /* This is protected */ |
2072 | irq->ifr_receiving = ali_ircc_is_receiving(self); | |
2073 | break; | |
2074 | default: | |
2075 | ret = -EOPNOTSUPP; | |
2076 | } | |
2077 | ||
a97a6f10 | 2078 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2079 | |
2080 | return ret; | |
2081 | } | |
2082 | ||
2083 | /* | |
2084 | * Function ali_ircc_is_receiving (self) | |
2085 | * | |
2086 | * Return TRUE is we are currently receiving a frame | |
2087 | * | |
2088 | */ | |
2089 | static int ali_ircc_is_receiving(struct ali_ircc_cb *self) | |
2090 | { | |
2091 | unsigned long flags; | |
2092 | int status = FALSE; | |
2093 | int iobase; | |
2094 | ||
a97a6f10 | 2095 | IRDA_DEBUG(2, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
2096 | |
2097 | IRDA_ASSERT(self != NULL, return FALSE;); | |
2098 | ||
2099 | spin_lock_irqsave(&self->lock, flags); | |
2100 | ||
2101 | if (self->io.speed > 115200) | |
2102 | { | |
2103 | iobase = self->io.fir_base; | |
2104 | ||
2105 | switch_bank(iobase, BANK1); | |
2106 | if((inb(iobase+FIR_FIFO_FR) & 0x3f) != 0) | |
2107 | { | |
2108 | /* We are receiving something */ | |
a97a6f10 | 2109 | IRDA_DEBUG(1, "%s(), We are receiving something\n", __func__ ); |
1da177e4 LT |
2110 | status = TRUE; |
2111 | } | |
2112 | switch_bank(iobase, BANK0); | |
2113 | } | |
2114 | else | |
2115 | { | |
2116 | status = (self->rx_buff.state != OUTSIDE_FRAME); | |
2117 | } | |
2118 | ||
2119 | spin_unlock_irqrestore(&self->lock, flags); | |
2120 | ||
a97a6f10 | 2121 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2122 | |
2123 | return status; | |
2124 | } | |
2125 | ||
898b1d16 | 2126 | static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 2127 | { |
898b1d16 | 2128 | struct ali_ircc_cb *self = platform_get_drvdata(dev); |
1da177e4 | 2129 | |
898b1d16 | 2130 | IRDA_MESSAGE("%s, Suspending\n", ALI_IRCC_DRIVER_NAME); |
1da177e4 LT |
2131 | |
2132 | if (self->io.suspended) | |
898b1d16 | 2133 | return 0; |
1da177e4 LT |
2134 | |
2135 | ali_ircc_net_close(self->netdev); | |
2136 | ||
2137 | self->io.suspended = 1; | |
2138 | ||
898b1d16 | 2139 | return 0; |
1da177e4 LT |
2140 | } |
2141 | ||
898b1d16 | 2142 | static int ali_ircc_resume(struct platform_device *dev) |
1da177e4 | 2143 | { |
898b1d16 | 2144 | struct ali_ircc_cb *self = platform_get_drvdata(dev); |
1da177e4 LT |
2145 | |
2146 | if (!self->io.suspended) | |
898b1d16 | 2147 | return 0; |
1da177e4 LT |
2148 | |
2149 | ali_ircc_net_open(self->netdev); | |
2150 | ||
898b1d16 | 2151 | IRDA_MESSAGE("%s, Waking up\n", ALI_IRCC_DRIVER_NAME); |
1da177e4 LT |
2152 | |
2153 | self->io.suspended = 0; | |
1da177e4 | 2154 | |
1da177e4 LT |
2155 | return 0; |
2156 | } | |
2157 | ||
1da177e4 LT |
2158 | /* ALi Chip Function */ |
2159 | ||
2160 | static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable) | |
2161 | { | |
2162 | ||
2163 | unsigned char newMask; | |
2164 | ||
2165 | int iobase = self->io.fir_base; /* or sir_base */ | |
2166 | ||
a97a6f10 | 2167 | IRDA_DEBUG(2, "%s(), -------- Start -------- ( Enable = %d )\n", __func__ , enable); |
1da177e4 LT |
2168 | |
2169 | /* Enable the interrupt which we wish to */ | |
2170 | if (enable){ | |
2171 | if (self->io.direction == IO_XMIT) | |
2172 | { | |
2173 | if (self->io.speed > 115200) /* FIR, MIR */ | |
2174 | { | |
2175 | newMask = self->ier; | |
2176 | } | |
2177 | else /* SIR */ | |
2178 | { | |
2179 | newMask = UART_IER_THRI | UART_IER_RDI; | |
2180 | } | |
2181 | } | |
2182 | else { | |
2183 | if (self->io.speed > 115200) /* FIR, MIR */ | |
2184 | { | |
2185 | newMask = self->ier; | |
2186 | } | |
2187 | else /* SIR */ | |
2188 | { | |
2189 | newMask = UART_IER_RDI; | |
2190 | } | |
2191 | } | |
2192 | } | |
2193 | else /* Disable all the interrupts */ | |
2194 | { | |
2195 | newMask = 0x00; | |
2196 | ||
2197 | } | |
2198 | ||
2199 | //SIR and FIR has different registers | |
2200 | if (self->io.speed > 115200) | |
2201 | { | |
2202 | switch_bank(iobase, BANK0); | |
2203 | outb(newMask, iobase+FIR_IER); | |
2204 | } | |
2205 | else | |
2206 | outb(newMask, iobase+UART_IER); | |
2207 | ||
a97a6f10 | 2208 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2209 | } |
2210 | ||
2211 | static void SIR2FIR(int iobase) | |
2212 | { | |
2213 | //unsigned char tmp; | |
2214 | ||
a97a6f10 | 2215 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
2216 | |
2217 | /* Already protected (change_speed() or setup()), no need to lock. | |
2218 | * Jean II */ | |
2219 | ||
2220 | outb(0x28, iobase+UART_MCR); | |
2221 | outb(0x68, iobase+UART_MCR); | |
2222 | outb(0x88, iobase+UART_MCR); | |
2223 | ||
2224 | outb(0x60, iobase+FIR_MCR); /* Master Reset */ | |
2225 | outb(0x20, iobase+FIR_MCR); /* Master Interrupt Enable */ | |
2226 | ||
2227 | //tmp = inb(iobase+FIR_LCR_B); /* SIP enable */ | |
2228 | //tmp |= 0x20; | |
2229 | //outb(tmp, iobase+FIR_LCR_B); | |
2230 | ||
a97a6f10 | 2231 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2232 | } |
2233 | ||
2234 | static void FIR2SIR(int iobase) | |
2235 | { | |
2236 | unsigned char val; | |
2237 | ||
a97a6f10 | 2238 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
2239 | |
2240 | /* Already protected (change_speed() or setup()), no need to lock. | |
2241 | * Jean II */ | |
2242 | ||
2243 | outb(0x20, iobase+FIR_MCR); /* IRQ to low */ | |
2244 | outb(0x00, iobase+UART_IER); | |
2245 | ||
2246 | outb(0xA0, iobase+FIR_MCR); /* Don't set master reset */ | |
2247 | outb(0x00, iobase+UART_FCR); | |
2248 | outb(0x07, iobase+UART_FCR); | |
2249 | ||
2250 | val = inb(iobase+UART_RX); | |
2251 | val = inb(iobase+UART_LSR); | |
2252 | val = inb(iobase+UART_MSR); | |
2253 | ||
a97a6f10 | 2254 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2255 | } |
2256 | ||
2257 | MODULE_AUTHOR("Benjamin Kong <benjamin_kong@ali.com.tw>"); | |
2258 | MODULE_DESCRIPTION("ALi FIR Controller Driver"); | |
2259 | MODULE_LICENSE("GPL"); | |
72abb461 | 2260 | MODULE_ALIAS("platform:" ALI_IRCC_DRIVER_NAME); |
1da177e4 LT |
2261 | |
2262 | ||
2263 | module_param_array(io, int, NULL, 0); | |
2264 | MODULE_PARM_DESC(io, "Base I/O addresses"); | |
2265 | module_param_array(irq, int, NULL, 0); | |
2266 | MODULE_PARM_DESC(irq, "IRQ lines"); | |
2267 | module_param_array(dma, int, NULL, 0); | |
2268 | MODULE_PARM_DESC(dma, "DMA channels"); | |
2269 | ||
2270 | module_init(ali_ircc_init); | |
2271 | module_exit(ali_ircc_cleanup); |