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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6
[deliverable/linux.git] / drivers / net / irda / nsc-ircc.c
CommitLineData
1da177e4
LT		 1/*********************************************************************
2 *
3 * Filename: nsc-ircc.c
4 * Version: 1.0
5 * Description: Driver for the NSC PC'108 and PC'338 IrDA chipsets
6 * Status: Stable.
7 * Author: Dag Brattli <dagb@cs.uit.no>
8 * Created at: Sat Nov 7 21:43:15 1998
9 * Modified at: Wed Mar 1 11:29:34 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
11 *
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14 * Copyright (c) 1998 Actisys Corp., www.actisys.com
ec4f32d5 15 * Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
1da177e4
LT		 16 * All Rights Reserved
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
96de0e25 23 * Neither Dag Brattli nor University of Tromsø admit liability nor
1da177e4
LT		 24 * provide warranty for any of this software. This material is
25 * provided "AS-IS" and at no charge.
26 *
27 * Notice that all functions that needs to access the chip in _any_
28 * way, must save BSR register on entry, and restore it on exit.
29 * It is _very_ important to follow this policy!
30 *
31 * __u8 bank;
32 *
33 * bank = inb(iobase+BSR);
34 *
35 * do_your_stuff_here();
36 *
37 * outb(bank, iobase+BSR);
38 *
39 * If you find bugs in this file, its very likely that the same bug
40 * will also be in w83977af_ir.c since the implementations are quite
41 * similar.
42 *
43 ********************************************************************/
44
45#include <linux/module.h>
46
47#include <linux/kernel.h>
48#include <linux/types.h>
49#include <linux/skbuff.h>
50#include <linux/netdevice.h>
51#include <linux/ioport.h>
52#include <linux/delay.h>
53#include <linux/slab.h>
54#include <linux/init.h>
55#include <linux/rtnetlink.h>
56#include <linux/dma-mapping.h>
ec4f32d5 57#include <linux/pnp.h>
3b99b93b 58#include <linux/platform_device.h>
1da177e4
LT		 59
60#include <asm/io.h>
61#include <asm/dma.h>
62#include <asm/byteorder.h>
63
1da177e4
LT		 64#include <net/irda/wrapper.h>
65#include <net/irda/irda.h>
66#include <net/irda/irda_device.h>
67
68#include "nsc-ircc.h"
69
70#define CHIP_IO_EXTENT 8
71#define BROKEN_DONGLE_ID
72
73static char *driver_name = "nsc-ircc";
74
3b99b93b
DT		 75/* Power Management */
76#define NSC_IRCC_DRIVER_NAME "nsc-ircc"
77static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
78static int nsc_ircc_resume(struct platform_device *dev);
79
80static struct platform_driver nsc_ircc_driver = {
81 .suspend = nsc_ircc_suspend,
82 .resume = nsc_ircc_resume,
83 .driver = {
84 .name = NSC_IRCC_DRIVER_NAME,
85 },
86};
87
1da177e4
LT		 88/* Module parameters */
89static int qos_mtt_bits = 0x07; /* 1 ms or more */
90static int dongle_id;
91
92/* Use BIOS settions by default, but user may supply module parameters */
0ed79c9b
JT		 93static unsigned int io[] = { ~0, ~0, ~0, ~0, ~0 };
94static unsigned int irq[] = { 0, 0, 0, 0, 0 };
95static unsigned int dma[] = { 0, 0, 0, 0, 0 };
1da177e4
LT		 96
97static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
98static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
99static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
100static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
101static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
102static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
c17f888f 103#ifdef CONFIG_PNP
ec4f32d5 104static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
c17f888f 105#endif
1da177e4
LT		 106
107/* These are the known NSC chips */
108static nsc_chip_t chips[] = {
109/* Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
110 { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
111 nsc_ircc_probe_108, nsc_ircc_init_108 },
112 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
113 nsc_ircc_probe_338, nsc_ircc_init_338 },
114 /* Contributed by Steffen Pingel - IBM X40 */
2fd19a68 115 { "PC8738x", { 0x164e, 0x4e, 0x2e }, 0x20, 0xf4, 0xff,
1da177e4
LT		 116 nsc_ircc_probe_39x, nsc_ircc_init_39x },
117 /* Contributed by Jan Frey - IBM A30/A31 */
118 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
119 nsc_ircc_probe_39x, nsc_ircc_init_39x },
d83561a4
BC		 120 /* IBM ThinkPads using PC8738x (T60/X60/Z60) */
121 { "IBM-PC8738x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
122 nsc_ircc_probe_39x, nsc_ircc_init_39x },
123 /* IBM ThinkPads using PC8394T (T43/R52/?) */
124 { "IBM-PC8394T", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf9, 0xff,
125 nsc_ircc_probe_39x, nsc_ircc_init_39x },
1da177e4
LT		 126 { NULL }
127};
128
0ed79c9b 129static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
1da177e4
LT		 130
131static char *dongle_types[] = {
132 "Differential serial interface",
133 "Differential serial interface",
134 "Reserved",
135 "Reserved",
136 "Sharp RY5HD01",
137 "Reserved",
138 "Single-ended serial interface",
139 "Consumer-IR only",
140 "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
141 "IBM31T1100 or Temic TFDS6000/TFDS6500",
142 "Reserved",
143 "Reserved",
144 "HP HSDL-1100/HSDL-2100",
145 "HP HSDL-1100/HSDL-2100",
146 "Supports SIR Mode only",
147 "No dongle connected",
148};
149
ec4f32d5
JT		 150/* PNP probing */
151static chipio_t pnp_info;
152static const struct pnp_device_id nsc_ircc_pnp_table[] = {
153 { .id = "NSC6001", .driver_data = 0 },
02307080 154 { .id = "HWPC224", .driver_data = 0 },
1fa98174 155 { .id = "IBM0071", .driver_data = NSC_FORCE_DONGLE_TYPE9 },
ec4f32d5
JT		 156 { }
157};
158
159MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
160
161static struct pnp_driver nsc_ircc_pnp_driver = {
c17f888f 162#ifdef CONFIG_PNP
ec4f32d5
JT		 163 .name = "nsc-ircc",
164 .id_table = nsc_ircc_pnp_table,
165 .probe = nsc_ircc_pnp_probe,
c17f888f 166#endif
ec4f32d5
JT		 167};
168
1da177e4 169/* Some prototypes */
ec4f32d5 170static int nsc_ircc_open(chipio_t *info);
1da177e4
LT		 171static int nsc_ircc_close(struct nsc_ircc_cb *self);
172static int nsc_ircc_setup(chipio_t *info);
173static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
174static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
175static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
176static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
177static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
178static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
179static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
180static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
181static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
182static int nsc_ircc_read_dongle_id (int iobase);
183static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
184
185static int nsc_ircc_net_open(struct net_device *dev);
186static int nsc_ircc_net_close(struct net_device *dev);
187static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
1da177e4 188
ec4f32d5
JT		 189/* Globals */
190static int pnp_registered;
191static int pnp_succeeded;
192
1da177e4
LT		 193/*
194 * Function nsc_ircc_init ()
195 *
196 * Initialize chip. Just try to find out how many chips we are dealing with
197 * and where they are
198 */
199static int __init nsc_ircc_init(void)
200{
201 chipio_t info;
202 nsc_chip_t *chip;
ec4f32d5 203 int ret;
1da177e4
LT		 204 int cfg_base;
205 int cfg, id;
206 int reg;
207 int i = 0;
208
3b99b93b
DT		 209 ret = platform_driver_register(&nsc_ircc_driver);
210 if (ret) {
211 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
212 return ret;
213 }
214
ec4f32d5
JT		 215 /* Register with PnP subsystem to detect disable ports */
216 ret = pnp_register_driver(&nsc_ircc_pnp_driver);
217
803d0abb 218 if (!ret)
ec4f32d5
JT		 219 pnp_registered = 1;
220
221 ret = -ENODEV;
222
1da177e4 223 /* Probe for all the NSC chipsets we know about */
ec4f32d5 224 for (chip = chips; chip->name ; chip++) {
a97a6f10 225 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__,
1da177e4
LT		 226 chip->name);
227
228 /* Try all config registers for this chip */
ec4f32d5 229 for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
1da177e4
LT		 230 cfg_base = chip->cfg[cfg];
231 if (!cfg_base)
232 continue;
1da177e4
LT		 233
234 /* Read index register */
235 reg = inb(cfg_base);
236 if (reg == 0xff) {
a97a6f10 237 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __func__, cfg_base);
1da177e4
LT		 238 continue;
239 }
240
241 /* Read chip identification register */
242 outb(chip->cid_index, cfg_base);
243 id = inb(cfg_base+1);
244 if ((id & chip->cid_mask) == chip->cid_value) {
245 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
a97a6f10 246 __func__, chip->name, id & ~chip->cid_mask);
ec4f32d5
JT		 247
248 /*
249 * If we found a correct PnP setting,
250 * we first try it.
251 */
252 if (pnp_succeeded) {
253 memset(&info, 0, sizeof(chipio_t));
254 info.cfg_base = cfg_base;
255 info.fir_base = pnp_info.fir_base;
256 info.dma = pnp_info.dma;
257 info.irq = pnp_info.irq;
258
259 if (info.fir_base < 0x2000) {
260 IRDA_MESSAGE("%s, chip->init\n", driver_name);
261 chip->init(chip, &info);
262 } else
263 chip->probe(chip, &info);
264
265 if (nsc_ircc_open(&info) >= 0)
266 ret = 0;
267 }
268
269 /*
270 * Opening based on PnP values failed.
271 * Let's fallback to user values, or probe
272 * the chip.
273 */
274 if (ret) {
275 IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
276 memset(&info, 0, sizeof(chipio_t));
277 info.cfg_base = cfg_base;
278 info.fir_base = io[i];
279 info.dma = dma[i];
280 info.irq = irq[i];
281
282 /*
283 * If the user supplies the base address, then
284 * we init the chip, if not we probe the values
285 * set by the BIOS
286 */
287 if (io[i] < 0x2000) {
288 chip->init(chip, &info);
289 } else
290 chip->probe(chip, &info);
291
292 if (nsc_ircc_open(&info) >= 0)
293 ret = 0;
294 }
1da177e4
LT		 295 i++;
296 } else {
a97a6f10 297 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __func__, id);
1da177e4
LT		 298 }
299 }
ec4f32d5
JT		 300 }
301
302 if (ret) {
3b99b93b 303 platform_driver_unregister(&nsc_ircc_driver);
ec4f32d5
JT		 304 pnp_unregister_driver(&nsc_ircc_pnp_driver);
305 pnp_registered = 0;
1da177e4
LT		 306 }
307
308 return ret;
309}
310
311/*
312 * Function nsc_ircc_cleanup ()
313 *
314 * Close all configured chips
315 *
316 */
317static void __exit nsc_ircc_cleanup(void)
318{
319 int i;
320
ec4f32d5 321 for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
1da177e4
LT		 322 if (dev_self[i])
323 nsc_ircc_close(dev_self[i]);
324 }
ec4f32d5 325
3b99b93b
DT		 326 platform_driver_unregister(&nsc_ircc_driver);
327
ec4f32d5
JT		 328 if (pnp_registered)
329 pnp_unregister_driver(&nsc_ircc_pnp_driver);
330
331 pnp_registered = 0;
1da177e4
LT		 332}
333
334/*
335 * Function nsc_ircc_open (iobase, irq)
336 *
337 * Open driver instance
338 *
339 */
ec4f32d5 340static int __init nsc_ircc_open(chipio_t *info)
1da177e4
LT		 341{
342 struct net_device *dev;
343 struct nsc_ircc_cb *self;
1da177e4 344 void *ret;
ec4f32d5 345 int err, chip_index;
1da177e4 346
a97a6f10 347 IRDA_DEBUG(2, "%s()\n", __func__);
1da177e4 348
ec4f32d5
JT		 349
350 for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
351 if (!dev_self[chip_index])
352 break;
353 }
354
355 if (chip_index == ARRAY_SIZE(dev_self)) {
a97a6f10 356 IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __func__);
ec4f32d5
JT		 357 return -ENOMEM;
358 }
359
1da177e4
LT		 360 IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
361 info->cfg_base);
362
363 if ((nsc_ircc_setup(info)) == -1)
364 return -1;
365
366 IRDA_MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
367
368 dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
369 if (dev == NULL) {
370 IRDA_ERROR("%s(), can't allocate memory for "
a97a6f10 371 "control block!\n", __func__);
1da177e4
LT		 372 return -ENOMEM;
373 }
374
4cf1653a 375 self = netdev_priv(dev);
1da177e4
LT		 376 self->netdev = dev;
377 spin_lock_init(&self->lock);
378
379 /* Need to store self somewhere */
ec4f32d5
JT		 380 dev_self[chip_index] = self;
381 self->index = chip_index;
1da177e4
LT		 382
383 /* Initialize IO */
384 self->io.cfg_base = info->cfg_base;
385 self->io.fir_base = info->fir_base;
386 self->io.irq = info->irq;
387 self->io.fir_ext = CHIP_IO_EXTENT;
388 self->io.dma = info->dma;
389 self->io.fifo_size = 32;
390
391 /* Reserve the ioports that we need */
392 ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
393 if (!ret) {
394 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n",
a97a6f10 395 __func__, self->io.fir_base);
1da177e4
LT		 396 err = -ENODEV;
397 goto out1;
398 }
399
400 /* Initialize QoS for this device */
401 irda_init_max_qos_capabilies(&self->qos);
402
403 /* The only value we must override it the baudrate */
404 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
405 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
406
407 self->qos.min_turn_time.bits = qos_mtt_bits;
408 irda_qos_bits_to_value(&self->qos);
409
410 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
411 self->rx_buff.truesize = 14384;
412 self->tx_buff.truesize = 14384;
413
414 /* Allocate memory if needed */
415 self->rx_buff.head =
416 dma_alloc_coherent(NULL, self->rx_buff.truesize,
417 &self->rx_buff_dma, GFP_KERNEL);
418 if (self->rx_buff.head == NULL) {
419 err = -ENOMEM;
420 goto out2;
421
422 }
423 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
424
425 self->tx_buff.head =
426 dma_alloc_coherent(NULL, self->tx_buff.truesize,
427 &self->tx_buff_dma, GFP_KERNEL);
428 if (self->tx_buff.head == NULL) {
429 err = -ENOMEM;
430 goto out3;
431 }
432 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
433
434 self->rx_buff.in_frame = FALSE;
435 self->rx_buff.state = OUTSIDE_FRAME;
436 self->tx_buff.data = self->tx_buff.head;
437 self->rx_buff.data = self->rx_buff.head;
438
439 /* Reset Tx queue info */
440 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
441 self->tx_fifo.tail = self->tx_buff.head;
442
443 /* Override the network functions we need to use */
1da177e4
LT		 444 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
445 dev->open = nsc_ircc_net_open;
446 dev->stop = nsc_ircc_net_close;
447 dev->do_ioctl = nsc_ircc_net_ioctl;
1da177e4
LT		 448
449 err = register_netdev(dev);
450 if (err) {
a97a6f10 451 IRDA_ERROR("%s(), register_netdev() failed!\n", __func__);
1da177e4
LT		 452 goto out4;
453 }
454 IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
455
456 /* Check if user has supplied a valid dongle id or not */
457 if ((dongle_id <= 0) ||
ec4f32d5 458 (dongle_id >= ARRAY_SIZE(dongle_types))) {
1da177e4
LT		 459 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
460
461 IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
462 dongle_types[dongle_id]);
463 } else {
464 IRDA_MESSAGE("%s, Using dongle: %s\n", driver_name,
465 dongle_types[dongle_id]);
466 }
467
468 self->io.dongle_id = dongle_id;
469 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
470
3b99b93b
DT		 471 self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
472 self->index, NULL, 0);
473 if (IS_ERR(self->pldev)) {
474 err = PTR_ERR(self->pldev);
475 goto out5;
476 }
477 platform_set_drvdata(self->pldev, self);
1da177e4 478
ec4f32d5 479 return chip_index;
3b99b93b
DT		 480
481 out5:
482 unregister_netdev(dev);
1da177e4
LT		 483 out4:
484 dma_free_coherent(NULL, self->tx_buff.truesize,
485 self->tx_buff.head, self->tx_buff_dma);
486 out3:
487 dma_free_coherent(NULL, self->rx_buff.truesize,
488 self->rx_buff.head, self->rx_buff_dma);
489 out2:
490 release_region(self->io.fir_base, self->io.fir_ext);
491 out1:
492 free_netdev(dev);
ec4f32d5 493 dev_self[chip_index] = NULL;
1da177e4
LT		 494 return err;
495}
496
497/*
498 * Function nsc_ircc_close (self)
499 *
500 * Close driver instance
501 *
502 */
503static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
504{
505 int iobase;
506
a97a6f10 507 IRDA_DEBUG(4, "%s()\n", __func__);
1da177e4
LT		 508
509 IRDA_ASSERT(self != NULL, return -1;);
510
511 iobase = self->io.fir_base;
512
3b99b93b
DT		 513 platform_device_unregister(self->pldev);
514
1da177e4
LT		 515 /* Remove netdevice */
516 unregister_netdev(self->netdev);
517
518 /* Release the PORT that this driver is using */
519 IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
a97a6f10 520 __func__, self->io.fir_base);
1da177e4
LT		 521 release_region(self->io.fir_base, self->io.fir_ext);
522
523 if (self->tx_buff.head)
524 dma_free_coherent(NULL, self->tx_buff.truesize,
525 self->tx_buff.head, self->tx_buff_dma);
526
527 if (self->rx_buff.head)
528 dma_free_coherent(NULL, self->rx_buff.truesize,
529 self->rx_buff.head, self->rx_buff_dma);
530
531 dev_self[self->index] = NULL;
532 free_netdev(self->netdev);
533
534 return 0;
535}
536
537/*
538 * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
539 *
540 * Initialize the NSC '108 chip
541 *
542 */
543static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
544{
545 int cfg_base = info->cfg_base;
546 __u8 temp=0;
547
548 outb(2, cfg_base); /* Mode Control Register (MCTL) */
549 outb(0x00, cfg_base+1); /* Disable device */
550
551 /* Base Address and Interrupt Control Register (BAIC) */
552 outb(CFG_108_BAIC, cfg_base);
553 switch (info->fir_base) {
554 case 0x3e8: outb(0x14, cfg_base+1); break;
555 case 0x2e8: outb(0x15, cfg_base+1); break;
556 case 0x3f8: outb(0x16, cfg_base+1); break;
557 case 0x2f8: outb(0x17, cfg_base+1); break;
a97a6f10 558 default: IRDA_ERROR("%s(), invalid base_address", __func__);
1da177e4
LT		 559 }
560
561 /* Control Signal Routing Register (CSRT) */
562 switch (info->irq) {
563 case 3: temp = 0x01; break;
564 case 4: temp = 0x02; break;
565 case 5: temp = 0x03; break;
566 case 7: temp = 0x04; break;
567 case 9: temp = 0x05; break;
568 case 11: temp = 0x06; break;
569 case 15: temp = 0x07; break;
a97a6f10 570 default: IRDA_ERROR("%s(), invalid irq", __func__);
1da177e4
LT		 571 }
572 outb(CFG_108_CSRT, cfg_base);
573
574 switch (info->dma) {
575 case 0: outb(0x08+temp, cfg_base+1); break;
576 case 1: outb(0x10+temp, cfg_base+1); break;
577 case 3: outb(0x18+temp, cfg_base+1); break;
a97a6f10 578 default: IRDA_ERROR("%s(), invalid dma", __func__);
1da177e4
LT		 579 }
580
581 outb(CFG_108_MCTL, cfg_base); /* Mode Control Register (MCTL) */
582 outb(0x03, cfg_base+1); /* Enable device */
583
584 return 0;
585}
586
587/*
588 * Function nsc_ircc_probe_108 (chip, info)
589 *
590 *
591 *
592 */
593static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
594{
595 int cfg_base = info->cfg_base;
596 int reg;
597
598 /* Read address and interrupt control register (BAIC) */
599 outb(CFG_108_BAIC, cfg_base);
600 reg = inb(cfg_base+1);
601
602 switch (reg & 0x03) {
603 case 0:
604 info->fir_base = 0x3e8;
605 break;
606 case 1:
607 info->fir_base = 0x2e8;
608 break;
609 case 2:
610 info->fir_base = 0x3f8;
611 break;
612 case 3:
613 info->fir_base = 0x2f8;
614 break;
615 }
616 info->sir_base = info->fir_base;
a97a6f10 617 IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__,
1da177e4
LT		 618 info->fir_base);
619
620 /* Read control signals routing register (CSRT) */
621 outb(CFG_108_CSRT, cfg_base);
622 reg = inb(cfg_base+1);
623
624 switch (reg & 0x07) {
625 case 0:
626 info->irq = -1;
627 break;
628 case 1:
629 info->irq = 3;
630 break;
631 case 2:
632 info->irq = 4;
633 break;
634 case 3:
635 info->irq = 5;
636 break;
637 case 4:
638 info->irq = 7;
639 break;
640 case 5:
641 info->irq = 9;
642 break;
643 case 6:
644 info->irq = 11;
645 break;
646 case 7:
647 info->irq = 15;
648 break;
649 }
a97a6f10 650 IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq);
1da177e4
LT		 651
652 /* Currently we only read Rx DMA but it will also be used for Tx */
653 switch ((reg >> 3) & 0x03) {
654 case 0:
655 info->dma = -1;
656 break;
657 case 1:
658 info->dma = 0;
659 break;
660 case 2:
661 info->dma = 1;
662 break;
663 case 3:
664 info->dma = 3;
665 break;
666 }
a97a6f10 667 IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma);
1da177e4
LT		 668
669 /* Read mode control register (MCTL) */
670 outb(CFG_108_MCTL, cfg_base);
671 reg = inb(cfg_base+1);
672
673 info->enabled = reg & 0x01;
674 info->suspended = !((reg >> 1) & 0x01);
675
676 return 0;
677}
678
679/*
680 * Function nsc_ircc_init_338 (chip, info)
681 *
682 * Initialize the NSC '338 chip. Remember that the 87338 needs two
683 * consecutive writes to the data registers while CPU interrupts are
684 * disabled. The 97338 does not require this, but shouldn't be any
685 * harm if we do it anyway.
686 */
687static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
688{
689 /* No init yet */
690
691 return 0;
692}
693
694/*
695 * Function nsc_ircc_probe_338 (chip, info)
696 *
697 *
698 *
699 */
700static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
701{
702 int cfg_base = info->cfg_base;
703 int reg, com = 0;
704 int pnp;
705
706 /* Read funtion enable register (FER) */
707 outb(CFG_338_FER, cfg_base);
708 reg = inb(cfg_base+1);
709
710 info->enabled = (reg >> 2) & 0x01;
711
712 /* Check if we are in Legacy or PnP mode */
713 outb(CFG_338_PNP0, cfg_base);
714 reg = inb(cfg_base+1);
715
716 pnp = (reg >> 3) & 0x01;
717 if (pnp) {
718 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
719 outb(0x46, cfg_base);
720 reg = (inb(cfg_base+1) & 0xfe) << 2;
721
722 outb(0x47, cfg_base);
723 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
724
725 info->fir_base = reg;
726 } else {
727 /* Read function address register (FAR) */
728 outb(CFG_338_FAR, cfg_base);
729 reg = inb(cfg_base+1);
730
731 switch ((reg >> 4) & 0x03) {
732 case 0:
733 info->fir_base = 0x3f8;
734 break;
735 case 1:
736 info->fir_base = 0x2f8;
737 break;
738 case 2:
739 com = 3;
740 break;
741 case 3:
742 com = 4;
743 break;
744 }
745
746 if (com) {
747 switch ((reg >> 6) & 0x03) {
748 case 0:
749 if (com == 3)
750 info->fir_base = 0x3e8;
751 else
752 info->fir_base = 0x2e8;
753 break;
754 case 1:
755 if (com == 3)
756 info->fir_base = 0x338;
757 else
758 info->fir_base = 0x238;
759 break;
760 case 2:
761 if (com == 3)
762 info->fir_base = 0x2e8;
763 else
764 info->fir_base = 0x2e0;
765 break;
766 case 3:
767 if (com == 3)
768 info->fir_base = 0x220;
769 else
770 info->fir_base = 0x228;
771 break;
772 }
773 }
774 }
775 info->sir_base = info->fir_base;
776
777 /* Read PnP register 1 (PNP1) */
778 outb(CFG_338_PNP1, cfg_base);
779 reg = inb(cfg_base+1);
780
781 info->irq = reg >> 4;
782
783 /* Read PnP register 3 (PNP3) */
784 outb(CFG_338_PNP3, cfg_base);
785 reg = inb(cfg_base+1);
786
787 info->dma = (reg & 0x07) - 1;
788
789 /* Read power and test register (PTR) */
790 outb(CFG_338_PTR, cfg_base);
791 reg = inb(cfg_base+1);
792
793 info->suspended = reg & 0x01;
794
795 return 0;
796}
797
798
799/*
800 * Function nsc_ircc_init_39x (chip, info)
801 *
802 * Now that we know it's a '39x (see probe below), we need to
803 * configure it so we can use it.
804 *
805 * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
806 * the configuration of the different functionality (serial, parallel,
807 * floppy...) are each in a different bank (Logical Device Number).
808 * The base address, irq and dma configuration registers are common
809 * to all functionalities (index 0x30 to 0x7F).
810 * There is only one configuration register specific to the
811 * serial port, CFG_39X_SPC.
812 * JeanII
813 *
814 * Note : this code was written by Jan Frey <janfrey@web.de>
815 */
816static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
817{
818 int cfg_base = info->cfg_base;
819 int enabled;
820
7f927fcc 821 /* User is sure about his config... accept it. */
1da177e4
LT		 822 IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
823 "io=0x%04x, irq=%d, dma=%d\n",
a97a6f10 824 __func__, info->fir_base, info->irq, info->dma);
1da177e4
LT		 825
826 /* Access bank for SP2 */
827 outb(CFG_39X_LDN, cfg_base);
828 outb(0x02, cfg_base+1);
829
830 /* Configure SP2 */
831
832 /* We want to enable the device if not enabled */
833 outb(CFG_39X_ACT, cfg_base);
834 enabled = inb(cfg_base+1) & 0x01;
835
836 if (!enabled) {
837 /* Enable the device */
838 outb(CFG_39X_SIOCF1, cfg_base);
839 outb(0x01, cfg_base+1);
840 /* May want to update info->enabled. Jean II */
841 }
842
843 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
844 * power mode (wake up from sleep mode) (bit 1) */
845 outb(CFG_39X_SPC, cfg_base);
846 outb(0x82, cfg_base+1);
847
848 return 0;
849}
850
851/*
852 * Function nsc_ircc_probe_39x (chip, info)
853 *
854 * Test if we really have a '39x chip at the given address
855 *
856 * Note : this code was written by Jan Frey <janfrey@web.de>
857 */
858static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
859{
860 int cfg_base = info->cfg_base;
861 int reg1, reg2, irq, irqt, dma1, dma2;
862 int enabled, susp;
863
864 IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
a97a6f10 865 __func__, cfg_base);
1da177e4
LT		 866
867 /* This function should be executed with irq off to avoid
868 * another driver messing with the Super I/O bank - Jean II */
869
870 /* Access bank for SP2 */
871 outb(CFG_39X_LDN, cfg_base);
872 outb(0x02, cfg_base+1);
873
874 /* Read infos about SP2 ; store in info struct */
875 outb(CFG_39X_BASEH, cfg_base);
876 reg1 = inb(cfg_base+1);
877 outb(CFG_39X_BASEL, cfg_base);
878 reg2 = inb(cfg_base+1);
879 info->fir_base = (reg1 << 8) | reg2;
880
881 outb(CFG_39X_IRQNUM, cfg_base);
882 irq = inb(cfg_base+1);
883 outb(CFG_39X_IRQSEL, cfg_base);
884 irqt = inb(cfg_base+1);
885 info->irq = irq;
886
887 outb(CFG_39X_DMA0, cfg_base);
888 dma1 = inb(cfg_base+1);
889 outb(CFG_39X_DMA1, cfg_base);
890 dma2 = inb(cfg_base+1);
891 info->dma = dma1 -1;
892
893 outb(CFG_39X_ACT, cfg_base);
894 info->enabled = enabled = inb(cfg_base+1) & 0x01;
895
896 outb(CFG_39X_SPC, cfg_base);
897 susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
898
a97a6f10 899 IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __func__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
1da177e4
LT		 900
901 /* Configure SP2 */
902
903 /* We want to enable the device if not enabled */
904 outb(CFG_39X_ACT, cfg_base);
905 enabled = inb(cfg_base+1) & 0x01;
906
907 if (!enabled) {
908 /* Enable the device */
909 outb(CFG_39X_SIOCF1, cfg_base);
910 outb(0x01, cfg_base+1);
911 /* May want to update info->enabled. Jean II */
912 }
913
914 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
915 * power mode (wake up from sleep mode) (bit 1) */
916 outb(CFG_39X_SPC, cfg_base);
917 outb(0x82, cfg_base+1);
918
919 return 0;
920}
921
c17f888f 922#ifdef CONFIG_PNP
ec4f32d5
JT		 923/* PNP probing */
924static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
925{
926 memset(&pnp_info, 0, sizeof(chipio_t));
927 pnp_info.irq = -1;
928 pnp_info.dma = -1;
929 pnp_succeeded = 1;
930
1fa98174
MG		 931 if (id->driver_data & NSC_FORCE_DONGLE_TYPE9)
932 dongle_id = 0x9;
933
934 /* There doesn't seem to be any way of getting the cfg_base.
ec4f32d5
JT		 935 * On my box, cfg_base is in the PnP descriptor of the
936 * motherboard. Oh well... Jean II */
937
938 if (pnp_port_valid(dev, 0) &&
939 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
940 pnp_info.fir_base = pnp_port_start(dev, 0);
941
942 if (pnp_irq_valid(dev, 0) &&
943 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
944 pnp_info.irq = pnp_irq(dev, 0);
945
946 if (pnp_dma_valid(dev, 0) &&
947 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
948 pnp_info.dma = pnp_dma(dev, 0);
949
950 IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
a97a6f10 951 __func__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
ec4f32d5
JT		 952
953 if((pnp_info.fir_base == 0) ||
954 (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
955 /* Returning an error will disable the device. Yuck ! */
956 //return -EINVAL;
957 pnp_succeeded = 0;
958 }
959
960 return 0;
961}
c17f888f 962#endif
ec4f32d5 963
1da177e4
LT		 964/*
965 * Function nsc_ircc_setup (info)
966 *
967 * Returns non-negative on success.
968 *
969 */
970static int nsc_ircc_setup(chipio_t *info)
971{
972 int version;
973 int iobase = info->fir_base;
974
975 /* Read the Module ID */
976 switch_bank(iobase, BANK3);
977 version = inb(iobase+MID);
978
979 IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
a97a6f10 980 __func__, driver_name, version);
1da177e4
LT		 981
982 /* Should be 0x2? */
983 if (0x20 != (version & 0xf0)) {
984 IRDA_ERROR("%s, Wrong chip version %02x\n",
985 driver_name, version);
986 return -1;
987 }
988
989 /* Switch to advanced mode */
990 switch_bank(iobase, BANK2);
991 outb(ECR1_EXT_SL, iobase+ECR1);
992 switch_bank(iobase, BANK0);
993
994 /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
995 switch_bank(iobase, BANK0);
996 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
997
998 outb(0x03, iobase+LCR); /* 8 bit word length */
999 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/
1000
1001 /* Set FIFO size to 32 */
1002 switch_bank(iobase, BANK2);
1003 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1004
1005 /* IRCR2: FEND_MD is not set */
1006 switch_bank(iobase, BANK5);
1007 outb(0x02, iobase+4);
1008
1009 /* Make sure that some defaults are OK */
1010 switch_bank(iobase, BANK6);
1011 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
1012 outb(0x0a, iobase+1); /* Set MIR pulse width */
1013 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
1014 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
1015
1016 /* Enable receive interrupts */
1017 switch_bank(iobase, BANK0);
1018 outb(IER_RXHDL_IE, iobase+IER);
1019
1020 return 0;
1021}
1022
1023/*
1024 * Function nsc_ircc_read_dongle_id (void)
1025 *
1026 * Try to read dongle indentification. This procedure needs to be executed
1027 * once after power-on/reset. It also needs to be used whenever you suspect
1028 * that the user may have plugged/unplugged the IrDA Dongle.
1029 */
1030static int nsc_ircc_read_dongle_id (int iobase)
1031{
1032 int dongle_id;
1033 __u8 bank;
1034
1035 bank = inb(iobase+BSR);
1036
1037 /* Select Bank 7 */
1038 switch_bank(iobase, BANK7);
1039
1040 /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
1041 outb(0x00, iobase+7);
1042
1043 /* ID0, 1, and 2 are pulled up/down very slowly */
1044 udelay(50);
1045
1046 /* IRCFG1: read the ID bits */
1047 dongle_id = inb(iobase+4) & 0x0f;
1048
1049#ifdef BROKEN_DONGLE_ID
1050 if (dongle_id == 0x0a)
1051 dongle_id = 0x09;
1052#endif
1053 /* Go back to bank 0 before returning */
1054 switch_bank(iobase, BANK0);
1055
1056 outb(bank, iobase+BSR);
1057
1058 return dongle_id;
1059}
1060
1061/*
1062 * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
1063 *
1064 * This function initializes the dongle for the transceiver that is
1065 * used. This procedure needs to be executed once after
1066 * power-on/reset. It also needs to be used whenever you suspect that
1067 * the dongle is changed.
1068 */
1069static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
1070{
1071 int bank;
1072
1073 /* Save current bank */
1074 bank = inb(iobase+BSR);
1075
1076 /* Select Bank 7 */
1077 switch_bank(iobase, BANK7);
1078
1079 /* IRCFG4: set according to dongle_id */
1080 switch (dongle_id) {
1081 case 0x00: /* same as */
1082 case 0x01: /* Differential serial interface */
1083 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1084 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1085 break;
1086 case 0x02: /* same as */
1087 case 0x03: /* Reserved */
1088 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1089 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1090 break;
1091 case 0x04: /* Sharp RY5HD01 */
1092 break;
1093 case 0x05: /* Reserved, but this is what the Thinkpad reports */
1094 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1095 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1096 break;
1097 case 0x06: /* Single-ended serial interface */
1098 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1099 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1100 break;
1101 case 0x07: /* Consumer-IR only */
1102 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
a97a6f10 1103 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1104 break;
1105 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1106 IRDA_DEBUG(0, "%s(), %s\n",
a97a6f10 1107 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1108 break;
1109 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1110 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1111 break;
1112 case 0x0A: /* same as */
1113 case 0x0B: /* Reserved */
1114 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1115 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1116 break;
1117 case 0x0C: /* same as */
1118 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1119 /*
1120 * Set irsl0 as input, irsl[1-2] as output, and separate
1121 * inputs are used for SIR and MIR/FIR
1122 */
1123 outb(0x48, iobase+7);
1124 break;
1125 case 0x0E: /* Supports SIR Mode only */
1126 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1127 break;
1128 case 0x0F: /* No dongle connected */
1129 IRDA_DEBUG(0, "%s(), %s\n",
a97a6f10 1130 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1131
1132 switch_bank(iobase, BANK0);
1133 outb(0x62, iobase+MCR);
1134 break;
1135 default:
1136 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
a97a6f10 1137 __func__, dongle_id);
1da177e4
LT		 1138 }
1139
1140 /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1141 outb(0x00, iobase+4);
1142
1143 /* Restore bank register */
1144 outb(bank, iobase+BSR);
1145
1146} /* set_up_dongle_interface */
1147
1148/*
1149 * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1150 *
1151 * Change speed of the attach dongle
1152 *
1153 */
1154static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1155{
1156 __u8 bank;
1157
1158 /* Save current bank */
1159 bank = inb(iobase+BSR);
1160
1161 /* Select Bank 7 */
1162 switch_bank(iobase, BANK7);
1163
1164 /* IRCFG1: set according to dongle_id */
1165 switch (dongle_id) {
1166 case 0x00: /* same as */
1167 case 0x01: /* Differential serial interface */
1168 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1169 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1170 break;
1171 case 0x02: /* same as */
1172 case 0x03: /* Reserved */
1173 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1174 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1175 break;
1176 case 0x04: /* Sharp RY5HD01 */
1177 break;
1178 case 0x05: /* Reserved */
1179 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1180 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1181 break;
1182 case 0x06: /* Single-ended serial interface */
1183 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1184 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1185 break;
1186 case 0x07: /* Consumer-IR only */
1187 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
a97a6f10 1188 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1189 break;
1190 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1191 IRDA_DEBUG(0, "%s(), %s\n",
a97a6f10 1192 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1193 outb(0x00, iobase+4);
1194 if (speed > 115200)
1195 outb(0x01, iobase+4);
1196 break;
1197 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1198 outb(0x01, iobase+4);
1199
1200 if (speed == 4000000) {
1201 /* There was a cli() there, but we now are already
1202 * under spin_lock_irqsave() - JeanII */
1203 outb(0x81, iobase+4);
1204 outb(0x80, iobase+4);
1205 } else
1206 outb(0x00, iobase+4);
1207 break;
1208 case 0x0A: /* same as */
1209 case 0x0B: /* Reserved */
1210 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
a97a6f10 1211 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1212 break;
1213 case 0x0C: /* same as */
1214 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1215 break;
1216 case 0x0E: /* Supports SIR Mode only */
1217 break;
1218 case 0x0F: /* No dongle connected */
1219 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
a97a6f10 1220 __func__, dongle_types[dongle_id]);
1da177e4
LT		 1221
1222 switch_bank(iobase, BANK0);
1223 outb(0x62, iobase+MCR);
1224 break;
1225 default:
a97a6f10 1226 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __func__);
1da177e4
LT		 1227 }
1228 /* Restore bank register */
1229 outb(bank, iobase+BSR);
1230}
1231
1232/*
1233 * Function nsc_ircc_change_speed (self, baud)
1234 *
1235 * Change the speed of the device
1236 *
1237 * This function *must* be called with irq off and spin-lock.
1238 */
1239static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1240{
1241 struct net_device *dev = self->netdev;
1242 __u8 mcr = MCR_SIR;
1243 int iobase;
1244 __u8 bank;
1245 __u8 ier; /* Interrupt enable register */
1246
a97a6f10 1247 IRDA_DEBUG(2, "%s(), speed=%d\n", __func__, speed);
1da177e4
LT		 1248
1249 IRDA_ASSERT(self != NULL, return 0;);
1250
1251 iobase = self->io.fir_base;
1252
1253 /* Update accounting for new speed */
1254 self->io.speed = speed;
1255
1256 /* Save current bank */
1257 bank = inb(iobase+BSR);
1258
1259 /* Disable interrupts */
1260 switch_bank(iobase, BANK0);
1261 outb(0, iobase+IER);
1262
1263 /* Select Bank 2 */
1264 switch_bank(iobase, BANK2);
1265
1266 outb(0x00, iobase+BGDH);
1267 switch (speed) {
1268 case 9600: outb(0x0c, iobase+BGDL); break;
1269 case 19200: outb(0x06, iobase+BGDL); break;
1270 case 38400: outb(0x03, iobase+BGDL); break;
1271 case 57600: outb(0x02, iobase+BGDL); break;
1272 case 115200: outb(0x01, iobase+BGDL); break;
1273 case 576000:
1274 switch_bank(iobase, BANK5);
1275
1276 /* IRCR2: MDRS is set */
1277 outb(inb(iobase+4) | 0x04, iobase+4);
1278
1279 mcr = MCR_MIR;
a97a6f10 1280 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __func__);
1da177e4
LT		 1281 break;
1282 case 1152000:
1283 mcr = MCR_MIR;
a97a6f10 1284 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __func__);
1da177e4
LT		 1285 break;
1286 case 4000000:
1287 mcr = MCR_FIR;
a97a6f10 1288 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __func__);
1da177e4
LT		 1289 break;
1290 default:
1291 mcr = MCR_FIR;
1292 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
a97a6f10 1293 __func__, speed);
1da177e4
LT		 1294 break;
1295 }
1296
1297 /* Set appropriate speed mode */
1298 switch_bank(iobase, BANK0);
1299 outb(mcr | MCR_TX_DFR, iobase+MCR);
1300
1301 /* Give some hits to the transceiver */
1302 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1303
1304 /* Set FIFO threshold to TX17, RX16 */
1305 switch_bank(iobase, BANK0);
1306 outb(0x00, iobase+FCR);
1307 outb(FCR_FIFO_EN, iobase+FCR);
1308 outb(FCR_RXTH| /* Set Rx FIFO threshold */
1309 FCR_TXTH| /* Set Tx FIFO threshold */
1310 FCR_TXSR| /* Reset Tx FIFO */
1311 FCR_RXSR| /* Reset Rx FIFO */
1312 FCR_FIFO_EN, /* Enable FIFOs */
1313 iobase+FCR);
1314
1315 /* Set FIFO size to 32 */
1316 switch_bank(iobase, BANK2);
1317 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1318
1319 /* Enable some interrupts so we can receive frames */
1320 switch_bank(iobase, BANK0);
1321 if (speed > 115200) {
1322 /* Install FIR xmit handler */
1323 dev->hard_start_xmit = nsc_ircc_hard_xmit_fir;
1324 ier = IER_SFIF_IE;
1325 nsc_ircc_dma_receive(self);
1326 } else {
1327 /* Install SIR xmit handler */
1328 dev->hard_start_xmit = nsc_ircc_hard_xmit_sir;
1329 ier = IER_RXHDL_IE;
1330 }
1331 /* Set our current interrupt mask */
1332 outb(ier, iobase+IER);
1333
1334 /* Restore BSR */
1335 outb(bank, iobase+BSR);
1336
1337 /* Make sure interrupt handlers keep the proper interrupt mask */
1338 return(ier);
1339}
1340
1341/*
1342 * Function nsc_ircc_hard_xmit (skb, dev)
1343 *
1344 * Transmit the frame!
1345 *
1346 */
1347static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1348{
1349 struct nsc_ircc_cb *self;
1350 unsigned long flags;
1351 int iobase;
1352 __s32 speed;
1353 __u8 bank;
1354
4cf1653a 1355 self = netdev_priv(dev);
1da177e4
LT		 1356
1357 IRDA_ASSERT(self != NULL, return 0;);
1358
1359 iobase = self->io.fir_base;
1360
1361 netif_stop_queue(dev);
1362
1363 /* Make sure tests *& speed change are atomic */
1364 spin_lock_irqsave(&self->lock, flags);
1365
1366 /* Check if we need to change the speed */
1367 speed = irda_get_next_speed(skb);
1368 if ((speed != self->io.speed) && (speed != -1)) {
1369 /* Check for empty frame. */
1370 if (!skb->len) {
1371 /* If we just sent a frame, we get called before
1372 * the last bytes get out (because of the SIR FIFO).
1373 * If this is the case, let interrupt handler change
1374 * the speed itself... Jean II */
1375 if (self->io.direction == IO_RECV) {
1376 nsc_ircc_change_speed(self, speed);
1377 /* TODO : For SIR->SIR, the next packet
1378 * may get corrupted - Jean II */
1379 netif_wake_queue(dev);
1380 } else {
1381 self->new_speed = speed;
1382 /* Queue will be restarted after speed change
1383 * to make sure packets gets through the
1384 * proper xmit handler - Jean II */
1385 }
1386 dev->trans_start = jiffies;
1387 spin_unlock_irqrestore(&self->lock, flags);
1388 dev_kfree_skb(skb);
1389 return 0;
1390 } else
1391 self->new_speed = speed;
1392 }
1393
1394 /* Save current bank */
1395 bank = inb(iobase+BSR);
1396
1397 self->tx_buff.data = self->tx_buff.head;
1398
1399 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1400 self->tx_buff.truesize);
1401
af049081 1402 dev->stats.tx_bytes += self->tx_buff.len;
1da177e4
LT		 1403
1404 /* Add interrupt on tx low level (will fire immediately) */
1405 switch_bank(iobase, BANK0);
1406 outb(IER_TXLDL_IE, iobase+IER);
1407
1408 /* Restore bank register */
1409 outb(bank, iobase+BSR);
1410
1411 dev->trans_start = jiffies;
1412 spin_unlock_irqrestore(&self->lock, flags);
1413
1414 dev_kfree_skb(skb);
1415
1416 return 0;
1417}
1418
1419static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1420{
1421 struct nsc_ircc_cb *self;
1422 unsigned long flags;
1423 int iobase;
1424 __s32 speed;
1425 __u8 bank;
1426 int mtt, diff;
1427
4cf1653a 1428 self = netdev_priv(dev);
1da177e4
LT		 1429 iobase = self->io.fir_base;
1430
1431 netif_stop_queue(dev);
1432
1433 /* Make sure tests *& speed change are atomic */
1434 spin_lock_irqsave(&self->lock, flags);
1435
1436 /* Check if we need to change the speed */
1437 speed = irda_get_next_speed(skb);
1438 if ((speed != self->io.speed) && (speed != -1)) {
1439 /* Check for empty frame. */
1440 if (!skb->len) {
1441 /* If we are currently transmitting, defer to
1442 * interrupt handler. - Jean II */
1443 if(self->tx_fifo.len == 0) {
1444 nsc_ircc_change_speed(self, speed);
1445 netif_wake_queue(dev);
1446 } else {
1447 self->new_speed = speed;
1448 /* Keep queue stopped :
1449 * the speed change operation may change the
1450 * xmit handler, and we want to make sure
1451 * the next packet get through the proper
1452 * Tx path, so block the Tx queue until
1453 * the speed change has been done.
1454 * Jean II */
1455 }
1456 dev->trans_start = jiffies;
1457 spin_unlock_irqrestore(&self->lock, flags);
1458 dev_kfree_skb(skb);
1459 return 0;
1460 } else {
1461 /* Change speed after current frame */
1462 self->new_speed = speed;
1463 }
1464 }
1465
1466 /* Save current bank */
1467 bank = inb(iobase+BSR);
1468
1469 /* Register and copy this frame to DMA memory */
1470 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1471 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1472 self->tx_fifo.tail += skb->len;
1473
af049081 1474 dev->stats.tx_bytes += skb->len;
1da177e4 1475
d626f62b
ACM		 1476 skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1477 skb->len);
1da177e4
LT		 1478 self->tx_fifo.len++;
1479 self->tx_fifo.free++;
1480
1481 /* Start transmit only if there is currently no transmit going on */
1482 if (self->tx_fifo.len == 1) {
1483 /* Check if we must wait the min turn time or not */
1484 mtt = irda_get_mtt(skb);
1485 if (mtt) {
1486 /* Check how much time we have used already */
1487 do_gettimeofday(&self->now);
1488 diff = self->now.tv_usec - self->stamp.tv_usec;
1489 if (diff < 0)
1490 diff += 1000000;
1491
1492 /* Check if the mtt is larger than the time we have
1493 * already used by all the protocol processing
1494 */
1495 if (mtt > diff) {
1496 mtt -= diff;
1497
1498 /*
1499 * Use timer if delay larger than 125 us, and
1500 * use udelay for smaller values which should
1501 * be acceptable
1502 */
1503 if (mtt > 125) {
1504 /* Adjust for timer resolution */
1505 mtt = mtt / 125;
1506
1507 /* Setup timer */
1508 switch_bank(iobase, BANK4);
1509 outb(mtt & 0xff, iobase+TMRL);
1510 outb((mtt >> 8) & 0x0f, iobase+TMRH);
1511
1512 /* Start timer */
1513 outb(IRCR1_TMR_EN, iobase+IRCR1);
1514 self->io.direction = IO_XMIT;
1515
1516 /* Enable timer interrupt */
1517 switch_bank(iobase, BANK0);
1518 outb(IER_TMR_IE, iobase+IER);
1519
1520 /* Timer will take care of the rest */
1521 goto out;
1522 } else
1523 udelay(mtt);
1524 }
1525 }
1526 /* Enable DMA interrupt */
1527 switch_bank(iobase, BANK0);
1528 outb(IER_DMA_IE, iobase+IER);
1529
1530 /* Transmit frame */
1531 nsc_ircc_dma_xmit(self, iobase);
1532 }
1533 out:
1534 /* Not busy transmitting anymore if window is not full,
1535 * and if we don't need to change speed */
1536 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1537 netif_wake_queue(self->netdev);
1538
1539 /* Restore bank register */
1540 outb(bank, iobase+BSR);
1541
1542 dev->trans_start = jiffies;
1543 spin_unlock_irqrestore(&self->lock, flags);
1544 dev_kfree_skb(skb);
1545
1546 return 0;
1547}
1548
1549/*
1550 * Function nsc_ircc_dma_xmit (self, iobase)
1551 *
1552 * Transmit data using DMA
1553 *
1554 */
1555static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1556{
1557 int bsr;
1558
1559 /* Save current bank */
1560 bsr = inb(iobase+BSR);
1561
1562 /* Disable DMA */
1563 switch_bank(iobase, BANK0);
1564 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1565
1566 self->io.direction = IO_XMIT;
1567
1568 /* Choose transmit DMA channel */
1569 switch_bank(iobase, BANK2);
1570 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1571
1572 irda_setup_dma(self->io.dma,
1573 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1574 self->tx_buff.head) + self->tx_buff_dma,
1575 self->tx_fifo.queue[self->tx_fifo.ptr].len,
1576 DMA_TX_MODE);
1577
1578 /* Enable DMA and SIR interaction pulse */
1579 switch_bank(iobase, BANK0);
1580 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1581
1582 /* Restore bank register */
1583 outb(bsr, iobase+BSR);
1584}
1585
1586/*
1587 * Function nsc_ircc_pio_xmit (self, iobase)
1588 *
1589 * Transmit data using PIO. Returns the number of bytes that actually
1590 * got transferred
1591 *
1592 */
1593static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1594{
1595 int actual = 0;
1596 __u8 bank;
1597
a97a6f10 1598 IRDA_DEBUG(4, "%s()\n", __func__);
1da177e4
LT		 1599
1600 /* Save current bank */
1601 bank = inb(iobase+BSR);
1602
1603 switch_bank(iobase, BANK0);
1604 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1605 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
a97a6f10 1606 __func__);
1da177e4
LT		 1607
1608 /* FIFO may still be filled to the Tx interrupt threshold */
1609 fifo_size -= 17;
1610 }
1611
1612 /* Fill FIFO with current frame */
1613 while ((fifo_size-- > 0) && (actual < len)) {
1614 /* Transmit next byte */
1615 outb(buf[actual++], iobase+TXD);
1616 }
1617
1618 IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
a97a6f10 1619 __func__, fifo_size, actual, len);
1da177e4
LT		 1620
1621 /* Restore bank */
1622 outb(bank, iobase+BSR);
1623
1624 return actual;
1625}
1626
1627/*
1628 * Function nsc_ircc_dma_xmit_complete (self)
1629 *
1630 * The transfer of a frame in finished. This function will only be called
1631 * by the interrupt handler
1632 *
1633 */
1634static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1635{
1636 int iobase;
1637 __u8 bank;
1638 int ret = TRUE;
1639
a97a6f10 1640 IRDA_DEBUG(2, "%s()\n", __func__);
1da177e4
LT		 1641
1642 iobase = self->io.fir_base;
1643
1644 /* Save current bank */
1645 bank = inb(iobase+BSR);
1646
1647 /* Disable DMA */
1648 switch_bank(iobase, BANK0);
1649 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1650
1651 /* Check for underrrun! */
1652 if (inb(iobase+ASCR) & ASCR_TXUR) {
af049081
SH		 1653 self->netdev->stats.tx_errors++;
1654 self->netdev->stats.tx_fifo_errors++;
1da177e4
LT		 1655
1656 /* Clear bit, by writing 1 into it */
1657 outb(ASCR_TXUR, iobase+ASCR);
1658 } else {
af049081 1659 self->netdev->stats.tx_packets++;
1da177e4
LT		 1660 }
1661
1662 /* Finished with this frame, so prepare for next */
1663 self->tx_fifo.ptr++;
1664 self->tx_fifo.len--;
1665
1666 /* Any frames to be sent back-to-back? */
1667 if (self->tx_fifo.len) {
1668 nsc_ircc_dma_xmit(self, iobase);
1669
1670 /* Not finished yet! */
1671 ret = FALSE;
1672 } else {
1673 /* Reset Tx FIFO info */
1674 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1675 self->tx_fifo.tail = self->tx_buff.head;
1676 }
1677
1678 /* Make sure we have room for more frames and
1679 * that we don't need to change speed */
1680 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1681 /* Not busy transmitting anymore */
1682 /* Tell the network layer, that we can accept more frames */
1683 netif_wake_queue(self->netdev);
1684 }
1685
1686 /* Restore bank */
1687 outb(bank, iobase+BSR);
1688
1689 return ret;
1690}
1691
1692/*
1693 * Function nsc_ircc_dma_receive (self)
1694 *
1695 * Get ready for receiving a frame. The device will initiate a DMA
1696 * if it starts to receive a frame.
1697 *
1698 */
1699static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1700{
1701 int iobase;
1702 __u8 bsr;
1703
1704 iobase = self->io.fir_base;
1705
1706 /* Reset Tx FIFO info */
1707 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1708 self->tx_fifo.tail = self->tx_buff.head;
1709
1710 /* Save current bank */
1711 bsr = inb(iobase+BSR);
1712
1713 /* Disable DMA */
1714 switch_bank(iobase, BANK0);
1715 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1716
1717 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1718 switch_bank(iobase, BANK2);
1719 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1720
1721 self->io.direction = IO_RECV;
1722 self->rx_buff.data = self->rx_buff.head;
1723
1724 /* Reset Rx FIFO. This will also flush the ST_FIFO */
1725 switch_bank(iobase, BANK0);
1726 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1727
1728 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1729 self->st_fifo.tail = self->st_fifo.head = 0;
1730
1731 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1732 DMA_RX_MODE);
1733
1734 /* Enable DMA */
1735 switch_bank(iobase, BANK0);
1736 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1737
1738 /* Restore bank register */
1739 outb(bsr, iobase+BSR);
1740
1741 return 0;
1742}
1743
1744/*
1745 * Function nsc_ircc_dma_receive_complete (self)
1746 *
1747 * Finished with receiving frames
1748 *
1749 *
1750 */
1751static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1752{
1753 struct st_fifo *st_fifo;
1754 struct sk_buff *skb;
1755 __u8 status;
1756 __u8 bank;
1757 int len;
1758
1759 st_fifo = &self->st_fifo;
1760
1761 /* Save current bank */
1762 bank = inb(iobase+BSR);
1763
1764 /* Read all entries in status FIFO */
1765 switch_bank(iobase, BANK5);
1766 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1767 /* We must empty the status FIFO no matter what */
1768 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1769
1770 if (st_fifo->tail >= MAX_RX_WINDOW) {
a97a6f10 1771 IRDA_DEBUG(0, "%s(), window is full!\n", __func__);
1da177e4
LT		 1772 continue;
1773 }
1774
1775 st_fifo->entries[st_fifo->tail].status = status;
1776 st_fifo->entries[st_fifo->tail].len = len;
1777 st_fifo->pending_bytes += len;
1778 st_fifo->tail++;
1779 st_fifo->len++;
1780 }
1781 /* Try to process all entries in status FIFO */
1782 while (st_fifo->len > 0) {
1783 /* Get first entry */
1784 status = st_fifo->entries[st_fifo->head].status;
1785 len = st_fifo->entries[st_fifo->head].len;
1786 st_fifo->pending_bytes -= len;
1787 st_fifo->head++;
1788 st_fifo->len--;
1789
1790 /* Check for errors */
1791 if (status & FRM_ST_ERR_MSK) {
1792 if (status & FRM_ST_LOST_FR) {
1793 /* Add number of lost frames to stats */
af049081 1794 self->netdev->stats.rx_errors += len;
1da177e4
LT		 1795 } else {
1796 /* Skip frame */
af049081 1797 self->netdev->stats.rx_errors++;
1da177e4
LT		 1798
1799 self->rx_buff.data += len;
1800
1801 if (status & FRM_ST_MAX_LEN)
af049081 1802 self->netdev->stats.rx_length_errors++;
1da177e4
LT		 1803
1804 if (status & FRM_ST_PHY_ERR)
af049081 1805 self->netdev->stats.rx_frame_errors++;
1da177e4
LT		 1806
1807 if (status & FRM_ST_BAD_CRC)
af049081 1808 self->netdev->stats.rx_crc_errors++;
1da177e4
LT		 1809 }
1810 /* The errors below can be reported in both cases */
1811 if (status & FRM_ST_OVR1)
af049081 1812 self->netdev->stats.rx_fifo_errors++;
1da177e4
LT		 1813
1814 if (status & FRM_ST_OVR2)
af049081 1815 self->netdev->stats.rx_fifo_errors++;
1da177e4
LT		 1816 } else {
1817 /*
1818 * First we must make sure that the frame we
1819 * want to deliver is all in main memory. If we
1820 * cannot tell, then we check if the Rx FIFO is
1821 * empty. If not then we will have to take a nap
1822 * and try again later.
1823 */
1824 if (st_fifo->pending_bytes < self->io.fifo_size) {
1825 switch_bank(iobase, BANK0);
1826 if (inb(iobase+LSR) & LSR_RXDA) {
1827 /* Put this entry back in fifo */
1828 st_fifo->head--;
1829 st_fifo->len++;
1830 st_fifo->pending_bytes += len;
1831 st_fifo->entries[st_fifo->head].status = status;
1832 st_fifo->entries[st_fifo->head].len = len;
1833 /*
1834 * DMA not finished yet, so try again
1835 * later, set timer value, resolution
1836 * 125 us
1837 */
1838 switch_bank(iobase, BANK4);
1839 outb(0x02, iobase+TMRL); /* x 125 us */
1840 outb(0x00, iobase+TMRH);
1841
1842 /* Start timer */
1843 outb(IRCR1_TMR_EN, iobase+IRCR1);
1844
1845 /* Restore bank register */
1846 outb(bank, iobase+BSR);
1847
1848 return FALSE; /* I'll be back! */
1849 }
1850 }
1851
1852 /*
1853 * Remember the time we received this frame, so we can
1854 * reduce the min turn time a bit since we will know
1855 * how much time we have used for protocol processing
1856 */
1857 do_gettimeofday(&self->stamp);
1858
1859 skb = dev_alloc_skb(len+1);
1860 if (skb == NULL) {
1861 IRDA_WARNING("%s(), memory squeeze, "
1862 "dropping frame.\n",
a97a6f10 1863 __func__);
af049081 1864 self->netdev->stats.rx_dropped++;
1da177e4
LT		 1865
1866 /* Restore bank register */
1867 outb(bank, iobase+BSR);
1868
1869 return FALSE;
1870 }
1871
1872 /* Make sure IP header gets aligned */
1873 skb_reserve(skb, 1);
1874
1875 /* Copy frame without CRC */
1876 if (self->io.speed < 4000000) {
1877 skb_put(skb, len-2);
27d7ff46
ACM		 1878 skb_copy_to_linear_data(skb,
1879 self->rx_buff.data,
1880 len - 2);
1da177e4
LT		 1881 } else {
1882 skb_put(skb, len-4);
27d7ff46
ACM		 1883 skb_copy_to_linear_data(skb,
1884 self->rx_buff.data,
1885 len - 4);
1da177e4
LT		 1886 }
1887
1888 /* Move to next frame */
1889 self->rx_buff.data += len;
af049081
SH		 1890 self->netdev->stats.rx_bytes += len;
1891 self->netdev->stats.rx_packets++;
1da177e4
LT		 1892
1893 skb->dev = self->netdev;
459a98ed 1894 skb_reset_mac_header(skb);
1da177e4
LT		 1895 skb->protocol = htons(ETH_P_IRDA);
1896 netif_rx(skb);
1da177e4
LT		 1897 }
1898 }
1899 /* Restore bank register */
1900 outb(bank, iobase+BSR);
1901
1902 return TRUE;
1903}
1904
1905/*
1906 * Function nsc_ircc_pio_receive (self)
1907 *
1908 * Receive all data in receiver FIFO
1909 *
1910 */
1911static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1912{
1913 __u8 byte;
1914 int iobase;
1915
1916 iobase = self->io.fir_base;
1917
1918 /* Receive all characters in Rx FIFO */
1919 do {
1920 byte = inb(iobase+RXD);
af049081
SH		 1921 async_unwrap_char(self->netdev, &self->netdev->stats,
1922 &self->rx_buff, byte);
1da177e4
LT		 1923 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1924}
1925
1926/*
1927 * Function nsc_ircc_sir_interrupt (self, eir)
1928 *
1929 * Handle SIR interrupt
1930 *
1931 */
1932static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1933{
1934 int actual;
1935
1936 /* Check if transmit FIFO is low on data */
1937 if (eir & EIR_TXLDL_EV) {
1938 /* Write data left in transmit buffer */
1939 actual = nsc_ircc_pio_write(self->io.fir_base,
1940 self->tx_buff.data,
1941 self->tx_buff.len,
1942 self->io.fifo_size);
1943 self->tx_buff.data += actual;
1944 self->tx_buff.len -= actual;
1945
1946 self->io.direction = IO_XMIT;
1947
1948 /* Check if finished */
1949 if (self->tx_buff.len > 0)
1950 self->ier = IER_TXLDL_IE;
1951 else {
1952
af049081 1953 self->netdev->stats.tx_packets++;
1da177e4
LT		 1954 netif_wake_queue(self->netdev);
1955 self->ier = IER_TXEMP_IE;
1956 }
1957
1958 }
1959 /* Check if transmission has completed */
1960 if (eir & EIR_TXEMP_EV) {
1961 /* Turn around and get ready to receive some data */
1962 self->io.direction = IO_RECV;
1963 self->ier = IER_RXHDL_IE;
1964 /* Check if we need to change the speed?
1965 * Need to be after self->io.direction to avoid race with
1966 * nsc_ircc_hard_xmit_sir() - Jean II */
1967 if (self->new_speed) {
a97a6f10 1968 IRDA_DEBUG(2, "%s(), Changing speed!\n", __func__);
1da177e4
LT		 1969 self->ier = nsc_ircc_change_speed(self,
1970 self->new_speed);
1971 self->new_speed = 0;
1972 netif_wake_queue(self->netdev);
1973
1974 /* Check if we are going to FIR */
1975 if (self->io.speed > 115200) {
1976 /* No need to do anymore SIR stuff */
1977 return;
1978 }
1979 }
1980 }
1981
1982 /* Rx FIFO threshold or timeout */
1983 if (eir & EIR_RXHDL_EV) {
1984 nsc_ircc_pio_receive(self);
1985
1986 /* Keep receiving */
1987 self->ier = IER_RXHDL_IE;
1988 }
1989}
1990
1991/*
1992 * Function nsc_ircc_fir_interrupt (self, eir)
1993 *
1994 * Handle MIR/FIR interrupt
1995 *
1996 */
1997static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
1998 int eir)
1999{
2000 __u8 bank;
2001
2002 bank = inb(iobase+BSR);
2003
2004 /* Status FIFO event*/
2005 if (eir & EIR_SFIF_EV) {
2006 /* Check if DMA has finished */
2007 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2008 /* Wait for next status FIFO interrupt */
2009 self->ier = IER_SFIF_IE;
2010 } else {
2011 self->ier = IER_SFIF_IE | IER_TMR_IE;
2012 }
2013 } else if (eir & EIR_TMR_EV) { /* Timer finished */
2014 /* Disable timer */
2015 switch_bank(iobase, BANK4);
2016 outb(0, iobase+IRCR1);
2017
2018 /* Clear timer event */
2019 switch_bank(iobase, BANK0);
2020 outb(ASCR_CTE, iobase+ASCR);
2021
2022 /* Check if this is a Tx timer interrupt */
2023 if (self->io.direction == IO_XMIT) {
2024 nsc_ircc_dma_xmit(self, iobase);
2025
2026 /* Interrupt on DMA */
2027 self->ier = IER_DMA_IE;
2028 } else {
2029 /* Check (again) if DMA has finished */
2030 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2031 self->ier = IER_SFIF_IE;
2032 } else {
2033 self->ier = IER_SFIF_IE | IER_TMR_IE;
2034 }
2035 }
2036 } else if (eir & EIR_DMA_EV) {
2037 /* Finished with all transmissions? */
2038 if (nsc_ircc_dma_xmit_complete(self)) {
2039 if(self->new_speed != 0) {
2040 /* As we stop the Tx queue, the speed change
2041 * need to be done when the Tx fifo is
2042 * empty. Ask for a Tx done interrupt */
2043 self->ier = IER_TXEMP_IE;
2044 } else {
2045 /* Check if there are more frames to be
2046 * transmitted */
2047 if (irda_device_txqueue_empty(self->netdev)) {
2048 /* Prepare for receive */
2049 nsc_ircc_dma_receive(self);
2050 self->ier = IER_SFIF_IE;
2051 } else
2052 IRDA_WARNING("%s(), potential "
2053 "Tx queue lockup !\n",
a97a6f10 2054 __func__);
1da177e4
LT		 2055 }
2056 } else {
2057 /* Not finished yet, so interrupt on DMA again */
2058 self->ier = IER_DMA_IE;
2059 }
2060 } else if (eir & EIR_TXEMP_EV) {
2061 /* The Tx FIFO has totally drained out, so now we can change
2062 * the speed... - Jean II */
2063 self->ier = nsc_ircc_change_speed(self, self->new_speed);
2064 self->new_speed = 0;
2065 netif_wake_queue(self->netdev);
2066 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
2067 }
2068
2069 outb(bank, iobase+BSR);
2070}
2071
2072/*
2073 * Function nsc_ircc_interrupt (irq, dev_id, regs)
2074 *
2075 * An interrupt from the chip has arrived. Time to do some work
2076 *
2077 */
7d12e780 2078static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id)
1da177e4 2079{
c31f28e7 2080 struct net_device *dev = dev_id;
1da177e4
LT		 2081 struct nsc_ircc_cb *self;
2082 __u8 bsr, eir;
2083 int iobase;
2084
4cf1653a 2085 self = netdev_priv(dev);
1da177e4
LT		 2086
2087 spin_lock(&self->lock);
2088
2089 iobase = self->io.fir_base;
2090
2091 bsr = inb(iobase+BSR); /* Save current bank */
2092
2093 switch_bank(iobase, BANK0);
2094 self->ier = inb(iobase+IER);
2095 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
2096
2097 outb(0, iobase+IER); /* Disable interrupts */
2098
2099 if (eir) {
2100 /* Dispatch interrupt handler for the current speed */
2101 if (self->io.speed > 115200)
2102 nsc_ircc_fir_interrupt(self, iobase, eir);
2103 else
2104 nsc_ircc_sir_interrupt(self, eir);
2105 }
2106
2107 outb(self->ier, iobase+IER); /* Restore interrupts */
2108 outb(bsr, iobase+BSR); /* Restore bank register */
2109
2110 spin_unlock(&self->lock);
2111 return IRQ_RETVAL(eir);
2112}
2113
2114/*
2115 * Function nsc_ircc_is_receiving (self)
2116 *
2117 * Return TRUE is we are currently receiving a frame
2118 *
2119 */
2120static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
2121{
2122 unsigned long flags;
2123 int status = FALSE;
2124 int iobase;
2125 __u8 bank;
2126
2127 IRDA_ASSERT(self != NULL, return FALSE;);
2128
2129 spin_lock_irqsave(&self->lock, flags);
2130
2131 if (self->io.speed > 115200) {
2132 iobase = self->io.fir_base;
2133
2134 /* Check if rx FIFO is not empty */
2135 bank = inb(iobase+BSR);
2136 switch_bank(iobase, BANK2);
2137 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
2138 /* We are receiving something */
2139 status = TRUE;
2140 }
2141 outb(bank, iobase+BSR);
2142 } else
2143 status = (self->rx_buff.state != OUTSIDE_FRAME);
2144
2145 spin_unlock_irqrestore(&self->lock, flags);
2146
2147 return status;
2148}
2149
2150/*
2151 * Function nsc_ircc_net_open (dev)
2152 *
2153 * Start the device
2154 *
2155 */
2156static int nsc_ircc_net_open(struct net_device *dev)
2157{
2158 struct nsc_ircc_cb *self;
2159 int iobase;
2160 char hwname[32];
2161 __u8 bank;
2162
a97a6f10 2163 IRDA_DEBUG(4, "%s()\n", __func__);
1da177e4
LT		 2164
2165 IRDA_ASSERT(dev != NULL, return -1;);
4cf1653a 2166 self = netdev_priv(dev);
1da177e4
LT		 2167
2168 IRDA_ASSERT(self != NULL, return 0;);
2169
2170 iobase = self->io.fir_base;
2171
2172 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2173 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2174 driver_name, self->io.irq);
2175 return -EAGAIN;
2176 }
2177 /*
2178 * Always allocate the DMA channel after the IRQ, and clean up on
2179 * failure.
2180 */
2181 if (request_dma(self->io.dma, dev->name)) {
2182 IRDA_WARNING("%s, unable to allocate dma=%d\n",
2183 driver_name, self->io.dma);
2184 free_irq(self->io.irq, dev);
2185 return -EAGAIN;
2186 }
2187
2188 /* Save current bank */
2189 bank = inb(iobase+BSR);
2190
2191 /* turn on interrupts */
2192 switch_bank(iobase, BANK0);
2193 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2194
2195 /* Restore bank register */
2196 outb(bank, iobase+BSR);
2197
2198 /* Ready to play! */
2199 netif_start_queue(dev);
2200
2201 /* Give self a hardware name */
2202 sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2203
2204 /*
2205 * Open new IrLAP layer instance, now that everything should be
2206 * initialized properly
2207 */
2208 self->irlap = irlap_open(dev, &self->qos, hwname);
2209
2210 return 0;
2211}
2212
2213/*
2214 * Function nsc_ircc_net_close (dev)
2215 *
2216 * Stop the device
2217 *
2218 */
2219static int nsc_ircc_net_close(struct net_device *dev)
2220{
2221 struct nsc_ircc_cb *self;
2222 int iobase;
2223 __u8 bank;
2224
a97a6f10 2225 IRDA_DEBUG(4, "%s()\n", __func__);
1da177e4
LT		 2226
2227 IRDA_ASSERT(dev != NULL, return -1;);
2228
4cf1653a 2229 self = netdev_priv(dev);
1da177e4
LT		 2230 IRDA_ASSERT(self != NULL, return 0;);
2231
2232 /* Stop device */
2233 netif_stop_queue(dev);
2234
2235 /* Stop and remove instance of IrLAP */
2236 if (self->irlap)
2237 irlap_close(self->irlap);
2238 self->irlap = NULL;
2239
2240 iobase = self->io.fir_base;
2241
2242 disable_dma(self->io.dma);
2243
2244 /* Save current bank */
2245 bank = inb(iobase+BSR);
2246
2247 /* Disable interrupts */
2248 switch_bank(iobase, BANK0);
2249 outb(0, iobase+IER);
2250
2251 free_irq(self->io.irq, dev);
2252 free_dma(self->io.dma);
2253
2254 /* Restore bank register */
2255 outb(bank, iobase+BSR);
2256
2257 return 0;
2258}
2259
2260/*
2261 * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2262 *
2263 * Process IOCTL commands for this device
2264 *
2265 */
2266static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2267{
2268 struct if_irda_req *irq = (struct if_irda_req *) rq;
2269 struct nsc_ircc_cb *self;
2270 unsigned long flags;
2271 int ret = 0;
2272
2273 IRDA_ASSERT(dev != NULL, return -1;);
2274
4cf1653a 2275 self = netdev_priv(dev);
1da177e4
LT		 2276
2277 IRDA_ASSERT(self != NULL, return -1;);
2278
a97a6f10 2279 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, cmd);
1da177e4
LT		 2280
2281 switch (cmd) {
2282 case SIOCSBANDWIDTH: /* Set bandwidth */
2283 if (!capable(CAP_NET_ADMIN)) {
2284 ret = -EPERM;
2285 break;
2286 }
2287 spin_lock_irqsave(&self->lock, flags);
2288 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2289 spin_unlock_irqrestore(&self->lock, flags);
2290 break;
2291 case SIOCSMEDIABUSY: /* Set media busy */
2292 if (!capable(CAP_NET_ADMIN)) {
2293 ret = -EPERM;
2294 break;
2295 }
2296 irda_device_set_media_busy(self->netdev, TRUE);
2297 break;
2298 case SIOCGRECEIVING: /* Check if we are receiving right now */
2299 /* This is already protected */
2300 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2301 break;
2302 default:
2303 ret = -EOPNOTSUPP;
2304 }
2305 return ret;
2306}
2307
3b99b93b 2308static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 2309{
3b99b93b
DT		 2310 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2311 int bank;
2312 unsigned long flags;
2313 int iobase = self->io.fir_base;
1da177e4
LT		 2314
2315 if (self->io.suspended)
3b99b93b 2316 return 0;
1da177e4 2317
3b99b93b 2318 IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
1da177e4 2319
3b99b93b
DT		 2320 rtnl_lock();
2321 if (netif_running(self->netdev)) {
2322 netif_device_detach(self->netdev);
2323 spin_lock_irqsave(&self->lock, flags);
2324 /* Save current bank */
2325 bank = inb(iobase+BSR);
2326
2327 /* Disable interrupts */
2328 switch_bank(iobase, BANK0);
2329 outb(0, iobase+IER);
2330
2331 /* Restore bank register */
2332 outb(bank, iobase+BSR);
2333
2334 spin_unlock_irqrestore(&self->lock, flags);
2335 free_irq(self->io.irq, self->netdev);
2336 disable_dma(self->io.dma);
2337 }
1da177e4 2338 self->io.suspended = 1;
3b99b93b
DT		 2339 rtnl_unlock();
2340
2341 return 0;
1da177e4
LT		 2342}
2343
3b99b93b 2344static int nsc_ircc_resume(struct platform_device *dev)
1da177e4 2345{
3b99b93b
DT		 2346 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2347 unsigned long flags;
2348
1da177e4 2349 if (!self->io.suspended)
3b99b93b 2350 return 0;
1da177e4 2351
3b99b93b
DT		 2352 IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
2353
2354 rtnl_lock();
1da177e4 2355 nsc_ircc_setup(&self->io);
3b99b93b 2356 nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
1da177e4 2357
3b99b93b
DT		 2358 if (netif_running(self->netdev)) {
2359 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
2360 self->netdev->name, self->netdev)) {
2361 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2362 driver_name, self->io.irq);
2363
2364 /*
2365 * Don't fail resume process, just kill this
2366 * network interface
2367 */
2368 unregister_netdevice(self->netdev);
2369 } else {
2370 spin_lock_irqsave(&self->lock, flags);
2371 nsc_ircc_change_speed(self, self->io.speed);
2372 spin_unlock_irqrestore(&self->lock, flags);
2373 netif_device_attach(self->netdev);
2374 }
2375
2376 } else {
2377 spin_lock_irqsave(&self->lock, flags);
2378 nsc_ircc_change_speed(self, 9600);
2379 spin_unlock_irqrestore(&self->lock, flags);
2380 }
1da177e4 2381 self->io.suspended = 0;
3b99b93b 2382 rtnl_unlock();
1da177e4 2383
3b99b93b 2384 return 0;
1da177e4
LT		 2385}
2386
2387MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2388MODULE_DESCRIPTION("NSC IrDA Device Driver");
2389MODULE_LICENSE("GPL");
2390
2391
2392module_param(qos_mtt_bits, int, 0);
2393MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2394module_param_array(io, int, NULL, 0);
2395MODULE_PARM_DESC(io, "Base I/O addresses");
2396module_param_array(irq, int, NULL, 0);
2397MODULE_PARM_DESC(irq, "IRQ lines");
2398module_param_array(dma, int, NULL, 0);
2399MODULE_PARM_DESC(dma, "DMA channels");
2400module_param(dongle_id, int, 0);
2401MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2402
2403module_init(nsc_ircc_init);
2404module_exit(nsc_ircc_cleanup);
2405
Linux kernel - Deliverables
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