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[PATCH] ixgb: Fix unnecessary link state messages
[deliverable/linux.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
31/* Change Log
32 * 1.0.88 01/05/05
33 * - include fix to the condition that determines when to quit NAPI - Robert Olsson
34 * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
35 * 1.0.84 10/26/04
36 * - reset buffer_info->dma in Tx resource cleanup logic
37 * 1.0.83 10/12/04
38 * - sparse cleanup - shemminger@osdl.org
39 * - fix tx resource cleanup logic
40 */
41
42char ixgb_driver_name[] = "ixgb";
43char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
44
45#ifndef CONFIG_IXGB_NAPI
46#define DRIVERNAPI
47#else
48#define DRIVERNAPI "-NAPI"
49#endif
8b0ee07e
JG		 50
51#define DRV_VERSION "1.0.95-k2"DRIVERNAPI
01e5abc2 52char ixgb_driver_version[] = DRV_VERSION;
1da177e4
LT		 53char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
54
55/* ixgb_pci_tbl - PCI Device ID Table
56 *
57 * Wildcard entries (PCI_ANY_ID) should come last
58 * Last entry must be all 0s
59 *
60 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
61 * Class, Class Mask, private data (not used) }
62 */
63static struct pci_device_id ixgb_pci_tbl[] = {
64 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
65 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
66 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
67 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
68 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
69 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
70
71 /* required last entry */
72 {0,}
73};
74
75MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
76
77/* Local Function Prototypes */
78
79int ixgb_up(struct ixgb_adapter *adapter);
80void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
81void ixgb_reset(struct ixgb_adapter *adapter);
82int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
83int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
84void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
85void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
86void ixgb_update_stats(struct ixgb_adapter *adapter);
87
88static int ixgb_init_module(void);
89static void ixgb_exit_module(void);
90static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
91static void __devexit ixgb_remove(struct pci_dev *pdev);
92static int ixgb_sw_init(struct ixgb_adapter *adapter);
93static int ixgb_open(struct net_device *netdev);
94static int ixgb_close(struct net_device *netdev);
95static void ixgb_configure_tx(struct ixgb_adapter *adapter);
96static void ixgb_configure_rx(struct ixgb_adapter *adapter);
97static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
98static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
99static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
100static void ixgb_set_multi(struct net_device *netdev);
101static void ixgb_watchdog(unsigned long data);
102static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
103static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
104static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
105static int ixgb_set_mac(struct net_device *netdev, void *p);
106static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
107static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 108
1da177e4
LT		 109#ifdef CONFIG_IXGB_NAPI
110static int ixgb_clean(struct net_device *netdev, int *budget);
111static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
112 int *work_done, int work_to_do);
113#else
114static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
115#endif
116static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
117void ixgb_set_ethtool_ops(struct net_device *netdev);
118static void ixgb_tx_timeout(struct net_device *dev);
119static void ixgb_tx_timeout_task(struct net_device *dev);
120static void ixgb_vlan_rx_register(struct net_device *netdev,
121 struct vlan_group *grp);
122static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
123static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
124static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
125
1da177e4
LT		 126#ifdef CONFIG_NET_POLL_CONTROLLER
127/* for netdump / net console */
128static void ixgb_netpoll(struct net_device *dev);
129#endif
130
1da177e4
LT		 131/* Exported from other modules */
132
133extern void ixgb_check_options(struct ixgb_adapter *adapter);
134
135static struct pci_driver ixgb_driver = {
c2eba932 136 .name = ixgb_driver_name,
1da177e4 137 .id_table = ixgb_pci_tbl,
c2eba932
MC		 138 .probe = ixgb_probe,
139 .remove = __devexit_p(ixgb_remove),
1da177e4
LT		 140};
141
142MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
143MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
144MODULE_LICENSE("GPL");
01e5abc2 145MODULE_VERSION(DRV_VERSION);
1da177e4
LT		 146
147/* some defines for controlling descriptor fetches in h/w */
1da177e4 148#define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
9c15d24f
MC		 149#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
150 * this */
151#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
152 * is pushed this many descriptors
153 * from head */
1da177e4
LT		 154
155/**
156 * ixgb_init_module - Driver Registration Routine
157 *
158 * ixgb_init_module is the first routine called when the driver is
159 * loaded. All it does is register with the PCI subsystem.
160 **/
161
162static int __init
163ixgb_init_module(void)
164{
1da177e4
LT		 165 printk(KERN_INFO "%s - version %s\n",
166 ixgb_driver_string, ixgb_driver_version);
167
168 printk(KERN_INFO "%s\n", ixgb_copyright);
169
c2eba932 170 return pci_module_init(&ixgb_driver);
1da177e4
LT		 171}
172
173module_init(ixgb_init_module);
174
175/**
176 * ixgb_exit_module - Driver Exit Cleanup Routine
177 *
178 * ixgb_exit_module is called just before the driver is removed
179 * from memory.
180 **/
181
182static void __exit
183ixgb_exit_module(void)
184{
1da177e4
LT		 185 pci_unregister_driver(&ixgb_driver);
186}
187
188module_exit(ixgb_exit_module);
189
190/**
191 * ixgb_irq_disable - Mask off interrupt generation on the NIC
192 * @adapter: board private structure
193 **/
194
195static inline void
196ixgb_irq_disable(struct ixgb_adapter *adapter)
197{
198 atomic_inc(&adapter->irq_sem);
199 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
200 IXGB_WRITE_FLUSH(&adapter->hw);
201 synchronize_irq(adapter->pdev->irq);
202}
203
204/**
205 * ixgb_irq_enable - Enable default interrupt generation settings
206 * @adapter: board private structure
207 **/
208
209static inline void
210ixgb_irq_enable(struct ixgb_adapter *adapter)
211{
212 if(atomic_dec_and_test(&adapter->irq_sem)) {
213 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC		 214 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
215 IXGB_INT_LSC);
1da177e4
LT		 216 IXGB_WRITE_FLUSH(&adapter->hw);
217 }
218}
219
220int
221ixgb_up(struct ixgb_adapter *adapter)
222{
223 struct net_device *netdev = adapter->netdev;
224 int err;
225 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
226 struct ixgb_hw *hw = &adapter->hw;
227
228 /* hardware has been reset, we need to reload some things */
229
230 ixgb_set_multi(netdev);
231
232 ixgb_restore_vlan(adapter);
233
234 ixgb_configure_tx(adapter);
235 ixgb_setup_rctl(adapter);
236 ixgb_configure_rx(adapter);
237 ixgb_alloc_rx_buffers(adapter);
238
239#ifdef CONFIG_PCI_MSI
240 {
241 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
242 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
243 adapter->have_msi = TRUE;
244
245 if (!pcix)
246 adapter->have_msi = FALSE;
247 else if((err = pci_enable_msi(adapter->pdev))) {
248 printk (KERN_ERR
249 "Unable to allocate MSI interrupt Error: %d\n", err);
250 adapter->have_msi = FALSE;
251 /* proceed to try to request regular interrupt */
252 }
253 }
254
255#endif
256 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
257 SA_SHIRQ | SA_SAMPLE_RANDOM,
258 netdev->name, netdev)))
259 return err;
260
261 /* disable interrupts and get the hardware into a known state */
262 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
263
264 if((hw->max_frame_size != max_frame) ||
265 (hw->max_frame_size !=
266 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
267
268 hw->max_frame_size = max_frame;
269
270 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
271
272 if(hw->max_frame_size >
273 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
274 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
275
276 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
277 ctrl0 |= IXGB_CTRL0_JFE;
278 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
279 }
280 }
281 }
282
283 mod_timer(&adapter->watchdog_timer, jiffies);
284 ixgb_irq_enable(adapter);
285
286#ifdef CONFIG_IXGB_NAPI
287 netif_poll_enable(netdev);
288#endif
289 return 0;
290}
291
292void
293ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
294{
295 struct net_device *netdev = adapter->netdev;
296
297 ixgb_irq_disable(adapter);
298 free_irq(adapter->pdev->irq, netdev);
299#ifdef CONFIG_PCI_MSI
300 if(adapter->have_msi == TRUE)
301 pci_disable_msi(adapter->pdev);
302
303#endif
304 if(kill_watchdog)
305 del_timer_sync(&adapter->watchdog_timer);
306#ifdef CONFIG_IXGB_NAPI
307 netif_poll_disable(netdev);
308#endif
309 adapter->link_speed = 0;
310 adapter->link_duplex = 0;
311 netif_carrier_off(netdev);
312 netif_stop_queue(netdev);
313
314 ixgb_reset(adapter);
315 ixgb_clean_tx_ring(adapter);
316 ixgb_clean_rx_ring(adapter);
317}
318
319void
320ixgb_reset(struct ixgb_adapter *adapter)
321{
322
323 ixgb_adapter_stop(&adapter->hw);
324 if(!ixgb_init_hw(&adapter->hw))
325 IXGB_DBG("ixgb_init_hw failed.\n");
326}
327
328/**
329 * ixgb_probe - Device Initialization Routine
330 * @pdev: PCI device information struct
331 * @ent: entry in ixgb_pci_tbl
332 *
333 * Returns 0 on success, negative on failure
334 *
335 * ixgb_probe initializes an adapter identified by a pci_dev structure.
336 * The OS initialization, configuring of the adapter private structure,
337 * and a hardware reset occur.
338 **/
339
340static int __devinit
341ixgb_probe(struct pci_dev *pdev,
342 const struct pci_device_id *ent)
343{
344 struct net_device *netdev = NULL;
345 struct ixgb_adapter *adapter;
346 static int cards_found = 0;
347 unsigned long mmio_start;
348 int mmio_len;
349 int pci_using_dac;
350 int i;
351 int err;
352
353 if((err = pci_enable_device(pdev)))
354 return err;
355
356 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
357 pci_using_dac = 1;
358 } else {
359 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
360 IXGB_ERR("No usable DMA configuration, aborting\n");
361 return err;
362 }
363 pci_using_dac = 0;
364 }
365
366 if((err = pci_request_regions(pdev, ixgb_driver_name)))
367 return err;
368
369 pci_set_master(pdev);
370
371 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
372 if(!netdev) {
373 err = -ENOMEM;
374 goto err_alloc_etherdev;
375 }
376
377 SET_MODULE_OWNER(netdev);
378 SET_NETDEV_DEV(netdev, &pdev->dev);
379
380 pci_set_drvdata(pdev, netdev);
381 adapter = netdev->priv;
382 adapter->netdev = netdev;
383 adapter->pdev = pdev;
384 adapter->hw.back = adapter;
385
386 mmio_start = pci_resource_start(pdev, BAR_0);
387 mmio_len = pci_resource_len(pdev, BAR_0);
388
389 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
390 if(!adapter->hw.hw_addr) {
391 err = -EIO;
392 goto err_ioremap;
393 }
394
395 for(i = BAR_1; i <= BAR_5; i++) {
396 if(pci_resource_len(pdev, i) == 0)
397 continue;
398 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
399 adapter->hw.io_base = pci_resource_start(pdev, i);
400 break;
401 }
402 }
403
404 netdev->open = &ixgb_open;
405 netdev->stop = &ixgb_close;
406 netdev->hard_start_xmit = &ixgb_xmit_frame;
407 netdev->get_stats = &ixgb_get_stats;
408 netdev->set_multicast_list = &ixgb_set_multi;
409 netdev->set_mac_address = &ixgb_set_mac;
410 netdev->change_mtu = &ixgb_change_mtu;
411 ixgb_set_ethtool_ops(netdev);
412 netdev->tx_timeout = &ixgb_tx_timeout;
413 netdev->watchdog_timeo = HZ;
414#ifdef CONFIG_IXGB_NAPI
415 netdev->poll = &ixgb_clean;
416 netdev->weight = 64;
417#endif
418 netdev->vlan_rx_register = ixgb_vlan_rx_register;
419 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
420 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
421#ifdef CONFIG_NET_POLL_CONTROLLER
422 netdev->poll_controller = ixgb_netpoll;
423#endif
424
425 netdev->mem_start = mmio_start;
426 netdev->mem_end = mmio_start + mmio_len;
427 netdev->base_addr = adapter->hw.io_base;
428
429 adapter->bd_number = cards_found;
430 adapter->link_speed = 0;
431 adapter->link_duplex = 0;
432
433 /* setup the private structure */
434
435 if((err = ixgb_sw_init(adapter)))
436 goto err_sw_init;
437
438 netdev->features = NETIF_F_SG |
439 NETIF_F_HW_CSUM |
440 NETIF_F_HW_VLAN_TX |
441 NETIF_F_HW_VLAN_RX |
442 NETIF_F_HW_VLAN_FILTER;
443#ifdef NETIF_F_TSO
444 netdev->features |= NETIF_F_TSO;
445#endif
446
447 if(pci_using_dac)
448 netdev->features |= NETIF_F_HIGHDMA;
449
450 /* make sure the EEPROM is good */
451
452 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
453 printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n");
454 err = -EIO;
455 goto err_eeprom;
456 }
457
458 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
459
460 if(!is_valid_ether_addr(netdev->dev_addr)) {
461 err = -EIO;
462 goto err_eeprom;
463 }
464
465 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
466
467 init_timer(&adapter->watchdog_timer);
468 adapter->watchdog_timer.function = &ixgb_watchdog;
469 adapter->watchdog_timer.data = (unsigned long)adapter;
470
471 INIT_WORK(&adapter->tx_timeout_task,
472 (void (*)(void *))ixgb_tx_timeout_task, netdev);
473
474 if((err = register_netdev(netdev)))
475 goto err_register;
476
477 /* we're going to reset, so assume we have no link for now */
478
479 netif_carrier_off(netdev);
480 netif_stop_queue(netdev);
481
482 printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n",
483 netdev->name);
484 ixgb_check_options(adapter);
485 /* reset the hardware with the new settings */
486
487 ixgb_reset(adapter);
488
489 cards_found++;
490 return 0;
491
492err_register:
493err_sw_init:
494err_eeprom:
495 iounmap(adapter->hw.hw_addr);
496err_ioremap:
497 free_netdev(netdev);
498err_alloc_etherdev:
499 pci_release_regions(pdev);
500 return err;
501}
502
503/**
504 * ixgb_remove - Device Removal Routine
505 * @pdev: PCI device information struct
506 *
507 * ixgb_remove is called by the PCI subsystem to alert the driver
508 * that it should release a PCI device. The could be caused by a
509 * Hot-Plug event, or because the driver is going to be removed from
510 * memory.
511 **/
512
513static void __devexit
514ixgb_remove(struct pci_dev *pdev)
515{
516 struct net_device *netdev = pci_get_drvdata(pdev);
517 struct ixgb_adapter *adapter = netdev->priv;
518
519 unregister_netdev(netdev);
520
521 iounmap(adapter->hw.hw_addr);
522 pci_release_regions(pdev);
523
524 free_netdev(netdev);
525}
526
527/**
528 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
529 * @adapter: board private structure to initialize
530 *
531 * ixgb_sw_init initializes the Adapter private data structure.
532 * Fields are initialized based on PCI device information and
533 * OS network device settings (MTU size).
534 **/
535
536static int __devinit
537ixgb_sw_init(struct ixgb_adapter *adapter)
538{
539 struct ixgb_hw *hw = &adapter->hw;
540 struct net_device *netdev = adapter->netdev;
541 struct pci_dev *pdev = adapter->pdev;
542
543 /* PCI config space info */
544
545 hw->vendor_id = pdev->vendor;
546 hw->device_id = pdev->device;
547 hw->subsystem_vendor_id = pdev->subsystem_vendor;
548 hw->subsystem_id = pdev->subsystem_device;
549
550 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
551
552 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
553
554 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
555 ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
556 ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
557 hw->mac_type = ixgb_82597;
558 else {
559 /* should never have loaded on this device */
560 printk(KERN_ERR "ixgb: unsupported device id\n");
561 }
562
563 /* enable flow control to be programmed */
564 hw->fc.send_xon = 1;
565
566 atomic_set(&adapter->irq_sem, 1);
567 spin_lock_init(&adapter->tx_lock);
568
569 return 0;
570}
571
572/**
573 * ixgb_open - Called when a network interface is made active
574 * @netdev: network interface device structure
575 *
576 * Returns 0 on success, negative value on failure
577 *
578 * The open entry point is called when a network interface is made
579 * active by the system (IFF_UP). At this point all resources needed
580 * for transmit and receive operations are allocated, the interrupt
581 * handler is registered with the OS, the watchdog timer is started,
582 * and the stack is notified that the interface is ready.
583 **/
584
585static int
586ixgb_open(struct net_device *netdev)
587{
588 struct ixgb_adapter *adapter = netdev->priv;
589 int err;
590
591 /* allocate transmit descriptors */
592
593 if((err = ixgb_setup_tx_resources(adapter)))
594 goto err_setup_tx;
595
596 /* allocate receive descriptors */
597
598 if((err = ixgb_setup_rx_resources(adapter)))
599 goto err_setup_rx;
600
601 if((err = ixgb_up(adapter)))
602 goto err_up;
603
604 return 0;
605
606err_up:
607 ixgb_free_rx_resources(adapter);
608err_setup_rx:
609 ixgb_free_tx_resources(adapter);
610err_setup_tx:
611 ixgb_reset(adapter);
612
613 return err;
614}
615
616/**
617 * ixgb_close - Disables a network interface
618 * @netdev: network interface device structure
619 *
620 * Returns 0, this is not allowed to fail
621 *
622 * The close entry point is called when an interface is de-activated
623 * by the OS. The hardware is still under the drivers control, but
624 * needs to be disabled. A global MAC reset is issued to stop the
625 * hardware, and all transmit and receive resources are freed.
626 **/
627
628static int
629ixgb_close(struct net_device *netdev)
630{
631 struct ixgb_adapter *adapter = netdev->priv;
632
633 ixgb_down(adapter, TRUE);
634
635 ixgb_free_tx_resources(adapter);
636 ixgb_free_rx_resources(adapter);
637
638 return 0;
639}
640
641/**
642 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
643 * @adapter: board private structure
644 *
645 * Return 0 on success, negative on failure
646 **/
647
648int
649ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
650{
651 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
652 struct pci_dev *pdev = adapter->pdev;
653 int size;
654
655 size = sizeof(struct ixgb_buffer) * txdr->count;
656 txdr->buffer_info = vmalloc(size);
657 if(!txdr->buffer_info) {
658 return -ENOMEM;
659 }
660 memset(txdr->buffer_info, 0, size);
661
662 /* round up to nearest 4K */
663
664 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
665 IXGB_ROUNDUP(txdr->size, 4096);
666
667 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
668 if(!txdr->desc) {
669 vfree(txdr->buffer_info);
670 return -ENOMEM;
671 }
672 memset(txdr->desc, 0, txdr->size);
673
674 txdr->next_to_use = 0;
675 txdr->next_to_clean = 0;
676
677 return 0;
678}
679
680/**
681 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
682 * @adapter: board private structure
683 *
684 * Configure the Tx unit of the MAC after a reset.
685 **/
686
687static void
688ixgb_configure_tx(struct ixgb_adapter *adapter)
689{
690 uint64_t tdba = adapter->tx_ring.dma;
691 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
692 uint32_t tctl;
693 struct ixgb_hw *hw = &adapter->hw;
694
695 /* Setup the Base and Length of the Tx Descriptor Ring
696 * tx_ring.dma can be either a 32 or 64 bit value
697 */
698
699 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
700 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
701
702 IXGB_WRITE_REG(hw, TDLEN, tdlen);
703
704 /* Setup the HW Tx Head and Tail descriptor pointers */
705
706 IXGB_WRITE_REG(hw, TDH, 0);
707 IXGB_WRITE_REG(hw, TDT, 0);
708
709 /* don't set up txdctl, it induces performance problems if configured
710 * incorrectly */
711 /* Set the Tx Interrupt Delay register */
712
713 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
714
715 /* Program the Transmit Control Register */
716
717 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
718 IXGB_WRITE_REG(hw, TCTL, tctl);
719
720 /* Setup Transmit Descriptor Settings for this adapter */
721 adapter->tx_cmd_type =
722 IXGB_TX_DESC_TYPE
723 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
724}
725
726/**
727 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
728 * @adapter: board private structure
729 *
730 * Returns 0 on success, negative on failure
731 **/
732
733int
734ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
735{
736 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
737 struct pci_dev *pdev = adapter->pdev;
738 int size;
739
740 size = sizeof(struct ixgb_buffer) * rxdr->count;
741 rxdr->buffer_info = vmalloc(size);
742 if(!rxdr->buffer_info) {
743 return -ENOMEM;
744 }
745 memset(rxdr->buffer_info, 0, size);
746
747 /* Round up to nearest 4K */
748
749 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
750 IXGB_ROUNDUP(rxdr->size, 4096);
751
752 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
753
754 if(!rxdr->desc) {
755 vfree(rxdr->buffer_info);
756 return -ENOMEM;
757 }
758 memset(rxdr->desc, 0, rxdr->size);
759
760 rxdr->next_to_clean = 0;
761 rxdr->next_to_use = 0;
762
763 return 0;
764}
765
766/**
767 * ixgb_setup_rctl - configure the receive control register
768 * @adapter: Board private structure
769 **/
770
771static void
772ixgb_setup_rctl(struct ixgb_adapter *adapter)
773{
774 uint32_t rctl;
775
776 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
777
778 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
779
780 rctl |=
781 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
782 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
783 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
784
785 rctl |= IXGB_RCTL_SECRC;
786
787 switch (adapter->rx_buffer_len) {
788 case IXGB_RXBUFFER_2048:
789 default:
790 rctl |= IXGB_RCTL_BSIZE_2048;
791 break;
792 case IXGB_RXBUFFER_4096:
793 rctl |= IXGB_RCTL_BSIZE_4096;
794 break;
795 case IXGB_RXBUFFER_8192:
796 rctl |= IXGB_RCTL_BSIZE_8192;
797 break;
798 case IXGB_RXBUFFER_16384:
799 rctl |= IXGB_RCTL_BSIZE_16384;
800 break;
801 }
802
803 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
804}
805
806/**
807 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
808 * @adapter: board private structure
809 *
810 * Configure the Rx unit of the MAC after a reset.
811 **/
812
813static void
814ixgb_configure_rx(struct ixgb_adapter *adapter)
815{
816 uint64_t rdba = adapter->rx_ring.dma;
817 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
818 struct ixgb_hw *hw = &adapter->hw;
819 uint32_t rctl;
820 uint32_t rxcsum;
821 uint32_t rxdctl;
822
823 /* make sure receives are disabled while setting up the descriptors */
824
825 rctl = IXGB_READ_REG(hw, RCTL);
826 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
827
828 /* set the Receive Delay Timer Register */
829
830 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
831
832 /* Setup the Base and Length of the Rx Descriptor Ring */
833
834 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
835 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
836
837 IXGB_WRITE_REG(hw, RDLEN, rdlen);
838
839 /* Setup the HW Rx Head and Tail Descriptor Pointers */
840 IXGB_WRITE_REG(hw, RDH, 0);
841 IXGB_WRITE_REG(hw, RDT, 0);
842
843 /* set up pre-fetching of receive buffers so we get some before we
844 * run out (default hardware behavior is to run out before fetching
845 * more). This sets up to fetch if HTHRESH rx descriptors are avail
846 * and the descriptors in hw cache are below PTHRESH. This avoids
847 * the hardware behavior of fetching <=512 descriptors in a single
848 * burst that pre-empts all other activity, usually causing fifo
849 * overflows. */
850 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
851 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
852 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
853 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
854 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
855
856 /* Enable Receive Checksum Offload for TCP and UDP */
857 if(adapter->rx_csum == TRUE) {
858 rxcsum = IXGB_READ_REG(hw, RXCSUM);
859 rxcsum |= IXGB_RXCSUM_TUOFL;
860 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
861 }
862
863 /* Enable Receives */
864
865 IXGB_WRITE_REG(hw, RCTL, rctl);
866}
867
868/**
869 * ixgb_free_tx_resources - Free Tx Resources
870 * @adapter: board private structure
871 *
872 * Free all transmit software resources
873 **/
874
875void
876ixgb_free_tx_resources(struct ixgb_adapter *adapter)
877{
878 struct pci_dev *pdev = adapter->pdev;
879
880 ixgb_clean_tx_ring(adapter);
881
882 vfree(adapter->tx_ring.buffer_info);
883 adapter->tx_ring.buffer_info = NULL;
884
885 pci_free_consistent(pdev, adapter->tx_ring.size,
886 adapter->tx_ring.desc, adapter->tx_ring.dma);
887
888 adapter->tx_ring.desc = NULL;
889}
890
891static inline void
892ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
893 struct ixgb_buffer *buffer_info)
894{
895 struct pci_dev *pdev = adapter->pdev;
896 if(buffer_info->dma) {
897 pci_unmap_page(pdev,
898 buffer_info->dma,
899 buffer_info->length,
900 PCI_DMA_TODEVICE);
901 buffer_info->dma = 0;
902 }
903 if(buffer_info->skb) {
904 dev_kfree_skb_any(buffer_info->skb);
905 buffer_info->skb = NULL;
906 }
907}
908
909/**
910 * ixgb_clean_tx_ring - Free Tx Buffers
911 * @adapter: board private structure
912 **/
913
914static void
915ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
916{
917 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
918 struct ixgb_buffer *buffer_info;
919 unsigned long size;
920 unsigned int i;
921
922 /* Free all the Tx ring sk_buffs */
923
924 for(i = 0; i < tx_ring->count; i++) {
925 buffer_info = &tx_ring->buffer_info[i];
926 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
927 }
928
929 size = sizeof(struct ixgb_buffer) * tx_ring->count;
930 memset(tx_ring->buffer_info, 0, size);
931
932 /* Zero out the descriptor ring */
933
934 memset(tx_ring->desc, 0, tx_ring->size);
935
936 tx_ring->next_to_use = 0;
937 tx_ring->next_to_clean = 0;
938
939 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
940 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
941}
942
943/**
944 * ixgb_free_rx_resources - Free Rx Resources
945 * @adapter: board private structure
946 *
947 * Free all receive software resources
948 **/
949
950void
951ixgb_free_rx_resources(struct ixgb_adapter *adapter)
952{
953 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
954 struct pci_dev *pdev = adapter->pdev;
955
956 ixgb_clean_rx_ring(adapter);
957
958 vfree(rx_ring->buffer_info);
959 rx_ring->buffer_info = NULL;
960
961 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
962
963 rx_ring->desc = NULL;
964}
965
966/**
967 * ixgb_clean_rx_ring - Free Rx Buffers
968 * @adapter: board private structure
969 **/
970
971static void
972ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
973{
974 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
975 struct ixgb_buffer *buffer_info;
976 struct pci_dev *pdev = adapter->pdev;
977 unsigned long size;
978 unsigned int i;
979
980 /* Free all the Rx ring sk_buffs */
981
982 for(i = 0; i < rx_ring->count; i++) {
983 buffer_info = &rx_ring->buffer_info[i];
984 if(buffer_info->skb) {
985
986 pci_unmap_single(pdev,
987 buffer_info->dma,
988 buffer_info->length,
989 PCI_DMA_FROMDEVICE);
990
991 dev_kfree_skb(buffer_info->skb);
992
993 buffer_info->skb = NULL;
994 }
995 }
996
997 size = sizeof(struct ixgb_buffer) * rx_ring->count;
998 memset(rx_ring->buffer_info, 0, size);
999
1000 /* Zero out the descriptor ring */
1001
1002 memset(rx_ring->desc, 0, rx_ring->size);
1003
1004 rx_ring->next_to_clean = 0;
1005 rx_ring->next_to_use = 0;
1006
1007 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1008 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1009}
1010
1011/**
1012 * ixgb_set_mac - Change the Ethernet Address of the NIC
1013 * @netdev: network interface device structure
1014 * @p: pointer to an address structure
1015 *
1016 * Returns 0 on success, negative on failure
1017 **/
1018
1019static int
1020ixgb_set_mac(struct net_device *netdev, void *p)
1021{
1022 struct ixgb_adapter *adapter = netdev->priv;
1023 struct sockaddr *addr = p;
1024
1025 if(!is_valid_ether_addr(addr->sa_data))
1026 return -EADDRNOTAVAIL;
1027
1028 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1029
1030 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1031
1032 return 0;
1033}
1034
1035/**
1036 * ixgb_set_multi - Multicast and Promiscuous mode set
1037 * @netdev: network interface device structure
1038 *
1039 * The set_multi entry point is called whenever the multicast address
1040 * list or the network interface flags are updated. This routine is
1041 * responsible for configuring the hardware for proper multicast,
1042 * promiscuous mode, and all-multi behavior.
1043 **/
1044
1045static void
1046ixgb_set_multi(struct net_device *netdev)
1047{
1048 struct ixgb_adapter *adapter = netdev->priv;
1049 struct ixgb_hw *hw = &adapter->hw;
1050 struct dev_mc_list *mc_ptr;
1051 uint32_t rctl;
1052 int i;
1053
1054 /* Check for Promiscuous and All Multicast modes */
1055
1056 rctl = IXGB_READ_REG(hw, RCTL);
1057
1058 if(netdev->flags & IFF_PROMISC) {
1059 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1060 } else if(netdev->flags & IFF_ALLMULTI) {
1061 rctl |= IXGB_RCTL_MPE;
1062 rctl &= ~IXGB_RCTL_UPE;
1063 } else {
1064 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1065 }
1066
1067 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1068 rctl |= IXGB_RCTL_MPE;
1069 IXGB_WRITE_REG(hw, RCTL, rctl);
1070 } else {
1071 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1072
1073 IXGB_WRITE_REG(hw, RCTL, rctl);
1074
1075 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1076 i++, mc_ptr = mc_ptr->next)
1077 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1078 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1079
1080 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1081 }
1082}
1083
1084/**
1085 * ixgb_watchdog - Timer Call-back
1086 * @data: pointer to netdev cast into an unsigned long
1087 **/
1088
1089static void
1090ixgb_watchdog(unsigned long data)
1091{
1092 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1093 struct net_device *netdev = adapter->netdev;
1094 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1095
1096 ixgb_check_for_link(&adapter->hw);
1097
1098 if (ixgb_check_for_bad_link(&adapter->hw)) {
1099 /* force the reset path */
1100 netif_stop_queue(netdev);
1101 }
1102
1103 if(adapter->hw.link_up) {
1104 if(!netif_carrier_ok(netdev)) {
1105 printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n",
1106 netdev->name, 10000, "Full Duplex");
1107 adapter->link_speed = 10000;
1108 adapter->link_duplex = FULL_DUPLEX;
1109 netif_carrier_on(netdev);
1110 netif_wake_queue(netdev);
1111 }
1112 } else {
1113 if(netif_carrier_ok(netdev)) {
1114 adapter->link_speed = 0;
1115 adapter->link_duplex = 0;
1116 printk(KERN_INFO
1117 "ixgb: %s NIC Link is Down\n",
1118 netdev->name);
1119 netif_carrier_off(netdev);
1120 netif_stop_queue(netdev);
1121
1122 }
1123 }
1124
1125 ixgb_update_stats(adapter);
1126
1127 if(!netif_carrier_ok(netdev)) {
1128 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1129 /* We've lost link, so the controller stops DMA,
1130 * but we've got queued Tx work that's never going
1131 * to get done, so reset controller to flush Tx.
1132 * (Do the reset outside of interrupt context). */
1133 schedule_work(&adapter->tx_timeout_task);
1134 }
1135 }
1136
1137 /* Force detection of hung controller every watchdog period */
1138 adapter->detect_tx_hung = TRUE;
1139
1140 /* generate an interrupt to force clean up of any stragglers */
1141 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1142
1143 /* Reset the timer */
1144 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1145}
1146
1147#define IXGB_TX_FLAGS_CSUM 0x00000001
1148#define IXGB_TX_FLAGS_VLAN 0x00000002
1149#define IXGB_TX_FLAGS_TSO 0x00000004
1150
1151static inline int
1152ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1153{
1154#ifdef NETIF_F_TSO
1155 struct ixgb_context_desc *context_desc;
1156 unsigned int i;
1157 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1158 uint16_t ipcse, tucse, mss;
1159 int err;
1160
1161 if(likely(skb_shinfo(skb)->tso_size)) {
1162 if (skb_header_cloned(skb)) {
1163 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1164 if (err)
1165 return err;
1166 }
1167
1168 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
1169 mss = skb_shinfo(skb)->tso_size;
1170 skb->nh.iph->tot_len = 0;
1171 skb->nh.iph->check = 0;
1172 skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
1173 skb->nh.iph->daddr,
1174 0, IPPROTO_TCP, 0);
1175 ipcss = skb->nh.raw - skb->data;
1176 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1177 ipcse = skb->h.raw - skb->data - 1;
1178 tucss = skb->h.raw - skb->data;
1179 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1180 tucse = 0;
1181
1182 i = adapter->tx_ring.next_to_use;
1183 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1184
1185 context_desc->ipcss = ipcss;
1186 context_desc->ipcso = ipcso;
1187 context_desc->ipcse = cpu_to_le16(ipcse);
1188 context_desc->tucss = tucss;
1189 context_desc->tucso = tucso;
1190 context_desc->tucse = cpu_to_le16(tucse);
1191 context_desc->mss = cpu_to_le16(mss);
1192 context_desc->hdr_len = hdr_len;
1193 context_desc->status = 0;
1194 context_desc->cmd_type_len = cpu_to_le32(
1195 IXGB_CONTEXT_DESC_TYPE
1196 | IXGB_CONTEXT_DESC_CMD_TSE
1197 | IXGB_CONTEXT_DESC_CMD_IP
1198 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT		 1199 | IXGB_CONTEXT_DESC_CMD_IDE
1200 | (skb->len - (hdr_len)));
1201
06c2f9ec 1202
1da177e4
LT		 1203 if(++i == adapter->tx_ring.count) i = 0;
1204 adapter->tx_ring.next_to_use = i;
1205
1206 return 1;
1207 }
1208#endif
1209
1210 return 0;
1211}
1212
1213static inline boolean_t
1214ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1215{
1216 struct ixgb_context_desc *context_desc;
1217 unsigned int i;
1218 uint8_t css, cso;
1219
1220 if(likely(skb->ip_summed == CHECKSUM_HW)) {
1221 css = skb->h.raw - skb->data;
1222 cso = (skb->h.raw + skb->csum) - skb->data;
1223
1224 i = adapter->tx_ring.next_to_use;
1225 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1226
1227 context_desc->tucss = css;
1228 context_desc->tucso = cso;
1229 context_desc->tucse = 0;
1230 /* zero out any previously existing data in one instruction */
1231 *(uint32_t *)&(context_desc->ipcss) = 0;
1232 context_desc->status = 0;
1233 context_desc->hdr_len = 0;
1234 context_desc->mss = 0;
1235 context_desc->cmd_type_len =
1236 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1237 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT		 1238
1239 if(++i == adapter->tx_ring.count) i = 0;
1240 adapter->tx_ring.next_to_use = i;
1241
1242 return TRUE;
1243 }
1244
1245 return FALSE;
1246}
1247
1248#define IXGB_MAX_TXD_PWR 14
1249#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1250
1251static inline int
1252ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1253 unsigned int first)
1254{
1255 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1256 struct ixgb_buffer *buffer_info;
1257 int len = skb->len;
1258 unsigned int offset = 0, size, count = 0, i;
1259
1260 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1261 unsigned int f;
ac79c82e 1262
1da177e4
LT		 1263 len -= skb->data_len;
1264
1265 i = tx_ring->next_to_use;
1266
1267 while(len) {
1268 buffer_info = &tx_ring->buffer_info[i];
1269 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
1270 buffer_info->length = size;
1271 buffer_info->dma =
1272 pci_map_single(adapter->pdev,
1273 skb->data + offset,
1274 size,
1275 PCI_DMA_TODEVICE);
1276 buffer_info->time_stamp = jiffies;
1277
1278 len -= size;
1279 offset += size;
1280 count++;
1281 if(++i == tx_ring->count) i = 0;
1282 }
1283
1284 for(f = 0; f < nr_frags; f++) {
1285 struct skb_frag_struct *frag;
1286
1287 frag = &skb_shinfo(skb)->frags[f];
1288 len = frag->size;
1289 offset = 0;
1290
1291 while(len) {
1292 buffer_info = &tx_ring->buffer_info[i];
1293 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
1294 buffer_info->length = size;
1295 buffer_info->dma =
1296 pci_map_page(adapter->pdev,
1297 frag->page,
1298 frag->page_offset + offset,
1299 size,
1300 PCI_DMA_TODEVICE);
1301 buffer_info->time_stamp = jiffies;
1302
1303 len -= size;
1304 offset += size;
1305 count++;
1306 if(++i == tx_ring->count) i = 0;
1307 }
1308 }
1309 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1310 tx_ring->buffer_info[i].skb = skb;
1311 tx_ring->buffer_info[first].next_to_watch = i;
1312
1313 return count;
1314}
1315
1316static inline void
1317ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1318{
1319 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1320 struct ixgb_tx_desc *tx_desc = NULL;
1321 struct ixgb_buffer *buffer_info;
1322 uint32_t cmd_type_len = adapter->tx_cmd_type;
1323 uint8_t status = 0;
1324 uint8_t popts = 0;
1325 unsigned int i;
1326
1327 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1328 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1329 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1330 }
1331
1332 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1333 popts |= IXGB_TX_DESC_POPTS_TXSM;
1334
1335 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1336 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1337 }
1338
1339 i = tx_ring->next_to_use;
1340
1341 while(count--) {
1342 buffer_info = &tx_ring->buffer_info[i];
1343 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1344 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1345 tx_desc->cmd_type_len =
1346 cpu_to_le32(cmd_type_len | buffer_info->length);
1347 tx_desc->status = status;
1348 tx_desc->popts = popts;
1349 tx_desc->vlan = cpu_to_le16(vlan_id);
1350
1351 if(++i == tx_ring->count) i = 0;
1352 }
1353
1354 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1355 | IXGB_TX_DESC_CMD_RS );
1356
1357 /* Force memory writes to complete before letting h/w
1358 * know there are new descriptors to fetch. (Only
1359 * applicable for weak-ordered memory model archs,
1360 * such as IA-64). */
1361 wmb();
1362
1363 tx_ring->next_to_use = i;
1364 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1365}
1366
1367/* Tx Descriptors needed, worst case */
1368#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1369 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1370#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
1371 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
1372
1373static int
1374ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1375{
1376 struct ixgb_adapter *adapter = netdev->priv;
1377 unsigned int first;
1378 unsigned int tx_flags = 0;
1379 unsigned long flags;
1380 int vlan_id = 0;
1381 int tso;
1382
1383 if(skb->len <= 0) {
1384 dev_kfree_skb_any(skb);
1385 return 0;
1386 }
1387
1388 spin_lock_irqsave(&adapter->tx_lock, flags);
1389 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
1390 netif_stop_queue(netdev);
1391 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1392 return 1;
1393 }
1394 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1395
1396 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1397 tx_flags |= IXGB_TX_FLAGS_VLAN;
1398 vlan_id = vlan_tx_tag_get(skb);
1399 }
1400
1401 first = adapter->tx_ring.next_to_use;
1402
1403 tso = ixgb_tso(adapter, skb);
1404 if (tso < 0) {
1405 dev_kfree_skb_any(skb);
1406 return NETDEV_TX_OK;
1407 }
1408
1409 if (tso)
1410 tx_flags |= IXGB_TX_FLAGS_TSO;
1411 else if(ixgb_tx_csum(adapter, skb))
1412 tx_flags |= IXGB_TX_FLAGS_CSUM;
1413
1414 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1415 tx_flags);
1416
1417 netdev->trans_start = jiffies;
1418
1419 return 0;
1420}
1421
1422/**
1423 * ixgb_tx_timeout - Respond to a Tx Hang
1424 * @netdev: network interface device structure
1425 **/
1426
1427static void
1428ixgb_tx_timeout(struct net_device *netdev)
1429{
1430 struct ixgb_adapter *adapter = netdev->priv;
1431
1432 /* Do the reset outside of interrupt context */
1433 schedule_work(&adapter->tx_timeout_task);
1434}
1435
1436static void
1437ixgb_tx_timeout_task(struct net_device *netdev)
1438{
1439 struct ixgb_adapter *adapter = netdev->priv;
1440
1441 ixgb_down(adapter, TRUE);
1442 ixgb_up(adapter);
1443}
1444
1445/**
1446 * ixgb_get_stats - Get System Network Statistics
1447 * @netdev: network interface device structure
1448 *
1449 * Returns the address of the device statistics structure.
1450 * The statistics are actually updated from the timer callback.
1451 **/
1452
1453static struct net_device_stats *
1454ixgb_get_stats(struct net_device *netdev)
1455{
1456 struct ixgb_adapter *adapter = netdev->priv;
1457
1458 return &adapter->net_stats;
1459}
1460
1461/**
1462 * ixgb_change_mtu - Change the Maximum Transfer Unit
1463 * @netdev: network interface device structure
1464 * @new_mtu: new value for maximum frame size
1465 *
1466 * Returns 0 on success, negative on failure
1467 **/
1468
1469static int
1470ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1471{
1472 struct ixgb_adapter *adapter = netdev->priv;
1473 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1474 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1475
1476
1477 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1478 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
1479 IXGB_ERR("Invalid MTU setting\n");
1480 return -EINVAL;
1481 }
1482
1483 if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1484 || (max_frame <= IXGB_RXBUFFER_2048)) {
1485 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
1486
1487 } else if(max_frame <= IXGB_RXBUFFER_4096) {
1488 adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
1489
1490 } else if(max_frame <= IXGB_RXBUFFER_8192) {
1491 adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
1492
1493 } else {
1494 adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
1495 }
1496
1497 netdev->mtu = new_mtu;
1498
1499 if(old_max_frame != max_frame && netif_running(netdev)) {
1500
1501 ixgb_down(adapter, TRUE);
1502 ixgb_up(adapter);
1503 }
1504
1505 return 0;
1506}
1507
1508/**
1509 * ixgb_update_stats - Update the board statistics counters.
1510 * @adapter: board private structure
1511 **/
1512
1513void
1514ixgb_update_stats(struct ixgb_adapter *adapter)
1515{
5633684d
MC		 1516 struct net_device *netdev = adapter->netdev;
1517
1518 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1519 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1520 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1521 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1522 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1523 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1524
1525 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1526 /* fix up multicast stats by removing broadcasts */
1527 multi -= bcast;
1528
1529 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1530 adapter->stats.mprch += (multi >> 32);
1531 adapter->stats.bprcl += bcast_l;
1532 adapter->stats.bprch += bcast_h;
1533 } else {
1534 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1535 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1536 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1537 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1538 }
1da177e4
LT		 1539 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1540 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1541 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1542 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT		 1543 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1544 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1545 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1546 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1547 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1548 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1549 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1550 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1551 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1552 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1553 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1554 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1555 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1556 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1557 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1558 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1559 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1560 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1561 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1562 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1563 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1564 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1565 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1566 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1567 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1568 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1569 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1570 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1571 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1572 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1573 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1574 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1575 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1576 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1577 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1578 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1579 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1580 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1581 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1582 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1583 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1584 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1585 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1586 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1587 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1588 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1589 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1590 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1591 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1592 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1593 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1594 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1595
1596 /* Fill out the OS statistics structure */
1597
1598 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1599 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1600 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1601 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1602 adapter->net_stats.multicast = adapter->stats.mprcl;
1603 adapter->net_stats.collisions = 0;
1604
1605 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1606 * with a length in the type/len field */
1607 adapter->net_stats.rx_errors =
1608 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1609 adapter->stats.ruc +
1610 adapter->stats.roc /*+ adapter->stats.rlec */ +
1611 adapter->stats.icbc +
1612 adapter->stats.ecbc + adapter->stats.mpc;
1613
1614 adapter->net_stats.rx_dropped = adapter->stats.mpc;
1615
1616 /* see above
1617 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1618 */
1619
1620 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1621 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1622 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1623 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1624
1625 adapter->net_stats.tx_errors = 0;
1626 adapter->net_stats.rx_frame_errors = 0;
1627 adapter->net_stats.tx_aborted_errors = 0;
1628 adapter->net_stats.tx_carrier_errors = 0;
1629 adapter->net_stats.tx_fifo_errors = 0;
1630 adapter->net_stats.tx_heartbeat_errors = 0;
1631 adapter->net_stats.tx_window_errors = 0;
1632}
1633
1634#define IXGB_MAX_INTR 10
1635/**
1636 * ixgb_intr - Interrupt Handler
1637 * @irq: interrupt number
1638 * @data: pointer to a network interface device structure
1639 * @pt_regs: CPU registers structure
1640 **/
1641
1642static irqreturn_t
1643ixgb_intr(int irq, void *data, struct pt_regs *regs)
1644{
1645 struct net_device *netdev = data;
1646 struct ixgb_adapter *adapter = netdev->priv;
1647 struct ixgb_hw *hw = &adapter->hw;
1648 uint32_t icr = IXGB_READ_REG(hw, ICR);
1649#ifndef CONFIG_IXGB_NAPI
1650 unsigned int i;
1651#endif
1652
1653 if(unlikely(!icr))
1654 return IRQ_NONE; /* Not our interrupt */
1655
1656 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1657 mod_timer(&adapter->watchdog_timer, jiffies);
1658 }
1659
1660#ifdef CONFIG_IXGB_NAPI
1661 if(netif_rx_schedule_prep(netdev)) {
1662
1663 /* Disable interrupts and register for poll. The flush
1664 of the posted write is intentionally left out.
1665 */
1666
1667 atomic_inc(&adapter->irq_sem);
1668 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1669 __netif_rx_schedule(netdev);
1670 }
1671#else
1672 /* yes, that is actually a & and it is meant to make sure that
1673 * every pass through this for loop checks both receive and
1674 * transmit queues for completed descriptors, intended to
1675 * avoid starvation issues and assist tx/rx fairness. */
1676 for(i = 0; i < IXGB_MAX_INTR; i++)
1677 if(!ixgb_clean_rx_irq(adapter) &
1678 !ixgb_clean_tx_irq(adapter))
1679 break;
1680#endif
1681 return IRQ_HANDLED;
1682}
1683
1684#ifdef CONFIG_IXGB_NAPI
1685/**
1686 * ixgb_clean - NAPI Rx polling callback
1687 * @adapter: board private structure
1688 **/
1689
1690static int
1691ixgb_clean(struct net_device *netdev, int *budget)
1692{
1693 struct ixgb_adapter *adapter = netdev->priv;
1694 int work_to_do = min(*budget, netdev->quota);
1695 int tx_cleaned;
1696 int work_done = 0;
1697
1698 tx_cleaned = ixgb_clean_tx_irq(adapter);
1699 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1700
1701 *budget -= work_done;
1702 netdev->quota -= work_done;
1703
1704 /* if no Tx and not enough Rx work done, exit the polling mode */
1705 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1706 netif_rx_complete(netdev);
1707 ixgb_irq_enable(adapter);
1708 return 0;
1709 }
1710
1711 return 1;
1712}
1713#endif
1714
1715/**
1716 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1717 * @adapter: board private structure
1718 **/
1719
1720static boolean_t
1721ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1722{
1723 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1724 struct net_device *netdev = adapter->netdev;
1725 struct ixgb_tx_desc *tx_desc, *eop_desc;
1726 struct ixgb_buffer *buffer_info;
1727 unsigned int i, eop;
1728 boolean_t cleaned = FALSE;
1729
1730 i = tx_ring->next_to_clean;
1731 eop = tx_ring->buffer_info[i].next_to_watch;
1732 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1733
1734 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1735
1736 for(cleaned = FALSE; !cleaned; ) {
1737 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1738 buffer_info = &tx_ring->buffer_info[i];
1739
1740 if (tx_desc->popts
1741 & (IXGB_TX_DESC_POPTS_TXSM |
1742 IXGB_TX_DESC_POPTS_IXSM))
1743 adapter->hw_csum_tx_good++;
1744
1745 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1746
1747 *(uint32_t *)&(tx_desc->status) = 0;
1748
1749 cleaned = (i == eop);
1750 if(++i == tx_ring->count) i = 0;
1751 }
1752
1753 eop = tx_ring->buffer_info[i].next_to_watch;
1754 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1755 }
1756
1757 tx_ring->next_to_clean = i;
1758
1759 spin_lock(&adapter->tx_lock);
1760 if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1761 (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
1762
1763 netif_wake_queue(netdev);
1764 }
1765 spin_unlock(&adapter->tx_lock);
1766
1767 if(adapter->detect_tx_hung) {
1768 /* detect a transmit hang in hardware, this serializes the
1769 * check with the clearing of time_stamp and movement of i */
1770 adapter->detect_tx_hung = FALSE;
1771 if(tx_ring->buffer_info[i].dma &&
1772 time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
1773 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
1774 IXGB_STATUS_TXOFF))
1775 netif_stop_queue(netdev);
1776 }
1777
1778 return cleaned;
1779}
1780
1781/**
1782 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1783 * @adapter: board private structure
1784 * @rx_desc: receive descriptor
1785 * @sk_buff: socket buffer with received data
1786 **/
1787
1788static inline void
1789ixgb_rx_checksum(struct ixgb_adapter *adapter,
1790 struct ixgb_rx_desc *rx_desc,
1791 struct sk_buff *skb)
1792{
1793 /* Ignore Checksum bit is set OR
1794 * TCP Checksum has not been calculated
1795 */
1796 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1797 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1798 skb->ip_summed = CHECKSUM_NONE;
1799 return;
1800 }
1801
1802 /* At this point we know the hardware did the TCP checksum */
1803 /* now look at the TCP checksum error bit */
1804 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1805 /* let the stack verify checksum errors */
1806 skb->ip_summed = CHECKSUM_NONE;
1807 adapter->hw_csum_rx_error++;
1808 } else {
1809 /* TCP checksum is good */
1810 skb->ip_summed = CHECKSUM_UNNECESSARY;
1811 adapter->hw_csum_rx_good++;
1812 }
1813}
1814
1815/**
1816 * ixgb_clean_rx_irq - Send received data up the network stack,
1817 * @adapter: board private structure
1818 **/
1819
1820static boolean_t
1821#ifdef CONFIG_IXGB_NAPI
1822ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1823#else
1824ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1825#endif
1826{
1827 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1828 struct net_device *netdev = adapter->netdev;
1829 struct pci_dev *pdev = adapter->pdev;
1830 struct ixgb_rx_desc *rx_desc, *next_rxd;
1831 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT		 1832 uint32_t length;
1833 unsigned int i, j;
1834 boolean_t cleaned = FALSE;
1835
1836 i = rx_ring->next_to_clean;
1837 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1838 buffer_info = &rx_ring->buffer_info[i];
1839
1840 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC		 1841 struct sk_buff *skb, *next_skb;
1842 u8 status;
1da177e4
LT		 1843
1844#ifdef CONFIG_IXGB_NAPI
1845 if(*work_done >= work_to_do)
1846 break;
1847
1848 (*work_done)++;
1849#endif
f404de1c 1850 status = rx_desc->status;
1da177e4 1851 skb = buffer_info->skb;
f404de1c 1852
1da177e4
LT		 1853 prefetch(skb->data);
1854
1855 if(++i == rx_ring->count) i = 0;
1856 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1857 prefetch(next_rxd);
1858
1859 if((j = i + 1) == rx_ring->count) j = 0;
1860 next2_buffer = &rx_ring->buffer_info[j];
1861 prefetch(next2_buffer);
1862
1863 next_buffer = &rx_ring->buffer_info[i];
1864 next_skb = next_buffer->skb;
1865 prefetch(next_skb);
1866
1da177e4
LT		 1867 cleaned = TRUE;
1868
1869 pci_unmap_single(pdev,
1870 buffer_info->dma,
1871 buffer_info->length,
1872 PCI_DMA_FROMDEVICE);
1873
1874 length = le16_to_cpu(rx_desc->length);
1875
f404de1c 1876 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT		 1877
1878 /* All receives must fit into a single buffer */
1879
1880 IXGB_DBG("Receive packet consumed multiple buffers "
1881 "length<%x>\n", length);
1882
1883 dev_kfree_skb_irq(skb);
f404de1c 1884 goto rxdesc_done;
1da177e4
LT		 1885 }
1886
1887 if (unlikely(rx_desc->errors
1888 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1889 | IXGB_RX_DESC_ERRORS_P |
1890 IXGB_RX_DESC_ERRORS_RXE))) {
1891
1892 dev_kfree_skb_irq(skb);
f404de1c 1893 goto rxdesc_done;
1da177e4
LT		 1894 }
1895
1896 /* Good Receive */
1897 skb_put(skb, length);
1898
1899 /* Receive Checksum Offload */
1900 ixgb_rx_checksum(adapter, rx_desc, skb);
1901
1902 skb->protocol = eth_type_trans(skb, netdev);
1903#ifdef CONFIG_IXGB_NAPI
f404de1c 1904 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1905 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1906 le16_to_cpu(rx_desc->special) &
1907 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1908 } else {
1909 netif_receive_skb(skb);
1910 }
1911#else /* CONFIG_IXGB_NAPI */
f404de1c 1912 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1913 vlan_hwaccel_rx(skb, adapter->vlgrp,
1914 le16_to_cpu(rx_desc->special) &
1915 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1916 } else {
1917 netif_rx(skb);
1918 }
1919#endif /* CONFIG_IXGB_NAPI */
1920 netdev->last_rx = jiffies;
1921
f404de1c
MC		 1922rxdesc_done:
1923 /* clean up descriptor, might be written over by hw */
1da177e4
LT		 1924 rx_desc->status = 0;
1925 buffer_info->skb = NULL;
1926
f404de1c 1927 /* use prefetched values */
1da177e4
LT		 1928 rx_desc = next_rxd;
1929 buffer_info = next_buffer;
1930 }
1931
1932 rx_ring->next_to_clean = i;
1933
1934 ixgb_alloc_rx_buffers(adapter);
1935
1936 return cleaned;
1937}
1938
1939/**
1940 * ixgb_alloc_rx_buffers - Replace used receive buffers
1941 * @adapter: address of board private structure
1942 **/
1943
1944static void
1945ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
1946{
1947 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1948 struct net_device *netdev = adapter->netdev;
1949 struct pci_dev *pdev = adapter->pdev;
1950 struct ixgb_rx_desc *rx_desc;
1951 struct ixgb_buffer *buffer_info;
1952 struct sk_buff *skb;
1953 unsigned int i;
1954 int num_group_tail_writes;
1955 long cleancount;
1956
1957 i = rx_ring->next_to_use;
1958 buffer_info = &rx_ring->buffer_info[i];
1959 cleancount = IXGB_DESC_UNUSED(rx_ring);
1960
1961 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
1962
41639fed
MC		 1963 /* leave three descriptors unused */
1964 while(--cleancount > 2) {
1da177e4
LT		 1965 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1966
1967 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
1968
1969 if(unlikely(!skb)) {
1970 /* Better luck next round */
1971 break;
1972 }
1973
1974 /* Make buffer alignment 2 beyond a 16 byte boundary
1975 * this will result in a 16 byte aligned IP header after
1976 * the 14 byte MAC header is removed
1977 */
1978 skb_reserve(skb, NET_IP_ALIGN);
1979
1980 skb->dev = netdev;
1981
1982 buffer_info->skb = skb;
1983 buffer_info->length = adapter->rx_buffer_len;
1984 buffer_info->dma =
1985 pci_map_single(pdev,
1986 skb->data,
1987 adapter->rx_buffer_len,
1988 PCI_DMA_FROMDEVICE);
1989
1990 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC		 1991 /* guarantee DD bit not set now before h/w gets descriptor
1992 * this is the rest of the workaround for h/w double
1993 * writeback. */
1994 rx_desc->status = 0;
1da177e4
LT		 1995
1996 if((i & ~(num_group_tail_writes- 1)) == i) {
1997 /* Force memory writes to complete before letting h/w
1998 * know there are new descriptors to fetch. (Only
1999 * applicable for weak-ordered memory model archs,
2000 * such as IA-64). */
2001 wmb();
2002
2003 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2004 }
2005
2006 if(++i == rx_ring->count) i = 0;
2007 buffer_info = &rx_ring->buffer_info[i];
2008 }
2009
2010 rx_ring->next_to_use = i;
2011}
2012
2013/**
2014 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2015 *
2016 * @param netdev network interface device structure
2017 * @param grp indicates to enable or disable tagging/stripping
2018 **/
2019static void
2020ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2021{
2022 struct ixgb_adapter *adapter = netdev->priv;
2023 uint32_t ctrl, rctl;
2024
2025 ixgb_irq_disable(adapter);
2026 adapter->vlgrp = grp;
2027
2028 if(grp) {
2029 /* enable VLAN tag insert/strip */
2030 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2031 ctrl |= IXGB_CTRL0_VME;
2032 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2033
2034 /* enable VLAN receive filtering */
2035
2036 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2037 rctl |= IXGB_RCTL_VFE;
2038 rctl &= ~IXGB_RCTL_CFIEN;
2039 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2040 } else {
2041 /* disable VLAN tag insert/strip */
2042
2043 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2044 ctrl &= ~IXGB_CTRL0_VME;
2045 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2046
2047 /* disable VLAN filtering */
2048
2049 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2050 rctl &= ~IXGB_RCTL_VFE;
2051 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2052 }
2053
2054 ixgb_irq_enable(adapter);
2055}
2056
2057static void
2058ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2059{
2060 struct ixgb_adapter *adapter = netdev->priv;
2061 uint32_t vfta, index;
2062
2063 /* add VID to filter table */
2064
2065 index = (vid >> 5) & 0x7F;
2066 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2067 vfta |= (1 << (vid & 0x1F));
2068 ixgb_write_vfta(&adapter->hw, index, vfta);
2069}
2070
2071static void
2072ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2073{
2074 struct ixgb_adapter *adapter = netdev->priv;
2075 uint32_t vfta, index;
2076
2077 ixgb_irq_disable(adapter);
2078
2079 if(adapter->vlgrp)
2080 adapter->vlgrp->vlan_devices[vid] = NULL;
2081
2082 ixgb_irq_enable(adapter);
2083
2084 /* remove VID from filter table*/
2085
2086 index = (vid >> 5) & 0x7F;
2087 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2088 vfta &= ~(1 << (vid & 0x1F));
2089 ixgb_write_vfta(&adapter->hw, index, vfta);
2090}
2091
2092static void
2093ixgb_restore_vlan(struct ixgb_adapter *adapter)
2094{
2095 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2096
2097 if(adapter->vlgrp) {
2098 uint16_t vid;
2099 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2100 if(!adapter->vlgrp->vlan_devices[vid])
2101 continue;
2102 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2103 }
2104 }
2105}
2106
1da177e4
LT		 2107#ifdef CONFIG_NET_POLL_CONTROLLER
2108/*
2109 * Polling 'interrupt' - used by things like netconsole to send skbs
2110 * without having to re-enable interrupts. It's not called while
2111 * the interrupt routine is executing.
2112 */
2113
2114static void ixgb_netpoll(struct net_device *dev)
2115{
2116 struct ixgb_adapter *adapter = dev->priv;
ac79c82e 2117
1da177e4
LT		 2118 disable_irq(adapter->pdev->irq);
2119 ixgb_intr(adapter->pdev->irq, dev, NULL);
2120 enable_irq(adapter->pdev->irq);
2121}
2122#endif
2123
2124/* ixgb_main.c */
Linux kernel - Deliverables
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