projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ixgb: add explicit state checking
[deliverable/linux.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
0abb6eb1 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
1da177e4 31char ixgb_driver_name[] = "ixgb";
e9ab1d14 32static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT		 33
34#ifndef CONFIG_IXGB_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
8b32e63d 39#define DRV_VERSION "1.0.126-k4"DRIVERNAPI
273dc74e
SH		 40const char ixgb_driver_version[] = DRV_VERSION;
41static const char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* ixgb_pci_tbl - PCI Device ID Table
44 *
45 * Wildcard entries (PCI_ANY_ID) should come last
46 * Last entry must be all 0s
47 *
48 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
49 * Class, Class Mask, private data (not used) }
50 */
51static struct pci_device_id ixgb_pci_tbl[] = {
52 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
53 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK		 54 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
55 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT		 56 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
57 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
58 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
59 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
60
61 /* required last entry */
62 {0,}
63};
64
65MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
66
67/* Local Function Prototypes */
68
69int ixgb_up(struct ixgb_adapter *adapter);
70void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
71void ixgb_reset(struct ixgb_adapter *adapter);
72int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
73int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
74void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
75void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
76void ixgb_update_stats(struct ixgb_adapter *adapter);
77
78static int ixgb_init_module(void);
79static void ixgb_exit_module(void);
80static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
81static void __devexit ixgb_remove(struct pci_dev *pdev);
82static int ixgb_sw_init(struct ixgb_adapter *adapter);
83static int ixgb_open(struct net_device *netdev);
84static int ixgb_close(struct net_device *netdev);
85static void ixgb_configure_tx(struct ixgb_adapter *adapter);
86static void ixgb_configure_rx(struct ixgb_adapter *adapter);
87static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
88static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
89static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
90static void ixgb_set_multi(struct net_device *netdev);
91static void ixgb_watchdog(unsigned long data);
92static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
93static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
94static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
95static int ixgb_set_mac(struct net_device *netdev, void *p);
7d12e780 96static irqreturn_t ixgb_intr(int irq, void *data);
1da177e4 97static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 98
1da177e4 99#ifdef CONFIG_IXGB_NAPI
bea3348e 100static int ixgb_clean(struct napi_struct *napi, int budget);
1da177e4
LT		 101static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
102 int *work_done, int work_to_do);
103#else
104static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
105#endif
106static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
1da177e4 107static void ixgb_tx_timeout(struct net_device *dev);
c4028958 108static void ixgb_tx_timeout_task(struct work_struct *work);
1da177e4
LT		 109static void ixgb_vlan_rx_register(struct net_device *netdev,
110 struct vlan_group *grp);
111static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
112static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
113static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
114
1da177e4
LT		 115#ifdef CONFIG_NET_POLL_CONTROLLER
116/* for netdump / net console */
117static void ixgb_netpoll(struct net_device *dev);
118#endif
119
01748fbb
LV		 120static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
121 enum pci_channel_state state);
122static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
123static void ixgb_io_resume (struct pci_dev *pdev);
1da177e4 124
01748fbb
LV		 125static struct pci_error_handlers ixgb_err_handler = {
126 .error_detected = ixgb_io_error_detected,
127 .slot_reset = ixgb_io_slot_reset,
128 .resume = ixgb_io_resume,
129};
130
1da177e4 131static struct pci_driver ixgb_driver = {
c2eba932 132 .name = ixgb_driver_name,
1da177e4 133 .id_table = ixgb_pci_tbl,
c2eba932
MC		 134 .probe = ixgb_probe,
135 .remove = __devexit_p(ixgb_remove),
01748fbb 136 .err_handler = &ixgb_err_handler
1da177e4
LT		 137};
138
139MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
140MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
141MODULE_LICENSE("GPL");
01e5abc2 142MODULE_VERSION(DRV_VERSION);
1da177e4 143
ec9c3f5d
AK		 144#define DEFAULT_DEBUG_LEVEL_SHIFT 3
145static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
146module_param(debug, int, 0);
147MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
148
1da177e4 149/* some defines for controlling descriptor fetches in h/w */
3ae84d92
JB		 150#define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
151#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
152 * this */
153#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
154 * is pushed this many descriptors
155 * from head */
1da177e4
LT		 156
157/**
158 * ixgb_init_module - Driver Registration Routine
159 *
160 * ixgb_init_module is the first routine called when the driver is
161 * loaded. All it does is register with the PCI subsystem.
162 **/
163
164static int __init
165ixgb_init_module(void)
166{
1da177e4
LT		 167 printk(KERN_INFO "%s - version %s\n",
168 ixgb_driver_string, ixgb_driver_version);
169
170 printk(KERN_INFO "%s\n", ixgb_copyright);
171
29917620 172 return pci_register_driver(&ixgb_driver);
1da177e4
LT		 173}
174
175module_init(ixgb_init_module);
176
177/**
178 * ixgb_exit_module - Driver Exit Cleanup Routine
179 *
180 * ixgb_exit_module is called just before the driver is removed
181 * from memory.
182 **/
183
184static void __exit
185ixgb_exit_module(void)
186{
1da177e4
LT		 187 pci_unregister_driver(&ixgb_driver);
188}
189
190module_exit(ixgb_exit_module);
191
192/**
193 * ixgb_irq_disable - Mask off interrupt generation on the NIC
194 * @adapter: board private structure
195 **/
196
235949d1 197static void
1da177e4
LT		 198ixgb_irq_disable(struct ixgb_adapter *adapter)
199{
200 atomic_inc(&adapter->irq_sem);
201 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
202 IXGB_WRITE_FLUSH(&adapter->hw);
203 synchronize_irq(adapter->pdev->irq);
204}
205
206/**
207 * ixgb_irq_enable - Enable default interrupt generation settings
208 * @adapter: board private structure
209 **/
210
235949d1 211static void
1da177e4
LT		 212ixgb_irq_enable(struct ixgb_adapter *adapter)
213{
214 if(atomic_dec_and_test(&adapter->irq_sem)) {
8b32e63d
MW		 215 u32 val = IXGB_INT_RXT0 | IXGB_INT_RXDMT0 |
216 IXGB_INT_TXDW | IXGB_INT_LSC;
217 if (adapter->hw.subsystem_vendor_id == SUN_SUBVENDOR_ID)
218 val |= IXGB_INT_GPI0;
219 IXGB_WRITE_REG(&adapter->hw, IMS, val);
1da177e4
LT		 220 IXGB_WRITE_FLUSH(&adapter->hw);
221 }
222}
223
224int
225ixgb_up(struct ixgb_adapter *adapter)
226{
227 struct net_device *netdev = adapter->netdev;
fb136c07 228 int err, irq_flags = IRQF_SHARED;
1da177e4
LT		 229 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
230 struct ixgb_hw *hw = &adapter->hw;
231
232 /* hardware has been reset, we need to reload some things */
233
8556f0d1 234 ixgb_rar_set(hw, netdev->dev_addr, 0);
1da177e4
LT		 235 ixgb_set_multi(netdev);
236
237 ixgb_restore_vlan(adapter);
238
239 ixgb_configure_tx(adapter);
240 ixgb_setup_rctl(adapter);
241 ixgb_configure_rx(adapter);
242 ixgb_alloc_rx_buffers(adapter);
243
e59d1696
AK		 244 /* disable interrupts and get the hardware into a known state */
245 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
246
fb136c07
AK		 247 /* only enable MSI if bus is in PCI-X mode */
248 if (IXGB_READ_REG(&adapter->hw, STATUS) & IXGB_STATUS_PCIX_MODE) {
249 err = pci_enable_msi(adapter->pdev);
250 if (!err) {
251 adapter->have_msi = 1;
252 irq_flags = 0;
253 }
1da177e4
LT		 254 /* proceed to try to request regular interrupt */
255 }
1da177e4 256
fb136c07
AK		 257 err = request_irq(adapter->pdev->irq, &ixgb_intr, irq_flags,
258 netdev->name, netdev);
259 if (err) {
260 if (adapter->have_msi)
261 pci_disable_msi(adapter->pdev);
ec9c3f5d
AK		 262 DPRINTK(PROBE, ERR,
263 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 264 return err;
ec9c3f5d 265 }
1da177e4 266
1da177e4
LT		 267 if((hw->max_frame_size != max_frame) ||
268 (hw->max_frame_size !=
269 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
270
271 hw->max_frame_size = max_frame;
272
273 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
274
275 if(hw->max_frame_size >
276 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
277 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
278
279 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
280 ctrl0 |= IXGB_CTRL0_JFE;
281 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
282 }
283 }
284 }
285
bab2bce7 286 clear_bit(__IXGB_DOWN, &adapter->flags);
1da177e4
LT		 287
288#ifdef CONFIG_IXGB_NAPI
bea3348e 289 napi_enable(&adapter->napi);
1da177e4 290#endif
e59d1696
AK		 291 ixgb_irq_enable(adapter);
292
bab2bce7
JB		 293 mod_timer(&adapter->watchdog_timer, jiffies);
294
1da177e4
LT		 295 return 0;
296}
297
298void
299ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
300{
301 struct net_device *netdev = adapter->netdev;
302
bab2bce7
JB		 303 /* prevent the interrupt handler from restarting watchdog */
304 set_bit(__IXGB_DOWN, &adapter->flags);
305
49d85c50
DM		 306#ifdef CONFIG_IXGB_NAPI
307 napi_disable(&adapter->napi);
308 atomic_set(&adapter->irq_sem, 0);
309#endif
bab2bce7 310 /* waiting for NAPI to complete can re-enable interrupts */
1da177e4
LT		 311 ixgb_irq_disable(adapter);
312 free_irq(adapter->pdev->irq, netdev);
fb136c07
AK		 313
314 if (adapter->have_msi)
1da177e4
LT		 315 pci_disable_msi(adapter->pdev);
316
1da177e4
LT		 317 if(kill_watchdog)
318 del_timer_sync(&adapter->watchdog_timer);
49d85c50 319
1da177e4
LT		 320 adapter->link_speed = 0;
321 adapter->link_duplex = 0;
322 netif_carrier_off(netdev);
323 netif_stop_queue(netdev);
324
325 ixgb_reset(adapter);
326 ixgb_clean_tx_ring(adapter);
327 ixgb_clean_rx_ring(adapter);
328}
329
330void
331ixgb_reset(struct ixgb_adapter *adapter)
332{
3fd7131f 333 struct ixgb_hw *hw = &adapter->hw;
1da177e4 334
3fd7131f
MW		 335 ixgb_adapter_stop(hw);
336 if (!ixgb_init_hw(hw))
ec9c3f5d 337 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
3fd7131f
MW		 338
339 /* restore frame size information */
340 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
341 if (hw->max_frame_size >
342 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
343 u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
344 if (!(ctrl0 & IXGB_CTRL0_JFE)) {
345 ctrl0 |= IXGB_CTRL0_JFE;
346 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
347 }
348 }
1da177e4
LT		 349}
350
351/**
352 * ixgb_probe - Device Initialization Routine
353 * @pdev: PCI device information struct
354 * @ent: entry in ixgb_pci_tbl
355 *
356 * Returns 0 on success, negative on failure
357 *
358 * ixgb_probe initializes an adapter identified by a pci_dev structure.
359 * The OS initialization, configuring of the adapter private structure,
360 * and a hardware reset occur.
361 **/
362
363static int __devinit
364ixgb_probe(struct pci_dev *pdev,
365 const struct pci_device_id *ent)
366{
367 struct net_device *netdev = NULL;
368 struct ixgb_adapter *adapter;
369 static int cards_found = 0;
370 unsigned long mmio_start;
371 int mmio_len;
372 int pci_using_dac;
373 int i;
374 int err;
375
376 if((err = pci_enable_device(pdev)))
377 return err;
378
c91e468a
AS		 379 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
380 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 381 pci_using_dac = 1;
382 } else {
c91e468a
AS		 383 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
384 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
ec9c3f5d
AK		 385 printk(KERN_ERR
386 "ixgb: No usable DMA configuration, aborting\n");
c91e468a 387 goto err_dma_mask;
1da177e4
LT		 388 }
389 pci_using_dac = 0;
390 }
391
392 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 393 goto err_request_regions;
1da177e4
LT		 394
395 pci_set_master(pdev);
396
397 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
398 if(!netdev) {
399 err = -ENOMEM;
400 goto err_alloc_etherdev;
401 }
402
1da177e4
LT		 403 SET_NETDEV_DEV(netdev, &pdev->dev);
404
405 pci_set_drvdata(pdev, netdev);
8908c6cd 406 adapter = netdev_priv(netdev);
1da177e4
LT		 407 adapter->netdev = netdev;
408 adapter->pdev = pdev;
409 adapter->hw.back = adapter;
ec9c3f5d 410 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
1da177e4
LT		 411
412 mmio_start = pci_resource_start(pdev, BAR_0);
413 mmio_len = pci_resource_len(pdev, BAR_0);
414
415 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
416 if(!adapter->hw.hw_addr) {
417 err = -EIO;
418 goto err_ioremap;
419 }
420
421 for(i = BAR_1; i <= BAR_5; i++) {
422 if(pci_resource_len(pdev, i) == 0)
423 continue;
424 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
425 adapter->hw.io_base = pci_resource_start(pdev, i);
426 break;
427 }
428 }
429
430 netdev->open = &ixgb_open;
431 netdev->stop = &ixgb_close;
432 netdev->hard_start_xmit = &ixgb_xmit_frame;
433 netdev->get_stats = &ixgb_get_stats;
434 netdev->set_multicast_list = &ixgb_set_multi;
435 netdev->set_mac_address = &ixgb_set_mac;
436 netdev->change_mtu = &ixgb_change_mtu;
437 ixgb_set_ethtool_ops(netdev);
438 netdev->tx_timeout = &ixgb_tx_timeout;
9b8118df 439 netdev->watchdog_timeo = 5 * HZ;
1da177e4 440#ifdef CONFIG_IXGB_NAPI
bea3348e 441 netif_napi_add(netdev, &adapter->napi, ixgb_clean, 64);
1da177e4
LT		 442#endif
443 netdev->vlan_rx_register = ixgb_vlan_rx_register;
444 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
445 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
446#ifdef CONFIG_NET_POLL_CONTROLLER
447 netdev->poll_controller = ixgb_netpoll;
448#endif
449
0eb5a34c 450 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 451 netdev->mem_start = mmio_start;
452 netdev->mem_end = mmio_start + mmio_len;
453 netdev->base_addr = adapter->hw.io_base;
454
455 adapter->bd_number = cards_found;
456 adapter->link_speed = 0;
457 adapter->link_duplex = 0;
458
459 /* setup the private structure */
460
461 if((err = ixgb_sw_init(adapter)))
462 goto err_sw_init;
463
464 netdev->features = NETIF_F_SG |
465 NETIF_F_HW_CSUM |
466 NETIF_F_HW_VLAN_TX |
467 NETIF_F_HW_VLAN_RX |
468 NETIF_F_HW_VLAN_FILTER;
1da177e4 469 netdev->features |= NETIF_F_TSO;
f017f14b
AK		 470#ifdef NETIF_F_LLTX
471 netdev->features |= NETIF_F_LLTX;
472#endif
1da177e4
LT		 473
474 if(pci_using_dac)
475 netdev->features |= NETIF_F_HIGHDMA;
476
477 /* make sure the EEPROM is good */
478
479 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
ec9c3f5d 480 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 481 err = -EIO;
482 goto err_eeprom;
483 }
484
485 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 486 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 487
df859c51 488 if(!is_valid_ether_addr(netdev->perm_addr)) {
ec9c3f5d 489 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 490 err = -EIO;
491 goto err_eeprom;
492 }
493
494 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
495
496 init_timer(&adapter->watchdog_timer);
497 adapter->watchdog_timer.function = &ixgb_watchdog;
498 adapter->watchdog_timer.data = (unsigned long)adapter;
499
c4028958 500 INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
1da177e4 501
ec9c3f5d 502 strcpy(netdev->name, "eth%d");
1da177e4
LT		 503 if((err = register_netdev(netdev)))
504 goto err_register;
505
506 /* we're going to reset, so assume we have no link for now */
507
508 netif_carrier_off(netdev);
509 netif_stop_queue(netdev);
510
ec9c3f5d 511 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
1da177e4
LT		 512 ixgb_check_options(adapter);
513 /* reset the hardware with the new settings */
514
515 ixgb_reset(adapter);
516
517 cards_found++;
518 return 0;
519
520err_register:
521err_sw_init:
522err_eeprom:
523 iounmap(adapter->hw.hw_addr);
524err_ioremap:
525 free_netdev(netdev);
526err_alloc_etherdev:
527 pci_release_regions(pdev);
c91e468a
AS		 528err_request_regions:
529err_dma_mask:
530 pci_disable_device(pdev);
1da177e4
LT		 531 return err;
532}
533
534/**
535 * ixgb_remove - Device Removal Routine
536 * @pdev: PCI device information struct
537 *
538 * ixgb_remove is called by the PCI subsystem to alert the driver
539 * that it should release a PCI device. The could be caused by a
540 * Hot-Plug event, or because the driver is going to be removed from
541 * memory.
542 **/
543
544static void __devexit
545ixgb_remove(struct pci_dev *pdev)
546{
547 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 548 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 549
550 unregister_netdev(netdev);
551
552 iounmap(adapter->hw.hw_addr);
553 pci_release_regions(pdev);
554
555 free_netdev(netdev);
556}
557
558/**
559 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
560 * @adapter: board private structure to initialize
561 *
562 * ixgb_sw_init initializes the Adapter private data structure.
563 * Fields are initialized based on PCI device information and
564 * OS network device settings (MTU size).
565 **/
566
567static int __devinit
568ixgb_sw_init(struct ixgb_adapter *adapter)
569{
570 struct ixgb_hw *hw = &adapter->hw;
571 struct net_device *netdev = adapter->netdev;
572 struct pci_dev *pdev = adapter->pdev;
573
574 /* PCI config space info */
575
576 hw->vendor_id = pdev->vendor;
577 hw->device_id = pdev->device;
578 hw->subsystem_vendor_id = pdev->subsystem_vendor;
579 hw->subsystem_id = pdev->subsystem_device;
580
1da177e4 581 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
3f3dc0dd 582 adapter->rx_buffer_len = hw->max_frame_size;
1da177e4
LT		 583
584 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK		 585 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
586 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
587 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT		 588 hw->mac_type = ixgb_82597;
589 else {
590 /* should never have loaded on this device */
ec9c3f5d 591 DPRINTK(PROBE, ERR, "unsupported device id\n");
1da177e4
LT		 592 }
593
594 /* enable flow control to be programmed */
595 hw->fc.send_xon = 1;
596
597 atomic_set(&adapter->irq_sem, 1);
598 spin_lock_init(&adapter->tx_lock);
599
bab2bce7 600 set_bit(__IXGB_DOWN, &adapter->flags);
1da177e4
LT		 601 return 0;
602}
603
604/**
605 * ixgb_open - Called when a network interface is made active
606 * @netdev: network interface device structure
607 *
608 * Returns 0 on success, negative value on failure
609 *
610 * The open entry point is called when a network interface is made
611 * active by the system (IFF_UP). At this point all resources needed
612 * for transmit and receive operations are allocated, the interrupt
613 * handler is registered with the OS, the watchdog timer is started,
614 * and the stack is notified that the interface is ready.
615 **/
616
617static int
618ixgb_open(struct net_device *netdev)
619{
8908c6cd 620 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 621 int err;
622
623 /* allocate transmit descriptors */
624
625 if((err = ixgb_setup_tx_resources(adapter)))
626 goto err_setup_tx;
627
628 /* allocate receive descriptors */
629
630 if((err = ixgb_setup_rx_resources(adapter)))
631 goto err_setup_rx;
632
633 if((err = ixgb_up(adapter)))
634 goto err_up;
635
636 return 0;
637
638err_up:
639 ixgb_free_rx_resources(adapter);
640err_setup_rx:
641 ixgb_free_tx_resources(adapter);
642err_setup_tx:
643 ixgb_reset(adapter);
644
645 return err;
646}
647
648/**
649 * ixgb_close - Disables a network interface
650 * @netdev: network interface device structure
651 *
652 * Returns 0, this is not allowed to fail
653 *
654 * The close entry point is called when an interface is de-activated
655 * by the OS. The hardware is still under the drivers control, but
656 * needs to be disabled. A global MAC reset is issued to stop the
657 * hardware, and all transmit and receive resources are freed.
658 **/
659
660static int
661ixgb_close(struct net_device *netdev)
662{
8908c6cd 663 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 664
665 ixgb_down(adapter, TRUE);
666
667 ixgb_free_tx_resources(adapter);
668 ixgb_free_rx_resources(adapter);
669
670 return 0;
671}
672
673/**
674 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
675 * @adapter: board private structure
676 *
677 * Return 0 on success, negative on failure
678 **/
679
680int
681ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
682{
683 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
684 struct pci_dev *pdev = adapter->pdev;
685 int size;
686
687 size = sizeof(struct ixgb_buffer) * txdr->count;
688 txdr->buffer_info = vmalloc(size);
689 if(!txdr->buffer_info) {
ec9c3f5d
AK		 690 DPRINTK(PROBE, ERR,
691 "Unable to allocate transmit descriptor ring memory\n");
1da177e4
LT		 692 return -ENOMEM;
693 }
694 memset(txdr->buffer_info, 0, size);
695
696 /* round up to nearest 4K */
697
698 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
55e924cf 699 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 700
701 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
702 if(!txdr->desc) {
703 vfree(txdr->buffer_info);
ec9c3f5d
AK		 704 DPRINTK(PROBE, ERR,
705 "Unable to allocate transmit descriptor memory\n");
1da177e4
LT		 706 return -ENOMEM;
707 }
708 memset(txdr->desc, 0, txdr->size);
709
710 txdr->next_to_use = 0;
711 txdr->next_to_clean = 0;
712
713 return 0;
714}
715
716/**
717 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
718 * @adapter: board private structure
719 *
720 * Configure the Tx unit of the MAC after a reset.
721 **/
722
723static void
724ixgb_configure_tx(struct ixgb_adapter *adapter)
725{
726 uint64_t tdba = adapter->tx_ring.dma;
727 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
728 uint32_t tctl;
729 struct ixgb_hw *hw = &adapter->hw;
730
731 /* Setup the Base and Length of the Tx Descriptor Ring
732 * tx_ring.dma can be either a 32 or 64 bit value
733 */
734
735 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
736 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
737
738 IXGB_WRITE_REG(hw, TDLEN, tdlen);
739
740 /* Setup the HW Tx Head and Tail descriptor pointers */
741
742 IXGB_WRITE_REG(hw, TDH, 0);
743 IXGB_WRITE_REG(hw, TDT, 0);
744
745 /* don't set up txdctl, it induces performance problems if configured
746 * incorrectly */
747 /* Set the Tx Interrupt Delay register */
748
749 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
750
751 /* Program the Transmit Control Register */
752
753 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
754 IXGB_WRITE_REG(hw, TCTL, tctl);
755
756 /* Setup Transmit Descriptor Settings for this adapter */
757 adapter->tx_cmd_type =
758 IXGB_TX_DESC_TYPE
759 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
760}
761
762/**
763 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
764 * @adapter: board private structure
765 *
766 * Returns 0 on success, negative on failure
767 **/
768
769int
770ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
771{
772 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
773 struct pci_dev *pdev = adapter->pdev;
774 int size;
775
776 size = sizeof(struct ixgb_buffer) * rxdr->count;
777 rxdr->buffer_info = vmalloc(size);
778 if(!rxdr->buffer_info) {
ec9c3f5d
AK		 779 DPRINTK(PROBE, ERR,
780 "Unable to allocate receive descriptor ring\n");
1da177e4
LT		 781 return -ENOMEM;
782 }
783 memset(rxdr->buffer_info, 0, size);
784
785 /* Round up to nearest 4K */
786
787 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
55e924cf 788 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 789
790 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
791
792 if(!rxdr->desc) {
793 vfree(rxdr->buffer_info);
ec9c3f5d
AK		 794 DPRINTK(PROBE, ERR,
795 "Unable to allocate receive descriptors\n");
1da177e4
LT		 796 return -ENOMEM;
797 }
798 memset(rxdr->desc, 0, rxdr->size);
799
800 rxdr->next_to_clean = 0;
801 rxdr->next_to_use = 0;
802
803 return 0;
804}
805
806/**
807 * ixgb_setup_rctl - configure the receive control register
808 * @adapter: Board private structure
809 **/
810
811static void
812ixgb_setup_rctl(struct ixgb_adapter *adapter)
813{
814 uint32_t rctl;
815
816 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
817
818 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
819
820 rctl |=
821 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
822 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
823 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
824
825 rctl |= IXGB_RCTL_SECRC;
826
3f3dc0dd 827 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
1da177e4 828 rctl |= IXGB_RCTL_BSIZE_2048;
3f3dc0dd 829 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
1da177e4 830 rctl |= IXGB_RCTL_BSIZE_4096;
3f3dc0dd 831 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
1da177e4 832 rctl |= IXGB_RCTL_BSIZE_8192;
3f3dc0dd 833 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
1da177e4 834 rctl |= IXGB_RCTL_BSIZE_16384;
1da177e4
LT		 835
836 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
837}
838
839/**
840 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
841 * @adapter: board private structure
842 *
843 * Configure the Rx unit of the MAC after a reset.
844 **/
845
846static void
847ixgb_configure_rx(struct ixgb_adapter *adapter)
848{
849 uint64_t rdba = adapter->rx_ring.dma;
850 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
851 struct ixgb_hw *hw = &adapter->hw;
852 uint32_t rctl;
853 uint32_t rxcsum;
854 uint32_t rxdctl;
855
856 /* make sure receives are disabled while setting up the descriptors */
857
858 rctl = IXGB_READ_REG(hw, RCTL);
859 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
860
861 /* set the Receive Delay Timer Register */
862
863 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
864
865 /* Setup the Base and Length of the Rx Descriptor Ring */
866
867 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
868 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
869
870 IXGB_WRITE_REG(hw, RDLEN, rdlen);
871
872 /* Setup the HW Rx Head and Tail Descriptor Pointers */
873 IXGB_WRITE_REG(hw, RDH, 0);
874 IXGB_WRITE_REG(hw, RDT, 0);
875
876 /* set up pre-fetching of receive buffers so we get some before we
877 * run out (default hardware behavior is to run out before fetching
878 * more). This sets up to fetch if HTHRESH rx descriptors are avail
879 * and the descriptors in hw cache are below PTHRESH. This avoids
880 * the hardware behavior of fetching <=512 descriptors in a single
881 * burst that pre-empts all other activity, usually causing fifo
882 * overflows. */
883 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
884 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
885 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
886 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
887 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
888
889 /* Enable Receive Checksum Offload for TCP and UDP */
890 if(adapter->rx_csum == TRUE) {
891 rxcsum = IXGB_READ_REG(hw, RXCSUM);
892 rxcsum |= IXGB_RXCSUM_TUOFL;
893 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
894 }
895
896 /* Enable Receives */
897
898 IXGB_WRITE_REG(hw, RCTL, rctl);
899}
900
901/**
902 * ixgb_free_tx_resources - Free Tx Resources
903 * @adapter: board private structure
904 *
905 * Free all transmit software resources
906 **/
907
908void
909ixgb_free_tx_resources(struct ixgb_adapter *adapter)
910{
911 struct pci_dev *pdev = adapter->pdev;
912
913 ixgb_clean_tx_ring(adapter);
914
915 vfree(adapter->tx_ring.buffer_info);
916 adapter->tx_ring.buffer_info = NULL;
917
918 pci_free_consistent(pdev, adapter->tx_ring.size,
919 adapter->tx_ring.desc, adapter->tx_ring.dma);
920
921 adapter->tx_ring.desc = NULL;
922}
923
235949d1 924static void
1da177e4
LT		 925ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
926 struct ixgb_buffer *buffer_info)
927{
928 struct pci_dev *pdev = adapter->pdev;
1dfdd7df
AK		 929
930 if (buffer_info->dma)
931 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
932 PCI_DMA_TODEVICE);
933
934 if (buffer_info->skb)
1da177e4 935 dev_kfree_skb_any(buffer_info->skb);
1dfdd7df
AK		 936
937 buffer_info->skb = NULL;
938 buffer_info->dma = 0;
939 buffer_info->time_stamp = 0;
940 /* these fields must always be initialized in tx
941 * buffer_info->length = 0;
942 * buffer_info->next_to_watch = 0; */
1da177e4
LT		 943}
944
945/**
946 * ixgb_clean_tx_ring - Free Tx Buffers
947 * @adapter: board private structure
948 **/
949
950static void
951ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
952{
953 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
954 struct ixgb_buffer *buffer_info;
955 unsigned long size;
956 unsigned int i;
957
958 /* Free all the Tx ring sk_buffs */
959
960 for(i = 0; i < tx_ring->count; i++) {
961 buffer_info = &tx_ring->buffer_info[i];
962 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
963 }
964
965 size = sizeof(struct ixgb_buffer) * tx_ring->count;
966 memset(tx_ring->buffer_info, 0, size);
967
968 /* Zero out the descriptor ring */
969
970 memset(tx_ring->desc, 0, tx_ring->size);
971
972 tx_ring->next_to_use = 0;
973 tx_ring->next_to_clean = 0;
974
975 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
976 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
977}
978
979/**
980 * ixgb_free_rx_resources - Free Rx Resources
981 * @adapter: board private structure
982 *
983 * Free all receive software resources
984 **/
985
986void
987ixgb_free_rx_resources(struct ixgb_adapter *adapter)
988{
989 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
990 struct pci_dev *pdev = adapter->pdev;
991
992 ixgb_clean_rx_ring(adapter);
993
994 vfree(rx_ring->buffer_info);
995 rx_ring->buffer_info = NULL;
996
997 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
998
999 rx_ring->desc = NULL;
1000}
1001
1002/**
1003 * ixgb_clean_rx_ring - Free Rx Buffers
1004 * @adapter: board private structure
1005 **/
1006
1007static void
1008ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
1009{
1010 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1011 struct ixgb_buffer *buffer_info;
1012 struct pci_dev *pdev = adapter->pdev;
1013 unsigned long size;
1014 unsigned int i;
1015
1016 /* Free all the Rx ring sk_buffs */
1017
1018 for(i = 0; i < rx_ring->count; i++) {
1019 buffer_info = &rx_ring->buffer_info[i];
1020 if(buffer_info->skb) {
1021
1022 pci_unmap_single(pdev,
1023 buffer_info->dma,
1024 buffer_info->length,
1025 PCI_DMA_FROMDEVICE);
1026
1027 dev_kfree_skb(buffer_info->skb);
1028
1029 buffer_info->skb = NULL;
1030 }
1031 }
1032
1033 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1034 memset(rx_ring->buffer_info, 0, size);
1035
1036 /* Zero out the descriptor ring */
1037
1038 memset(rx_ring->desc, 0, rx_ring->size);
1039
1040 rx_ring->next_to_clean = 0;
1041 rx_ring->next_to_use = 0;
1042
1043 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1044 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1045}
1046
1047/**
1048 * ixgb_set_mac - Change the Ethernet Address of the NIC
1049 * @netdev: network interface device structure
1050 * @p: pointer to an address structure
1051 *
1052 * Returns 0 on success, negative on failure
1053 **/
1054
1055static int
1056ixgb_set_mac(struct net_device *netdev, void *p)
1057{
8908c6cd 1058 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1059 struct sockaddr *addr = p;
1060
1061 if(!is_valid_ether_addr(addr->sa_data))
1062 return -EADDRNOTAVAIL;
1063
1064 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1065
1066 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1067
1068 return 0;
1069}
1070
1071/**
1072 * ixgb_set_multi - Multicast and Promiscuous mode set
1073 * @netdev: network interface device structure
1074 *
1075 * The set_multi entry point is called whenever the multicast address
1076 * list or the network interface flags are updated. This routine is
1077 * responsible for configuring the hardware for proper multicast,
1078 * promiscuous mode, and all-multi behavior.
1079 **/
1080
1081static void
1082ixgb_set_multi(struct net_device *netdev)
1083{
8908c6cd 1084 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1085 struct ixgb_hw *hw = &adapter->hw;
1086 struct dev_mc_list *mc_ptr;
1087 uint32_t rctl;
1088 int i;
1089
1090 /* Check for Promiscuous and All Multicast modes */
1091
1092 rctl = IXGB_READ_REG(hw, RCTL);
1093
1094 if(netdev->flags & IFF_PROMISC) {
1095 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1096 } else if(netdev->flags & IFF_ALLMULTI) {
1097 rctl |= IXGB_RCTL_MPE;
1098 rctl &= ~IXGB_RCTL_UPE;
1099 } else {
1100 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1101 }
1102
1103 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1104 rctl |= IXGB_RCTL_MPE;
1105 IXGB_WRITE_REG(hw, RCTL, rctl);
1106 } else {
273dc74e
SH		 1107 uint8_t mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES *
1108 IXGB_ETH_LENGTH_OF_ADDRESS];
1da177e4
LT		 1109
1110 IXGB_WRITE_REG(hw, RCTL, rctl);
1111
1112 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1113 i++, mc_ptr = mc_ptr->next)
1114 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1115 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1116
1117 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1118 }
1119}
1120
1121/**
1122 * ixgb_watchdog - Timer Call-back
1123 * @data: pointer to netdev cast into an unsigned long
1124 **/
1125
1126static void
1127ixgb_watchdog(unsigned long data)
1128{
1129 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1130 struct net_device *netdev = adapter->netdev;
1131 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1132
1133 ixgb_check_for_link(&adapter->hw);
1134
1135 if (ixgb_check_for_bad_link(&adapter->hw)) {
1136 /* force the reset path */
1137 netif_stop_queue(netdev);
1138 }
1139
1140 if(adapter->hw.link_up) {
1141 if(!netif_carrier_ok(netdev)) {
ec9c3f5d
AK		 1142 DPRINTK(LINK, INFO,
1143 "NIC Link is Up 10000 Mbps Full Duplex\n");
1da177e4
LT		 1144 adapter->link_speed = 10000;
1145 adapter->link_duplex = FULL_DUPLEX;
1146 netif_carrier_on(netdev);
1147 netif_wake_queue(netdev);
1148 }
1149 } else {
1150 if(netif_carrier_ok(netdev)) {
1151 adapter->link_speed = 0;
1152 adapter->link_duplex = 0;
ec9c3f5d 1153 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1da177e4
LT		 1154 netif_carrier_off(netdev);
1155 netif_stop_queue(netdev);
1156
1157 }
1158 }
1159
1160 ixgb_update_stats(adapter);
1161
1162 if(!netif_carrier_ok(netdev)) {
1163 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1164 /* We've lost link, so the controller stops DMA,
1165 * but we've got queued Tx work that's never going
1166 * to get done, so reset controller to flush Tx.
1167 * (Do the reset outside of interrupt context). */
1168 schedule_work(&adapter->tx_timeout_task);
1169 }
1170 }
1171
1172 /* Force detection of hung controller every watchdog period */
1173 adapter->detect_tx_hung = TRUE;
1174
1175 /* generate an interrupt to force clean up of any stragglers */
1176 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1177
1178 /* Reset the timer */
1179 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1180}
1181
1182#define IXGB_TX_FLAGS_CSUM 0x00000001
1183#define IXGB_TX_FLAGS_VLAN 0x00000002
1184#define IXGB_TX_FLAGS_TSO 0x00000004
1185
235949d1 1186static int
1da177e4
LT		 1187ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1188{
1da177e4
LT		 1189 struct ixgb_context_desc *context_desc;
1190 unsigned int i;
1191 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1192 uint16_t ipcse, tucse, mss;
1193 int err;
1194
89114afd 1195 if (likely(skb_is_gso(skb))) {
adc54139 1196 struct ixgb_buffer *buffer_info;
eddc9ec5
ACM		 1197 struct iphdr *iph;
1198
1da177e4
LT		 1199 if (skb_header_cloned(skb)) {
1200 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1201 if (err)
1202 return err;
1203 }
1204
ab6a5bb6 1205 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 1206 mss = skb_shinfo(skb)->gso_size;
eddc9ec5
ACM		 1207 iph = ip_hdr(skb);
1208 iph->tot_len = 0;
1209 iph->check = 0;
aa8223c7
ACM		 1210 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1211 iph->daddr, 0,
1212 IPPROTO_TCP, 0);
bbe735e4 1213 ipcss = skb_network_offset(skb);
eddc9ec5 1214 ipcso = (void *)&(iph->check) - (void *)skb->data;
ea2ae17d
ACM		 1215 ipcse = skb_transport_offset(skb) - 1;
1216 tucss = skb_transport_offset(skb);
aa8223c7 1217 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 1218 tucse = 0;
1219
1220 i = adapter->tx_ring.next_to_use;
1221 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB		 1222 buffer_info = &adapter->tx_ring.buffer_info[i];
1223 WARN_ON(buffer_info->dma != 0);
1da177e4
LT		 1224
1225 context_desc->ipcss = ipcss;
1226 context_desc->ipcso = ipcso;
1227 context_desc->ipcse = cpu_to_le16(ipcse);
1228 context_desc->tucss = tucss;
1229 context_desc->tucso = tucso;
1230 context_desc->tucse = cpu_to_le16(tucse);
1231 context_desc->mss = cpu_to_le16(mss);
1232 context_desc->hdr_len = hdr_len;
1233 context_desc->status = 0;
1234 context_desc->cmd_type_len = cpu_to_le32(
1235 IXGB_CONTEXT_DESC_TYPE
1236 | IXGB_CONTEXT_DESC_CMD_TSE
1237 | IXGB_CONTEXT_DESC_CMD_IP
1238 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT		 1239 | IXGB_CONTEXT_DESC_CMD_IDE
1240 | (skb->len - (hdr_len)));
1241
06c2f9ec 1242
1da177e4
LT		 1243 if(++i == adapter->tx_ring.count) i = 0;
1244 adapter->tx_ring.next_to_use = i;
1245
1246 return 1;
1247 }
1da177e4
LT		 1248
1249 return 0;
1250}
1251
235949d1 1252static boolean_t
1da177e4
LT		 1253ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1254{
1255 struct ixgb_context_desc *context_desc;
1256 unsigned int i;
1257 uint8_t css, cso;
1258
84fa7933 1259 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
adc54139 1260 struct ixgb_buffer *buffer_info;
ea2ae17d 1261 css = skb_transport_offset(skb);
ff1dcadb 1262 cso = css + skb->csum_offset;
1da177e4
LT		 1263
1264 i = adapter->tx_ring.next_to_use;
1265 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB		 1266 buffer_info = &adapter->tx_ring.buffer_info[i];
1267 WARN_ON(buffer_info->dma != 0);
1da177e4
LT		 1268
1269 context_desc->tucss = css;
1270 context_desc->tucso = cso;
1271 context_desc->tucse = 0;
1272 /* zero out any previously existing data in one instruction */
1273 *(uint32_t *)&(context_desc->ipcss) = 0;
1274 context_desc->status = 0;
1275 context_desc->hdr_len = 0;
1276 context_desc->mss = 0;
1277 context_desc->cmd_type_len =
1278 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1279 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT		 1280
1281 if(++i == adapter->tx_ring.count) i = 0;
1282 adapter->tx_ring.next_to_use = i;
1283
1284 return TRUE;
1285 }
1286
1287 return FALSE;
1288}
1289
1290#define IXGB_MAX_TXD_PWR 14
1291#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1292
235949d1 1293static int
1da177e4
LT		 1294ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1295 unsigned int first)
1296{
1297 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1298 struct ixgb_buffer *buffer_info;
1299 int len = skb->len;
1300 unsigned int offset = 0, size, count = 0, i;
5d927853 1301 unsigned int mss = skb_shinfo(skb)->gso_size;
1da177e4
LT		 1302
1303 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1304 unsigned int f;
ac79c82e 1305
1da177e4
LT		 1306 len -= skb->data_len;
1307
1308 i = tx_ring->next_to_use;
1309
1310 while(len) {
1311 buffer_info = &tx_ring->buffer_info[i];
709cf018 1312 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB		 1313 /* Workaround for premature desc write-backs
1314 * in TSO mode. Append 4-byte sentinel desc */
1315 if (unlikely(mss && !nr_frags && size == len && size > 8))
1316 size -= 4;
1317
1da177e4 1318 buffer_info->length = size;
adc54139 1319 WARN_ON(buffer_info->dma != 0);
1da177e4
LT		 1320 buffer_info->dma =
1321 pci_map_single(adapter->pdev,
1322 skb->data + offset,
1323 size,
1324 PCI_DMA_TODEVICE);
1325 buffer_info->time_stamp = jiffies;
1dfdd7df 1326 buffer_info->next_to_watch = 0;
1da177e4
LT		 1327
1328 len -= size;
1329 offset += size;
1330 count++;
1331 if(++i == tx_ring->count) i = 0;
1332 }
1333
1334 for(f = 0; f < nr_frags; f++) {
1335 struct skb_frag_struct *frag;
1336
1337 frag = &skb_shinfo(skb)->frags[f];
1338 len = frag->size;
1339 offset = 0;
1340
1341 while(len) {
1342 buffer_info = &tx_ring->buffer_info[i];
709cf018 1343 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB		 1344
1345 /* Workaround for premature desc write-backs
1346 * in TSO mode. Append 4-byte sentinel desc */
19abe86d
AK		 1347 if (unlikely(mss && (f == (nr_frags - 1))
1348 && size == len && size > 8))
5d927853
JB		 1349 size -= 4;
1350
1da177e4
LT		 1351 buffer_info->length = size;
1352 buffer_info->dma =
1353 pci_map_page(adapter->pdev,
1354 frag->page,
1355 frag->page_offset + offset,
1356 size,
1357 PCI_DMA_TODEVICE);
1358 buffer_info->time_stamp = jiffies;
1dfdd7df 1359 buffer_info->next_to_watch = 0;
1da177e4
LT		 1360
1361 len -= size;
1362 offset += size;
1363 count++;
1364 if(++i == tx_ring->count) i = 0;
1365 }
1366 }
1367 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1368 tx_ring->buffer_info[i].skb = skb;
1369 tx_ring->buffer_info[first].next_to_watch = i;
1370
1371 return count;
1372}
1373
235949d1 1374static void
1da177e4
LT		 1375ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1376{
1377 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1378 struct ixgb_tx_desc *tx_desc = NULL;
1379 struct ixgb_buffer *buffer_info;
1380 uint32_t cmd_type_len = adapter->tx_cmd_type;
1381 uint8_t status = 0;
1382 uint8_t popts = 0;
1383 unsigned int i;
1384
1385 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1386 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1387 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1388 }
1389
1390 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1391 popts |= IXGB_TX_DESC_POPTS_TXSM;
1392
1393 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1394 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1395 }
1396
1397 i = tx_ring->next_to_use;
1398
1399 while(count--) {
1400 buffer_info = &tx_ring->buffer_info[i];
1401 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1402 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1403 tx_desc->cmd_type_len =
1404 cpu_to_le32(cmd_type_len | buffer_info->length);
1405 tx_desc->status = status;
1406 tx_desc->popts = popts;
1407 tx_desc->vlan = cpu_to_le16(vlan_id);
1408
1409 if(++i == tx_ring->count) i = 0;
1410 }
1411
1412 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1413 | IXGB_TX_DESC_CMD_RS );
1414
1415 /* Force memory writes to complete before letting h/w
1416 * know there are new descriptors to fetch. (Only
1417 * applicable for weak-ordered memory model archs,
1418 * such as IA-64). */
1419 wmb();
1420
1421 tx_ring->next_to_use = i;
1422 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1423}
1424
dfd341e4
JB		 1425static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
1426{
1427 struct ixgb_adapter *adapter = netdev_priv(netdev);
1428 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1429
1430 netif_stop_queue(netdev);
1431 /* Herbert's original patch had:
1432 * smp_mb__after_netif_stop_queue();
1433 * but since that doesn't exist yet, just open code it. */
1434 smp_mb();
1435
1436 /* We need to check again in a case another CPU has just
1437 * made room available. */
1438 if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
1439 return -EBUSY;
1440
1441 /* A reprieve! */
1442 netif_start_queue(netdev);
1443 ++adapter->restart_queue;
1444 return 0;
1445}
1446
1447static int ixgb_maybe_stop_tx(struct net_device *netdev,
1448 struct ixgb_desc_ring *tx_ring, int size)
1449{
1450 if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
1451 return 0;
1452 return __ixgb_maybe_stop_tx(netdev, size);
1453}
1454
1455
1da177e4
LT		 1456/* Tx Descriptors needed, worst case */
1457#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1458 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
5d927853
JB		 1459#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
1460 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
1461 + 1 /* one more needed for sentinel TSO workaround */
1da177e4
LT		 1462
1463static int
1464ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1465{
8908c6cd 1466 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1467 unsigned int first;
1468 unsigned int tx_flags = 0;
1469 unsigned long flags;
1470 int vlan_id = 0;
1471 int tso;
1472
bab2bce7
JB		 1473 if (test_bit(__IXGB_DOWN, &adapter->flags)) {
1474 dev_kfree_skb(skb);
1475 return NETDEV_TX_OK;
1476 }
1477
1da177e4
LT		 1478 if(skb->len <= 0) {
1479 dev_kfree_skb_any(skb);
1480 return 0;
1481 }
1482
f017f14b 1483#ifdef NETIF_F_LLTX
bab2bce7 1484 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
f017f14b
AK		 1485 /* Collision - tell upper layer to requeue */
1486 local_irq_restore(flags);
1487 return NETDEV_TX_LOCKED;
1488 }
1489#else
1da177e4 1490 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK		 1491#endif
1492
dfd341e4
JB		 1493 if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
1494 DESC_NEEDED))) {
1da177e4
LT		 1495 netif_stop_queue(netdev);
1496 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1497 return NETDEV_TX_BUSY;
1da177e4 1498 }
f017f14b
AK		 1499
1500#ifndef NETIF_F_LLTX
1da177e4 1501 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1502#endif
1da177e4
LT		 1503
1504 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1505 tx_flags |= IXGB_TX_FLAGS_VLAN;
1506 vlan_id = vlan_tx_tag_get(skb);
1507 }
1508
1509 first = adapter->tx_ring.next_to_use;
1510
1511 tso = ixgb_tso(adapter, skb);
1512 if (tso < 0) {
1513 dev_kfree_skb_any(skb);
f017f14b
AK		 1514#ifdef NETIF_F_LLTX
1515 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1516#endif
1da177e4
LT		 1517 return NETDEV_TX_OK;
1518 }
1519
96f9c2e2 1520 if (likely(tso))
1da177e4
LT		 1521 tx_flags |= IXGB_TX_FLAGS_TSO;
1522 else if(ixgb_tx_csum(adapter, skb))
1523 tx_flags |= IXGB_TX_FLAGS_CSUM;
1524
1525 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1526 tx_flags);
1527
1528 netdev->trans_start = jiffies;
1529
f017f14b
AK		 1530#ifdef NETIF_F_LLTX
1531 /* Make sure there is space in the ring for the next send. */
dfd341e4 1532 ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
f017f14b
AK		 1533
1534 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1535
1536#endif
1537 return NETDEV_TX_OK;
1da177e4
LT		 1538}
1539
1540/**
1541 * ixgb_tx_timeout - Respond to a Tx Hang
1542 * @netdev: network interface device structure
1543 **/
1544
1545static void
1546ixgb_tx_timeout(struct net_device *netdev)
1547{
8908c6cd 1548 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1549
1550 /* Do the reset outside of interrupt context */
1551 schedule_work(&adapter->tx_timeout_task);
1552}
1553
1554static void
c4028958 1555ixgb_tx_timeout_task(struct work_struct *work)
1da177e4 1556{
c4028958
DH		 1557 struct ixgb_adapter *adapter =
1558 container_of(work, struct ixgb_adapter, tx_timeout_task);
1da177e4 1559
9b8118df 1560 adapter->tx_timeout_count++;
1da177e4
LT		 1561 ixgb_down(adapter, TRUE);
1562 ixgb_up(adapter);
1563}
1564
1565/**
1566 * ixgb_get_stats - Get System Network Statistics
1567 * @netdev: network interface device structure
1568 *
1569 * Returns the address of the device statistics structure.
1570 * The statistics are actually updated from the timer callback.
1571 **/
1572
1573static struct net_device_stats *
1574ixgb_get_stats(struct net_device *netdev)
1575{
8908c6cd 1576 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1577
1578 return &adapter->net_stats;
1579}
1580
1581/**
1582 * ixgb_change_mtu - Change the Maximum Transfer Unit
1583 * @netdev: network interface device structure
1584 * @new_mtu: new value for maximum frame size
1585 *
1586 * Returns 0 on success, negative on failure
1587 **/
1588
1589static int
1590ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1591{
8908c6cd 1592 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1593 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1594 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1595
1596
1597 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1598 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
ec9c3f5d 1599 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1da177e4
LT		 1600 return -EINVAL;
1601 }
1602
3f3dc0dd 1603 adapter->rx_buffer_len = max_frame;
1da177e4
LT		 1604
1605 netdev->mtu = new_mtu;
1606
3f3dc0dd 1607 if ((old_max_frame != max_frame) && netif_running(netdev)) {
1da177e4
LT		 1608 ixgb_down(adapter, TRUE);
1609 ixgb_up(adapter);
1610 }
1611
1612 return 0;
1613}
1614
1615/**
1616 * ixgb_update_stats - Update the board statistics counters.
1617 * @adapter: board private structure
1618 **/
1619
1620void
1621ixgb_update_stats(struct ixgb_adapter *adapter)
1622{
5633684d 1623 struct net_device *netdev = adapter->netdev;
01748fbb
LV		 1624 struct pci_dev *pdev = adapter->pdev;
1625
1626 /* Prevent stats update while adapter is being reset */
81b1955e 1627 if (pci_channel_offline(pdev))
01748fbb 1628 return;
5633684d
MC		 1629
1630 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1631 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1632 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1633 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1634 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1635 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1636
1637 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1638 /* fix up multicast stats by removing broadcasts */
7b89178d
MC		 1639 if(multi >= bcast)
1640 multi -= bcast;
5633684d
MC		 1641
1642 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1643 adapter->stats.mprch += (multi >> 32);
1644 adapter->stats.bprcl += bcast_l;
1645 adapter->stats.bprch += bcast_h;
1646 } else {
1647 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1648 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1649 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1650 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1651 }
1da177e4
LT		 1652 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1653 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1654 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1655 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT		 1656 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1657 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1658 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1659 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1660 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1661 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1662 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1663 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1664 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1665 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1666 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1667 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1668 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1669 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1670 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1671 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1672 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1673 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1674 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1675 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1676 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1677 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1678 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1679 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1680 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1681 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1682 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1683 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1684 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1685 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1686 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1687 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1688 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1689 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1690 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1691 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1692 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1693 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1694 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1695 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1696 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1697 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1698 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1699 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1700 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1701 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1702 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1703 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1704 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1705 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1706 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1707 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1708
1709 /* Fill out the OS statistics structure */
1710
1711 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1712 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1713 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1714 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1715 adapter->net_stats.multicast = adapter->stats.mprcl;
1716 adapter->net_stats.collisions = 0;
1717
1718 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1719 * with a length in the type/len field */
1720 adapter->net_stats.rx_errors =
1721 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1722 adapter->stats.ruc +
1723 adapter->stats.roc /*+ adapter->stats.rlec */ +
1724 adapter->stats.icbc +
1725 adapter->stats.ecbc + adapter->stats.mpc;
1726
1da177e4
LT		 1727 /* see above
1728 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1729 */
1730
1731 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1732 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1733 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1734 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1735
1736 adapter->net_stats.tx_errors = 0;
1737 adapter->net_stats.rx_frame_errors = 0;
1738 adapter->net_stats.tx_aborted_errors = 0;
1739 adapter->net_stats.tx_carrier_errors = 0;
1740 adapter->net_stats.tx_fifo_errors = 0;
1741 adapter->net_stats.tx_heartbeat_errors = 0;
1742 adapter->net_stats.tx_window_errors = 0;
1743}
1744
1745#define IXGB_MAX_INTR 10
1746/**
1747 * ixgb_intr - Interrupt Handler
1748 * @irq: interrupt number
1749 * @data: pointer to a network interface device structure
1da177e4
LT		 1750 **/
1751
1752static irqreturn_t
7d12e780 1753ixgb_intr(int irq, void *data)
1da177e4
LT		 1754{
1755 struct net_device *netdev = data;
8908c6cd 1756 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1757 struct ixgb_hw *hw = &adapter->hw;
1758 uint32_t icr = IXGB_READ_REG(hw, ICR);
1759#ifndef CONFIG_IXGB_NAPI
1760 unsigned int i;
1761#endif
1762
1763 if(unlikely(!icr))
1764 return IRQ_NONE; /* Not our interrupt */
1765
bab2bce7
JB		 1766 if (unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC)))
1767 if (!test_bit(__IXGB_DOWN, &adapter->flags))
1768 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 1769
1770#ifdef CONFIG_IXGB_NAPI
bea3348e 1771 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1da177e4
LT		 1772
1773 /* Disable interrupts and register for poll. The flush
1774 of the posted write is intentionally left out.
1775 */
1776
1777 atomic_inc(&adapter->irq_sem);
1778 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
bea3348e 1779 __netif_rx_schedule(netdev, &adapter->napi);
1da177e4
LT		 1780 }
1781#else
1782 /* yes, that is actually a & and it is meant to make sure that
1783 * every pass through this for loop checks both receive and
1784 * transmit queues for completed descriptors, intended to
1785 * avoid starvation issues and assist tx/rx fairness. */
1786 for(i = 0; i < IXGB_MAX_INTR; i++)
1787 if(!ixgb_clean_rx_irq(adapter) &
1788 !ixgb_clean_tx_irq(adapter))
1789 break;
1790#endif
1791 return IRQ_HANDLED;
1792}
1793
1794#ifdef CONFIG_IXGB_NAPI
1795/**
1796 * ixgb_clean - NAPI Rx polling callback
1797 * @adapter: board private structure
1798 **/
1799
1800static int
bea3348e 1801ixgb_clean(struct napi_struct *napi, int budget)
1da177e4 1802{
bea3348e
SH		 1803 struct ixgb_adapter *adapter = container_of(napi, struct ixgb_adapter, napi);
1804 struct net_device *netdev = adapter->netdev;
1da177e4
LT		 1805 int work_done = 0;
1806
53e52c72 1807 ixgb_clean_tx_irq(adapter);
bea3348e 1808 ixgb_clean_rx_irq(adapter, &work_done, budget);
1da177e4 1809
53e52c72
DM		 1810 /* If budget not fully consumed, exit the polling mode */
1811 if (work_done < budget) {
bea3348e 1812 netif_rx_complete(netdev, napi);
1da177e4 1813 ixgb_irq_enable(adapter);
1da177e4
LT		 1814 }
1815
bea3348e 1816 return work_done;
1da177e4
LT		 1817}
1818#endif
1819
1820/**
1821 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1822 * @adapter: board private structure
1823 **/
1824
1825static boolean_t
1826ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1827{
1828 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1829 struct net_device *netdev = adapter->netdev;
1830 struct ixgb_tx_desc *tx_desc, *eop_desc;
1831 struct ixgb_buffer *buffer_info;
1832 unsigned int i, eop;
1833 boolean_t cleaned = FALSE;
1834
1835 i = tx_ring->next_to_clean;
1836 eop = tx_ring->buffer_info[i].next_to_watch;
1837 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1838
1839 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1840
1841 for(cleaned = FALSE; !cleaned; ) {
1842 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1843 buffer_info = &tx_ring->buffer_info[i];
1844
1845 if (tx_desc->popts
1846 & (IXGB_TX_DESC_POPTS_TXSM |
1847 IXGB_TX_DESC_POPTS_IXSM))
1848 adapter->hw_csum_tx_good++;
1849
1850 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1851
1852 *(uint32_t *)&(tx_desc->status) = 0;
1853
1854 cleaned = (i == eop);
1855 if(++i == tx_ring->count) i = 0;
1856 }
1857
1858 eop = tx_ring->buffer_info[i].next_to_watch;
1859 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1860 }
1861
1862 tx_ring->next_to_clean = i;
1863
3352a3b2
AK		 1864 if (unlikely(netif_queue_stopped(netdev))) {
1865 spin_lock(&adapter->tx_lock);
1866 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
ab8ced2f 1867 (IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED))
3352a3b2
AK		 1868 netif_wake_queue(netdev);
1869 spin_unlock(&adapter->tx_lock);
1da177e4 1870 }
1da177e4
LT		 1871
1872 if(adapter->detect_tx_hung) {
1873 /* detect a transmit hang in hardware, this serializes the
1874 * check with the clearing of time_stamp and movement of i */
1875 adapter->detect_tx_hung = FALSE;
9b8118df
AK		 1876 if (tx_ring->buffer_info[eop].dma &&
1877 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1da177e4 1878 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
9b8118df
AK		 1879 IXGB_STATUS_TXOFF)) {
1880 /* detected Tx unit hang */
1881 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1882 " TDH <%x>\n"
1883 " TDT <%x>\n"
1884 " next_to_use <%x>\n"
1885 " next_to_clean <%x>\n"
1886 "buffer_info[next_to_clean]\n"
1887 " time_stamp <%lx>\n"
1888 " next_to_watch <%x>\n"
1889 " jiffies <%lx>\n"
1890 " next_to_watch.status <%x>\n",
1891 IXGB_READ_REG(&adapter->hw, TDH),
1892 IXGB_READ_REG(&adapter->hw, TDT),
1893 tx_ring->next_to_use,
1894 tx_ring->next_to_clean,
1895 tx_ring->buffer_info[eop].time_stamp,
1896 eop,
1897 jiffies,
1898 eop_desc->status);
1da177e4 1899 netif_stop_queue(netdev);
9b8118df 1900 }
1da177e4
LT		 1901 }
1902
1903 return cleaned;
1904}
1905
1906/**
1907 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1908 * @adapter: board private structure
1909 * @rx_desc: receive descriptor
1910 * @sk_buff: socket buffer with received data
1911 **/
1912
235949d1 1913static void
1da177e4
LT		 1914ixgb_rx_checksum(struct ixgb_adapter *adapter,
1915 struct ixgb_rx_desc *rx_desc,
1916 struct sk_buff *skb)
1917{
1918 /* Ignore Checksum bit is set OR
1919 * TCP Checksum has not been calculated
1920 */
1921 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1922 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1923 skb->ip_summed = CHECKSUM_NONE;
1924 return;
1925 }
1926
1927 /* At this point we know the hardware did the TCP checksum */
1928 /* now look at the TCP checksum error bit */
1929 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1930 /* let the stack verify checksum errors */
1931 skb->ip_summed = CHECKSUM_NONE;
1932 adapter->hw_csum_rx_error++;
1933 } else {
1934 /* TCP checksum is good */
1935 skb->ip_summed = CHECKSUM_UNNECESSARY;
1936 adapter->hw_csum_rx_good++;
1937 }
1938}
1939
1940/**
1941 * ixgb_clean_rx_irq - Send received data up the network stack,
1942 * @adapter: board private structure
1943 **/
1944
1945static boolean_t
1946#ifdef CONFIG_IXGB_NAPI
1947ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1948#else
1949ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1950#endif
1951{
1952 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1953 struct net_device *netdev = adapter->netdev;
1954 struct pci_dev *pdev = adapter->pdev;
1955 struct ixgb_rx_desc *rx_desc, *next_rxd;
1956 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT		 1957 uint32_t length;
1958 unsigned int i, j;
1959 boolean_t cleaned = FALSE;
1960
1961 i = rx_ring->next_to_clean;
1962 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1963 buffer_info = &rx_ring->buffer_info[i];
1964
1965 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC		 1966 struct sk_buff *skb, *next_skb;
1967 u8 status;
1da177e4
LT		 1968
1969#ifdef CONFIG_IXGB_NAPI
1970 if(*work_done >= work_to_do)
1971 break;
1972
1973 (*work_done)++;
1974#endif
f404de1c 1975 status = rx_desc->status;
1da177e4 1976 skb = buffer_info->skb;
1dfdd7df 1977 buffer_info->skb = NULL;
f404de1c 1978
1da177e4
LT		 1979 prefetch(skb->data);
1980
1981 if(++i == rx_ring->count) i = 0;
1982 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1983 prefetch(next_rxd);
1984
1985 if((j = i + 1) == rx_ring->count) j = 0;
1986 next2_buffer = &rx_ring->buffer_info[j];
1987 prefetch(next2_buffer);
1988
1989 next_buffer = &rx_ring->buffer_info[i];
1990 next_skb = next_buffer->skb;
1991 prefetch(next_skb);
1992
1da177e4
LT		 1993 cleaned = TRUE;
1994
1995 pci_unmap_single(pdev,
1996 buffer_info->dma,
1997 buffer_info->length,
1998 PCI_DMA_FROMDEVICE);
1999
2000 length = le16_to_cpu(rx_desc->length);
2001
f404de1c 2002 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT		 2003
2004 /* All receives must fit into a single buffer */
2005
2006 IXGB_DBG("Receive packet consumed multiple buffers "
2007 "length<%x>\n", length);
2008
2009 dev_kfree_skb_irq(skb);
f404de1c 2010 goto rxdesc_done;
1da177e4
LT		 2011 }
2012
2013 if (unlikely(rx_desc->errors
2014 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
2015 | IXGB_RX_DESC_ERRORS_P |
2016 IXGB_RX_DESC_ERRORS_RXE))) {
2017
2018 dev_kfree_skb_irq(skb);
f404de1c 2019 goto rxdesc_done;
1da177e4
LT		 2020 }
2021
6b900bb4
AK		 2022 /* code added for copybreak, this should improve
2023 * performance for small packets with large amounts
2024 * of reassembly being done in the stack */
2025#define IXGB_CB_LENGTH 256
2026 if (length < IXGB_CB_LENGTH) {
2027 struct sk_buff *new_skb =
5791704f 2028 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
6b900bb4
AK		 2029 if (new_skb) {
2030 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 2031 skb_copy_to_linear_data_offset(new_skb,
2032 -NET_IP_ALIGN,
2033 (skb->data -
2034 NET_IP_ALIGN),
2035 (length +
2036 NET_IP_ALIGN));
6b900bb4
AK		 2037 /* save the skb in buffer_info as good */
2038 buffer_info->skb = skb;
2039 skb = new_skb;
2040 }
2041 }
2042 /* end copybreak code */
2043
1da177e4
LT		 2044 /* Good Receive */
2045 skb_put(skb, length);
2046
2047 /* Receive Checksum Offload */
2048 ixgb_rx_checksum(adapter, rx_desc, skb);
2049
2050 skb->protocol = eth_type_trans(skb, netdev);
2051#ifdef CONFIG_IXGB_NAPI
f404de1c 2052 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 2053 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2054 le16_to_cpu(rx_desc->special) &
2055 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2056 } else {
2057 netif_receive_skb(skb);
2058 }
2059#else /* CONFIG_IXGB_NAPI */
f404de1c 2060 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 2061 vlan_hwaccel_rx(skb, adapter->vlgrp,
2062 le16_to_cpu(rx_desc->special) &
2063 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2064 } else {
2065 netif_rx(skb);
2066 }
2067#endif /* CONFIG_IXGB_NAPI */
2068 netdev->last_rx = jiffies;
2069
f404de1c
MC		 2070rxdesc_done:
2071 /* clean up descriptor, might be written over by hw */
1da177e4 2072 rx_desc->status = 0;
1da177e4 2073
f404de1c 2074 /* use prefetched values */
1da177e4
LT		 2075 rx_desc = next_rxd;
2076 buffer_info = next_buffer;
2077 }
2078
2079 rx_ring->next_to_clean = i;
2080
2081 ixgb_alloc_rx_buffers(adapter);
2082
2083 return cleaned;
2084}
2085
2086/**
2087 * ixgb_alloc_rx_buffers - Replace used receive buffers
2088 * @adapter: address of board private structure
2089 **/
2090
2091static void
2092ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2093{
2094 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2095 struct net_device *netdev = adapter->netdev;
2096 struct pci_dev *pdev = adapter->pdev;
2097 struct ixgb_rx_desc *rx_desc;
2098 struct ixgb_buffer *buffer_info;
2099 struct sk_buff *skb;
2100 unsigned int i;
2101 int num_group_tail_writes;
2102 long cleancount;
2103
2104 i = rx_ring->next_to_use;
2105 buffer_info = &rx_ring->buffer_info[i];
2106 cleancount = IXGB_DESC_UNUSED(rx_ring);
2107
2108 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2109
41639fed
MC		 2110 /* leave three descriptors unused */
2111 while(--cleancount > 2) {
1dfdd7df 2112 /* recycle! its good for you */
69c7a940
AK		 2113 skb = buffer_info->skb;
2114 if (skb) {
1dfdd7df
AK		 2115 skb_trim(skb, 0);
2116 goto map_skb;
2117 }
1da177e4 2118
69c7a940
AK		 2119 skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
2120 + NET_IP_ALIGN);
1dfdd7df 2121 if (unlikely(!skb)) {
1da177e4 2122 /* Better luck next round */
1dfdd7df 2123 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 2124 break;
2125 }
2126
2127 /* Make buffer alignment 2 beyond a 16 byte boundary
2128 * this will result in a 16 byte aligned IP header after
2129 * the 14 byte MAC header is removed
2130 */
2131 skb_reserve(skb, NET_IP_ALIGN);
2132
1da177e4
LT		 2133 buffer_info->skb = skb;
2134 buffer_info->length = adapter->rx_buffer_len;
1dfdd7df
AK		 2135map_skb:
2136 buffer_info->dma = pci_map_single(pdev,
2137 skb->data,
2138 adapter->rx_buffer_len,
2139 PCI_DMA_FROMDEVICE);
1da177e4 2140
1dfdd7df 2141 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1da177e4 2142 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC		 2143 /* guarantee DD bit not set now before h/w gets descriptor
2144 * this is the rest of the workaround for h/w double
2145 * writeback. */
2146 rx_desc->status = 0;
1da177e4 2147
1da177e4
LT		 2148
2149 if(++i == rx_ring->count) i = 0;
2150 buffer_info = &rx_ring->buffer_info[i];
2151 }
2152
1dfdd7df
AK		 2153 if (likely(rx_ring->next_to_use != i)) {
2154 rx_ring->next_to_use = i;
2155 if (unlikely(i-- == 0))
2156 i = (rx_ring->count - 1);
2157
2158 /* Force memory writes to complete before letting h/w
2159 * know there are new descriptors to fetch. (Only
2160 * applicable for weak-ordered memory model archs, such
2161 * as IA-64). */
2162 wmb();
2163 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2164 }
1da177e4
LT		 2165}
2166
2167/**
2168 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2169 *
2170 * @param netdev network interface device structure
2171 * @param grp indicates to enable or disable tagging/stripping
2172 **/
2173static void
2174ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2175{
8908c6cd 2176 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2177 uint32_t ctrl, rctl;
2178
2179 ixgb_irq_disable(adapter);
2180 adapter->vlgrp = grp;
2181
2182 if(grp) {
2183 /* enable VLAN tag insert/strip */
2184 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2185 ctrl |= IXGB_CTRL0_VME;
2186 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2187
2188 /* enable VLAN receive filtering */
2189
2190 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2191 rctl |= IXGB_RCTL_VFE;
2192 rctl &= ~IXGB_RCTL_CFIEN;
2193 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2194 } else {
2195 /* disable VLAN tag insert/strip */
2196
2197 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2198 ctrl &= ~IXGB_CTRL0_VME;
2199 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2200
2201 /* disable VLAN filtering */
2202
2203 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2204 rctl &= ~IXGB_RCTL_VFE;
2205 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2206 }
2207
bab2bce7
JB		 2208 /* don't enable interrupts unless we are UP */
2209 if (adapter->netdev->flags & IFF_UP)
2210 ixgb_irq_enable(adapter);
1da177e4
LT		 2211}
2212
2213static void
2214ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2215{
8908c6cd 2216 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2217 uint32_t vfta, index;
2218
2219 /* add VID to filter table */
2220
2221 index = (vid >> 5) & 0x7F;
2222 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2223 vfta |= (1 << (vid & 0x1F));
2224 ixgb_write_vfta(&adapter->hw, index, vfta);
2225}
2226
2227static void
2228ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2229{
8908c6cd 2230 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2231 uint32_t vfta, index;
2232
2233 ixgb_irq_disable(adapter);
2234
5c15bdec 2235 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1da177e4 2236
bab2bce7
JB		 2237 /* don't enable interrupts unless we are UP */
2238 if (adapter->netdev->flags & IFF_UP)
2239 ixgb_irq_enable(adapter);
1da177e4 2240
bab2bce7 2241 /* remove VID from filter table */
1da177e4
LT		 2242
2243 index = (vid >> 5) & 0x7F;
2244 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2245 vfta &= ~(1 << (vid & 0x1F));
2246 ixgb_write_vfta(&adapter->hw, index, vfta);
2247}
2248
2249static void
2250ixgb_restore_vlan(struct ixgb_adapter *adapter)
2251{
2252 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2253
2254 if(adapter->vlgrp) {
2255 uint16_t vid;
2256 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 2257 if(!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 2258 continue;
2259 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2260 }
2261 }
2262}
2263
1da177e4
LT		 2264#ifdef CONFIG_NET_POLL_CONTROLLER
2265/*
2266 * Polling 'interrupt' - used by things like netconsole to send skbs
2267 * without having to re-enable interrupts. It's not called while
2268 * the interrupt routine is executing.
2269 */
2270
2271static void ixgb_netpoll(struct net_device *dev)
2272{
f990b426 2273 struct ixgb_adapter *adapter = netdev_priv(dev);
ac79c82e 2274
1da177e4 2275 disable_irq(adapter->pdev->irq);
7d12e780 2276 ixgb_intr(adapter->pdev->irq, dev);
1da177e4
LT		 2277 enable_irq(adapter->pdev->irq);
2278}
2279#endif
2280
01748fbb
LV		 2281/**
2282 * ixgb_io_error_detected() - called when PCI error is detected
2283 * @pdev pointer to pci device with error
2284 * @state pci channel state after error
2285 *
2286 * This callback is called by the PCI subsystem whenever
2287 * a PCI bus error is detected.
2288 */
2289static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
2290 enum pci_channel_state state)
2291{
2292 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2293 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV		 2294
2295 if(netif_running(netdev))
2296 ixgb_down(adapter, TRUE);
2297
2298 pci_disable_device(pdev);
2299
2300 /* Request a slot reset. */
2301 return PCI_ERS_RESULT_NEED_RESET;
2302}
2303
2304/**
2305 * ixgb_io_slot_reset - called after the pci bus has been reset.
2306 * @pdev pointer to pci device with error
2307 *
2308 * This callback is called after the PCI buss has been reset.
2309 * Basically, this tries to restart the card from scratch.
2310 * This is a shortened version of the device probe/discovery code,
2311 * it resembles the first-half of the ixgb_probe() routine.
2312 */
2313static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
2314{
2315 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2316 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV		 2317
2318 if(pci_enable_device(pdev)) {
2319 DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
2320 return PCI_ERS_RESULT_DISCONNECT;
2321 }
2322
2323 /* Perform card reset only on one instance of the card */
2324 if (0 != PCI_FUNC (pdev->devfn))
2325 return PCI_ERS_RESULT_RECOVERED;
2326
2327 pci_set_master(pdev);
2328
2329 netif_carrier_off(netdev);
2330 netif_stop_queue(netdev);
2331 ixgb_reset(adapter);
2332
2333 /* Make sure the EEPROM is good */
2334 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
2335 DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
2336 return PCI_ERS_RESULT_DISCONNECT;
2337 }
2338 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
2339 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
2340
2341 if(!is_valid_ether_addr(netdev->perm_addr)) {
2342 DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
2343 return PCI_ERS_RESULT_DISCONNECT;
2344 }
2345
2346 return PCI_ERS_RESULT_RECOVERED;
2347}
2348
2349/**
2350 * ixgb_io_resume - called when its OK to resume normal operations
2351 * @pdev pointer to pci device with error
2352 *
2353 * The error recovery driver tells us that its OK to resume
2354 * normal operation. Implementation resembles the second-half
2355 * of the ixgb_probe() routine.
2356 */
2357static void ixgb_io_resume (struct pci_dev *pdev)
2358{
2359 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2360 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV		 2361
2362 pci_set_master(pdev);
2363
2364 if(netif_running(netdev)) {
2365 if(ixgb_up(adapter)) {
2366 printk ("ixgb: can't bring device back up after reset\n");
2367 return;
2368 }
2369 }
2370
2371 netif_device_attach(netdev);
2372 mod_timer(&adapter->watchdog_timer, jiffies);
2373}
2374
1da177e4 2375/* ixgb_main.c */
Linux kernel - Deliverables
This page took 0.500915 seconds and 5 git commands to generate.