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ixgb: remove hardcoded number
[deliverable/linux.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
31/* Change Log
ab707da7
MC		 32 * 1.0.96 04/19/05
33 * - Make needlessly global code static -- bunk@stusta.de
34 * - ethtool cleanup -- shemminger@osdl.org
35 * - Support for MODULE_VERSION -- linville@tuxdriver.com
36 * - add skb_header_cloned check to the tso path -- herbert@apana.org.au
1da177e4
LT		 37 * 1.0.88 01/05/05
38 * - include fix to the condition that determines when to quit NAPI - Robert Olsson
39 * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
40 * 1.0.84 10/26/04
41 * - reset buffer_info->dma in Tx resource cleanup logic
42 * 1.0.83 10/12/04
43 * - sparse cleanup - shemminger@osdl.org
44 * - fix tx resource cleanup logic
45 */
46
47char ixgb_driver_name[] = "ixgb";
e9ab1d14 48static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT		 49
50#ifndef CONFIG_IXGB_NAPI
51#define DRIVERNAPI
52#else
53#define DRIVERNAPI "-NAPI"
54#endif
ab707da7 55#define DRV_VERSION "1.0.100-k2"DRIVERNAPI
01e5abc2 56char ixgb_driver_version[] = DRV_VERSION;
ab707da7 57static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 58
59/* ixgb_pci_tbl - PCI Device ID Table
60 *
61 * Wildcard entries (PCI_ANY_ID) should come last
62 * Last entry must be all 0s
63 *
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
66 */
67static struct pci_device_id ixgb_pci_tbl[] = {
68 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
69 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK		 70 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
71 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT		 72 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
73 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
74 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
75 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
76
77 /* required last entry */
78 {0,}
79};
80
81MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
82
83/* Local Function Prototypes */
84
85int ixgb_up(struct ixgb_adapter *adapter);
86void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
87void ixgb_reset(struct ixgb_adapter *adapter);
88int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
89int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
90void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
91void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
92void ixgb_update_stats(struct ixgb_adapter *adapter);
93
94static int ixgb_init_module(void);
95static void ixgb_exit_module(void);
96static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
97static void __devexit ixgb_remove(struct pci_dev *pdev);
98static int ixgb_sw_init(struct ixgb_adapter *adapter);
99static int ixgb_open(struct net_device *netdev);
100static int ixgb_close(struct net_device *netdev);
101static void ixgb_configure_tx(struct ixgb_adapter *adapter);
102static void ixgb_configure_rx(struct ixgb_adapter *adapter);
103static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
104static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
105static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
106static void ixgb_set_multi(struct net_device *netdev);
107static void ixgb_watchdog(unsigned long data);
108static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
109static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
110static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
111static int ixgb_set_mac(struct net_device *netdev, void *p);
112static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
113static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 114
1da177e4
LT		 115#ifdef CONFIG_IXGB_NAPI
116static int ixgb_clean(struct net_device *netdev, int *budget);
117static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
118 int *work_done, int work_to_do);
119#else
120static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
121#endif
122static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
123void ixgb_set_ethtool_ops(struct net_device *netdev);
124static void ixgb_tx_timeout(struct net_device *dev);
125static void ixgb_tx_timeout_task(struct net_device *dev);
126static void ixgb_vlan_rx_register(struct net_device *netdev,
127 struct vlan_group *grp);
128static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
129static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
130static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
131
1da177e4
LT		 132#ifdef CONFIG_NET_POLL_CONTROLLER
133/* for netdump / net console */
134static void ixgb_netpoll(struct net_device *dev);
135#endif
136
1da177e4
LT		 137/* Exported from other modules */
138
139extern void ixgb_check_options(struct ixgb_adapter *adapter);
140
141static struct pci_driver ixgb_driver = {
c2eba932 142 .name = ixgb_driver_name,
1da177e4 143 .id_table = ixgb_pci_tbl,
c2eba932
MC		 144 .probe = ixgb_probe,
145 .remove = __devexit_p(ixgb_remove),
1da177e4
LT		 146};
147
148MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
149MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
150MODULE_LICENSE("GPL");
01e5abc2 151MODULE_VERSION(DRV_VERSION);
1da177e4
LT		 152
153/* some defines for controlling descriptor fetches in h/w */
1da177e4 154#define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
9c15d24f
MC		 155#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
156 * this */
157#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
158 * is pushed this many descriptors
159 * from head */
1da177e4
LT		 160
161/**
162 * ixgb_init_module - Driver Registration Routine
163 *
164 * ixgb_init_module is the first routine called when the driver is
165 * loaded. All it does is register with the PCI subsystem.
166 **/
167
168static int __init
169ixgb_init_module(void)
170{
1da177e4
LT		 171 printk(KERN_INFO "%s - version %s\n",
172 ixgb_driver_string, ixgb_driver_version);
173
174 printk(KERN_INFO "%s\n", ixgb_copyright);
175
c2eba932 176 return pci_module_init(&ixgb_driver);
1da177e4
LT		 177}
178
179module_init(ixgb_init_module);
180
181/**
182 * ixgb_exit_module - Driver Exit Cleanup Routine
183 *
184 * ixgb_exit_module is called just before the driver is removed
185 * from memory.
186 **/
187
188static void __exit
189ixgb_exit_module(void)
190{
1da177e4
LT		 191 pci_unregister_driver(&ixgb_driver);
192}
193
194module_exit(ixgb_exit_module);
195
196/**
197 * ixgb_irq_disable - Mask off interrupt generation on the NIC
198 * @adapter: board private structure
199 **/
200
201static inline void
202ixgb_irq_disable(struct ixgb_adapter *adapter)
203{
204 atomic_inc(&adapter->irq_sem);
205 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
206 IXGB_WRITE_FLUSH(&adapter->hw);
207 synchronize_irq(adapter->pdev->irq);
208}
209
210/**
211 * ixgb_irq_enable - Enable default interrupt generation settings
212 * @adapter: board private structure
213 **/
214
215static inline void
216ixgb_irq_enable(struct ixgb_adapter *adapter)
217{
218 if(atomic_dec_and_test(&adapter->irq_sem)) {
219 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC		 220 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
221 IXGB_INT_LSC);
1da177e4
LT		 222 IXGB_WRITE_FLUSH(&adapter->hw);
223 }
224}
225
226int
227ixgb_up(struct ixgb_adapter *adapter)
228{
229 struct net_device *netdev = adapter->netdev;
230 int err;
231 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
232 struct ixgb_hw *hw = &adapter->hw;
233
234 /* hardware has been reset, we need to reload some things */
235
236 ixgb_set_multi(netdev);
237
238 ixgb_restore_vlan(adapter);
239
240 ixgb_configure_tx(adapter);
241 ixgb_setup_rctl(adapter);
242 ixgb_configure_rx(adapter);
243 ixgb_alloc_rx_buffers(adapter);
244
245#ifdef CONFIG_PCI_MSI
246 {
247 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
248 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
249 adapter->have_msi = TRUE;
250
251 if (!pcix)
252 adapter->have_msi = FALSE;
253 else if((err = pci_enable_msi(adapter->pdev))) {
254 printk (KERN_ERR
255 "Unable to allocate MSI interrupt Error: %d\n", err);
256 adapter->have_msi = FALSE;
257 /* proceed to try to request regular interrupt */
258 }
259 }
260
261#endif
262 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
263 SA_SHIRQ | SA_SAMPLE_RANDOM,
264 netdev->name, netdev)))
265 return err;
266
267 /* disable interrupts and get the hardware into a known state */
268 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
269
270 if((hw->max_frame_size != max_frame) ||
271 (hw->max_frame_size !=
272 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
273
274 hw->max_frame_size = max_frame;
275
276 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
277
278 if(hw->max_frame_size >
279 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
280 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
281
282 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
283 ctrl0 |= IXGB_CTRL0_JFE;
284 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
285 }
286 }
287 }
288
289 mod_timer(&adapter->watchdog_timer, jiffies);
290 ixgb_irq_enable(adapter);
291
292#ifdef CONFIG_IXGB_NAPI
293 netif_poll_enable(netdev);
294#endif
295 return 0;
296}
297
298void
299ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
300{
301 struct net_device *netdev = adapter->netdev;
302
303 ixgb_irq_disable(adapter);
304 free_irq(adapter->pdev->irq, netdev);
305#ifdef CONFIG_PCI_MSI
306 if(adapter->have_msi == TRUE)
307 pci_disable_msi(adapter->pdev);
308
309#endif
310 if(kill_watchdog)
311 del_timer_sync(&adapter->watchdog_timer);
312#ifdef CONFIG_IXGB_NAPI
313 netif_poll_disable(netdev);
314#endif
315 adapter->link_speed = 0;
316 adapter->link_duplex = 0;
317 netif_carrier_off(netdev);
318 netif_stop_queue(netdev);
319
320 ixgb_reset(adapter);
321 ixgb_clean_tx_ring(adapter);
322 ixgb_clean_rx_ring(adapter);
323}
324
325void
326ixgb_reset(struct ixgb_adapter *adapter)
327{
328
329 ixgb_adapter_stop(&adapter->hw);
330 if(!ixgb_init_hw(&adapter->hw))
331 IXGB_DBG("ixgb_init_hw failed.\n");
332}
333
334/**
335 * ixgb_probe - Device Initialization Routine
336 * @pdev: PCI device information struct
337 * @ent: entry in ixgb_pci_tbl
338 *
339 * Returns 0 on success, negative on failure
340 *
341 * ixgb_probe initializes an adapter identified by a pci_dev structure.
342 * The OS initialization, configuring of the adapter private structure,
343 * and a hardware reset occur.
344 **/
345
346static int __devinit
347ixgb_probe(struct pci_dev *pdev,
348 const struct pci_device_id *ent)
349{
350 struct net_device *netdev = NULL;
351 struct ixgb_adapter *adapter;
352 static int cards_found = 0;
353 unsigned long mmio_start;
354 int mmio_len;
355 int pci_using_dac;
356 int i;
357 int err;
358
359 if((err = pci_enable_device(pdev)))
360 return err;
361
c91e468a
AS		 362 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
363 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 364 pci_using_dac = 1;
365 } else {
c91e468a
AS		 366 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
367 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 368 IXGB_ERR("No usable DMA configuration, aborting\n");
c91e468a 369 goto err_dma_mask;
1da177e4
LT		 370 }
371 pci_using_dac = 0;
372 }
373
374 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 375 goto err_request_regions;
1da177e4
LT		 376
377 pci_set_master(pdev);
378
379 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
380 if(!netdev) {
381 err = -ENOMEM;
382 goto err_alloc_etherdev;
383 }
384
385 SET_MODULE_OWNER(netdev);
386 SET_NETDEV_DEV(netdev, &pdev->dev);
387
388 pci_set_drvdata(pdev, netdev);
8908c6cd 389 adapter = netdev_priv(netdev);
1da177e4
LT		 390 adapter->netdev = netdev;
391 adapter->pdev = pdev;
392 adapter->hw.back = adapter;
393
394 mmio_start = pci_resource_start(pdev, BAR_0);
395 mmio_len = pci_resource_len(pdev, BAR_0);
396
397 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
398 if(!adapter->hw.hw_addr) {
399 err = -EIO;
400 goto err_ioremap;
401 }
402
403 for(i = BAR_1; i <= BAR_5; i++) {
404 if(pci_resource_len(pdev, i) == 0)
405 continue;
406 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
407 adapter->hw.io_base = pci_resource_start(pdev, i);
408 break;
409 }
410 }
411
412 netdev->open = &ixgb_open;
413 netdev->stop = &ixgb_close;
414 netdev->hard_start_xmit = &ixgb_xmit_frame;
415 netdev->get_stats = &ixgb_get_stats;
416 netdev->set_multicast_list = &ixgb_set_multi;
417 netdev->set_mac_address = &ixgb_set_mac;
418 netdev->change_mtu = &ixgb_change_mtu;
419 ixgb_set_ethtool_ops(netdev);
420 netdev->tx_timeout = &ixgb_tx_timeout;
421 netdev->watchdog_timeo = HZ;
422#ifdef CONFIG_IXGB_NAPI
423 netdev->poll = &ixgb_clean;
424 netdev->weight = 64;
425#endif
426 netdev->vlan_rx_register = ixgb_vlan_rx_register;
427 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
428 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
429#ifdef CONFIG_NET_POLL_CONTROLLER
430 netdev->poll_controller = ixgb_netpoll;
431#endif
432
433 netdev->mem_start = mmio_start;
434 netdev->mem_end = mmio_start + mmio_len;
435 netdev->base_addr = adapter->hw.io_base;
436
437 adapter->bd_number = cards_found;
438 adapter->link_speed = 0;
439 adapter->link_duplex = 0;
440
441 /* setup the private structure */
442
443 if((err = ixgb_sw_init(adapter)))
444 goto err_sw_init;
445
446 netdev->features = NETIF_F_SG |
447 NETIF_F_HW_CSUM |
448 NETIF_F_HW_VLAN_TX |
449 NETIF_F_HW_VLAN_RX |
450 NETIF_F_HW_VLAN_FILTER;
451#ifdef NETIF_F_TSO
452 netdev->features |= NETIF_F_TSO;
453#endif
f017f14b
AK		 454#ifdef NETIF_F_LLTX
455 netdev->features |= NETIF_F_LLTX;
456#endif
1da177e4
LT		 457
458 if(pci_using_dac)
459 netdev->features |= NETIF_F_HIGHDMA;
460
461 /* make sure the EEPROM is good */
462
463 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
464 printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n");
465 err = -EIO;
466 goto err_eeprom;
467 }
468
469 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 470 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 471
df859c51 472 if(!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 473 err = -EIO;
474 goto err_eeprom;
475 }
476
477 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
478
479 init_timer(&adapter->watchdog_timer);
480 adapter->watchdog_timer.function = &ixgb_watchdog;
481 adapter->watchdog_timer.data = (unsigned long)adapter;
482
483 INIT_WORK(&adapter->tx_timeout_task,
484 (void (*)(void *))ixgb_tx_timeout_task, netdev);
485
486 if((err = register_netdev(netdev)))
487 goto err_register;
488
489 /* we're going to reset, so assume we have no link for now */
490
491 netif_carrier_off(netdev);
492 netif_stop_queue(netdev);
493
494 printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n",
495 netdev->name);
496 ixgb_check_options(adapter);
497 /* reset the hardware with the new settings */
498
499 ixgb_reset(adapter);
500
501 cards_found++;
502 return 0;
503
504err_register:
505err_sw_init:
506err_eeprom:
507 iounmap(adapter->hw.hw_addr);
508err_ioremap:
509 free_netdev(netdev);
510err_alloc_etherdev:
511 pci_release_regions(pdev);
c91e468a
AS		 512err_request_regions:
513err_dma_mask:
514 pci_disable_device(pdev);
1da177e4
LT		 515 return err;
516}
517
518/**
519 * ixgb_remove - Device Removal Routine
520 * @pdev: PCI device information struct
521 *
522 * ixgb_remove is called by the PCI subsystem to alert the driver
523 * that it should release a PCI device. The could be caused by a
524 * Hot-Plug event, or because the driver is going to be removed from
525 * memory.
526 **/
527
528static void __devexit
529ixgb_remove(struct pci_dev *pdev)
530{
531 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 532 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 533
534 unregister_netdev(netdev);
535
536 iounmap(adapter->hw.hw_addr);
537 pci_release_regions(pdev);
538
539 free_netdev(netdev);
540}
541
542/**
543 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
544 * @adapter: board private structure to initialize
545 *
546 * ixgb_sw_init initializes the Adapter private data structure.
547 * Fields are initialized based on PCI device information and
548 * OS network device settings (MTU size).
549 **/
550
551static int __devinit
552ixgb_sw_init(struct ixgb_adapter *adapter)
553{
554 struct ixgb_hw *hw = &adapter->hw;
555 struct net_device *netdev = adapter->netdev;
556 struct pci_dev *pdev = adapter->pdev;
557
558 /* PCI config space info */
559
560 hw->vendor_id = pdev->vendor;
561 hw->device_id = pdev->device;
562 hw->subsystem_vendor_id = pdev->subsystem_vendor;
563 hw->subsystem_id = pdev->subsystem_device;
564
565 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
566
567 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
568
569 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK		 570 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
571 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
572 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT		 573 hw->mac_type = ixgb_82597;
574 else {
575 /* should never have loaded on this device */
576 printk(KERN_ERR "ixgb: unsupported device id\n");
577 }
578
579 /* enable flow control to be programmed */
580 hw->fc.send_xon = 1;
581
582 atomic_set(&adapter->irq_sem, 1);
583 spin_lock_init(&adapter->tx_lock);
584
585 return 0;
586}
587
588/**
589 * ixgb_open - Called when a network interface is made active
590 * @netdev: network interface device structure
591 *
592 * Returns 0 on success, negative value on failure
593 *
594 * The open entry point is called when a network interface is made
595 * active by the system (IFF_UP). At this point all resources needed
596 * for transmit and receive operations are allocated, the interrupt
597 * handler is registered with the OS, the watchdog timer is started,
598 * and the stack is notified that the interface is ready.
599 **/
600
601static int
602ixgb_open(struct net_device *netdev)
603{
8908c6cd 604 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 605 int err;
606
607 /* allocate transmit descriptors */
608
609 if((err = ixgb_setup_tx_resources(adapter)))
610 goto err_setup_tx;
611
612 /* allocate receive descriptors */
613
614 if((err = ixgb_setup_rx_resources(adapter)))
615 goto err_setup_rx;
616
617 if((err = ixgb_up(adapter)))
618 goto err_up;
619
620 return 0;
621
622err_up:
623 ixgb_free_rx_resources(adapter);
624err_setup_rx:
625 ixgb_free_tx_resources(adapter);
626err_setup_tx:
627 ixgb_reset(adapter);
628
629 return err;
630}
631
632/**
633 * ixgb_close - Disables a network interface
634 * @netdev: network interface device structure
635 *
636 * Returns 0, this is not allowed to fail
637 *
638 * The close entry point is called when an interface is de-activated
639 * by the OS. The hardware is still under the drivers control, but
640 * needs to be disabled. A global MAC reset is issued to stop the
641 * hardware, and all transmit and receive resources are freed.
642 **/
643
644static int
645ixgb_close(struct net_device *netdev)
646{
8908c6cd 647 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 648
649 ixgb_down(adapter, TRUE);
650
651 ixgb_free_tx_resources(adapter);
652 ixgb_free_rx_resources(adapter);
653
654 return 0;
655}
656
657/**
658 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
659 * @adapter: board private structure
660 *
661 * Return 0 on success, negative on failure
662 **/
663
664int
665ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
666{
667 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
668 struct pci_dev *pdev = adapter->pdev;
669 int size;
670
671 size = sizeof(struct ixgb_buffer) * txdr->count;
672 txdr->buffer_info = vmalloc(size);
673 if(!txdr->buffer_info) {
674 return -ENOMEM;
675 }
676 memset(txdr->buffer_info, 0, size);
677
678 /* round up to nearest 4K */
679
680 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
681 IXGB_ROUNDUP(txdr->size, 4096);
682
683 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
684 if(!txdr->desc) {
685 vfree(txdr->buffer_info);
686 return -ENOMEM;
687 }
688 memset(txdr->desc, 0, txdr->size);
689
690 txdr->next_to_use = 0;
691 txdr->next_to_clean = 0;
692
693 return 0;
694}
695
696/**
697 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
698 * @adapter: board private structure
699 *
700 * Configure the Tx unit of the MAC after a reset.
701 **/
702
703static void
704ixgb_configure_tx(struct ixgb_adapter *adapter)
705{
706 uint64_t tdba = adapter->tx_ring.dma;
707 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
708 uint32_t tctl;
709 struct ixgb_hw *hw = &adapter->hw;
710
711 /* Setup the Base and Length of the Tx Descriptor Ring
712 * tx_ring.dma can be either a 32 or 64 bit value
713 */
714
715 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
716 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
717
718 IXGB_WRITE_REG(hw, TDLEN, tdlen);
719
720 /* Setup the HW Tx Head and Tail descriptor pointers */
721
722 IXGB_WRITE_REG(hw, TDH, 0);
723 IXGB_WRITE_REG(hw, TDT, 0);
724
725 /* don't set up txdctl, it induces performance problems if configured
726 * incorrectly */
727 /* Set the Tx Interrupt Delay register */
728
729 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
730
731 /* Program the Transmit Control Register */
732
733 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
734 IXGB_WRITE_REG(hw, TCTL, tctl);
735
736 /* Setup Transmit Descriptor Settings for this adapter */
737 adapter->tx_cmd_type =
738 IXGB_TX_DESC_TYPE
739 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
740}
741
742/**
743 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
744 * @adapter: board private structure
745 *
746 * Returns 0 on success, negative on failure
747 **/
748
749int
750ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
751{
752 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
753 struct pci_dev *pdev = adapter->pdev;
754 int size;
755
756 size = sizeof(struct ixgb_buffer) * rxdr->count;
757 rxdr->buffer_info = vmalloc(size);
758 if(!rxdr->buffer_info) {
759 return -ENOMEM;
760 }
761 memset(rxdr->buffer_info, 0, size);
762
763 /* Round up to nearest 4K */
764
765 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
766 IXGB_ROUNDUP(rxdr->size, 4096);
767
768 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
769
770 if(!rxdr->desc) {
771 vfree(rxdr->buffer_info);
772 return -ENOMEM;
773 }
774 memset(rxdr->desc, 0, rxdr->size);
775
776 rxdr->next_to_clean = 0;
777 rxdr->next_to_use = 0;
778
779 return 0;
780}
781
782/**
783 * ixgb_setup_rctl - configure the receive control register
784 * @adapter: Board private structure
785 **/
786
787static void
788ixgb_setup_rctl(struct ixgb_adapter *adapter)
789{
790 uint32_t rctl;
791
792 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
793
794 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
795
796 rctl |=
797 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
798 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
799 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
800
801 rctl |= IXGB_RCTL_SECRC;
802
803 switch (adapter->rx_buffer_len) {
804 case IXGB_RXBUFFER_2048:
805 default:
806 rctl |= IXGB_RCTL_BSIZE_2048;
807 break;
808 case IXGB_RXBUFFER_4096:
809 rctl |= IXGB_RCTL_BSIZE_4096;
810 break;
811 case IXGB_RXBUFFER_8192:
812 rctl |= IXGB_RCTL_BSIZE_8192;
813 break;
814 case IXGB_RXBUFFER_16384:
815 rctl |= IXGB_RCTL_BSIZE_16384;
816 break;
817 }
818
819 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
820}
821
822/**
823 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
824 * @adapter: board private structure
825 *
826 * Configure the Rx unit of the MAC after a reset.
827 **/
828
829static void
830ixgb_configure_rx(struct ixgb_adapter *adapter)
831{
832 uint64_t rdba = adapter->rx_ring.dma;
833 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
834 struct ixgb_hw *hw = &adapter->hw;
835 uint32_t rctl;
836 uint32_t rxcsum;
837 uint32_t rxdctl;
838
839 /* make sure receives are disabled while setting up the descriptors */
840
841 rctl = IXGB_READ_REG(hw, RCTL);
842 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
843
844 /* set the Receive Delay Timer Register */
845
846 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
847
848 /* Setup the Base and Length of the Rx Descriptor Ring */
849
850 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
851 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
852
853 IXGB_WRITE_REG(hw, RDLEN, rdlen);
854
855 /* Setup the HW Rx Head and Tail Descriptor Pointers */
856 IXGB_WRITE_REG(hw, RDH, 0);
857 IXGB_WRITE_REG(hw, RDT, 0);
858
859 /* set up pre-fetching of receive buffers so we get some before we
860 * run out (default hardware behavior is to run out before fetching
861 * more). This sets up to fetch if HTHRESH rx descriptors are avail
862 * and the descriptors in hw cache are below PTHRESH. This avoids
863 * the hardware behavior of fetching <=512 descriptors in a single
864 * burst that pre-empts all other activity, usually causing fifo
865 * overflows. */
866 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
867 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
868 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
869 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
870 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
871
872 /* Enable Receive Checksum Offload for TCP and UDP */
873 if(adapter->rx_csum == TRUE) {
874 rxcsum = IXGB_READ_REG(hw, RXCSUM);
875 rxcsum |= IXGB_RXCSUM_TUOFL;
876 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
877 }
878
879 /* Enable Receives */
880
881 IXGB_WRITE_REG(hw, RCTL, rctl);
882}
883
884/**
885 * ixgb_free_tx_resources - Free Tx Resources
886 * @adapter: board private structure
887 *
888 * Free all transmit software resources
889 **/
890
891void
892ixgb_free_tx_resources(struct ixgb_adapter *adapter)
893{
894 struct pci_dev *pdev = adapter->pdev;
895
896 ixgb_clean_tx_ring(adapter);
897
898 vfree(adapter->tx_ring.buffer_info);
899 adapter->tx_ring.buffer_info = NULL;
900
901 pci_free_consistent(pdev, adapter->tx_ring.size,
902 adapter->tx_ring.desc, adapter->tx_ring.dma);
903
904 adapter->tx_ring.desc = NULL;
905}
906
907static inline void
908ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
909 struct ixgb_buffer *buffer_info)
910{
911 struct pci_dev *pdev = adapter->pdev;
912 if(buffer_info->dma) {
913 pci_unmap_page(pdev,
914 buffer_info->dma,
915 buffer_info->length,
916 PCI_DMA_TODEVICE);
917 buffer_info->dma = 0;
918 }
919 if(buffer_info->skb) {
920 dev_kfree_skb_any(buffer_info->skb);
921 buffer_info->skb = NULL;
922 }
923}
924
925/**
926 * ixgb_clean_tx_ring - Free Tx Buffers
927 * @adapter: board private structure
928 **/
929
930static void
931ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
932{
933 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
934 struct ixgb_buffer *buffer_info;
935 unsigned long size;
936 unsigned int i;
937
938 /* Free all the Tx ring sk_buffs */
939
940 for(i = 0; i < tx_ring->count; i++) {
941 buffer_info = &tx_ring->buffer_info[i];
942 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
943 }
944
945 size = sizeof(struct ixgb_buffer) * tx_ring->count;
946 memset(tx_ring->buffer_info, 0, size);
947
948 /* Zero out the descriptor ring */
949
950 memset(tx_ring->desc, 0, tx_ring->size);
951
952 tx_ring->next_to_use = 0;
953 tx_ring->next_to_clean = 0;
954
955 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
956 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
957}
958
959/**
960 * ixgb_free_rx_resources - Free Rx Resources
961 * @adapter: board private structure
962 *
963 * Free all receive software resources
964 **/
965
966void
967ixgb_free_rx_resources(struct ixgb_adapter *adapter)
968{
969 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
970 struct pci_dev *pdev = adapter->pdev;
971
972 ixgb_clean_rx_ring(adapter);
973
974 vfree(rx_ring->buffer_info);
975 rx_ring->buffer_info = NULL;
976
977 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
978
979 rx_ring->desc = NULL;
980}
981
982/**
983 * ixgb_clean_rx_ring - Free Rx Buffers
984 * @adapter: board private structure
985 **/
986
987static void
988ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
989{
990 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
991 struct ixgb_buffer *buffer_info;
992 struct pci_dev *pdev = adapter->pdev;
993 unsigned long size;
994 unsigned int i;
995
996 /* Free all the Rx ring sk_buffs */
997
998 for(i = 0; i < rx_ring->count; i++) {
999 buffer_info = &rx_ring->buffer_info[i];
1000 if(buffer_info->skb) {
1001
1002 pci_unmap_single(pdev,
1003 buffer_info->dma,
1004 buffer_info->length,
1005 PCI_DMA_FROMDEVICE);
1006
1007 dev_kfree_skb(buffer_info->skb);
1008
1009 buffer_info->skb = NULL;
1010 }
1011 }
1012
1013 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1014 memset(rx_ring->buffer_info, 0, size);
1015
1016 /* Zero out the descriptor ring */
1017
1018 memset(rx_ring->desc, 0, rx_ring->size);
1019
1020 rx_ring->next_to_clean = 0;
1021 rx_ring->next_to_use = 0;
1022
1023 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1024 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1025}
1026
1027/**
1028 * ixgb_set_mac - Change the Ethernet Address of the NIC
1029 * @netdev: network interface device structure
1030 * @p: pointer to an address structure
1031 *
1032 * Returns 0 on success, negative on failure
1033 **/
1034
1035static int
1036ixgb_set_mac(struct net_device *netdev, void *p)
1037{
8908c6cd 1038 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1039 struct sockaddr *addr = p;
1040
1041 if(!is_valid_ether_addr(addr->sa_data))
1042 return -EADDRNOTAVAIL;
1043
1044 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1045
1046 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1047
1048 return 0;
1049}
1050
1051/**
1052 * ixgb_set_multi - Multicast and Promiscuous mode set
1053 * @netdev: network interface device structure
1054 *
1055 * The set_multi entry point is called whenever the multicast address
1056 * list or the network interface flags are updated. This routine is
1057 * responsible for configuring the hardware for proper multicast,
1058 * promiscuous mode, and all-multi behavior.
1059 **/
1060
1061static void
1062ixgb_set_multi(struct net_device *netdev)
1063{
8908c6cd 1064 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1065 struct ixgb_hw *hw = &adapter->hw;
1066 struct dev_mc_list *mc_ptr;
1067 uint32_t rctl;
1068 int i;
1069
1070 /* Check for Promiscuous and All Multicast modes */
1071
1072 rctl = IXGB_READ_REG(hw, RCTL);
1073
1074 if(netdev->flags & IFF_PROMISC) {
1075 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1076 } else if(netdev->flags & IFF_ALLMULTI) {
1077 rctl |= IXGB_RCTL_MPE;
1078 rctl &= ~IXGB_RCTL_UPE;
1079 } else {
1080 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1081 }
1082
1083 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1084 rctl |= IXGB_RCTL_MPE;
1085 IXGB_WRITE_REG(hw, RCTL, rctl);
1086 } else {
1087 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1088
1089 IXGB_WRITE_REG(hw, RCTL, rctl);
1090
1091 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1092 i++, mc_ptr = mc_ptr->next)
1093 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1094 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1095
1096 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1097 }
1098}
1099
1100/**
1101 * ixgb_watchdog - Timer Call-back
1102 * @data: pointer to netdev cast into an unsigned long
1103 **/
1104
1105static void
1106ixgb_watchdog(unsigned long data)
1107{
1108 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1109 struct net_device *netdev = adapter->netdev;
1110 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1111
1112 ixgb_check_for_link(&adapter->hw);
1113
1114 if (ixgb_check_for_bad_link(&adapter->hw)) {
1115 /* force the reset path */
1116 netif_stop_queue(netdev);
1117 }
1118
1119 if(adapter->hw.link_up) {
1120 if(!netif_carrier_ok(netdev)) {
1121 printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n",
1122 netdev->name, 10000, "Full Duplex");
1123 adapter->link_speed = 10000;
1124 adapter->link_duplex = FULL_DUPLEX;
1125 netif_carrier_on(netdev);
1126 netif_wake_queue(netdev);
1127 }
1128 } else {
1129 if(netif_carrier_ok(netdev)) {
1130 adapter->link_speed = 0;
1131 adapter->link_duplex = 0;
1132 printk(KERN_INFO
1133 "ixgb: %s NIC Link is Down\n",
1134 netdev->name);
1135 netif_carrier_off(netdev);
1136 netif_stop_queue(netdev);
1137
1138 }
1139 }
1140
1141 ixgb_update_stats(adapter);
1142
1143 if(!netif_carrier_ok(netdev)) {
1144 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1145 /* We've lost link, so the controller stops DMA,
1146 * but we've got queued Tx work that's never going
1147 * to get done, so reset controller to flush Tx.
1148 * (Do the reset outside of interrupt context). */
1149 schedule_work(&adapter->tx_timeout_task);
1150 }
1151 }
1152
1153 /* Force detection of hung controller every watchdog period */
1154 adapter->detect_tx_hung = TRUE;
1155
1156 /* generate an interrupt to force clean up of any stragglers */
1157 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1158
1159 /* Reset the timer */
1160 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1161}
1162
1163#define IXGB_TX_FLAGS_CSUM 0x00000001
1164#define IXGB_TX_FLAGS_VLAN 0x00000002
1165#define IXGB_TX_FLAGS_TSO 0x00000004
1166
1167static inline int
1168ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1169{
1170#ifdef NETIF_F_TSO
1171 struct ixgb_context_desc *context_desc;
1172 unsigned int i;
1173 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1174 uint16_t ipcse, tucse, mss;
1175 int err;
1176
1177 if(likely(skb_shinfo(skb)->tso_size)) {
1178 if (skb_header_cloned(skb)) {
1179 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1180 if (err)
1181 return err;
1182 }
1183
1184 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
1185 mss = skb_shinfo(skb)->tso_size;
1186 skb->nh.iph->tot_len = 0;
1187 skb->nh.iph->check = 0;
1188 skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
1189 skb->nh.iph->daddr,
1190 0, IPPROTO_TCP, 0);
1191 ipcss = skb->nh.raw - skb->data;
1192 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1193 ipcse = skb->h.raw - skb->data - 1;
1194 tucss = skb->h.raw - skb->data;
1195 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1196 tucse = 0;
1197
1198 i = adapter->tx_ring.next_to_use;
1199 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1200
1201 context_desc->ipcss = ipcss;
1202 context_desc->ipcso = ipcso;
1203 context_desc->ipcse = cpu_to_le16(ipcse);
1204 context_desc->tucss = tucss;
1205 context_desc->tucso = tucso;
1206 context_desc->tucse = cpu_to_le16(tucse);
1207 context_desc->mss = cpu_to_le16(mss);
1208 context_desc->hdr_len = hdr_len;
1209 context_desc->status = 0;
1210 context_desc->cmd_type_len = cpu_to_le32(
1211 IXGB_CONTEXT_DESC_TYPE
1212 | IXGB_CONTEXT_DESC_CMD_TSE
1213 | IXGB_CONTEXT_DESC_CMD_IP
1214 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT		 1215 | IXGB_CONTEXT_DESC_CMD_IDE
1216 | (skb->len - (hdr_len)));
1217
06c2f9ec 1218
1da177e4
LT		 1219 if(++i == adapter->tx_ring.count) i = 0;
1220 adapter->tx_ring.next_to_use = i;
1221
1222 return 1;
1223 }
1224#endif
1225
1226 return 0;
1227}
1228
1229static inline boolean_t
1230ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1231{
1232 struct ixgb_context_desc *context_desc;
1233 unsigned int i;
1234 uint8_t css, cso;
1235
1236 if(likely(skb->ip_summed == CHECKSUM_HW)) {
1237 css = skb->h.raw - skb->data;
1238 cso = (skb->h.raw + skb->csum) - skb->data;
1239
1240 i = adapter->tx_ring.next_to_use;
1241 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1242
1243 context_desc->tucss = css;
1244 context_desc->tucso = cso;
1245 context_desc->tucse = 0;
1246 /* zero out any previously existing data in one instruction */
1247 *(uint32_t *)&(context_desc->ipcss) = 0;
1248 context_desc->status = 0;
1249 context_desc->hdr_len = 0;
1250 context_desc->mss = 0;
1251 context_desc->cmd_type_len =
1252 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1253 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT		 1254
1255 if(++i == adapter->tx_ring.count) i = 0;
1256 adapter->tx_ring.next_to_use = i;
1257
1258 return TRUE;
1259 }
1260
1261 return FALSE;
1262}
1263
1264#define IXGB_MAX_TXD_PWR 14
1265#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1266
1267static inline int
1268ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1269 unsigned int first)
1270{
1271 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1272 struct ixgb_buffer *buffer_info;
1273 int len = skb->len;
1274 unsigned int offset = 0, size, count = 0, i;
96f9c2e2 1275 unsigned int mss = skb_shinfo(skb)->tso_size;
1da177e4
LT		 1276
1277 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1278 unsigned int f;
ac79c82e 1279
1da177e4
LT		 1280 len -= skb->data_len;
1281
1282 i = tx_ring->next_to_use;
1283
1284 while(len) {
1285 buffer_info = &tx_ring->buffer_info[i];
1286 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
96f9c2e2
AK		 1287 /* Workaround for premature desc write-backs
1288 * in TSO mode. Append 4-byte sentinel desc */
1289 if(unlikely(mss && !nr_frags && size == len && size > 8))
1290 size -= 4;
1291
1da177e4
LT		 1292 buffer_info->length = size;
1293 buffer_info->dma =
1294 pci_map_single(adapter->pdev,
1295 skb->data + offset,
1296 size,
1297 PCI_DMA_TODEVICE);
1298 buffer_info->time_stamp = jiffies;
1299
1300 len -= size;
1301 offset += size;
1302 count++;
1303 if(++i == tx_ring->count) i = 0;
1304 }
1305
1306 for(f = 0; f < nr_frags; f++) {
1307 struct skb_frag_struct *frag;
1308
1309 frag = &skb_shinfo(skb)->frags[f];
1310 len = frag->size;
1311 offset = 0;
1312
1313 while(len) {
1314 buffer_info = &tx_ring->buffer_info[i];
1315 size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
96f9c2e2
AK		 1316 /* Workaround for premature desc write-backs
1317 * in TSO mode. Append 4-byte sentinel desc */
1318 if(unlikely(mss && (f == (nr_frags-1)) && (size == len)
1319 && (size > 8)))
1320 size -= 4;
1321
1da177e4
LT		 1322 buffer_info->length = size;
1323 buffer_info->dma =
1324 pci_map_page(adapter->pdev,
1325 frag->page,
1326 frag->page_offset + offset,
1327 size,
1328 PCI_DMA_TODEVICE);
1329 buffer_info->time_stamp = jiffies;
1330
1331 len -= size;
1332 offset += size;
1333 count++;
1334 if(++i == tx_ring->count) i = 0;
1335 }
1336 }
1337 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1338 tx_ring->buffer_info[i].skb = skb;
1339 tx_ring->buffer_info[first].next_to_watch = i;
1340
1341 return count;
1342}
1343
1344static inline void
1345ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1346{
1347 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1348 struct ixgb_tx_desc *tx_desc = NULL;
1349 struct ixgb_buffer *buffer_info;
1350 uint32_t cmd_type_len = adapter->tx_cmd_type;
1351 uint8_t status = 0;
1352 uint8_t popts = 0;
1353 unsigned int i;
1354
1355 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1356 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1357 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1358 }
1359
1360 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1361 popts |= IXGB_TX_DESC_POPTS_TXSM;
1362
1363 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1364 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1365 }
1366
1367 i = tx_ring->next_to_use;
1368
1369 while(count--) {
1370 buffer_info = &tx_ring->buffer_info[i];
1371 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1372 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1373 tx_desc->cmd_type_len =
1374 cpu_to_le32(cmd_type_len | buffer_info->length);
1375 tx_desc->status = status;
1376 tx_desc->popts = popts;
1377 tx_desc->vlan = cpu_to_le16(vlan_id);
1378
1379 if(++i == tx_ring->count) i = 0;
1380 }
1381
1382 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1383 | IXGB_TX_DESC_CMD_RS );
1384
1385 /* Force memory writes to complete before letting h/w
1386 * know there are new descriptors to fetch. (Only
1387 * applicable for weak-ordered memory model archs,
1388 * such as IA-64). */
1389 wmb();
1390
1391 tx_ring->next_to_use = i;
1392 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1393}
1394
1395/* Tx Descriptors needed, worst case */
1396#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1397 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1398#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
96f9c2e2
AK		 1399 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 \
1400 /* one more for TSO workaround */ + 1
1da177e4
LT		 1401
1402static int
1403ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1404{
8908c6cd 1405 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1406 unsigned int first;
1407 unsigned int tx_flags = 0;
1408 unsigned long flags;
1409 int vlan_id = 0;
1410 int tso;
1411
1412 if(skb->len <= 0) {
1413 dev_kfree_skb_any(skb);
1414 return 0;
1415 }
1416
f017f14b
AK		 1417#ifdef NETIF_F_LLTX
1418 local_irq_save(flags);
1419 if (!spin_trylock(&adapter->tx_lock)) {
1420 /* Collision - tell upper layer to requeue */
1421 local_irq_restore(flags);
1422 return NETDEV_TX_LOCKED;
1423 }
1424#else
1da177e4 1425 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK		 1426#endif
1427
1da177e4
LT		 1428 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
1429 netif_stop_queue(netdev);
1430 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1431 return NETDEV_TX_BUSY;
1da177e4 1432 }
f017f14b
AK		 1433
1434#ifndef NETIF_F_LLTX
1da177e4 1435 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1436#endif
1da177e4
LT		 1437
1438 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1439 tx_flags |= IXGB_TX_FLAGS_VLAN;
1440 vlan_id = vlan_tx_tag_get(skb);
1441 }
1442
1443 first = adapter->tx_ring.next_to_use;
1444
1445 tso = ixgb_tso(adapter, skb);
1446 if (tso < 0) {
1447 dev_kfree_skb_any(skb);
f017f14b
AK		 1448#ifdef NETIF_F_LLTX
1449 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1450#endif
1da177e4
LT		 1451 return NETDEV_TX_OK;
1452 }
1453
96f9c2e2 1454 if (likely(tso))
1da177e4
LT		 1455 tx_flags |= IXGB_TX_FLAGS_TSO;
1456 else if(ixgb_tx_csum(adapter, skb))
1457 tx_flags |= IXGB_TX_FLAGS_CSUM;
1458
1459 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1460 tx_flags);
1461
1462 netdev->trans_start = jiffies;
1463
f017f14b
AK		 1464#ifdef NETIF_F_LLTX
1465 /* Make sure there is space in the ring for the next send. */
1466 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
1467 netif_stop_queue(netdev);
1468
1469 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1470
1471#endif
1472 return NETDEV_TX_OK;
1da177e4
LT		 1473}
1474
1475/**
1476 * ixgb_tx_timeout - Respond to a Tx Hang
1477 * @netdev: network interface device structure
1478 **/
1479
1480static void
1481ixgb_tx_timeout(struct net_device *netdev)
1482{
8908c6cd 1483 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1484
1485 /* Do the reset outside of interrupt context */
1486 schedule_work(&adapter->tx_timeout_task);
1487}
1488
1489static void
1490ixgb_tx_timeout_task(struct net_device *netdev)
1491{
8908c6cd 1492 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1493
1494 ixgb_down(adapter, TRUE);
1495 ixgb_up(adapter);
1496}
1497
1498/**
1499 * ixgb_get_stats - Get System Network Statistics
1500 * @netdev: network interface device structure
1501 *
1502 * Returns the address of the device statistics structure.
1503 * The statistics are actually updated from the timer callback.
1504 **/
1505
1506static struct net_device_stats *
1507ixgb_get_stats(struct net_device *netdev)
1508{
8908c6cd 1509 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1510
1511 return &adapter->net_stats;
1512}
1513
1514/**
1515 * ixgb_change_mtu - Change the Maximum Transfer Unit
1516 * @netdev: network interface device structure
1517 * @new_mtu: new value for maximum frame size
1518 *
1519 * Returns 0 on success, negative on failure
1520 **/
1521
1522static int
1523ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1524{
8908c6cd 1525 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1526 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1527 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1528
1529
1530 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1531 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
1532 IXGB_ERR("Invalid MTU setting\n");
1533 return -EINVAL;
1534 }
1535
1536 if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1537 || (max_frame <= IXGB_RXBUFFER_2048)) {
1538 adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
1539
1540 } else if(max_frame <= IXGB_RXBUFFER_4096) {
1541 adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
1542
1543 } else if(max_frame <= IXGB_RXBUFFER_8192) {
1544 adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
1545
1546 } else {
1547 adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
1548 }
1549
1550 netdev->mtu = new_mtu;
1551
1552 if(old_max_frame != max_frame && netif_running(netdev)) {
1553
1554 ixgb_down(adapter, TRUE);
1555 ixgb_up(adapter);
1556 }
1557
1558 return 0;
1559}
1560
1561/**
1562 * ixgb_update_stats - Update the board statistics counters.
1563 * @adapter: board private structure
1564 **/
1565
1566void
1567ixgb_update_stats(struct ixgb_adapter *adapter)
1568{
5633684d
MC		 1569 struct net_device *netdev = adapter->netdev;
1570
1571 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1572 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1573 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1574 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1575 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1576 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1577
1578 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1579 /* fix up multicast stats by removing broadcasts */
7b89178d
MC		 1580 if(multi >= bcast)
1581 multi -= bcast;
5633684d
MC		 1582
1583 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1584 adapter->stats.mprch += (multi >> 32);
1585 adapter->stats.bprcl += bcast_l;
1586 adapter->stats.bprch += bcast_h;
1587 } else {
1588 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1589 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1590 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1591 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1592 }
1da177e4
LT		 1593 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1594 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1595 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1596 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT		 1597 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1598 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1599 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1600 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1601 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1602 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1603 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1604 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1605 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1606 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1607 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1608 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1609 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1610 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1611 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1612 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1613 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1614 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1615 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1616 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1617 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1618 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1619 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1620 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1621 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1622 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1623 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1624 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1625 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1626 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1627 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1628 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1629 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1630 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1631 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1632 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1633 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1634 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1635 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1636 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1637 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1638 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1639 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1640 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1641 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1642 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1643 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1644 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1645 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1646 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1647 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1648 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1649
1650 /* Fill out the OS statistics structure */
1651
1652 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1653 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1654 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1655 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1656 adapter->net_stats.multicast = adapter->stats.mprcl;
1657 adapter->net_stats.collisions = 0;
1658
1659 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1660 * with a length in the type/len field */
1661 adapter->net_stats.rx_errors =
1662 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1663 adapter->stats.ruc +
1664 adapter->stats.roc /*+ adapter->stats.rlec */ +
1665 adapter->stats.icbc +
1666 adapter->stats.ecbc + adapter->stats.mpc;
1667
1da177e4
LT		 1668 /* see above
1669 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1670 */
1671
1672 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1673 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1674 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1675 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1676
1677 adapter->net_stats.tx_errors = 0;
1678 adapter->net_stats.rx_frame_errors = 0;
1679 adapter->net_stats.tx_aborted_errors = 0;
1680 adapter->net_stats.tx_carrier_errors = 0;
1681 adapter->net_stats.tx_fifo_errors = 0;
1682 adapter->net_stats.tx_heartbeat_errors = 0;
1683 adapter->net_stats.tx_window_errors = 0;
1684}
1685
1686#define IXGB_MAX_INTR 10
1687/**
1688 * ixgb_intr - Interrupt Handler
1689 * @irq: interrupt number
1690 * @data: pointer to a network interface device structure
1691 * @pt_regs: CPU registers structure
1692 **/
1693
1694static irqreturn_t
1695ixgb_intr(int irq, void *data, struct pt_regs *regs)
1696{
1697 struct net_device *netdev = data;
8908c6cd 1698 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1699 struct ixgb_hw *hw = &adapter->hw;
1700 uint32_t icr = IXGB_READ_REG(hw, ICR);
1701#ifndef CONFIG_IXGB_NAPI
1702 unsigned int i;
1703#endif
1704
1705 if(unlikely(!icr))
1706 return IRQ_NONE; /* Not our interrupt */
1707
1708 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1709 mod_timer(&adapter->watchdog_timer, jiffies);
1710 }
1711
1712#ifdef CONFIG_IXGB_NAPI
1713 if(netif_rx_schedule_prep(netdev)) {
1714
1715 /* Disable interrupts and register for poll. The flush
1716 of the posted write is intentionally left out.
1717 */
1718
1719 atomic_inc(&adapter->irq_sem);
1720 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1721 __netif_rx_schedule(netdev);
1722 }
1723#else
1724 /* yes, that is actually a & and it is meant to make sure that
1725 * every pass through this for loop checks both receive and
1726 * transmit queues for completed descriptors, intended to
1727 * avoid starvation issues and assist tx/rx fairness. */
1728 for(i = 0; i < IXGB_MAX_INTR; i++)
1729 if(!ixgb_clean_rx_irq(adapter) &
1730 !ixgb_clean_tx_irq(adapter))
1731 break;
1732#endif
1733 return IRQ_HANDLED;
1734}
1735
1736#ifdef CONFIG_IXGB_NAPI
1737/**
1738 * ixgb_clean - NAPI Rx polling callback
1739 * @adapter: board private structure
1740 **/
1741
1742static int
1743ixgb_clean(struct net_device *netdev, int *budget)
1744{
8908c6cd 1745 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1746 int work_to_do = min(*budget, netdev->quota);
1747 int tx_cleaned;
1748 int work_done = 0;
1749
1750 tx_cleaned = ixgb_clean_tx_irq(adapter);
1751 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1752
1753 *budget -= work_done;
1754 netdev->quota -= work_done;
1755
1756 /* if no Tx and not enough Rx work done, exit the polling mode */
1757 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1758 netif_rx_complete(netdev);
1759 ixgb_irq_enable(adapter);
1760 return 0;
1761 }
1762
1763 return 1;
1764}
1765#endif
1766
1767/**
1768 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1769 * @adapter: board private structure
1770 **/
1771
1772static boolean_t
1773ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1774{
1775 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1776 struct net_device *netdev = adapter->netdev;
1777 struct ixgb_tx_desc *tx_desc, *eop_desc;
1778 struct ixgb_buffer *buffer_info;
1779 unsigned int i, eop;
1780 boolean_t cleaned = FALSE;
1781
1782 i = tx_ring->next_to_clean;
1783 eop = tx_ring->buffer_info[i].next_to_watch;
1784 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1785
1786 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1787
1788 for(cleaned = FALSE; !cleaned; ) {
1789 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1790 buffer_info = &tx_ring->buffer_info[i];
1791
1792 if (tx_desc->popts
1793 & (IXGB_TX_DESC_POPTS_TXSM |
1794 IXGB_TX_DESC_POPTS_IXSM))
1795 adapter->hw_csum_tx_good++;
1796
1797 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1798
1799 *(uint32_t *)&(tx_desc->status) = 0;
1800
1801 cleaned = (i == eop);
1802 if(++i == tx_ring->count) i = 0;
1803 }
1804
1805 eop = tx_ring->buffer_info[i].next_to_watch;
1806 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1807 }
1808
1809 tx_ring->next_to_clean = i;
1810
1811 spin_lock(&adapter->tx_lock);
1812 if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1813 (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
1814
1815 netif_wake_queue(netdev);
1816 }
1817 spin_unlock(&adapter->tx_lock);
1818
1819 if(adapter->detect_tx_hung) {
1820 /* detect a transmit hang in hardware, this serializes the
1821 * check with the clearing of time_stamp and movement of i */
1822 adapter->detect_tx_hung = FALSE;
1823 if(tx_ring->buffer_info[i].dma &&
1824 time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
1825 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
1826 IXGB_STATUS_TXOFF))
1827 netif_stop_queue(netdev);
1828 }
1829
1830 return cleaned;
1831}
1832
1833/**
1834 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1835 * @adapter: board private structure
1836 * @rx_desc: receive descriptor
1837 * @sk_buff: socket buffer with received data
1838 **/
1839
1840static inline void
1841ixgb_rx_checksum(struct ixgb_adapter *adapter,
1842 struct ixgb_rx_desc *rx_desc,
1843 struct sk_buff *skb)
1844{
1845 /* Ignore Checksum bit is set OR
1846 * TCP Checksum has not been calculated
1847 */
1848 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1849 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1850 skb->ip_summed = CHECKSUM_NONE;
1851 return;
1852 }
1853
1854 /* At this point we know the hardware did the TCP checksum */
1855 /* now look at the TCP checksum error bit */
1856 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1857 /* let the stack verify checksum errors */
1858 skb->ip_summed = CHECKSUM_NONE;
1859 adapter->hw_csum_rx_error++;
1860 } else {
1861 /* TCP checksum is good */
1862 skb->ip_summed = CHECKSUM_UNNECESSARY;
1863 adapter->hw_csum_rx_good++;
1864 }
1865}
1866
1867/**
1868 * ixgb_clean_rx_irq - Send received data up the network stack,
1869 * @adapter: board private structure
1870 **/
1871
1872static boolean_t
1873#ifdef CONFIG_IXGB_NAPI
1874ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1875#else
1876ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1877#endif
1878{
1879 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1880 struct net_device *netdev = adapter->netdev;
1881 struct pci_dev *pdev = adapter->pdev;
1882 struct ixgb_rx_desc *rx_desc, *next_rxd;
1883 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT		 1884 uint32_t length;
1885 unsigned int i, j;
1886 boolean_t cleaned = FALSE;
1887
1888 i = rx_ring->next_to_clean;
1889 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1890 buffer_info = &rx_ring->buffer_info[i];
1891
1892 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC		 1893 struct sk_buff *skb, *next_skb;
1894 u8 status;
1da177e4
LT		 1895
1896#ifdef CONFIG_IXGB_NAPI
1897 if(*work_done >= work_to_do)
1898 break;
1899
1900 (*work_done)++;
1901#endif
f404de1c 1902 status = rx_desc->status;
1da177e4 1903 skb = buffer_info->skb;
f404de1c 1904
1da177e4
LT		 1905 prefetch(skb->data);
1906
1907 if(++i == rx_ring->count) i = 0;
1908 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1909 prefetch(next_rxd);
1910
1911 if((j = i + 1) == rx_ring->count) j = 0;
1912 next2_buffer = &rx_ring->buffer_info[j];
1913 prefetch(next2_buffer);
1914
1915 next_buffer = &rx_ring->buffer_info[i];
1916 next_skb = next_buffer->skb;
1917 prefetch(next_skb);
1918
1da177e4
LT		 1919 cleaned = TRUE;
1920
1921 pci_unmap_single(pdev,
1922 buffer_info->dma,
1923 buffer_info->length,
1924 PCI_DMA_FROMDEVICE);
1925
1926 length = le16_to_cpu(rx_desc->length);
1927
f404de1c 1928 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT		 1929
1930 /* All receives must fit into a single buffer */
1931
1932 IXGB_DBG("Receive packet consumed multiple buffers "
1933 "length<%x>\n", length);
1934
1935 dev_kfree_skb_irq(skb);
f404de1c 1936 goto rxdesc_done;
1da177e4
LT		 1937 }
1938
1939 if (unlikely(rx_desc->errors
1940 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1941 | IXGB_RX_DESC_ERRORS_P |
1942 IXGB_RX_DESC_ERRORS_RXE))) {
1943
1944 dev_kfree_skb_irq(skb);
f404de1c 1945 goto rxdesc_done;
1da177e4
LT		 1946 }
1947
1948 /* Good Receive */
1949 skb_put(skb, length);
1950
1951 /* Receive Checksum Offload */
1952 ixgb_rx_checksum(adapter, rx_desc, skb);
1953
1954 skb->protocol = eth_type_trans(skb, netdev);
1955#ifdef CONFIG_IXGB_NAPI
f404de1c 1956 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1957 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1958 le16_to_cpu(rx_desc->special) &
1959 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1960 } else {
1961 netif_receive_skb(skb);
1962 }
1963#else /* CONFIG_IXGB_NAPI */
f404de1c 1964 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 1965 vlan_hwaccel_rx(skb, adapter->vlgrp,
1966 le16_to_cpu(rx_desc->special) &
1967 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1968 } else {
1969 netif_rx(skb);
1970 }
1971#endif /* CONFIG_IXGB_NAPI */
1972 netdev->last_rx = jiffies;
1973
f404de1c
MC		 1974rxdesc_done:
1975 /* clean up descriptor, might be written over by hw */
1da177e4
LT		 1976 rx_desc->status = 0;
1977 buffer_info->skb = NULL;
1978
f404de1c 1979 /* use prefetched values */
1da177e4
LT		 1980 rx_desc = next_rxd;
1981 buffer_info = next_buffer;
1982 }
1983
1984 rx_ring->next_to_clean = i;
1985
1986 ixgb_alloc_rx_buffers(adapter);
1987
1988 return cleaned;
1989}
1990
1991/**
1992 * ixgb_alloc_rx_buffers - Replace used receive buffers
1993 * @adapter: address of board private structure
1994 **/
1995
1996static void
1997ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
1998{
1999 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2000 struct net_device *netdev = adapter->netdev;
2001 struct pci_dev *pdev = adapter->pdev;
2002 struct ixgb_rx_desc *rx_desc;
2003 struct ixgb_buffer *buffer_info;
2004 struct sk_buff *skb;
2005 unsigned int i;
2006 int num_group_tail_writes;
2007 long cleancount;
2008
2009 i = rx_ring->next_to_use;
2010 buffer_info = &rx_ring->buffer_info[i];
2011 cleancount = IXGB_DESC_UNUSED(rx_ring);
2012
2013 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2014
41639fed
MC		 2015 /* leave three descriptors unused */
2016 while(--cleancount > 2) {
1da177e4
LT		 2017 rx_desc = IXGB_RX_DESC(*rx_ring, i);
2018
2019 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
2020
2021 if(unlikely(!skb)) {
2022 /* Better luck next round */
2023 break;
2024 }
2025
2026 /* Make buffer alignment 2 beyond a 16 byte boundary
2027 * this will result in a 16 byte aligned IP header after
2028 * the 14 byte MAC header is removed
2029 */
2030 skb_reserve(skb, NET_IP_ALIGN);
2031
2032 skb->dev = netdev;
2033
2034 buffer_info->skb = skb;
2035 buffer_info->length = adapter->rx_buffer_len;
2036 buffer_info->dma =
2037 pci_map_single(pdev,
2038 skb->data,
2039 adapter->rx_buffer_len,
2040 PCI_DMA_FROMDEVICE);
2041
2042 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC		 2043 /* guarantee DD bit not set now before h/w gets descriptor
2044 * this is the rest of the workaround for h/w double
2045 * writeback. */
2046 rx_desc->status = 0;
1da177e4
LT		 2047
2048 if((i & ~(num_group_tail_writes- 1)) == i) {
2049 /* Force memory writes to complete before letting h/w
2050 * know there are new descriptors to fetch. (Only
2051 * applicable for weak-ordered memory model archs,
2052 * such as IA-64). */
2053 wmb();
2054
2055 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2056 }
2057
2058 if(++i == rx_ring->count) i = 0;
2059 buffer_info = &rx_ring->buffer_info[i];
2060 }
2061
2062 rx_ring->next_to_use = i;
2063}
2064
2065/**
2066 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2067 *
2068 * @param netdev network interface device structure
2069 * @param grp indicates to enable or disable tagging/stripping
2070 **/
2071static void
2072ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2073{
8908c6cd 2074 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2075 uint32_t ctrl, rctl;
2076
2077 ixgb_irq_disable(adapter);
2078 adapter->vlgrp = grp;
2079
2080 if(grp) {
2081 /* enable VLAN tag insert/strip */
2082 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2083 ctrl |= IXGB_CTRL0_VME;
2084 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2085
2086 /* enable VLAN receive filtering */
2087
2088 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2089 rctl |= IXGB_RCTL_VFE;
2090 rctl &= ~IXGB_RCTL_CFIEN;
2091 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2092 } else {
2093 /* disable VLAN tag insert/strip */
2094
2095 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2096 ctrl &= ~IXGB_CTRL0_VME;
2097 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2098
2099 /* disable VLAN filtering */
2100
2101 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2102 rctl &= ~IXGB_RCTL_VFE;
2103 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2104 }
2105
2106 ixgb_irq_enable(adapter);
2107}
2108
2109static void
2110ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2111{
8908c6cd 2112 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2113 uint32_t vfta, index;
2114
2115 /* add VID to filter table */
2116
2117 index = (vid >> 5) & 0x7F;
2118 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2119 vfta |= (1 << (vid & 0x1F));
2120 ixgb_write_vfta(&adapter->hw, index, vfta);
2121}
2122
2123static void
2124ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2125{
8908c6cd 2126 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2127 uint32_t vfta, index;
2128
2129 ixgb_irq_disable(adapter);
2130
2131 if(adapter->vlgrp)
2132 adapter->vlgrp->vlan_devices[vid] = NULL;
2133
2134 ixgb_irq_enable(adapter);
2135
2136 /* remove VID from filter table*/
2137
2138 index = (vid >> 5) & 0x7F;
2139 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2140 vfta &= ~(1 << (vid & 0x1F));
2141 ixgb_write_vfta(&adapter->hw, index, vfta);
2142}
2143
2144static void
2145ixgb_restore_vlan(struct ixgb_adapter *adapter)
2146{
2147 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2148
2149 if(adapter->vlgrp) {
2150 uint16_t vid;
2151 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2152 if(!adapter->vlgrp->vlan_devices[vid])
2153 continue;
2154 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2155 }
2156 }
2157}
2158
1da177e4
LT		 2159#ifdef CONFIG_NET_POLL_CONTROLLER
2160/*
2161 * Polling 'interrupt' - used by things like netconsole to send skbs
2162 * without having to re-enable interrupts. It's not called while
2163 * the interrupt routine is executing.
2164 */
2165
2166static void ixgb_netpoll(struct net_device *dev)
2167{
2168 struct ixgb_adapter *adapter = dev->priv;
ac79c82e 2169
1da177e4
LT		 2170 disable_irq(adapter->pdev->irq);
2171 ixgb_intr(adapter->pdev->irq, dev, NULL);
2172 enable_irq(adapter->pdev->irq);
2173}
2174#endif
2175
2176/* ixgb_main.c */
Linux kernel - Deliverables
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