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2f90b865 AD |
1 | /******************************************************************************* |
2 | ||
3 | Intel 10 Gigabit PCI Express Linux driver | |
4 | Copyright(c) 1999 - 2008 Intel Corporation. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
22 | Contact Information: | |
23 | Linux NICS <linux.nics@intel.com> | |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include "ixgbe.h" | |
30 | #include <linux/dcbnl.h> | |
31 | ||
32 | /* Callbacks for DCB netlink in the kernel */ | |
33 | #define BIT_DCB_MODE 0x01 | |
34 | #define BIT_PFC 0x02 | |
35 | #define BIT_PG_RX 0x04 | |
36 | #define BIT_PG_TX 0x08 | |
859ee3c4 | 37 | #define BIT_BCN 0x10 |
2f90b865 AD |
38 | |
39 | int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg, | |
40 | struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max) | |
41 | { | |
42 | struct tc_configuration *src_tc_cfg = NULL; | |
43 | struct tc_configuration *dst_tc_cfg = NULL; | |
44 | int i; | |
45 | ||
46 | if (!src_dcb_cfg || !dst_dcb_cfg) | |
47 | return -EINVAL; | |
48 | ||
49 | for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) { | |
50 | src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0]; | |
51 | dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0]; | |
52 | ||
53 | dst_tc_cfg->path[DCB_TX_CONFIG].prio_type = | |
54 | src_tc_cfg->path[DCB_TX_CONFIG].prio_type; | |
55 | ||
56 | dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id = | |
57 | src_tc_cfg->path[DCB_TX_CONFIG].bwg_id; | |
58 | ||
59 | dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent = | |
60 | src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent; | |
61 | ||
62 | dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap = | |
63 | src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap; | |
64 | ||
65 | dst_tc_cfg->path[DCB_RX_CONFIG].prio_type = | |
66 | src_tc_cfg->path[DCB_RX_CONFIG].prio_type; | |
67 | ||
68 | dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id = | |
69 | src_tc_cfg->path[DCB_RX_CONFIG].bwg_id; | |
70 | ||
71 | dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent = | |
72 | src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent; | |
73 | ||
74 | dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap = | |
75 | src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap; | |
76 | } | |
77 | ||
78 | for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) { | |
79 | dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG] | |
80 | [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage | |
81 | [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0]; | |
82 | dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG] | |
83 | [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage | |
84 | [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0]; | |
85 | } | |
86 | ||
87 | for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) { | |
88 | dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc = | |
89 | src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc; | |
90 | } | |
91 | ||
859ee3c4 AD |
92 | for (i = DCB_BCN_ATTR_RP_0; i < DCB_BCN_ATTR_RP_ALL; i++) { |
93 | dst_dcb_cfg->bcn.rp_admin_mode[i - DCB_BCN_ATTR_RP_0] = | |
94 | src_dcb_cfg->bcn.rp_admin_mode[i - DCB_BCN_ATTR_RP_0]; | |
95 | } | |
96 | dst_dcb_cfg->bcn.rp_alpha = src_dcb_cfg->bcn.rp_alpha; | |
97 | dst_dcb_cfg->bcn.rp_beta = src_dcb_cfg->bcn.rp_beta; | |
98 | dst_dcb_cfg->bcn.rp_gd = src_dcb_cfg->bcn.rp_gd; | |
99 | dst_dcb_cfg->bcn.rp_gi = src_dcb_cfg->bcn.rp_gi; | |
100 | dst_dcb_cfg->bcn.rp_tmax = src_dcb_cfg->bcn.rp_tmax; | |
101 | dst_dcb_cfg->bcn.rp_td = src_dcb_cfg->bcn.rp_td; | |
102 | dst_dcb_cfg->bcn.rp_rmin = src_dcb_cfg->bcn.rp_rmin; | |
103 | dst_dcb_cfg->bcn.rp_w = src_dcb_cfg->bcn.rp_w; | |
104 | dst_dcb_cfg->bcn.rp_rd = src_dcb_cfg->bcn.rp_rd; | |
105 | dst_dcb_cfg->bcn.rp_ru = src_dcb_cfg->bcn.rp_ru; | |
106 | dst_dcb_cfg->bcn.rp_wrtt = src_dcb_cfg->bcn.rp_wrtt; | |
107 | dst_dcb_cfg->bcn.rp_ri = src_dcb_cfg->bcn.rp_ri; | |
108 | ||
2f90b865 AD |
109 | return 0; |
110 | } | |
111 | ||
112 | static u8 ixgbe_dcbnl_get_state(struct net_device *netdev) | |
113 | { | |
114 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
115 | ||
116 | DPRINTK(DRV, INFO, "Get DCB Admin Mode.\n"); | |
117 | ||
118 | return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED); | |
119 | } | |
120 | ||
121 | static u16 ixgbe_dcb_select_queue(struct net_device *dev, struct sk_buff *skb) | |
122 | { | |
123 | /* All traffic should default to class 0 */ | |
124 | return 0; | |
125 | } | |
126 | ||
1486a61e | 127 | static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state) |
2f90b865 | 128 | { |
1486a61e | 129 | u8 err = 0; |
2f90b865 AD |
130 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
131 | ||
132 | DPRINTK(DRV, INFO, "Set DCB Admin Mode.\n"); | |
133 | ||
134 | if (state > 0) { | |
135 | /* Turn on DCB */ | |
1486a61e DS |
136 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) |
137 | goto out; | |
2f90b865 | 138 | |
1486a61e DS |
139 | if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { |
140 | DPRINTK(DRV, ERR, "Enable failed, needs MSI-X\n"); | |
141 | err = 1; | |
142 | goto out; | |
2f90b865 | 143 | } |
1486a61e DS |
144 | |
145 | if (netif_running(netdev)) | |
146 | netdev->netdev_ops->ndo_stop(netdev); | |
147 | ixgbe_reset_interrupt_capability(adapter); | |
148 | ixgbe_napi_del_all(adapter); | |
149 | kfree(adapter->tx_ring); | |
150 | kfree(adapter->rx_ring); | |
151 | adapter->tx_ring = NULL; | |
152 | adapter->rx_ring = NULL; | |
153 | netdev->select_queue = &ixgbe_dcb_select_queue; | |
154 | ||
155 | adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; | |
156 | adapter->flags |= IXGBE_FLAG_DCB_ENABLED; | |
157 | ixgbe_init_interrupt_scheme(adapter); | |
158 | ixgbe_napi_add_all(adapter); | |
159 | if (netif_running(netdev)) | |
160 | netdev->netdev_ops->ndo_open(netdev); | |
2f90b865 AD |
161 | } else { |
162 | /* Turn off DCB */ | |
163 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | |
164 | if (netif_running(netdev)) | |
1486a61e | 165 | netdev->netdev_ops->ndo_stop(netdev); |
2f90b865 AD |
166 | ixgbe_reset_interrupt_capability(adapter); |
167 | ixgbe_napi_del_all(adapter); | |
168 | kfree(adapter->tx_ring); | |
169 | kfree(adapter->rx_ring); | |
170 | adapter->tx_ring = NULL; | |
171 | adapter->rx_ring = NULL; | |
172 | netdev->select_queue = NULL; | |
173 | ||
174 | adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; | |
175 | adapter->flags |= IXGBE_FLAG_RSS_ENABLED; | |
176 | ixgbe_init_interrupt_scheme(adapter); | |
177 | ixgbe_napi_add_all(adapter); | |
178 | if (netif_running(netdev)) | |
1486a61e | 179 | netdev->netdev_ops->ndo_open(netdev); |
2f90b865 AD |
180 | } |
181 | } | |
1486a61e DS |
182 | out: |
183 | return err; | |
2f90b865 AD |
184 | } |
185 | ||
186 | static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev, | |
187 | u8 *perm_addr) | |
188 | { | |
189 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
190 | int i; | |
191 | ||
192 | for (i = 0; i < netdev->addr_len; i++) | |
193 | perm_addr[i] = adapter->hw.mac.perm_addr[i]; | |
194 | } | |
195 | ||
196 | static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc, | |
197 | u8 prio, u8 bwg_id, u8 bw_pct, | |
198 | u8 up_map) | |
199 | { | |
200 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
201 | ||
202 | if (prio != DCB_ATTR_VALUE_UNDEFINED) | |
203 | adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio; | |
204 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) | |
205 | adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id; | |
206 | if (bw_pct != DCB_ATTR_VALUE_UNDEFINED) | |
207 | adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent = | |
208 | bw_pct; | |
209 | if (up_map != DCB_ATTR_VALUE_UNDEFINED) | |
210 | adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap = | |
211 | up_map; | |
212 | ||
213 | if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type != | |
214 | adapter->dcb_cfg.tc_config[tc].path[0].prio_type) || | |
215 | (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id != | |
216 | adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) || | |
217 | (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent != | |
218 | adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) || | |
219 | (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap != | |
220 | adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) | |
221 | adapter->dcb_set_bitmap |= BIT_PG_TX; | |
222 | } | |
223 | ||
224 | static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, | |
225 | u8 bw_pct) | |
226 | { | |
227 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
228 | ||
229 | adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct; | |
230 | ||
231 | if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] != | |
232 | adapter->dcb_cfg.bw_percentage[0][bwg_id]) | |
233 | adapter->dcb_set_bitmap |= BIT_PG_RX; | |
234 | } | |
235 | ||
236 | static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc, | |
237 | u8 prio, u8 bwg_id, u8 bw_pct, | |
238 | u8 up_map) | |
239 | { | |
240 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
241 | ||
242 | if (prio != DCB_ATTR_VALUE_UNDEFINED) | |
243 | adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio; | |
244 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) | |
245 | adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id; | |
246 | if (bw_pct != DCB_ATTR_VALUE_UNDEFINED) | |
247 | adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent = | |
248 | bw_pct; | |
249 | if (up_map != DCB_ATTR_VALUE_UNDEFINED) | |
250 | adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap = | |
251 | up_map; | |
252 | ||
253 | if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type != | |
254 | adapter->dcb_cfg.tc_config[tc].path[1].prio_type) || | |
255 | (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id != | |
256 | adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) || | |
257 | (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent != | |
258 | adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) || | |
259 | (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap != | |
260 | adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) | |
261 | adapter->dcb_set_bitmap |= BIT_PG_RX; | |
262 | } | |
263 | ||
264 | static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, | |
265 | u8 bw_pct) | |
266 | { | |
267 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
268 | ||
269 | adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct; | |
270 | ||
271 | if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] != | |
272 | adapter->dcb_cfg.bw_percentage[1][bwg_id]) | |
273 | adapter->dcb_set_bitmap |= BIT_PG_RX; | |
274 | } | |
275 | ||
276 | static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc, | |
277 | u8 *prio, u8 *bwg_id, u8 *bw_pct, | |
278 | u8 *up_map) | |
279 | { | |
280 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
281 | ||
282 | *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type; | |
283 | *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id; | |
284 | *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent; | |
285 | *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap; | |
286 | } | |
287 | ||
288 | static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, | |
289 | u8 *bw_pct) | |
290 | { | |
291 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
292 | ||
293 | *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id]; | |
294 | } | |
295 | ||
296 | static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc, | |
297 | u8 *prio, u8 *bwg_id, u8 *bw_pct, | |
298 | u8 *up_map) | |
299 | { | |
300 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
301 | ||
302 | *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type; | |
303 | *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id; | |
304 | *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent; | |
305 | *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap; | |
306 | } | |
307 | ||
308 | static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, | |
309 | u8 *bw_pct) | |
310 | { | |
311 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
312 | ||
313 | *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id]; | |
314 | } | |
315 | ||
316 | static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority, | |
317 | u8 setting) | |
318 | { | |
319 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
320 | ||
321 | adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting; | |
322 | if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc != | |
323 | adapter->dcb_cfg.tc_config[priority].dcb_pfc) | |
324 | adapter->dcb_set_bitmap |= BIT_PFC; | |
325 | } | |
326 | ||
327 | static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority, | |
328 | u8 *setting) | |
329 | { | |
330 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
331 | ||
332 | *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc; | |
333 | } | |
334 | ||
335 | static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) | |
336 | { | |
337 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
338 | int ret; | |
339 | ||
859ee3c4 | 340 | adapter->dcb_set_bitmap &= ~BIT_BCN; /* no set for BCN */ |
2f90b865 AD |
341 | if (!adapter->dcb_set_bitmap) |
342 | return 1; | |
343 | ||
344 | while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) | |
345 | msleep(1); | |
346 | ||
347 | if (netif_running(netdev)) | |
348 | ixgbe_down(adapter); | |
349 | ||
350 | ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg, | |
351 | adapter->ring_feature[RING_F_DCB].indices); | |
352 | if (ret) { | |
353 | clear_bit(__IXGBE_RESETTING, &adapter->state); | |
354 | return ret; | |
355 | } | |
356 | ||
357 | if (netif_running(netdev)) | |
358 | ixgbe_up(adapter); | |
359 | ||
360 | adapter->dcb_set_bitmap = 0x00; | |
361 | clear_bit(__IXGBE_RESETTING, &adapter->state); | |
362 | return ret; | |
363 | } | |
364 | ||
46132188 AD |
365 | static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap) |
366 | { | |
367 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
368 | u8 rval = 0; | |
369 | ||
370 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | |
371 | switch (capid) { | |
372 | case DCB_CAP_ATTR_PG: | |
373 | *cap = true; | |
374 | break; | |
375 | case DCB_CAP_ATTR_PFC: | |
376 | *cap = true; | |
377 | break; | |
378 | case DCB_CAP_ATTR_UP2TC: | |
379 | *cap = false; | |
380 | break; | |
381 | case DCB_CAP_ATTR_PG_TCS: | |
382 | *cap = 0x80; | |
383 | break; | |
384 | case DCB_CAP_ATTR_PFC_TCS: | |
385 | *cap = 0x80; | |
386 | break; | |
387 | case DCB_CAP_ATTR_GSP: | |
388 | *cap = true; | |
389 | break; | |
390 | case DCB_CAP_ATTR_BCN: | |
391 | *cap = false; | |
392 | break; | |
393 | default: | |
394 | rval = -EINVAL; | |
395 | break; | |
396 | } | |
397 | } else { | |
398 | rval = -EINVAL; | |
399 | } | |
400 | ||
401 | return rval; | |
402 | } | |
403 | ||
33dbabc4 AD |
404 | static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num) |
405 | { | |
406 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
407 | u8 rval = 0; | |
408 | ||
409 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | |
410 | switch (tcid) { | |
411 | case DCB_NUMTCS_ATTR_PG: | |
412 | *num = MAX_TRAFFIC_CLASS; | |
413 | break; | |
414 | case DCB_NUMTCS_ATTR_PFC: | |
415 | *num = MAX_TRAFFIC_CLASS; | |
416 | break; | |
417 | default: | |
418 | rval = -EINVAL; | |
419 | break; | |
420 | } | |
421 | } else { | |
422 | rval = -EINVAL; | |
423 | } | |
424 | ||
425 | return rval; | |
426 | } | |
427 | ||
428 | static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num) | |
429 | { | |
430 | return -EINVAL; | |
431 | } | |
432 | ||
0eb3aa9b AD |
433 | static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev) |
434 | { | |
435 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
436 | ||
437 | return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED); | |
438 | } | |
439 | ||
440 | static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state) | |
441 | { | |
442 | return; | |
443 | } | |
444 | ||
859ee3c4 AD |
445 | static void ixgbe_dcbnl_getbcnrp(struct net_device *netdev, int priority, |
446 | u8 *setting) | |
447 | { | |
448 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
449 | ||
450 | *setting = adapter->dcb_cfg.bcn.rp_admin_mode[priority]; | |
451 | } | |
452 | ||
453 | ||
454 | static void ixgbe_dcbnl_getbcncfg(struct net_device *netdev, int enum_index, | |
455 | u32 *setting) | |
456 | { | |
457 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
458 | ||
459 | switch (enum_index) { | |
460 | case DCB_BCN_ATTR_ALPHA: | |
461 | *setting = adapter->dcb_cfg.bcn.rp_alpha; | |
462 | break; | |
463 | case DCB_BCN_ATTR_BETA: | |
464 | *setting = adapter->dcb_cfg.bcn.rp_beta; | |
465 | break; | |
466 | case DCB_BCN_ATTR_GD: | |
467 | *setting = adapter->dcb_cfg.bcn.rp_gd; | |
468 | break; | |
469 | case DCB_BCN_ATTR_GI: | |
470 | *setting = adapter->dcb_cfg.bcn.rp_gi; | |
471 | break; | |
472 | case DCB_BCN_ATTR_TMAX: | |
473 | *setting = adapter->dcb_cfg.bcn.rp_tmax; | |
474 | break; | |
475 | case DCB_BCN_ATTR_TD: | |
476 | *setting = adapter->dcb_cfg.bcn.rp_td; | |
477 | break; | |
478 | case DCB_BCN_ATTR_RMIN: | |
479 | *setting = adapter->dcb_cfg.bcn.rp_rmin; | |
480 | break; | |
481 | case DCB_BCN_ATTR_W: | |
482 | *setting = adapter->dcb_cfg.bcn.rp_w; | |
483 | break; | |
484 | case DCB_BCN_ATTR_RD: | |
485 | *setting = adapter->dcb_cfg.bcn.rp_rd; | |
486 | break; | |
487 | case DCB_BCN_ATTR_RU: | |
488 | *setting = adapter->dcb_cfg.bcn.rp_ru; | |
489 | break; | |
490 | case DCB_BCN_ATTR_WRTT: | |
491 | *setting = adapter->dcb_cfg.bcn.rp_wrtt; | |
492 | break; | |
493 | case DCB_BCN_ATTR_RI: | |
494 | *setting = adapter->dcb_cfg.bcn.rp_ri; | |
495 | break; | |
496 | default: | |
497 | *setting = -1; | |
498 | } | |
499 | } | |
500 | ||
501 | static void ixgbe_dcbnl_setbcnrp(struct net_device *netdev, int priority, | |
502 | u8 setting) | |
503 | { | |
504 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
505 | ||
506 | adapter->temp_dcb_cfg.bcn.rp_admin_mode[priority] = setting; | |
507 | ||
508 | if (adapter->temp_dcb_cfg.bcn.rp_admin_mode[priority] != | |
509 | adapter->dcb_cfg.bcn.rp_admin_mode[priority]) | |
510 | adapter->dcb_set_bitmap |= BIT_BCN; | |
511 | } | |
512 | ||
513 | static void ixgbe_dcbnl_setbcncfg(struct net_device *netdev, int enum_index, | |
514 | u32 setting) | |
515 | { | |
516 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
517 | ||
518 | switch (enum_index) { | |
519 | case DCB_BCN_ATTR_ALPHA: | |
520 | adapter->temp_dcb_cfg.bcn.rp_alpha = setting; | |
521 | if (adapter->temp_dcb_cfg.bcn.rp_alpha != | |
522 | adapter->dcb_cfg.bcn.rp_alpha) | |
523 | adapter->dcb_set_bitmap |= BIT_BCN; | |
524 | break; | |
525 | case DCB_BCN_ATTR_BETA: | |
526 | adapter->temp_dcb_cfg.bcn.rp_beta = setting; | |
527 | if (adapter->temp_dcb_cfg.bcn.rp_beta != | |
528 | adapter->dcb_cfg.bcn.rp_beta) | |
529 | adapter->dcb_set_bitmap |= BIT_BCN; | |
530 | break; | |
531 | case DCB_BCN_ATTR_GD: | |
532 | adapter->temp_dcb_cfg.bcn.rp_gd = setting; | |
533 | if (adapter->temp_dcb_cfg.bcn.rp_gd != | |
534 | adapter->dcb_cfg.bcn.rp_gd) | |
535 | adapter->dcb_set_bitmap |= BIT_BCN; | |
536 | break; | |
537 | case DCB_BCN_ATTR_GI: | |
538 | adapter->temp_dcb_cfg.bcn.rp_gi = setting; | |
539 | if (adapter->temp_dcb_cfg.bcn.rp_gi != | |
540 | adapter->dcb_cfg.bcn.rp_gi) | |
541 | adapter->dcb_set_bitmap |= BIT_BCN; | |
542 | break; | |
543 | case DCB_BCN_ATTR_TMAX: | |
544 | adapter->temp_dcb_cfg.bcn.rp_tmax = setting; | |
545 | if (adapter->temp_dcb_cfg.bcn.rp_tmax != | |
546 | adapter->dcb_cfg.bcn.rp_tmax) | |
547 | adapter->dcb_set_bitmap |= BIT_BCN; | |
548 | break; | |
549 | case DCB_BCN_ATTR_TD: | |
550 | adapter->temp_dcb_cfg.bcn.rp_td = setting; | |
551 | if (adapter->temp_dcb_cfg.bcn.rp_td != | |
552 | adapter->dcb_cfg.bcn.rp_td) | |
553 | adapter->dcb_set_bitmap |= BIT_BCN; | |
554 | break; | |
555 | case DCB_BCN_ATTR_RMIN: | |
556 | adapter->temp_dcb_cfg.bcn.rp_rmin = setting; | |
557 | if (adapter->temp_dcb_cfg.bcn.rp_rmin != | |
558 | adapter->dcb_cfg.bcn.rp_rmin) | |
559 | adapter->dcb_set_bitmap |= BIT_BCN; | |
560 | break; | |
561 | case DCB_BCN_ATTR_W: | |
562 | adapter->temp_dcb_cfg.bcn.rp_w = setting; | |
563 | if (adapter->temp_dcb_cfg.bcn.rp_w != | |
564 | adapter->dcb_cfg.bcn.rp_w) | |
565 | adapter->dcb_set_bitmap |= BIT_BCN; | |
566 | break; | |
567 | case DCB_BCN_ATTR_RD: | |
568 | adapter->temp_dcb_cfg.bcn.rp_rd = setting; | |
569 | if (adapter->temp_dcb_cfg.bcn.rp_rd != | |
570 | adapter->dcb_cfg.bcn.rp_rd) | |
571 | adapter->dcb_set_bitmap |= BIT_BCN; | |
572 | break; | |
573 | case DCB_BCN_ATTR_RU: | |
574 | adapter->temp_dcb_cfg.bcn.rp_ru = setting; | |
575 | if (adapter->temp_dcb_cfg.bcn.rp_ru != | |
576 | adapter->dcb_cfg.bcn.rp_ru) | |
577 | adapter->dcb_set_bitmap |= BIT_BCN; | |
578 | break; | |
579 | case DCB_BCN_ATTR_WRTT: | |
580 | adapter->temp_dcb_cfg.bcn.rp_wrtt = setting; | |
581 | if (adapter->temp_dcb_cfg.bcn.rp_wrtt != | |
582 | adapter->dcb_cfg.bcn.rp_wrtt) | |
583 | adapter->dcb_set_bitmap |= BIT_BCN; | |
584 | break; | |
585 | case DCB_BCN_ATTR_RI: | |
586 | adapter->temp_dcb_cfg.bcn.rp_ri = setting; | |
587 | if (adapter->temp_dcb_cfg.bcn.rp_ri != | |
588 | adapter->dcb_cfg.bcn.rp_ri) | |
589 | adapter->dcb_set_bitmap |= BIT_BCN; | |
590 | break; | |
591 | default: | |
592 | break; | |
593 | } | |
594 | } | |
595 | ||
2f90b865 AD |
596 | struct dcbnl_rtnl_ops dcbnl_ops = { |
597 | .getstate = ixgbe_dcbnl_get_state, | |
598 | .setstate = ixgbe_dcbnl_set_state, | |
599 | .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr, | |
600 | .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx, | |
601 | .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx, | |
602 | .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx, | |
603 | .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx, | |
604 | .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx, | |
605 | .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx, | |
606 | .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx, | |
607 | .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx, | |
608 | .setpfccfg = ixgbe_dcbnl_set_pfc_cfg, | |
609 | .getpfccfg = ixgbe_dcbnl_get_pfc_cfg, | |
46132188 | 610 | .setall = ixgbe_dcbnl_set_all, |
33dbabc4 AD |
611 | .getcap = ixgbe_dcbnl_getcap, |
612 | .getnumtcs = ixgbe_dcbnl_getnumtcs, | |
0eb3aa9b AD |
613 | .setnumtcs = ixgbe_dcbnl_setnumtcs, |
614 | .getpfcstate = ixgbe_dcbnl_getpfcstate, | |
859ee3c4 AD |
615 | .setpfcstate = ixgbe_dcbnl_setpfcstate, |
616 | .getbcncfg = ixgbe_dcbnl_getbcncfg, | |
617 | .getbcnrp = ixgbe_dcbnl_getbcnrp, | |
618 | .setbcncfg = ixgbe_dcbnl_setbcncfg, | |
619 | .setbcnrp = ixgbe_dcbnl_setbcnrp | |
2f90b865 AD |
620 | }; |
621 |