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ixgbe: DCB, implement 802.1Qaz routines
[deliverable/linux.git] / drivers / net / ixgbe / ixgbe_dcb_nl.c
CommitLineData
2f90b865
AD		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
8c47eaa7 4 Copyright(c) 1999 - 2010 Intel Corporation.
2f90b865
AD		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgbe.h"
30#include <linux/dcbnl.h>
62551d3e
PWJ		 31#include "ixgbe_dcb_82598.h"
32#include "ixgbe_dcb_82599.h"
2f90b865
AD		 33
34/* Callbacks for DCB netlink in the kernel */
35#define BIT_DCB_MODE 0x01
36#define BIT_PFC 0x02
37#define BIT_PG_RX 0x04
38#define BIT_PG_TX 0x08
8de8b2e6 39#define BIT_APP_UPCHG 0x10
62551d3e 40#define BIT_RESETLINK 0x40
235ea828 41#define BIT_LINKSPEED 0x80
2f90b865 42
62551d3e
PWJ		 43/* Responses for the DCB_C_SET_ALL command */
44#define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
45#define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
46#define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
47
2f90b865
AD		 48int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
49 struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
50{
51 struct tc_configuration *src_tc_cfg = NULL;
52 struct tc_configuration *dst_tc_cfg = NULL;
53 int i;
54
55 if (!src_dcb_cfg || !dst_dcb_cfg)
56 return -EINVAL;
57
58 for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
59 src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
60 dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
61
62 dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
63 src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
64
65 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
66 src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
67
68 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
69 src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
70
71 dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
72 src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
73
74 dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
75 src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
76
77 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
78 src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
79
80 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
81 src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
82
83 dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
84 src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
85 }
86
87 for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
88 dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
89 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
90 [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
91 dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
92 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
93 [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
94 }
95
96 for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
97 dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
98 src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
99 }
100
ea4af4f4
PW		 101 dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
102
2f90b865
AD		 103 return 0;
104}
105
106static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
107{
108 struct ixgbe_adapter *adapter = netdev_priv(netdev);
109
2f90b865
AD		 110 return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
111}
112
1486a61e 113static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
2f90b865 114{
1486a61e 115 u8 err = 0;
2f90b865
AD		 116 struct ixgbe_adapter *adapter = netdev_priv(netdev);
117
2f90b865
AD		 118 if (state > 0) {
119 /* Turn on DCB */
1486a61e
DS		 120 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
121 goto out;
2f90b865 122
1486a61e 123 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
396e799c 124 e_err(drv, "Enable failed, needs MSI-X\n");
1486a61e
DS		 125 err = 1;
126 goto out;
2f90b865 127 }
1486a61e
DS		 128
129 if (netif_running(netdev))
130 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 131 ixgbe_clear_interrupt_scheme(adapter);
1486a61e 132
b93a2226
DS		 133 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
134 switch (adapter->hw.mac.type) {
135 case ixgbe_mac_82598EB:
264857b8
PWJ		 136 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
137 adapter->hw.fc.requested_mode = ixgbe_fc_none;
b93a2226
DS		 138 break;
139 case ixgbe_mac_82599EB:
140 case ixgbe_mac_X540:
8faa2a78
YZ		 141 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
142 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
b93a2226
DS		 143 break;
144 default:
145 break;
8faa2a78 146 }
b93a2226 147
1486a61e
DS		 148 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
149 ixgbe_init_interrupt_scheme(adapter);
1486a61e
DS		 150 if (netif_running(netdev))
151 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 152 } else {
153 /* Turn off DCB */
154 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
155 if (netif_running(netdev))
1486a61e 156 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 157 ixgbe_clear_interrupt_scheme(adapter);
2f90b865 158
264857b8
PWJ		 159 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
160 adapter->temp_dcb_cfg.pfc_mode_enable = false;
161 adapter->dcb_cfg.pfc_mode_enable = false;
2f90b865
AD		 162 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
163 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
b93a2226
DS		 164 switch (adapter->hw.mac.type) {
165 case ixgbe_mac_82599EB:
166 case ixgbe_mac_X540:
8faa2a78 167 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
b93a2226
DS		 168 break;
169 default:
170 break;
171 }
0d551589 172
2f90b865 173 ixgbe_init_interrupt_scheme(adapter);
2f90b865 174 if (netif_running(netdev))
1486a61e 175 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 176 }
177 }
1486a61e
DS		 178out:
179 return err;
2f90b865
AD		 180}
181
182static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
183 u8 *perm_addr)
184{
185 struct ixgbe_adapter *adapter = netdev_priv(netdev);
aca6bee7 186 int i, j;
2f90b865 187
86e713a0
LL		 188 memset(perm_addr, 0xff, MAX_ADDR_LEN);
189
2f90b865
AD		 190 for (i = 0; i < netdev->addr_len; i++)
191 perm_addr[i] = adapter->hw.mac.perm_addr[i];
aca6bee7 192
b93a2226
DS		 193 switch (adapter->hw.mac.type) {
194 case ixgbe_mac_82599EB:
195 case ixgbe_mac_X540:
aca6bee7
WJP		 196 for (j = 0; j < netdev->addr_len; j++, i++)
197 perm_addr[i] = adapter->hw.mac.san_addr[j];
b93a2226
DS		 198 break;
199 default:
200 break;
aca6bee7 201 }
2f90b865
AD		 202}
203
204static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
205 u8 prio, u8 bwg_id, u8 bw_pct,
206 u8 up_map)
207{
208 struct ixgbe_adapter *adapter = netdev_priv(netdev);
209
210 if (prio != DCB_ATTR_VALUE_UNDEFINED)
211 adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
212 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
213 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
214 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
215 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
216 bw_pct;
217 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
218 adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
219 up_map;
220
221 if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
222 adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
223 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
224 adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
225 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
226 adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
227 (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
62551d3e 228 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) {
2f90b865 229 adapter->dcb_set_bitmap |= BIT_PG_TX;
62551d3e
PWJ		 230 adapter->dcb_set_bitmap |= BIT_RESETLINK;
231 }
2f90b865
AD		 232}
233
234static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
235 u8 bw_pct)
236{
237 struct ixgbe_adapter *adapter = netdev_priv(netdev);
238
239 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
240
241 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
62551d3e 242 adapter->dcb_cfg.bw_percentage[0][bwg_id]) {
ebe1b30c 243 adapter->dcb_set_bitmap |= BIT_PG_TX;
62551d3e
PWJ		 244 adapter->dcb_set_bitmap |= BIT_RESETLINK;
245 }
2f90b865
AD		 246}
247
248static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
249 u8 prio, u8 bwg_id, u8 bw_pct,
250 u8 up_map)
251{
252 struct ixgbe_adapter *adapter = netdev_priv(netdev);
253
254 if (prio != DCB_ATTR_VALUE_UNDEFINED)
255 adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
256 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
257 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
258 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
259 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
260 bw_pct;
261 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
262 adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
263 up_map;
264
265 if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
266 adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
267 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
268 adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
269 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
270 adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
271 (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
62551d3e 272 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) {
2f90b865 273 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 274 adapter->dcb_set_bitmap |= BIT_RESETLINK;
275 }
2f90b865
AD		 276}
277
278static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
279 u8 bw_pct)
280{
281 struct ixgbe_adapter *adapter = netdev_priv(netdev);
282
283 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
284
285 if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
62551d3e 286 adapter->dcb_cfg.bw_percentage[1][bwg_id]) {
2f90b865 287 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 288 adapter->dcb_set_bitmap |= BIT_RESETLINK;
289 }
2f90b865
AD		 290}
291
292static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
293 u8 *prio, u8 *bwg_id, u8 *bw_pct,
294 u8 *up_map)
295{
296 struct ixgbe_adapter *adapter = netdev_priv(netdev);
297
298 *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
299 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
300 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
301 *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
302}
303
304static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
305 u8 *bw_pct)
306{
307 struct ixgbe_adapter *adapter = netdev_priv(netdev);
308
309 *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
310}
311
312static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
313 u8 *prio, u8 *bwg_id, u8 *bw_pct,
314 u8 *up_map)
315{
316 struct ixgbe_adapter *adapter = netdev_priv(netdev);
317
318 *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
319 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
320 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
321 *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
322}
323
324static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
325 u8 *bw_pct)
326{
327 struct ixgbe_adapter *adapter = netdev_priv(netdev);
328
329 *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
330}
331
332static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
333 u8 setting)
334{
335 struct ixgbe_adapter *adapter = netdev_priv(netdev);
336
337 adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
338 if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
ea4af4f4 339 adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
2f90b865 340 adapter->dcb_set_bitmap |= BIT_PFC;
ea4af4f4
PW		 341 adapter->temp_dcb_cfg.pfc_mode_enable = true;
342 }
2f90b865
AD		 343}
344
345static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
346 u8 *setting)
347{
348 struct ixgbe_adapter *adapter = netdev_priv(netdev);
349
350 *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
351}
352
353static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
354{
355 struct ixgbe_adapter *adapter = netdev_priv(netdev);
53bb9f80 356 bool do_reset;
2f90b865
AD		 357 int ret;
358
359 if (!adapter->dcb_set_bitmap)
62551d3e 360 return DCB_NO_HW_CHG;
2f90b865 361
3ce1cc52
JF		 362 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
363 adapter->ring_feature[RING_F_DCB].indices);
364
365 if (ret)
366 return DCB_NO_HW_CHG;
367
62551d3e
PWJ		 368 /*
369 * Only take down the adapter if the configuration change
370 * requires a reset.
371 */
53bb9f80
JF		 372 do_reset = adapter->dcb_set_bitmap & (BIT_RESETLINK | BIT_APP_UPCHG);
373
374 if (do_reset) {
62551d3e
PWJ		 375 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
376 msleep(1);
2f90b865 377
8de8b2e6
YZ		 378 if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
379 if (netif_running(netdev))
380 netdev->netdev_ops->ndo_stop(netdev);
381 ixgbe_clear_interrupt_scheme(adapter);
382 } else {
383 if (netif_running(netdev))
384 ixgbe_down(adapter);
385 }
62551d3e 386 }
2f90b865 387
264857b8 388 if (adapter->dcb_cfg.pfc_mode_enable) {
b93a2226
DS		 389 switch (adapter->hw.mac.type) {
390 case ixgbe_mac_82599EB:
391 case ixgbe_mac_X540:
392 if (adapter->hw.fc.current_mode != ixgbe_fc_pfc)
393 adapter->last_lfc_mode =
394 adapter->hw.fc.current_mode;
395 break;
396 default:
397 break;
398 }
264857b8
PWJ		 399 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
400 } else {
b93a2226
DS		 401 switch (adapter->hw.mac.type) {
402 case ixgbe_mac_82598EB:
264857b8 403 adapter->hw.fc.requested_mode = ixgbe_fc_none;
b93a2226
DS		 404 break;
405 case ixgbe_mac_82599EB:
406 case ixgbe_mac_X540:
407 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
408 break;
409 default:
410 break;
411 }
264857b8
PWJ		 412 }
413
53bb9f80 414 if (do_reset) {
8de8b2e6
YZ		 415 if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
416 ixgbe_init_interrupt_scheme(adapter);
417 if (netif_running(netdev))
418 netdev->netdev_ops->ndo_open(netdev);
419 } else {
420 if (netif_running(netdev))
421 ixgbe_up(adapter);
422 }
62551d3e
PWJ		 423 ret = DCB_HW_CHG_RST;
424 } else if (adapter->dcb_set_bitmap & BIT_PFC) {
55320cb5
JF		 425 u8 pfc_en;
426 ixgbe_dcb_unpack_pfc(&adapter->dcb_cfg, &pfc_en);
427
62551d3e 428 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
55320cb5 429 ixgbe_dcb_config_pfc_82598(&adapter->hw, pfc_en);
62551d3e 430 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
55320cb5 431 ixgbe_dcb_config_pfc_82599(&adapter->hw, pfc_en);
62551d3e
PWJ		 432 ret = DCB_HW_CHG;
433 }
264857b8
PWJ		 434 if (adapter->dcb_cfg.pfc_mode_enable)
435 adapter->hw.fc.current_mode = ixgbe_fc_pfc;
436
53bb9f80 437 if (do_reset)
62551d3e 438 clear_bit(__IXGBE_RESETTING, &adapter->state);
2f90b865 439 adapter->dcb_set_bitmap = 0x00;
2f90b865
AD		 440 return ret;
441}
442
46132188
AD		 443static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
444{
445 struct ixgbe_adapter *adapter = netdev_priv(netdev);
446 u8 rval = 0;
447
448 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
449 switch (capid) {
450 case DCB_CAP_ATTR_PG:
451 *cap = true;
452 break;
453 case DCB_CAP_ATTR_PFC:
454 *cap = true;
455 break;
456 case DCB_CAP_ATTR_UP2TC:
457 *cap = false;
458 break;
459 case DCB_CAP_ATTR_PG_TCS:
460 *cap = 0x80;
461 break;
462 case DCB_CAP_ATTR_PFC_TCS:
463 *cap = 0x80;
464 break;
465 case DCB_CAP_ATTR_GSP:
466 *cap = true;
467 break;
468 case DCB_CAP_ATTR_BCN:
469 *cap = false;
470 break;
471 default:
472 rval = -EINVAL;
473 break;
474 }
475 } else {
476 rval = -EINVAL;
477 }
478
479 return rval;
480}
481
33dbabc4
AD		 482static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
483{
484 struct ixgbe_adapter *adapter = netdev_priv(netdev);
485 u8 rval = 0;
486
487 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
488 switch (tcid) {
489 case DCB_NUMTCS_ATTR_PG:
490 *num = MAX_TRAFFIC_CLASS;
491 break;
492 case DCB_NUMTCS_ATTR_PFC:
493 *num = MAX_TRAFFIC_CLASS;
494 break;
495 default:
496 rval = -EINVAL;
497 break;
498 }
499 } else {
500 rval = -EINVAL;
501 }
502
503 return rval;
504}
505
506static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
507{
508 return -EINVAL;
509}
510
0eb3aa9b
AD		 511static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
512{
513 struct ixgbe_adapter *adapter = netdev_priv(netdev);
514
264857b8 515 return adapter->dcb_cfg.pfc_mode_enable;
0eb3aa9b
AD		 516}
517
518static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
519{
264857b8
PWJ		 520 struct ixgbe_adapter *adapter = netdev_priv(netdev);
521
522 adapter->temp_dcb_cfg.pfc_mode_enable = state;
523 if (adapter->temp_dcb_cfg.pfc_mode_enable !=
524 adapter->dcb_cfg.pfc_mode_enable)
525 adapter->dcb_set_bitmap |= BIT_PFC;
0eb3aa9b
AD		 526}
527
6ee16520
YZ		 528/**
529 * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority
530 * @netdev : the corresponding netdev
531 * @idtype : identifies the id as ether type or TCP/UDP port number
532 * @id: id is either ether type or TCP/UDP port number
533 *
534 * Returns : on success, returns a non-zero 802.1p user priority bitmap
535 * otherwise returns 0 as the invalid user priority bitmap to indicate an
536 * error.
537 */
538static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
539{
540 u8 rval = 0;
541
542 switch (idtype) {
543 case DCB_APP_IDTYPE_ETHTYPE:
544#ifdef IXGBE_FCOE
545 if (id == ETH_P_FCOE)
546 rval = ixgbe_fcoe_getapp(netdev_priv(netdev));
547#endif
548 break;
549 case DCB_APP_IDTYPE_PORTNUM:
550 break;
551 default:
552 break;
553 }
554 return rval;
555}
556
557/**
558 * ixgbe_dcbnl_setapp - set the DCBX application user priority
559 * @netdev : the corresponding netdev
560 * @idtype : identifies the id as ether type or TCP/UDP port number
561 * @id: id is either ether type or TCP/UDP port number
562 * @up: the 802.1p user priority bitmap
563 *
564 * Returns : 0 on success or 1 on error
565 */
566static u8 ixgbe_dcbnl_setapp(struct net_device *netdev,
567 u8 idtype, u16 id, u8 up)
568{
569 u8 rval = 1;
570
571 switch (idtype) {
572 case DCB_APP_IDTYPE_ETHTYPE:
573#ifdef IXGBE_FCOE
8de8b2e6 574 if (id == ETH_P_FCOE) {
53bb9f80
JF		 575 u8 old_tc;
576 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8de8b2e6 577
53bb9f80
JF		 578 /* Get current programmed tc */
579 old_tc = adapter->fcoe.tc;
8de8b2e6 580 rval = ixgbe_fcoe_setapp(adapter, up);
53bb9f80
JF		 581
582 if (rval ||
583 !(adapter->flags & IXGBE_FLAG_DCB_ENABLED) ||
584 !(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
585 break;
586
587 /* The FCoE application priority may be changed multiple
588 * times in quick sucession with switches that build up
589 * TLVs. To avoid creating uneeded device resets this
590 * checks the actual HW configuration and clears
591 * BIT_APP_UPCHG if a HW configuration change is not
592 * need
593 */
594 if (old_tc == adapter->fcoe.tc)
595 adapter->dcb_set_bitmap &= ~BIT_APP_UPCHG;
596 else
8de8b2e6 597 adapter->dcb_set_bitmap |= BIT_APP_UPCHG;
8de8b2e6 598 }
6ee16520
YZ		 599#endif
600 break;
601 case DCB_APP_IDTYPE_PORTNUM:
602 break;
603 default:
604 break;
605 }
606 return rval;
607}
608
d033d526
JF		 609static int ixgbe_dcbnl_ieee_getets(struct net_device *dev,
610 struct ieee_ets *ets)
611{
612 struct ixgbe_adapter *adapter = netdev_priv(dev);
613 struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets;
614
615 /* No IEEE PFC settings available */
616 if (!my_ets)
617 return -EINVAL;
618
619 ets->ets_cap = MAX_TRAFFIC_CLASS;
620 ets->cbs = my_ets->cbs;
621 memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw));
622 memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw));
623 memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
624 memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
625 return 0;
626}
627
628static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
629 struct ieee_ets *ets)
630{
631 struct ixgbe_adapter *adapter = netdev_priv(dev);
632 __u16 refill[IEEE_8021QAZ_MAX_TCS], max[IEEE_8021QAZ_MAX_TCS];
633 int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
634 int err;
635 /* naively give each TC a bwg to map onto CEE hardware */
636 __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7};
637
638 if (!adapter->ixgbe_ieee_ets) {
639 adapter->ixgbe_ieee_ets = kmalloc(sizeof(struct ieee_ets),
640 GFP_KERNEL);
641 if (!adapter->ixgbe_ieee_ets)
642 return -ENOMEM;
643 }
644
645
646 memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets));
647
648 ixgbe_ieee_credits(ets->tc_tx_bw, refill, max, max_frame);
649 err = ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
650 bwg_id, ets->tc_tsa);
651 return err;
652}
653
654static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev,
655 struct ieee_pfc *pfc)
656{
657 struct ixgbe_adapter *adapter = netdev_priv(dev);
658 struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc;
659 int i;
660
661 /* No IEEE PFC settings available */
662 if (!my_pfc)
663 return -EINVAL;
664
665 pfc->pfc_cap = MAX_TRAFFIC_CLASS;
666 pfc->pfc_en = my_pfc->pfc_en;
667 pfc->mbc = my_pfc->mbc;
668 pfc->delay = my_pfc->delay;
669
670 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
671 pfc->requests[i] = adapter->stats.pxoffrxc[i];
672 pfc->indications[i] = adapter->stats.pxofftxc[i];
673 }
674
675 return 0;
676}
677
678static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,
679 struct ieee_pfc *pfc)
680{
681 struct ixgbe_adapter *adapter = netdev_priv(dev);
682 int err;
683
684 if (!adapter->ixgbe_ieee_pfc) {
685 adapter->ixgbe_ieee_pfc = kmalloc(sizeof(struct ieee_pfc),
686 GFP_KERNEL);
687 if (!adapter->ixgbe_ieee_pfc)
688 return -ENOMEM;
689 }
690
691 memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc));
692 err = ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en);
693 return err;
694}
695
32953543 696const struct dcbnl_rtnl_ops dcbnl_ops = {
d033d526
JF		 697 .ieee_getets = ixgbe_dcbnl_ieee_getets,
698 .ieee_setets = ixgbe_dcbnl_ieee_setets,
699 .ieee_getpfc = ixgbe_dcbnl_ieee_getpfc,
700 .ieee_setpfc = ixgbe_dcbnl_ieee_setpfc,
2f90b865
AD		 701 .getstate = ixgbe_dcbnl_get_state,
702 .setstate = ixgbe_dcbnl_set_state,
703 .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
704 .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
705 .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
706 .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
707 .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
708 .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
709 .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
710 .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
711 .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
712 .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
713 .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
46132188 714 .setall = ixgbe_dcbnl_set_all,
33dbabc4
AD		 715 .getcap = ixgbe_dcbnl_getcap,
716 .getnumtcs = ixgbe_dcbnl_getnumtcs,
0eb3aa9b
AD		 717 .setnumtcs = ixgbe_dcbnl_setnumtcs,
718 .getpfcstate = ixgbe_dcbnl_getpfcstate,
859ee3c4 719 .setpfcstate = ixgbe_dcbnl_setpfcstate,
6ee16520
YZ		 720 .getapp = ixgbe_dcbnl_getapp,
721 .setapp = ixgbe_dcbnl_setapp,
2f90b865
AD		 722};
723
Linux kernel - Deliverables
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