ixgbe: DCB, remove RESET bit it is no longer needed
[deliverable/linux.git] / drivers / net / ixgbe / ixgbe_dcb_nl.c
CommitLineData
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1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
8c47eaa7 4 Copyright(c) 1999 - 2010 Intel Corporation.
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5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgbe.h"
30#include <linux/dcbnl.h>
62551d3e
PWJ
31#include "ixgbe_dcb_82598.h"
32#include "ixgbe_dcb_82599.h"
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33
34/* Callbacks for DCB netlink in the kernel */
35#define BIT_DCB_MODE 0x01
36#define BIT_PFC 0x02
37#define BIT_PG_RX 0x04
38#define BIT_PG_TX 0x08
8de8b2e6 39#define BIT_APP_UPCHG 0x10
235ea828 40#define BIT_LINKSPEED 0x80
2f90b865 41
62551d3e
PWJ
42/* Responses for the DCB_C_SET_ALL command */
43#define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
44#define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
45#define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
46
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47int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
48 struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
49{
50 struct tc_configuration *src_tc_cfg = NULL;
51 struct tc_configuration *dst_tc_cfg = NULL;
52 int i;
53
54 if (!src_dcb_cfg || !dst_dcb_cfg)
55 return -EINVAL;
56
57 for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
58 src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
59 dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
60
61 dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
62 src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
63
64 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
65 src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
66
67 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
68 src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
69
70 dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
71 src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
72
73 dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
74 src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
75
76 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
77 src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
78
79 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
80 src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
81
82 dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
83 src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
84 }
85
86 for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
87 dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
88 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
89 [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
90 dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
91 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
92 [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
93 }
94
95 for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
96 dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
97 src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
98 }
99
ea4af4f4
PW
100 dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
101
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102 return 0;
103}
104
105static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
106{
107 struct ixgbe_adapter *adapter = netdev_priv(netdev);
108
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109 return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
110}
111
1486a61e 112static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
2f90b865 113{
1486a61e 114 u8 err = 0;
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115 struct ixgbe_adapter *adapter = netdev_priv(netdev);
116
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117 if (state > 0) {
118 /* Turn on DCB */
1486a61e
DS
119 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
120 goto out;
2f90b865 121
1486a61e 122 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
396e799c 123 e_err(drv, "Enable failed, needs MSI-X\n");
1486a61e
DS
124 err = 1;
125 goto out;
2f90b865 126 }
1486a61e
DS
127
128 if (netif_running(netdev))
129 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 130 ixgbe_clear_interrupt_scheme(adapter);
1486a61e 131
b93a2226
DS
132 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
133 switch (adapter->hw.mac.type) {
134 case ixgbe_mac_82598EB:
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135 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
136 adapter->hw.fc.requested_mode = ixgbe_fc_none;
b93a2226
DS
137 break;
138 case ixgbe_mac_82599EB:
139 case ixgbe_mac_X540:
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140 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
141 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
b93a2226
DS
142 break;
143 default:
144 break;
8faa2a78 145 }
b93a2226 146
1486a61e
DS
147 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
148 ixgbe_init_interrupt_scheme(adapter);
1486a61e
DS
149 if (netif_running(netdev))
150 netdev->netdev_ops->ndo_open(netdev);
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151 } else {
152 /* Turn off DCB */
153 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
154 if (netif_running(netdev))
1486a61e 155 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 156 ixgbe_clear_interrupt_scheme(adapter);
2f90b865 157
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158 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
159 adapter->temp_dcb_cfg.pfc_mode_enable = false;
160 adapter->dcb_cfg.pfc_mode_enable = false;
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161 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
162 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
b93a2226
DS
163 switch (adapter->hw.mac.type) {
164 case ixgbe_mac_82599EB:
165 case ixgbe_mac_X540:
8faa2a78 166 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
b93a2226
DS
167 break;
168 default:
169 break;
170 }
0d551589 171
2f90b865 172 ixgbe_init_interrupt_scheme(adapter);
2f90b865 173 if (netif_running(netdev))
1486a61e 174 netdev->netdev_ops->ndo_open(netdev);
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175 }
176 }
1486a61e
DS
177out:
178 return err;
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179}
180
181static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
182 u8 *perm_addr)
183{
184 struct ixgbe_adapter *adapter = netdev_priv(netdev);
aca6bee7 185 int i, j;
2f90b865 186
86e713a0
LL
187 memset(perm_addr, 0xff, MAX_ADDR_LEN);
188
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189 for (i = 0; i < netdev->addr_len; i++)
190 perm_addr[i] = adapter->hw.mac.perm_addr[i];
aca6bee7 191
b93a2226
DS
192 switch (adapter->hw.mac.type) {
193 case ixgbe_mac_82599EB:
194 case ixgbe_mac_X540:
aca6bee7
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195 for (j = 0; j < netdev->addr_len; j++, i++)
196 perm_addr[i] = adapter->hw.mac.san_addr[j];
b93a2226
DS
197 break;
198 default:
199 break;
aca6bee7 200 }
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201}
202
203static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
204 u8 prio, u8 bwg_id, u8 bw_pct,
205 u8 up_map)
206{
207 struct ixgbe_adapter *adapter = netdev_priv(netdev);
208
209 if (prio != DCB_ATTR_VALUE_UNDEFINED)
210 adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
211 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
212 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
213 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
214 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
215 bw_pct;
216 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
217 adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
218 up_map;
219
220 if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
221 adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
222 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
223 adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
224 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
225 adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
226 (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
d43f5c21 227 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap))
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228 adapter->dcb_set_bitmap |= BIT_PG_TX;
229}
230
231static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
232 u8 bw_pct)
233{
234 struct ixgbe_adapter *adapter = netdev_priv(netdev);
235
236 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
237
238 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
d43f5c21 239 adapter->dcb_cfg.bw_percentage[0][bwg_id])
ebe1b30c 240 adapter->dcb_set_bitmap |= BIT_PG_TX;
2f90b865
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241}
242
243static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
244 u8 prio, u8 bwg_id, u8 bw_pct,
245 u8 up_map)
246{
247 struct ixgbe_adapter *adapter = netdev_priv(netdev);
248
249 if (prio != DCB_ATTR_VALUE_UNDEFINED)
250 adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
251 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
252 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
253 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
254 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
255 bw_pct;
256 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
257 adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
258 up_map;
259
260 if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
261 adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
262 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
263 adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
264 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
265 adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
266 (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
d43f5c21 267 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap))
2f90b865
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268 adapter->dcb_set_bitmap |= BIT_PG_RX;
269}
270
271static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
272 u8 bw_pct)
273{
274 struct ixgbe_adapter *adapter = netdev_priv(netdev);
275
276 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
277
278 if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
d43f5c21 279 adapter->dcb_cfg.bw_percentage[1][bwg_id])
2f90b865
AD
280 adapter->dcb_set_bitmap |= BIT_PG_RX;
281}
282
283static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
284 u8 *prio, u8 *bwg_id, u8 *bw_pct,
285 u8 *up_map)
286{
287 struct ixgbe_adapter *adapter = netdev_priv(netdev);
288
289 *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
290 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
291 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
292 *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
293}
294
295static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
296 u8 *bw_pct)
297{
298 struct ixgbe_adapter *adapter = netdev_priv(netdev);
299
300 *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
301}
302
303static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
304 u8 *prio, u8 *bwg_id, u8 *bw_pct,
305 u8 *up_map)
306{
307 struct ixgbe_adapter *adapter = netdev_priv(netdev);
308
309 *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
310 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
311 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
312 *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
313}
314
315static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
316 u8 *bw_pct)
317{
318 struct ixgbe_adapter *adapter = netdev_priv(netdev);
319
320 *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
321}
322
323static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
324 u8 setting)
325{
326 struct ixgbe_adapter *adapter = netdev_priv(netdev);
327
328 adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
329 if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
ea4af4f4 330 adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
2f90b865 331 adapter->dcb_set_bitmap |= BIT_PFC;
ea4af4f4
PW
332 adapter->temp_dcb_cfg.pfc_mode_enable = true;
333 }
2f90b865
AD
334}
335
336static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
337 u8 *setting)
338{
339 struct ixgbe_adapter *adapter = netdev_priv(netdev);
340
341 *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
342}
343
344static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
345{
346 struct ixgbe_adapter *adapter = netdev_priv(netdev);
347 int ret;
348
349 if (!adapter->dcb_set_bitmap)
62551d3e 350 return DCB_NO_HW_CHG;
2f90b865 351
3ce1cc52
JF
352 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
353 adapter->ring_feature[RING_F_DCB].indices);
354
355 if (ret)
356 return DCB_NO_HW_CHG;
357
62551d3e 358 /*
d37e1d0e
JF
359 * Only take down the adapter if an app change occured. FCoE
360 * may shuffle tx rings in this case and this can not be done
361 * without a reset currently.
62551d3e 362 */
d37e1d0e 363 if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
62551d3e
PWJ
364 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
365 msleep(1);
2f90b865 366
d37e1d0e
JF
367 if (netif_running(netdev))
368 netdev->netdev_ops->ndo_stop(netdev);
369 ixgbe_clear_interrupt_scheme(adapter);
62551d3e 370 }
2f90b865 371
264857b8 372 if (adapter->dcb_cfg.pfc_mode_enable) {
b93a2226
DS
373 switch (adapter->hw.mac.type) {
374 case ixgbe_mac_82599EB:
375 case ixgbe_mac_X540:
376 if (adapter->hw.fc.current_mode != ixgbe_fc_pfc)
377 adapter->last_lfc_mode =
378 adapter->hw.fc.current_mode;
379 break;
380 default:
381 break;
382 }
264857b8
PWJ
383 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
384 } else {
b93a2226
DS
385 switch (adapter->hw.mac.type) {
386 case ixgbe_mac_82598EB:
264857b8 387 adapter->hw.fc.requested_mode = ixgbe_fc_none;
b93a2226
DS
388 break;
389 case ixgbe_mac_82599EB:
390 case ixgbe_mac_X540:
391 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
392 break;
393 default:
394 break;
395 }
264857b8
PWJ
396 }
397
d37e1d0e
JF
398 if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
399 ixgbe_init_interrupt_scheme(adapter);
400 if (netif_running(netdev))
401 netdev->netdev_ops->ndo_open(netdev);
62551d3e 402 ret = DCB_HW_CHG_RST;
d43f5c21
JF
403 }
404
405 if (adapter->dcb_set_bitmap & BIT_PFC) {
55320cb5
JF
406 u8 pfc_en;
407 ixgbe_dcb_unpack_pfc(&adapter->dcb_cfg, &pfc_en);
408
62551d3e 409 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
55320cb5 410 ixgbe_dcb_config_pfc_82598(&adapter->hw, pfc_en);
62551d3e 411 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
55320cb5 412 ixgbe_dcb_config_pfc_82599(&adapter->hw, pfc_en);
62551d3e
PWJ
413 ret = DCB_HW_CHG;
414 }
d43f5c21
JF
415
416 if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) {
417 u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS];
418 u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS];
419 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
420
421#ifdef CONFIG_FCOE
422 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
423 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
424#endif
425
426 ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
427 max_frame, DCB_TX_CONFIG);
428 ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
429 max_frame, DCB_RX_CONFIG);
430
431 ixgbe_dcb_unpack_refill(&adapter->dcb_cfg,
432 DCB_TX_CONFIG, refill);
433 ixgbe_dcb_unpack_max(&adapter->dcb_cfg, max);
434 ixgbe_dcb_unpack_bwgid(&adapter->dcb_cfg,
435 DCB_TX_CONFIG, bwg_id);
436 ixgbe_dcb_unpack_prio(&adapter->dcb_cfg,
437 DCB_TX_CONFIG, prio_type);
438
439 ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
440 bwg_id, prio_type);
441 }
442
264857b8
PWJ
443 if (adapter->dcb_cfg.pfc_mode_enable)
444 adapter->hw.fc.current_mode = ixgbe_fc_pfc;
445
d37e1d0e 446 if (adapter->dcb_set_bitmap & BIT_APP_UPCHG)
62551d3e 447 clear_bit(__IXGBE_RESETTING, &adapter->state);
2f90b865 448 adapter->dcb_set_bitmap = 0x00;
2f90b865
AD
449 return ret;
450}
451
46132188
AD
452static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
453{
454 struct ixgbe_adapter *adapter = netdev_priv(netdev);
455 u8 rval = 0;
456
457 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
458 switch (capid) {
459 case DCB_CAP_ATTR_PG:
460 *cap = true;
461 break;
462 case DCB_CAP_ATTR_PFC:
463 *cap = true;
464 break;
465 case DCB_CAP_ATTR_UP2TC:
466 *cap = false;
467 break;
468 case DCB_CAP_ATTR_PG_TCS:
469 *cap = 0x80;
470 break;
471 case DCB_CAP_ATTR_PFC_TCS:
472 *cap = 0x80;
473 break;
474 case DCB_CAP_ATTR_GSP:
475 *cap = true;
476 break;
477 case DCB_CAP_ATTR_BCN:
478 *cap = false;
479 break;
480 default:
481 rval = -EINVAL;
482 break;
483 }
484 } else {
485 rval = -EINVAL;
486 }
487
488 return rval;
489}
490
33dbabc4
AD
491static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
492{
493 struct ixgbe_adapter *adapter = netdev_priv(netdev);
494 u8 rval = 0;
495
496 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
497 switch (tcid) {
498 case DCB_NUMTCS_ATTR_PG:
499 *num = MAX_TRAFFIC_CLASS;
500 break;
501 case DCB_NUMTCS_ATTR_PFC:
502 *num = MAX_TRAFFIC_CLASS;
503 break;
504 default:
505 rval = -EINVAL;
506 break;
507 }
508 } else {
509 rval = -EINVAL;
510 }
511
512 return rval;
513}
514
515static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
516{
517 return -EINVAL;
518}
519
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520static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
521{
522 struct ixgbe_adapter *adapter = netdev_priv(netdev);
523
264857b8 524 return adapter->dcb_cfg.pfc_mode_enable;
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525}
526
527static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
528{
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529 struct ixgbe_adapter *adapter = netdev_priv(netdev);
530
531 adapter->temp_dcb_cfg.pfc_mode_enable = state;
532 if (adapter->temp_dcb_cfg.pfc_mode_enable !=
533 adapter->dcb_cfg.pfc_mode_enable)
534 adapter->dcb_set_bitmap |= BIT_PFC;
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535}
536
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537/**
538 * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority
539 * @netdev : the corresponding netdev
540 * @idtype : identifies the id as ether type or TCP/UDP port number
541 * @id: id is either ether type or TCP/UDP port number
542 *
543 * Returns : on success, returns a non-zero 802.1p user priority bitmap
544 * otherwise returns 0 as the invalid user priority bitmap to indicate an
545 * error.
546 */
547static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
548{
549 u8 rval = 0;
550
551 switch (idtype) {
552 case DCB_APP_IDTYPE_ETHTYPE:
553#ifdef IXGBE_FCOE
554 if (id == ETH_P_FCOE)
555 rval = ixgbe_fcoe_getapp(netdev_priv(netdev));
556#endif
557 break;
558 case DCB_APP_IDTYPE_PORTNUM:
559 break;
560 default:
561 break;
562 }
563 return rval;
564}
565
566/**
567 * ixgbe_dcbnl_setapp - set the DCBX application user priority
568 * @netdev : the corresponding netdev
569 * @idtype : identifies the id as ether type or TCP/UDP port number
570 * @id: id is either ether type or TCP/UDP port number
571 * @up: the 802.1p user priority bitmap
572 *
573 * Returns : 0 on success or 1 on error
574 */
575static u8 ixgbe_dcbnl_setapp(struct net_device *netdev,
576 u8 idtype, u16 id, u8 up)
577{
578 u8 rval = 1;
579
580 switch (idtype) {
581 case DCB_APP_IDTYPE_ETHTYPE:
582#ifdef IXGBE_FCOE
8de8b2e6 583 if (id == ETH_P_FCOE) {
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584 u8 old_tc;
585 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8de8b2e6 586
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587 /* Get current programmed tc */
588 old_tc = adapter->fcoe.tc;
8de8b2e6 589 rval = ixgbe_fcoe_setapp(adapter, up);
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590
591 if (rval ||
592 !(adapter->flags & IXGBE_FLAG_DCB_ENABLED) ||
593 !(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
594 break;
595
596 /* The FCoE application priority may be changed multiple
597 * times in quick sucession with switches that build up
598 * TLVs. To avoid creating uneeded device resets this
599 * checks the actual HW configuration and clears
600 * BIT_APP_UPCHG if a HW configuration change is not
601 * need
602 */
603 if (old_tc == adapter->fcoe.tc)
604 adapter->dcb_set_bitmap &= ~BIT_APP_UPCHG;
605 else
8de8b2e6 606 adapter->dcb_set_bitmap |= BIT_APP_UPCHG;
8de8b2e6 607 }
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608#endif
609 break;
610 case DCB_APP_IDTYPE_PORTNUM:
611 break;
612 default:
613 break;
614 }
615 return rval;
616}
617
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618static int ixgbe_dcbnl_ieee_getets(struct net_device *dev,
619 struct ieee_ets *ets)
620{
621 struct ixgbe_adapter *adapter = netdev_priv(dev);
622 struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets;
623
624 /* No IEEE PFC settings available */
625 if (!my_ets)
626 return -EINVAL;
627
628 ets->ets_cap = MAX_TRAFFIC_CLASS;
629 ets->cbs = my_ets->cbs;
630 memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw));
631 memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw));
632 memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
633 memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
634 return 0;
635}
636
637static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
638 struct ieee_ets *ets)
639{
640 struct ixgbe_adapter *adapter = netdev_priv(dev);
641 __u16 refill[IEEE_8021QAZ_MAX_TCS], max[IEEE_8021QAZ_MAX_TCS];
642 int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
643 int err;
644 /* naively give each TC a bwg to map onto CEE hardware */
645 __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7};
646
647 if (!adapter->ixgbe_ieee_ets) {
648 adapter->ixgbe_ieee_ets = kmalloc(sizeof(struct ieee_ets),
649 GFP_KERNEL);
650 if (!adapter->ixgbe_ieee_ets)
651 return -ENOMEM;
652 }
653
654
655 memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets));
656
657 ixgbe_ieee_credits(ets->tc_tx_bw, refill, max, max_frame);
658 err = ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
659 bwg_id, ets->tc_tsa);
660 return err;
661}
662
663static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev,
664 struct ieee_pfc *pfc)
665{
666 struct ixgbe_adapter *adapter = netdev_priv(dev);
667 struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc;
668 int i;
669
670 /* No IEEE PFC settings available */
671 if (!my_pfc)
672 return -EINVAL;
673
674 pfc->pfc_cap = MAX_TRAFFIC_CLASS;
675 pfc->pfc_en = my_pfc->pfc_en;
676 pfc->mbc = my_pfc->mbc;
677 pfc->delay = my_pfc->delay;
678
679 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
680 pfc->requests[i] = adapter->stats.pxoffrxc[i];
681 pfc->indications[i] = adapter->stats.pxofftxc[i];
682 }
683
684 return 0;
685}
686
687static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,
688 struct ieee_pfc *pfc)
689{
690 struct ixgbe_adapter *adapter = netdev_priv(dev);
691 int err;
692
693 if (!adapter->ixgbe_ieee_pfc) {
694 adapter->ixgbe_ieee_pfc = kmalloc(sizeof(struct ieee_pfc),
695 GFP_KERNEL);
696 if (!adapter->ixgbe_ieee_pfc)
697 return -ENOMEM;
698 }
699
700 memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc));
701 err = ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en);
702 return err;
703}
704
32953543 705const struct dcbnl_rtnl_ops dcbnl_ops = {
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706 .ieee_getets = ixgbe_dcbnl_ieee_getets,
707 .ieee_setets = ixgbe_dcbnl_ieee_setets,
708 .ieee_getpfc = ixgbe_dcbnl_ieee_getpfc,
709 .ieee_setpfc = ixgbe_dcbnl_ieee_setpfc,
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710 .getstate = ixgbe_dcbnl_get_state,
711 .setstate = ixgbe_dcbnl_set_state,
712 .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
713 .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
714 .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
715 .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
716 .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
717 .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
718 .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
719 .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
720 .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
721 .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
722 .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
46132188 723 .setall = ixgbe_dcbnl_set_all,
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724 .getcap = ixgbe_dcbnl_getcap,
725 .getnumtcs = ixgbe_dcbnl_getnumtcs,
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726 .setnumtcs = ixgbe_dcbnl_setnumtcs,
727 .getpfcstate = ixgbe_dcbnl_getpfcstate,
859ee3c4 728 .setpfcstate = ixgbe_dcbnl_setpfcstate,
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729 .getapp = ixgbe_dcbnl_getapp,
730 .setapp = ixgbe_dcbnl_setapp,
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731};
732
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