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ixgbe: Add support for NETIF_F_FCOE_MTU to 82599 devices
[deliverable/linux.git] / drivers / net / ixgbe / ixgbe_dcb_nl.c
CommitLineData
2f90b865
AD		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
3efac5a0 4 Copyright(c) 1999 - 2009 Intel Corporation.
2f90b865
AD		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgbe.h"
30#include <linux/dcbnl.h>
62551d3e
PWJ		 31#include "ixgbe_dcb_82598.h"
32#include "ixgbe_dcb_82599.h"
2f90b865
AD		 33
34/* Callbacks for DCB netlink in the kernel */
35#define BIT_DCB_MODE 0x01
36#define BIT_PFC 0x02
37#define BIT_PG_RX 0x04
38#define BIT_PG_TX 0x08
62551d3e 39#define BIT_RESETLINK 0x40
235ea828 40#define BIT_LINKSPEED 0x80
2f90b865 41
62551d3e
PWJ		 42/* Responses for the DCB_C_SET_ALL command */
43#define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
44#define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
45#define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
46
2f90b865
AD		 47int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
48 struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
49{
50 struct tc_configuration *src_tc_cfg = NULL;
51 struct tc_configuration *dst_tc_cfg = NULL;
52 int i;
53
54 if (!src_dcb_cfg || !dst_dcb_cfg)
55 return -EINVAL;
56
57 for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
58 src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
59 dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
60
61 dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
62 src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
63
64 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
65 src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
66
67 dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
68 src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
69
70 dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
71 src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
72
73 dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
74 src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
75
76 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
77 src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
78
79 dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
80 src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
81
82 dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
83 src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
84 }
85
86 for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
87 dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
88 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
89 [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
90 dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
91 [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
92 [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
93 }
94
95 for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
96 dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
97 src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
98 }
99
ea4af4f4
PW		 100 dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
101
2f90b865
AD		 102 return 0;
103}
104
105static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
106{
107 struct ixgbe_adapter *adapter = netdev_priv(netdev);
108
2f90b865
AD		 109 return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
110}
111
1486a61e 112static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
2f90b865 113{
1486a61e 114 u8 err = 0;
2f90b865
AD		 115 struct ixgbe_adapter *adapter = netdev_priv(netdev);
116
2f90b865
AD		 117 if (state > 0) {
118 /* Turn on DCB */
1486a61e
DS		 119 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
120 goto out;
2f90b865 121
1486a61e
DS		 122 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
123 DPRINTK(DRV, ERR, "Enable failed, needs MSI-X\n");
124 err = 1;
125 goto out;
2f90b865 126 }
1486a61e
DS		 127
128 if (netif_running(netdev))
129 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 130 ixgbe_clear_interrupt_scheme(adapter);
1486a61e 131
264857b8
PWJ		 132 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
133 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
134 adapter->hw.fc.requested_mode = ixgbe_fc_none;
135 }
1486a61e 136 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
8faa2a78
YZ		 137 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
138 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
139 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
140 }
1486a61e 141 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
0d551589
YZ		 142#ifdef IXGBE_FCOE
143 /* Turn on FCoE offload */
144 if ((adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) &&
145 (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))) {
146 adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
147 adapter->ring_feature[RING_F_FCOE].indices =
148 IXGBE_FCRETA_SIZE;
149 netdev->features |= NETIF_F_FCOE_CRC;
150 netdev->features |= NETIF_F_FSO;
f34c5c82 151 netdev->features |= NETIF_F_FCOE_MTU;
36a82236
VD		 152 netdev->vlan_features |= NETIF_F_FCOE_CRC;
153 netdev->vlan_features |= NETIF_F_FSO;
f34c5c82 154 netdev->vlan_features |= NETIF_F_FCOE_MTU;
0d551589 155 netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
36a82236 156 netdev_features_change(netdev);
0d551589
YZ		 157 }
158#endif /* IXGBE_FCOE */
1486a61e 159 ixgbe_init_interrupt_scheme(adapter);
1486a61e
DS		 160 if (netif_running(netdev))
161 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 162 } else {
163 /* Turn off DCB */
164 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
165 if (netif_running(netdev))
1486a61e 166 netdev->netdev_ops->ndo_stop(netdev);
7a921c93 167 ixgbe_clear_interrupt_scheme(adapter);
2f90b865 168
264857b8
PWJ		 169 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
170 adapter->temp_dcb_cfg.pfc_mode_enable = false;
171 adapter->dcb_cfg.pfc_mode_enable = false;
2f90b865
AD		 172 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
173 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
8faa2a78
YZ		 174 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
175 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
0d551589
YZ		 176
177#ifdef IXGBE_FCOE
178 /* Turn off FCoE offload */
179 if (adapter->flags & (IXGBE_FLAG_FCOE_CAPABLE |
180 IXGBE_FLAG_FCOE_ENABLED)) {
181 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
182 adapter->ring_feature[RING_F_FCOE].indices = 0;
183 netdev->features &= ~NETIF_F_FCOE_CRC;
184 netdev->features &= ~NETIF_F_FSO;
f34c5c82 185 netdev->features &= ~NETIF_F_FCOE_MTU;
36a82236
VD		 186 netdev->vlan_features &= ~NETIF_F_FCOE_CRC;
187 netdev->vlan_features &= ~NETIF_F_FSO;
f34c5c82 188 netdev->vlan_features &= ~NETIF_F_FCOE_MTU;
0d551589 189 netdev->fcoe_ddp_xid = 0;
36a82236 190 netdev_features_change(netdev);
0d551589
YZ		 191 }
192#endif /* IXGBE_FCOE */
2f90b865 193 ixgbe_init_interrupt_scheme(adapter);
2f90b865 194 if (netif_running(netdev))
1486a61e 195 netdev->netdev_ops->ndo_open(netdev);
2f90b865
AD		 196 }
197 }
1486a61e
DS		 198out:
199 return err;
2f90b865
AD		 200}
201
202static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
203 u8 *perm_addr)
204{
205 struct ixgbe_adapter *adapter = netdev_priv(netdev);
aca6bee7 206 int i, j;
2f90b865 207
86e713a0
LL		 208 memset(perm_addr, 0xff, MAX_ADDR_LEN);
209
2f90b865
AD		 210 for (i = 0; i < netdev->addr_len; i++)
211 perm_addr[i] = adapter->hw.mac.perm_addr[i];
aca6bee7
WJP		 212
213 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
214 for (j = 0; j < netdev->addr_len; j++, i++)
215 perm_addr[i] = adapter->hw.mac.san_addr[j];
216 }
2f90b865
AD		 217}
218
219static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
220 u8 prio, u8 bwg_id, u8 bw_pct,
221 u8 up_map)
222{
223 struct ixgbe_adapter *adapter = netdev_priv(netdev);
224
225 if (prio != DCB_ATTR_VALUE_UNDEFINED)
226 adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
227 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
228 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
229 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
230 adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
231 bw_pct;
232 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
233 adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
234 up_map;
235
236 if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
237 adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
238 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
239 adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
240 (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
241 adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
242 (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
62551d3e 243 adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) {
2f90b865 244 adapter->dcb_set_bitmap |= BIT_PG_TX;
62551d3e
PWJ		 245 adapter->dcb_set_bitmap |= BIT_RESETLINK;
246 }
2f90b865
AD		 247}
248
249static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
250 u8 bw_pct)
251{
252 struct ixgbe_adapter *adapter = netdev_priv(netdev);
253
254 adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
255
256 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
62551d3e 257 adapter->dcb_cfg.bw_percentage[0][bwg_id]) {
2f90b865 258 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 259 adapter->dcb_set_bitmap |= BIT_RESETLINK;
260 }
2f90b865
AD		 261}
262
263static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
264 u8 prio, u8 bwg_id, u8 bw_pct,
265 u8 up_map)
266{
267 struct ixgbe_adapter *adapter = netdev_priv(netdev);
268
269 if (prio != DCB_ATTR_VALUE_UNDEFINED)
270 adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
271 if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
272 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
273 if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
274 adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
275 bw_pct;
276 if (up_map != DCB_ATTR_VALUE_UNDEFINED)
277 adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
278 up_map;
279
280 if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
281 adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
282 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
283 adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
284 (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
285 adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
286 (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
62551d3e 287 adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) {
2f90b865 288 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 289 adapter->dcb_set_bitmap |= BIT_RESETLINK;
290 }
2f90b865
AD		 291}
292
293static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
294 u8 bw_pct)
295{
296 struct ixgbe_adapter *adapter = netdev_priv(netdev);
297
298 adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
299
300 if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
62551d3e 301 adapter->dcb_cfg.bw_percentage[1][bwg_id]) {
2f90b865 302 adapter->dcb_set_bitmap |= BIT_PG_RX;
62551d3e
PWJ		 303 adapter->dcb_set_bitmap |= BIT_RESETLINK;
304 }
2f90b865
AD		 305}
306
307static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
308 u8 *prio, u8 *bwg_id, u8 *bw_pct,
309 u8 *up_map)
310{
311 struct ixgbe_adapter *adapter = netdev_priv(netdev);
312
313 *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
314 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
315 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
316 *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
317}
318
319static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
320 u8 *bw_pct)
321{
322 struct ixgbe_adapter *adapter = netdev_priv(netdev);
323
324 *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
325}
326
327static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
328 u8 *prio, u8 *bwg_id, u8 *bw_pct,
329 u8 *up_map)
330{
331 struct ixgbe_adapter *adapter = netdev_priv(netdev);
332
333 *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
334 *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
335 *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
336 *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
337}
338
339static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
340 u8 *bw_pct)
341{
342 struct ixgbe_adapter *adapter = netdev_priv(netdev);
343
344 *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
345}
346
347static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
348 u8 setting)
349{
350 struct ixgbe_adapter *adapter = netdev_priv(netdev);
351
352 adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
353 if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
ea4af4f4 354 adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
2f90b865 355 adapter->dcb_set_bitmap |= BIT_PFC;
ea4af4f4
PW		 356 adapter->temp_dcb_cfg.pfc_mode_enable = true;
357 }
2f90b865
AD		 358}
359
360static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
361 u8 *setting)
362{
363 struct ixgbe_adapter *adapter = netdev_priv(netdev);
364
365 *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
366}
367
368static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
369{
370 struct ixgbe_adapter *adapter = netdev_priv(netdev);
371 int ret;
372
373 if (!adapter->dcb_set_bitmap)
62551d3e 374 return DCB_NO_HW_CHG;
2f90b865 375
62551d3e
PWJ		 376 /*
377 * Only take down the adapter if the configuration change
378 * requires a reset.
379 */
380 if (adapter->dcb_set_bitmap & BIT_RESETLINK) {
381 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
382 msleep(1);
2f90b865 383
62551d3e
PWJ		 384 if (netif_running(netdev))
385 ixgbe_down(adapter);
386 }
2f90b865
AD		 387
388 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
389 adapter->ring_feature[RING_F_DCB].indices);
390 if (ret) {
62551d3e
PWJ		 391 if (adapter->dcb_set_bitmap & BIT_RESETLINK)
392 clear_bit(__IXGBE_RESETTING, &adapter->state);
393 return DCB_NO_HW_CHG;
2f90b865
AD		 394 }
395
264857b8
PWJ		 396 if (adapter->dcb_cfg.pfc_mode_enable) {
397 if ((adapter->hw.mac.type != ixgbe_mac_82598EB) &&
398 (adapter->hw.fc.current_mode != ixgbe_fc_pfc))
399 adapter->last_lfc_mode = adapter->hw.fc.current_mode;
400 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
401 } else {
402 if (adapter->hw.mac.type != ixgbe_mac_82598EB)
403 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
404 else
405 adapter->hw.fc.requested_mode = ixgbe_fc_none;
406 }
407
62551d3e
PWJ		 408 if (adapter->dcb_set_bitmap & BIT_RESETLINK) {
409 if (netif_running(netdev))
410 ixgbe_up(adapter);
411 ret = DCB_HW_CHG_RST;
412 } else if (adapter->dcb_set_bitmap & BIT_PFC) {
413 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
414 ixgbe_dcb_config_pfc_82598(&adapter->hw,
415 &adapter->dcb_cfg);
416 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
417 ixgbe_dcb_config_pfc_82599(&adapter->hw,
418 &adapter->dcb_cfg);
419 ret = DCB_HW_CHG;
420 }
264857b8
PWJ		 421 if (adapter->dcb_cfg.pfc_mode_enable)
422 adapter->hw.fc.current_mode = ixgbe_fc_pfc;
423
62551d3e
PWJ		 424 if (adapter->dcb_set_bitmap & BIT_RESETLINK)
425 clear_bit(__IXGBE_RESETTING, &adapter->state);
2f90b865 426 adapter->dcb_set_bitmap = 0x00;
2f90b865
AD		 427 return ret;
428}
429
46132188
AD		 430static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
431{
432 struct ixgbe_adapter *adapter = netdev_priv(netdev);
433 u8 rval = 0;
434
435 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
436 switch (capid) {
437 case DCB_CAP_ATTR_PG:
438 *cap = true;
439 break;
440 case DCB_CAP_ATTR_PFC:
441 *cap = true;
442 break;
443 case DCB_CAP_ATTR_UP2TC:
444 *cap = false;
445 break;
446 case DCB_CAP_ATTR_PG_TCS:
447 *cap = 0x80;
448 break;
449 case DCB_CAP_ATTR_PFC_TCS:
450 *cap = 0x80;
451 break;
452 case DCB_CAP_ATTR_GSP:
453 *cap = true;
454 break;
455 case DCB_CAP_ATTR_BCN:
456 *cap = false;
457 break;
458 default:
459 rval = -EINVAL;
460 break;
461 }
462 } else {
463 rval = -EINVAL;
464 }
465
466 return rval;
467}
468
33dbabc4
AD		 469static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
470{
471 struct ixgbe_adapter *adapter = netdev_priv(netdev);
472 u8 rval = 0;
473
474 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
475 switch (tcid) {
476 case DCB_NUMTCS_ATTR_PG:
477 *num = MAX_TRAFFIC_CLASS;
478 break;
479 case DCB_NUMTCS_ATTR_PFC:
480 *num = MAX_TRAFFIC_CLASS;
481 break;
482 default:
483 rval = -EINVAL;
484 break;
485 }
486 } else {
487 rval = -EINVAL;
488 }
489
490 return rval;
491}
492
493static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
494{
495 return -EINVAL;
496}
497
0eb3aa9b
AD		 498static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
499{
500 struct ixgbe_adapter *adapter = netdev_priv(netdev);
501
264857b8 502 return adapter->dcb_cfg.pfc_mode_enable;
0eb3aa9b
AD		 503}
504
505static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
506{
264857b8
PWJ		 507 struct ixgbe_adapter *adapter = netdev_priv(netdev);
508
509 adapter->temp_dcb_cfg.pfc_mode_enable = state;
510 if (adapter->temp_dcb_cfg.pfc_mode_enable !=
511 adapter->dcb_cfg.pfc_mode_enable)
512 adapter->dcb_set_bitmap |= BIT_PFC;
0eb3aa9b
AD		 513 return;
514}
515
2f90b865
AD		 516struct dcbnl_rtnl_ops dcbnl_ops = {
517 .getstate = ixgbe_dcbnl_get_state,
518 .setstate = ixgbe_dcbnl_set_state,
519 .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
520 .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
521 .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
522 .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
523 .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
524 .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
525 .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
526 .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
527 .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
528 .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
529 .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
46132188 530 .setall = ixgbe_dcbnl_set_all,
33dbabc4
AD		 531 .getcap = ixgbe_dcbnl_getcap,
532 .getnumtcs = ixgbe_dcbnl_getnumtcs,
0eb3aa9b
AD		 533 .setnumtcs = ixgbe_dcbnl_setnumtcs,
534 .getpfcstate = ixgbe_dcbnl_getpfcstate,
859ee3c4 535 .setpfcstate = ixgbe_dcbnl_setpfcstate,
2f90b865
AD		 536};
537
Linux kernel - Deliverables
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