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ixgbe: fix slow load times on 82598 nics
[deliverable/linux.git] / drivers / net / ixgbe / ixgbe_ethtool.c
CommitLineData
9a799d71
AK		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
b4617240 4 Copyright(c) 1999 - 2008 Intel Corporation.
9a799d71
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
9a799d71
AK		 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28/* ethtool support for ixgbe */
29
30#include <linux/types.h>
31#include <linux/module.h>
32#include <linux/pci.h>
33#include <linux/netdevice.h>
34#include <linux/ethtool.h>
35#include <linux/vmalloc.h>
36#include <linux/uaccess.h>
37
38#include "ixgbe.h"
39
40
41#define IXGBE_ALL_RAR_ENTRIES 16
42
43struct ixgbe_stats {
44 char stat_string[ETH_GSTRING_LEN];
45 int sizeof_stat;
46 int stat_offset;
47};
48
49#define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
b4617240 50 offsetof(struct ixgbe_adapter, m)
9a799d71
AK		 51static struct ixgbe_stats ixgbe_gstrings_stats[] = {
52 {"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
53 {"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
54 {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
55 {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
56 {"lsc_int", IXGBE_STAT(lsc_int)},
57 {"tx_busy", IXGBE_STAT(tx_busy)},
58 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
59 {"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
60 {"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
61 {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
62 {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
63 {"multicast", IXGBE_STAT(net_stats.multicast)},
64 {"broadcast", IXGBE_STAT(stats.bprc)},
65 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
66 {"collisions", IXGBE_STAT(net_stats.collisions)},
67 {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
68 {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
69 {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
70 {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
71 {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
72 {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
73 {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
74 {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
75 {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
76 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
77 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
78 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
79 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
80 {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
81 {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
82 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
83 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
84 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
85 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
86 {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
87 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
88 {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
89 {"rx_header_split", IXGBE_STAT(rx_hdr_split)},
90 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
91 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
92};
93
94#define IXGBE_QUEUE_STATS_LEN \
454d7c9b
WC		 95 ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
96 ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
97 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
b4617240 98#define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
2f90b865 99#define IXGBE_PB_STATS_LEN ( \
9d2f4720 100 (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
2f90b865
AD		 101 IXGBE_FLAG_DCB_ENABLED) ? \
102 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
103 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
104 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
105 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
106 / sizeof(u64) : 0)
107#define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
108 IXGBE_PB_STATS_LEN + \
109 IXGBE_QUEUE_STATS_LEN)
9a799d71
AK		 110
111static int ixgbe_get_settings(struct net_device *netdev,
b4617240 112 struct ethtool_cmd *ecmd)
9a799d71
AK		 113{
114 struct ixgbe_adapter *adapter = netdev_priv(netdev);
735441fb
AV		 115 struct ixgbe_hw *hw = &adapter->hw;
116 u32 link_speed = 0;
117 bool link_up;
9a799d71 118
735441fb
AV		 119 ecmd->supported = SUPPORTED_10000baseT_Full;
120 ecmd->autoneg = AUTONEG_ENABLE;
9a799d71 121 ecmd->transceiver = XCVR_EXTERNAL;
735441fb
AV		 122 if (hw->phy.media_type == ixgbe_media_type_copper) {
123 ecmd->supported |= (SUPPORTED_1000baseT_Full |
b4617240 124 SUPPORTED_TP | SUPPORTED_Autoneg);
735441fb
AV		 125
126 ecmd->advertising = (ADVERTISED_TP | ADVERTISED_Autoneg);
127 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
128 ecmd->advertising |= ADVERTISED_10000baseT_Full;
129 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
130 ecmd->advertising |= ADVERTISED_1000baseT_Full;
131
132 ecmd->port = PORT_TP;
133 } else {
134 ecmd->supported |= SUPPORTED_FIBRE;
135 ecmd->advertising = (ADVERTISED_10000baseT_Full |
b4617240 136 ADVERTISED_FIBRE);
735441fb 137 ecmd->port = PORT_FIBRE;
c44ade9e 138 ecmd->autoneg = AUTONEG_DISABLE;
735441fb 139 }
9a799d71 140
c44ade9e 141 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
735441fb
AV		 142 if (link_up) {
143 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
b4617240 144 SPEED_10000 : SPEED_1000;
9a799d71
AK		 145 ecmd->duplex = DUPLEX_FULL;
146 } else {
147 ecmd->speed = -1;
148 ecmd->duplex = -1;
149 }
150
9a799d71
AK		 151 return 0;
152}
153
154static int ixgbe_set_settings(struct net_device *netdev,
b4617240 155 struct ethtool_cmd *ecmd)
9a799d71
AK		 156{
157 struct ixgbe_adapter *adapter = netdev_priv(netdev);
735441fb 158 struct ixgbe_hw *hw = &adapter->hw;
0befdb3e
JB		 159 u32 advertised, old;
160 s32 err;
9a799d71 161
735441fb
AV		 162 switch (hw->phy.media_type) {
163 case ixgbe_media_type_fiber:
164 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
165 (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
166 return -EINVAL;
167 /* in this case we currently only support 10Gb/FULL */
168 break;
0befdb3e
JB		 169 case ixgbe_media_type_copper:
170 /* 10000/copper and 1000/copper must autoneg
171 * this function does not support any duplex forcing, but can
172 * limit the advertising of the adapter to only 10000 or 1000 */
173 if (ecmd->autoneg == AUTONEG_DISABLE)
174 return -EINVAL;
175
176 old = hw->phy.autoneg_advertised;
177 advertised = 0;
178 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
179 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
180
181 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
182 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
183
184 if (old == advertised)
185 break;
186 /* this sets the link speed and restarts auto-neg */
187 err = hw->mac.ops.setup_link_speed(hw, advertised, true, true);
188 if (err) {
189 DPRINTK(PROBE, INFO,
190 "setup link failed with code %d\n", err);
191 hw->mac.ops.setup_link_speed(hw, old, true, true);
192 }
193 break;
735441fb
AV		 194 default:
195 break;
9a799d71
AK		 196 }
197
198 return 0;
199}
200
201static void ixgbe_get_pauseparam(struct net_device *netdev,
b4617240 202 struct ethtool_pauseparam *pause)
9a799d71
AK		 203{
204 struct ixgbe_adapter *adapter = netdev_priv(netdev);
205 struct ixgbe_hw *hw = &adapter->hw;
206
9c83b070 207 pause->autoneg = (hw->fc.type == ixgbe_fc_full ? 1 : 0);
9a799d71
AK		 208
209 if (hw->fc.type == ixgbe_fc_rx_pause) {
210 pause->rx_pause = 1;
211 } else if (hw->fc.type == ixgbe_fc_tx_pause) {
212 pause->tx_pause = 1;
213 } else if (hw->fc.type == ixgbe_fc_full) {
214 pause->rx_pause = 1;
215 pause->tx_pause = 1;
216 }
217}
218
219static int ixgbe_set_pauseparam(struct net_device *netdev,
b4617240 220 struct ethtool_pauseparam *pause)
9a799d71
AK		 221{
222 struct ixgbe_adapter *adapter = netdev_priv(netdev);
223 struct ixgbe_hw *hw = &adapter->hw;
224
9c83b070
AV		 225 if ((pause->autoneg == AUTONEG_ENABLE) ||
226 (pause->rx_pause && pause->tx_pause))
9a799d71
AK		 227 hw->fc.type = ixgbe_fc_full;
228 else if (pause->rx_pause && !pause->tx_pause)
229 hw->fc.type = ixgbe_fc_rx_pause;
230 else if (!pause->rx_pause && pause->tx_pause)
231 hw->fc.type = ixgbe_fc_tx_pause;
232 else if (!pause->rx_pause && !pause->tx_pause)
233 hw->fc.type = ixgbe_fc_none;
9c83b070
AV		 234 else
235 return -EINVAL;
9a799d71
AK		 236
237 hw->fc.original_type = hw->fc.type;
238
d4f80882
AV		 239 if (netif_running(netdev))
240 ixgbe_reinit_locked(adapter);
241 else
9a799d71 242 ixgbe_reset(adapter);
9a799d71
AK		 243
244 return 0;
245}
246
247static u32 ixgbe_get_rx_csum(struct net_device *netdev)
248{
249 struct ixgbe_adapter *adapter = netdev_priv(netdev);
250 return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
251}
252
253static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
254{
255 struct ixgbe_adapter *adapter = netdev_priv(netdev);
256 if (data)
257 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
258 else
259 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
260
d4f80882
AV		 261 if (netif_running(netdev))
262 ixgbe_reinit_locked(adapter);
263 else
9a799d71 264 ixgbe_reset(adapter);
9a799d71
AK		 265
266 return 0;
267}
268
269static u32 ixgbe_get_tx_csum(struct net_device *netdev)
270{
22f32b7a 271 return (netdev->features & NETIF_F_IP_CSUM) != 0;
9a799d71
AK		 272}
273
274static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
275{
276 if (data)
22f32b7a 277 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
9a799d71 278 else
3d3d6d3c 279 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
9a799d71
AK		 280
281 return 0;
282}
283
284static int ixgbe_set_tso(struct net_device *netdev, u32 data)
285{
9a799d71
AK		 286 if (data) {
287 netdev->features |= NETIF_F_TSO;
288 netdev->features |= NETIF_F_TSO6;
289 } else {
fd2ea0a7 290 netif_tx_stop_all_queues(netdev);
9a799d71
AK		 291 netdev->features &= ~NETIF_F_TSO;
292 netdev->features &= ~NETIF_F_TSO6;
fd2ea0a7 293 netif_tx_start_all_queues(netdev);
9a799d71
AK		 294 }
295 return 0;
296}
297
298static u32 ixgbe_get_msglevel(struct net_device *netdev)
299{
300 struct ixgbe_adapter *adapter = netdev_priv(netdev);
301 return adapter->msg_enable;
302}
303
304static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
305{
306 struct ixgbe_adapter *adapter = netdev_priv(netdev);
307 adapter->msg_enable = data;
308}
309
310static int ixgbe_get_regs_len(struct net_device *netdev)
311{
312#define IXGBE_REGS_LEN 1128
313 return IXGBE_REGS_LEN * sizeof(u32);
314}
315
316#define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
317
318static void ixgbe_get_regs(struct net_device *netdev,
b4617240 319 struct ethtool_regs *regs, void *p)
9a799d71
AK		 320{
321 struct ixgbe_adapter *adapter = netdev_priv(netdev);
322 struct ixgbe_hw *hw = &adapter->hw;
323 u32 *regs_buff = p;
324 u8 i;
325
326 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
327
328 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
329
330 /* General Registers */
331 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
332 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
333 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
334 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
335 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
336 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
337 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
338 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
339
340 /* NVM Register */
341 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
342 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
343 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
344 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
345 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
346 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
347 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
348 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
349 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
350 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
351
352 /* Interrupt */
98c00a1c
JB		 353 /* don't read EICR because it can clear interrupt causes, instead
354 * read EICS which is a shadow but doesn't clear EICR */
355 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
9a799d71
AK		 356 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
357 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
358 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
359 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
360 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
361 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
362 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
363 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
364 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
c44ade9e 365 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
9a799d71
AK		 366 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
367
368 /* Flow Control */
369 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
370 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
371 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
372 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
373 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
374 for (i = 0; i < 8; i++)
375 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
376 for (i = 0; i < 8; i++)
377 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
378 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
379 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
380
381 /* Receive DMA */
382 for (i = 0; i < 64; i++)
383 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
384 for (i = 0; i < 64; i++)
385 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
386 for (i = 0; i < 64; i++)
387 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
388 for (i = 0; i < 64; i++)
389 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
390 for (i = 0; i < 64; i++)
391 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
392 for (i = 0; i < 64; i++)
393 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
394 for (i = 0; i < 16; i++)
395 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
396 for (i = 0; i < 16; i++)
397 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
398 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
399 for (i = 0; i < 8; i++)
400 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
401 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
402 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
403
404 /* Receive */
405 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
406 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
407 for (i = 0; i < 16; i++)
408 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
409 for (i = 0; i < 16; i++)
410 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
c44ade9e 411 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
9a799d71
AK		 412 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
413 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
414 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
415 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
416 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
417 for (i = 0; i < 8; i++)
418 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
419 for (i = 0; i < 8; i++)
420 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
421 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
422
423 /* Transmit */
424 for (i = 0; i < 32; i++)
425 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
426 for (i = 0; i < 32; i++)
427 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
428 for (i = 0; i < 32; i++)
429 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
430 for (i = 0; i < 32; i++)
431 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
432 for (i = 0; i < 32; i++)
433 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
434 for (i = 0; i < 32; i++)
435 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
436 for (i = 0; i < 32; i++)
437 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
438 for (i = 0; i < 32; i++)
439 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
440 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
441 for (i = 0; i < 16; i++)
442 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
443 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
444 for (i = 0; i < 8; i++)
445 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
446 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
447
448 /* Wake Up */
449 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
450 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
451 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
452 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
453 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
454 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
455 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
456 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
457 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT);
458
9a799d71
AK		 459 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
460 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
461 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
462 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
463 for (i = 0; i < 8; i++)
464 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
465 for (i = 0; i < 8; i++)
466 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
467 for (i = 0; i < 8; i++)
468 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
469 for (i = 0; i < 8; i++)
470 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
471 for (i = 0; i < 8; i++)
472 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
473 for (i = 0; i < 8; i++)
474 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
475
476 /* Statistics */
477 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
478 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
479 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
480 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
481 for (i = 0; i < 8; i++)
482 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
483 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
484 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
485 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
486 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
487 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
488 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
489 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
490 for (i = 0; i < 8; i++)
491 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
492 for (i = 0; i < 8; i++)
493 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
494 for (i = 0; i < 8; i++)
495 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
496 for (i = 0; i < 8; i++)
497 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
498 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
499 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
500 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
501 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
502 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
503 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
504 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
505 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
506 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
507 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
508 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
509 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
510 for (i = 0; i < 8; i++)
511 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
512 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
513 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
514 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
515 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
516 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
517 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
518 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
519 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
520 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
521 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
522 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
523 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
524 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
525 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
526 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
527 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
528 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
529 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
530 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
531 for (i = 0; i < 16; i++)
532 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
533 for (i = 0; i < 16; i++)
534 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
535 for (i = 0; i < 16; i++)
536 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
537 for (i = 0; i < 16; i++)
538 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
539
540 /* MAC */
541 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
542 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
543 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
544 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
545 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
546 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
547 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
548 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
549 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
550 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
551 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
552 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
553 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
554 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
555 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
556 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
557 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
558 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
559 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
560 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
561 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
562 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
563 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
564 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
565 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
566 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
567 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
568 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
569 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
570 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
571 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
572 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
573 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
574
575 /* Diagnostic */
576 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
577 for (i = 0; i < 8; i++)
98c00a1c 578 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
9a799d71 579 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
98c00a1c
JB		 580 for (i = 0; i < 4; i++)
581 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
9a799d71
AK		 582 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
583 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
584 for (i = 0; i < 8; i++)
98c00a1c 585 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
9a799d71 586 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
98c00a1c
JB		 587 for (i = 0; i < 4; i++)
588 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
9a799d71
AK		 589 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
590 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
591 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
592 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
593 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
594 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
595 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
596 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
597 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
598 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
599 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
600 for (i = 0; i < 8; i++)
98c00a1c 601 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
9a799d71
AK		 602 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
603 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
604 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
605 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
606 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
607 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
608 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
609 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
610 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
611}
612
613static int ixgbe_get_eeprom_len(struct net_device *netdev)
614{
615 struct ixgbe_adapter *adapter = netdev_priv(netdev);
616 return adapter->hw.eeprom.word_size * 2;
617}
618
619static int ixgbe_get_eeprom(struct net_device *netdev,
b4617240 620 struct ethtool_eeprom *eeprom, u8 *bytes)
9a799d71
AK		 621{
622 struct ixgbe_adapter *adapter = netdev_priv(netdev);
623 struct ixgbe_hw *hw = &adapter->hw;
624 u16 *eeprom_buff;
625 int first_word, last_word, eeprom_len;
626 int ret_val = 0;
627 u16 i;
628
629 if (eeprom->len == 0)
630 return -EINVAL;
631
632 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
633
634 first_word = eeprom->offset >> 1;
635 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
636 eeprom_len = last_word - first_word + 1;
637
638 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
639 if (!eeprom_buff)
640 return -ENOMEM;
641
642 for (i = 0; i < eeprom_len; i++) {
c44ade9e 643 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
b4617240 644 &eeprom_buff[i])))
9a799d71
AK		 645 break;
646 }
647
648 /* Device's eeprom is always little-endian, word addressable */
649 for (i = 0; i < eeprom_len; i++)
650 le16_to_cpus(&eeprom_buff[i]);
651
652 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
653 kfree(eeprom_buff);
654
655 return ret_val;
656}
657
658static void ixgbe_get_drvinfo(struct net_device *netdev,
b4617240 659 struct ethtool_drvinfo *drvinfo)
9a799d71
AK		 660{
661 struct ixgbe_adapter *adapter = netdev_priv(netdev);
662
663 strncpy(drvinfo->driver, ixgbe_driver_name, 32);
664 strncpy(drvinfo->version, ixgbe_driver_version, 32);
665 strncpy(drvinfo->fw_version, "N/A", 32);
666 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
667 drvinfo->n_stats = IXGBE_STATS_LEN;
668 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
669}
670
671static void ixgbe_get_ringparam(struct net_device *netdev,
b4617240 672 struct ethtool_ringparam *ring)
9a799d71
AK		 673{
674 struct ixgbe_adapter *adapter = netdev_priv(netdev);
675 struct ixgbe_ring *tx_ring = adapter->tx_ring;
676 struct ixgbe_ring *rx_ring = adapter->rx_ring;
677
678 ring->rx_max_pending = IXGBE_MAX_RXD;
679 ring->tx_max_pending = IXGBE_MAX_TXD;
680 ring->rx_mini_max_pending = 0;
681 ring->rx_jumbo_max_pending = 0;
682 ring->rx_pending = rx_ring->count;
683 ring->tx_pending = tx_ring->count;
684 ring->rx_mini_pending = 0;
685 ring->rx_jumbo_pending = 0;
686}
687
688static int ixgbe_set_ringparam(struct net_device *netdev,
b4617240 689 struct ethtool_ringparam *ring)
9a799d71
AK		 690{
691 struct ixgbe_adapter *adapter = netdev_priv(netdev);
c431f97e 692 struct ixgbe_ring *temp_ring;
9a799d71 693 int i, err;
c431f97e 694 u32 new_rx_count, new_tx_count;
9a799d71
AK		 695
696 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
697 return -EINVAL;
698
699 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
700 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
701 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
702
703 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
704 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
705 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
706
707 if ((new_tx_count == adapter->tx_ring->count) &&
708 (new_rx_count == adapter->rx_ring->count)) {
709 /* nothing to do */
710 return 0;
711 }
712
d3fa4721
PWJ		 713 temp_ring = kcalloc(adapter->num_tx_queues,
714 sizeof(struct ixgbe_ring), GFP_KERNEL);
c431f97e
JB		 715 if (!temp_ring)
716 return -ENOMEM;
717
d4f80882
AV		 718 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
719 msleep(1);
720
9a799d71
AK		 721 if (new_tx_count != adapter->tx_ring->count) {
722 for (i = 0; i < adapter->num_tx_queues; i++) {
c431f97e
JB		 723 temp_ring[i].count = new_tx_count;
724 err = ixgbe_setup_tx_resources(adapter, &temp_ring[i]);
9a799d71 725 if (err) {
c431f97e
JB		 726 while (i) {
727 i--;
b4617240
PW		 728 ixgbe_free_tx_resources(adapter,
729 &temp_ring[i]);
c431f97e 730 }
9a799d71
AK		 731 goto err_setup;
732 }
d3fa4721 733 temp_ring[i].v_idx = adapter->tx_ring[i].v_idx;
9a799d71 734 }
d3fa4721
PWJ		 735 if (netif_running(netdev))
736 netdev->netdev_ops->ndo_stop(netdev);
737 ixgbe_reset_interrupt_capability(adapter);
738 ixgbe_napi_del_all(adapter);
739 INIT_LIST_HEAD(&netdev->napi_list);
740 kfree(adapter->tx_ring);
741 adapter->tx_ring = temp_ring;
742 temp_ring = NULL;
c431f97e 743 adapter->tx_ring_count = new_tx_count;
9a799d71
AK		 744 }
745
d3fa4721
PWJ		 746 temp_ring = kcalloc(adapter->num_rx_queues,
747 sizeof(struct ixgbe_ring), GFP_KERNEL);
748 if (!temp_ring) {
749 if (netif_running(netdev))
750 netdev->netdev_ops->ndo_open(netdev);
751 return -ENOMEM;
752 }
9a799d71 753
d3fa4721 754 if (new_rx_count != adapter->rx_ring->count) {
c431f97e
JB		 755 for (i = 0; i < adapter->num_rx_queues; i++) {
756 temp_ring[i].count = new_rx_count;
757 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]);
9a799d71 758 if (err) {
c431f97e
JB		 759 while (i) {
760 i--;
b4617240
PW		 761 ixgbe_free_rx_resources(adapter,
762 &temp_ring[i]);
c431f97e 763 }
9a799d71
AK		 764 goto err_setup;
765 }
d3fa4721 766 temp_ring[i].v_idx = adapter->rx_ring[i].v_idx;
9a799d71 767 }
d3fa4721
PWJ		 768 if (netif_running(netdev))
769 netdev->netdev_ops->ndo_stop(netdev);
770 ixgbe_reset_interrupt_capability(adapter);
771 ixgbe_napi_del_all(adapter);
772 INIT_LIST_HEAD(&netdev->napi_list);
773 kfree(adapter->rx_ring);
774 adapter->rx_ring = temp_ring;
775 temp_ring = NULL;
c431f97e
JB		 776
777 adapter->rx_ring_count = new_rx_count;
9a799d71
AK		 778 }
779
c431f97e 780 /* success! */
9a799d71
AK		 781 err = 0;
782err_setup:
d3fa4721 783 ixgbe_init_interrupt_scheme(adapter);
c431f97e 784 if (netif_running(netdev))
d3fa4721 785 netdev->netdev_ops->ndo_open(netdev);
9a799d71 786
d4f80882 787 clear_bit(__IXGBE_RESETTING, &adapter->state);
9a799d71
AK		 788 return err;
789}
790
b9f2c044 791static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
9a799d71 792{
b9f2c044
JG		 793 switch (sset) {
794 case ETH_SS_STATS:
795 return IXGBE_STATS_LEN;
796 default:
797 return -EOPNOTSUPP;
798 }
9a799d71
AK		 799}
800
801static void ixgbe_get_ethtool_stats(struct net_device *netdev,
b4617240 802 struct ethtool_stats *stats, u64 *data)
9a799d71
AK		 803{
804 struct ixgbe_adapter *adapter = netdev_priv(netdev);
805 u64 *queue_stat;
806 int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
807 int j, k;
808 int i;
809
810 ixgbe_update_stats(adapter);
811 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
812 char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
813 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
b4617240 814 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
9a799d71
AK		 815 }
816 for (j = 0; j < adapter->num_tx_queues; j++) {
817 queue_stat = (u64 *)&adapter->tx_ring[j].stats;
818 for (k = 0; k < stat_count; k++)
819 data[i + k] = queue_stat[k];
820 i += k;
821 }
822 for (j = 0; j < adapter->num_rx_queues; j++) {
823 queue_stat = (u64 *)&adapter->rx_ring[j].stats;
824 for (k = 0; k < stat_count; k++)
825 data[i + k] = queue_stat[k];
826 i += k;
827 }
2f90b865
AD		 828 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
829 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
830 data[i++] = adapter->stats.pxontxc[j];
831 data[i++] = adapter->stats.pxofftxc[j];
832 }
833 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
834 data[i++] = adapter->stats.pxonrxc[j];
835 data[i++] = adapter->stats.pxoffrxc[j];
836 }
837 }
9a799d71
AK		 838}
839
840static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
b4617240 841 u8 *data)
9a799d71
AK		 842{
843 struct ixgbe_adapter *adapter = netdev_priv(netdev);
c44ade9e 844 char *p = (char *)data;
9a799d71
AK		 845 int i;
846
847 switch (stringset) {
848 case ETH_SS_STATS:
849 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
850 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
851 ETH_GSTRING_LEN);
852 p += ETH_GSTRING_LEN;
853 }
854 for (i = 0; i < adapter->num_tx_queues; i++) {
855 sprintf(p, "tx_queue_%u_packets", i);
856 p += ETH_GSTRING_LEN;
857 sprintf(p, "tx_queue_%u_bytes", i);
858 p += ETH_GSTRING_LEN;
859 }
860 for (i = 0; i < adapter->num_rx_queues; i++) {
861 sprintf(p, "rx_queue_%u_packets", i);
862 p += ETH_GSTRING_LEN;
863 sprintf(p, "rx_queue_%u_bytes", i);
864 p += ETH_GSTRING_LEN;
865 }
2f90b865
AD		 866 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
867 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
868 sprintf(p, "tx_pb_%u_pxon", i);
bfb8cc31
DS		 869 p += ETH_GSTRING_LEN;
870 sprintf(p, "tx_pb_%u_pxoff", i);
871 p += ETH_GSTRING_LEN;
2f90b865
AD		 872 }
873 for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
bfb8cc31
DS		 874 sprintf(p, "rx_pb_%u_pxon", i);
875 p += ETH_GSTRING_LEN;
876 sprintf(p, "rx_pb_%u_pxoff", i);
877 p += ETH_GSTRING_LEN;
2f90b865
AD		 878 }
879 }
b4617240 880 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
9a799d71
AK		 881 break;
882 }
883}
884
885
886static void ixgbe_get_wol(struct net_device *netdev,
b4617240 887 struct ethtool_wolinfo *wol)
9a799d71
AK		 888{
889 wol->supported = 0;
890 wol->wolopts = 0;
891
892 return;
893}
894
895static int ixgbe_nway_reset(struct net_device *netdev)
896{
897 struct ixgbe_adapter *adapter = netdev_priv(netdev);
898
d4f80882
AV		 899 if (netif_running(netdev))
900 ixgbe_reinit_locked(adapter);
9a799d71
AK		 901
902 return 0;
903}
904
905static int ixgbe_phys_id(struct net_device *netdev, u32 data)
906{
907 struct ixgbe_adapter *adapter = netdev_priv(netdev);
c44ade9e
JB		 908 struct ixgbe_hw *hw = &adapter->hw;
909 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
9a799d71
AK		 910 u32 i;
911
912 if (!data || data > 300)
913 data = 300;
914
915 for (i = 0; i < (data * 1000); i += 400) {
c44ade9e 916 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
9a799d71 917 msleep_interruptible(200);
c44ade9e 918 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
9a799d71
AK		 919 msleep_interruptible(200);
920 }
921
922 /* Restore LED settings */
923 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
924
925 return 0;
926}
927
928static int ixgbe_get_coalesce(struct net_device *netdev,
b4617240 929 struct ethtool_coalesce *ec)
9a799d71
AK		 930{
931 struct ixgbe_adapter *adapter = netdev_priv(netdev);
932
9a799d71 933 ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
30efa5a3
JB		 934
935 /* only valid if in constant ITR mode */
936 switch (adapter->itr_setting) {
937 case 0:
938 /* throttling disabled */
939 ec->rx_coalesce_usecs = 0;
940 break;
941 case 1:
942 /* dynamic ITR mode */
943 ec->rx_coalesce_usecs = 1;
944 break;
945 default:
946 /* fixed interrupt rate mode */
947 ec->rx_coalesce_usecs = 1000000/adapter->eitr_param;
948 break;
949 }
9a799d71
AK		 950 return 0;
951}
952
953static int ixgbe_set_coalesce(struct net_device *netdev,
b4617240 954 struct ethtool_coalesce *ec)
9a799d71
AK		 955{
956 struct ixgbe_adapter *adapter = netdev_priv(netdev);
30efa5a3
JB		 957 struct ixgbe_hw *hw = &adapter->hw;
958 int i;
9a799d71
AK		 959
960 if (ec->tx_max_coalesced_frames_irq)
30efa5a3
JB		 961 adapter->tx_ring[0].work_limit = ec->tx_max_coalesced_frames_irq;
962
963 if (ec->rx_coalesce_usecs > 1) {
964 /* store the value in ints/second */
965 adapter->eitr_param = 1000000/ec->rx_coalesce_usecs;
966
967 /* static value of interrupt rate */
968 adapter->itr_setting = adapter->eitr_param;
969 /* clear the lower bit */
970 adapter->itr_setting &= ~1;
971 } else if (ec->rx_coalesce_usecs == 1) {
972 /* 1 means dynamic mode */
973 adapter->eitr_param = 20000;
974 adapter->itr_setting = 1;
975 } else {
976 /* any other value means disable eitr, which is best
977 * served by setting the interrupt rate very high */
978 adapter->eitr_param = 3000000;
979 adapter->itr_setting = 0;
980 }
9a799d71 981
30efa5a3
JB		 982 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
983 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
984 if (q_vector->txr_count && !q_vector->rxr_count)
985 q_vector->eitr = (adapter->eitr_param >> 1);
986 else
987 /* rx only or mixed */
988 q_vector->eitr = adapter->eitr_param;
989 IXGBE_WRITE_REG(hw, IXGBE_EITR(i),
990 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
9a799d71
AK		 991 }
992
993 return 0;
994}
995
996
b9804972 997static const struct ethtool_ops ixgbe_ethtool_ops = {
9a799d71
AK		 998 .get_settings = ixgbe_get_settings,
999 .set_settings = ixgbe_set_settings,
1000 .get_drvinfo = ixgbe_get_drvinfo,
1001 .get_regs_len = ixgbe_get_regs_len,
1002 .get_regs = ixgbe_get_regs,
1003 .get_wol = ixgbe_get_wol,
1004 .nway_reset = ixgbe_nway_reset,
1005 .get_link = ethtool_op_get_link,
1006 .get_eeprom_len = ixgbe_get_eeprom_len,
1007 .get_eeprom = ixgbe_get_eeprom,
1008 .get_ringparam = ixgbe_get_ringparam,
1009 .set_ringparam = ixgbe_set_ringparam,
1010 .get_pauseparam = ixgbe_get_pauseparam,
1011 .set_pauseparam = ixgbe_set_pauseparam,
1012 .get_rx_csum = ixgbe_get_rx_csum,
1013 .set_rx_csum = ixgbe_set_rx_csum,
1014 .get_tx_csum = ixgbe_get_tx_csum,
1015 .set_tx_csum = ixgbe_set_tx_csum,
1016 .get_sg = ethtool_op_get_sg,
1017 .set_sg = ethtool_op_set_sg,
1018 .get_msglevel = ixgbe_get_msglevel,
1019 .set_msglevel = ixgbe_set_msglevel,
1020 .get_tso = ethtool_op_get_tso,
1021 .set_tso = ixgbe_set_tso,
1022 .get_strings = ixgbe_get_strings,
1023 .phys_id = ixgbe_phys_id,
b4617240 1024 .get_sset_count = ixgbe_get_sset_count,
9a799d71
AK		 1025 .get_ethtool_stats = ixgbe_get_ethtool_stats,
1026 .get_coalesce = ixgbe_get_coalesce,
1027 .set_coalesce = ixgbe_set_coalesce,
177db6ff
MC		 1028 .get_flags = ethtool_op_get_flags,
1029 .set_flags = ethtool_op_set_flags,
9a799d71
AK		 1030};
1031
1032void ixgbe_set_ethtool_ops(struct net_device *netdev)
1033{
1034 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
1035}
Linux kernel - Deliverables
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