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9a799d71 AK |
1 | /******************************************************************************* |
2 | ||
3 | Intel 10 Gigabit PCI Express Linux driver | |
b4617240 | 4 | Copyright(c) 1999 - 2008 Intel Corporation. |
9a799d71 AK |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
22 | Contact Information: | |
9a799d71 AK |
23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
25 | ||
26 | *******************************************************************************/ | |
27 | ||
28 | /* ethtool support for ixgbe */ | |
29 | ||
30 | #include <linux/types.h> | |
31 | #include <linux/module.h> | |
32 | #include <linux/pci.h> | |
33 | #include <linux/netdevice.h> | |
34 | #include <linux/ethtool.h> | |
35 | #include <linux/vmalloc.h> | |
36 | #include <linux/uaccess.h> | |
37 | ||
38 | #include "ixgbe.h" | |
39 | ||
40 | ||
41 | #define IXGBE_ALL_RAR_ENTRIES 16 | |
42 | ||
43 | struct ixgbe_stats { | |
44 | char stat_string[ETH_GSTRING_LEN]; | |
45 | int sizeof_stat; | |
46 | int stat_offset; | |
47 | }; | |
48 | ||
49 | #define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \ | |
b4617240 | 50 | offsetof(struct ixgbe_adapter, m) |
9a799d71 AK |
51 | static struct ixgbe_stats ixgbe_gstrings_stats[] = { |
52 | {"rx_packets", IXGBE_STAT(net_stats.rx_packets)}, | |
53 | {"tx_packets", IXGBE_STAT(net_stats.tx_packets)}, | |
54 | {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)}, | |
55 | {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)}, | |
56 | {"lsc_int", IXGBE_STAT(lsc_int)}, | |
57 | {"tx_busy", IXGBE_STAT(tx_busy)}, | |
58 | {"non_eop_descs", IXGBE_STAT(non_eop_descs)}, | |
59 | {"rx_errors", IXGBE_STAT(net_stats.rx_errors)}, | |
60 | {"tx_errors", IXGBE_STAT(net_stats.tx_errors)}, | |
61 | {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)}, | |
62 | {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)}, | |
63 | {"multicast", IXGBE_STAT(net_stats.multicast)}, | |
64 | {"broadcast", IXGBE_STAT(stats.bprc)}, | |
65 | {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) }, | |
66 | {"collisions", IXGBE_STAT(net_stats.collisions)}, | |
67 | {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)}, | |
68 | {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)}, | |
69 | {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)}, | |
70 | {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)}, | |
71 | {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)}, | |
72 | {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)}, | |
73 | {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)}, | |
74 | {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)}, | |
75 | {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)}, | |
76 | {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)}, | |
77 | {"tx_restart_queue", IXGBE_STAT(restart_queue)}, | |
78 | {"rx_long_length_errors", IXGBE_STAT(stats.roc)}, | |
79 | {"rx_short_length_errors", IXGBE_STAT(stats.ruc)}, | |
80 | {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)}, | |
81 | {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)}, | |
82 | {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)}, | |
83 | {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)}, | |
84 | {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)}, | |
85 | {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)}, | |
86 | {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)}, | |
87 | {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)}, | |
88 | {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)}, | |
89 | {"rx_header_split", IXGBE_STAT(rx_hdr_split)}, | |
90 | {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)}, | |
91 | {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)}, | |
177db6ff MC |
92 | {"lro_aggregated", IXGBE_STAT(lro_aggregated)}, |
93 | {"lro_flushed", IXGBE_STAT(lro_flushed)}, | |
9a799d71 AK |
94 | }; |
95 | ||
96 | #define IXGBE_QUEUE_STATS_LEN \ | |
454d7c9b WC |
97 | ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \ |
98 | ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \ | |
99 | (sizeof(struct ixgbe_queue_stats) / sizeof(u64))) | |
b4617240 PW |
100 | #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + IXGBE_QUEUE_STATS_LEN) |
101 | #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats) | |
9a799d71 AK |
102 | #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + IXGBE_QUEUE_STATS_LEN) |
103 | ||
104 | static int ixgbe_get_settings(struct net_device *netdev, | |
b4617240 | 105 | struct ethtool_cmd *ecmd) |
9a799d71 AK |
106 | { |
107 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
735441fb AV |
108 | struct ixgbe_hw *hw = &adapter->hw; |
109 | u32 link_speed = 0; | |
110 | bool link_up; | |
9a799d71 | 111 | |
735441fb AV |
112 | ecmd->supported = SUPPORTED_10000baseT_Full; |
113 | ecmd->autoneg = AUTONEG_ENABLE; | |
9a799d71 | 114 | ecmd->transceiver = XCVR_EXTERNAL; |
735441fb AV |
115 | if (hw->phy.media_type == ixgbe_media_type_copper) { |
116 | ecmd->supported |= (SUPPORTED_1000baseT_Full | | |
b4617240 | 117 | SUPPORTED_TP | SUPPORTED_Autoneg); |
735441fb AV |
118 | |
119 | ecmd->advertising = (ADVERTISED_TP | ADVERTISED_Autoneg); | |
120 | if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) | |
121 | ecmd->advertising |= ADVERTISED_10000baseT_Full; | |
122 | if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) | |
123 | ecmd->advertising |= ADVERTISED_1000baseT_Full; | |
124 | ||
125 | ecmd->port = PORT_TP; | |
126 | } else { | |
127 | ecmd->supported |= SUPPORTED_FIBRE; | |
128 | ecmd->advertising = (ADVERTISED_10000baseT_Full | | |
b4617240 | 129 | ADVERTISED_FIBRE); |
735441fb | 130 | ecmd->port = PORT_FIBRE; |
c44ade9e | 131 | ecmd->autoneg = AUTONEG_DISABLE; |
735441fb | 132 | } |
9a799d71 | 133 | |
c44ade9e | 134 | hw->mac.ops.check_link(hw, &link_speed, &link_up, false); |
735441fb AV |
135 | if (link_up) { |
136 | ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ? | |
b4617240 | 137 | SPEED_10000 : SPEED_1000; |
9a799d71 AK |
138 | ecmd->duplex = DUPLEX_FULL; |
139 | } else { | |
140 | ecmd->speed = -1; | |
141 | ecmd->duplex = -1; | |
142 | } | |
143 | ||
9a799d71 AK |
144 | return 0; |
145 | } | |
146 | ||
147 | static int ixgbe_set_settings(struct net_device *netdev, | |
b4617240 | 148 | struct ethtool_cmd *ecmd) |
9a799d71 AK |
149 | { |
150 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
735441fb | 151 | struct ixgbe_hw *hw = &adapter->hw; |
0befdb3e JB |
152 | u32 advertised, old; |
153 | s32 err; | |
9a799d71 | 154 | |
735441fb AV |
155 | switch (hw->phy.media_type) { |
156 | case ixgbe_media_type_fiber: | |
157 | if ((ecmd->autoneg == AUTONEG_ENABLE) || | |
158 | (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL)) | |
159 | return -EINVAL; | |
160 | /* in this case we currently only support 10Gb/FULL */ | |
161 | break; | |
0befdb3e JB |
162 | case ixgbe_media_type_copper: |
163 | /* 10000/copper and 1000/copper must autoneg | |
164 | * this function does not support any duplex forcing, but can | |
165 | * limit the advertising of the adapter to only 10000 or 1000 */ | |
166 | if (ecmd->autoneg == AUTONEG_DISABLE) | |
167 | return -EINVAL; | |
168 | ||
169 | old = hw->phy.autoneg_advertised; | |
170 | advertised = 0; | |
171 | if (ecmd->advertising & ADVERTISED_10000baseT_Full) | |
172 | advertised |= IXGBE_LINK_SPEED_10GB_FULL; | |
173 | ||
174 | if (ecmd->advertising & ADVERTISED_1000baseT_Full) | |
175 | advertised |= IXGBE_LINK_SPEED_1GB_FULL; | |
176 | ||
177 | if (old == advertised) | |
178 | break; | |
179 | /* this sets the link speed and restarts auto-neg */ | |
180 | err = hw->mac.ops.setup_link_speed(hw, advertised, true, true); | |
181 | if (err) { | |
182 | DPRINTK(PROBE, INFO, | |
183 | "setup link failed with code %d\n", err); | |
184 | hw->mac.ops.setup_link_speed(hw, old, true, true); | |
185 | } | |
186 | break; | |
735441fb AV |
187 | default: |
188 | break; | |
9a799d71 AK |
189 | } |
190 | ||
191 | return 0; | |
192 | } | |
193 | ||
194 | static void ixgbe_get_pauseparam(struct net_device *netdev, | |
b4617240 | 195 | struct ethtool_pauseparam *pause) |
9a799d71 AK |
196 | { |
197 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
198 | struct ixgbe_hw *hw = &adapter->hw; | |
199 | ||
9c83b070 | 200 | pause->autoneg = (hw->fc.type == ixgbe_fc_full ? 1 : 0); |
9a799d71 AK |
201 | |
202 | if (hw->fc.type == ixgbe_fc_rx_pause) { | |
203 | pause->rx_pause = 1; | |
204 | } else if (hw->fc.type == ixgbe_fc_tx_pause) { | |
205 | pause->tx_pause = 1; | |
206 | } else if (hw->fc.type == ixgbe_fc_full) { | |
207 | pause->rx_pause = 1; | |
208 | pause->tx_pause = 1; | |
209 | } | |
210 | } | |
211 | ||
212 | static int ixgbe_set_pauseparam(struct net_device *netdev, | |
b4617240 | 213 | struct ethtool_pauseparam *pause) |
9a799d71 AK |
214 | { |
215 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
216 | struct ixgbe_hw *hw = &adapter->hw; | |
217 | ||
9c83b070 AV |
218 | if ((pause->autoneg == AUTONEG_ENABLE) || |
219 | (pause->rx_pause && pause->tx_pause)) | |
9a799d71 AK |
220 | hw->fc.type = ixgbe_fc_full; |
221 | else if (pause->rx_pause && !pause->tx_pause) | |
222 | hw->fc.type = ixgbe_fc_rx_pause; | |
223 | else if (!pause->rx_pause && pause->tx_pause) | |
224 | hw->fc.type = ixgbe_fc_tx_pause; | |
225 | else if (!pause->rx_pause && !pause->tx_pause) | |
226 | hw->fc.type = ixgbe_fc_none; | |
9c83b070 AV |
227 | else |
228 | return -EINVAL; | |
9a799d71 AK |
229 | |
230 | hw->fc.original_type = hw->fc.type; | |
231 | ||
d4f80882 AV |
232 | if (netif_running(netdev)) |
233 | ixgbe_reinit_locked(adapter); | |
234 | else | |
9a799d71 | 235 | ixgbe_reset(adapter); |
9a799d71 AK |
236 | |
237 | return 0; | |
238 | } | |
239 | ||
240 | static u32 ixgbe_get_rx_csum(struct net_device *netdev) | |
241 | { | |
242 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
243 | return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED); | |
244 | } | |
245 | ||
246 | static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data) | |
247 | { | |
248 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
249 | if (data) | |
250 | adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED; | |
251 | else | |
252 | adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED; | |
253 | ||
d4f80882 AV |
254 | if (netif_running(netdev)) |
255 | ixgbe_reinit_locked(adapter); | |
256 | else | |
9a799d71 | 257 | ixgbe_reset(adapter); |
9a799d71 AK |
258 | |
259 | return 0; | |
260 | } | |
261 | ||
262 | static u32 ixgbe_get_tx_csum(struct net_device *netdev) | |
263 | { | |
22f32b7a | 264 | return (netdev->features & NETIF_F_IP_CSUM) != 0; |
9a799d71 AK |
265 | } |
266 | ||
267 | static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data) | |
268 | { | |
269 | if (data) | |
22f32b7a | 270 | netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); |
9a799d71 | 271 | else |
3d3d6d3c | 272 | netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); |
9a799d71 AK |
273 | |
274 | return 0; | |
275 | } | |
276 | ||
277 | static int ixgbe_set_tso(struct net_device *netdev, u32 data) | |
278 | { | |
9a799d71 AK |
279 | if (data) { |
280 | netdev->features |= NETIF_F_TSO; | |
281 | netdev->features |= NETIF_F_TSO6; | |
282 | } else { | |
fd2ea0a7 | 283 | netif_tx_stop_all_queues(netdev); |
9a799d71 AK |
284 | netdev->features &= ~NETIF_F_TSO; |
285 | netdev->features &= ~NETIF_F_TSO6; | |
fd2ea0a7 | 286 | netif_tx_start_all_queues(netdev); |
9a799d71 AK |
287 | } |
288 | return 0; | |
289 | } | |
290 | ||
291 | static u32 ixgbe_get_msglevel(struct net_device *netdev) | |
292 | { | |
293 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
294 | return adapter->msg_enable; | |
295 | } | |
296 | ||
297 | static void ixgbe_set_msglevel(struct net_device *netdev, u32 data) | |
298 | { | |
299 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
300 | adapter->msg_enable = data; | |
301 | } | |
302 | ||
303 | static int ixgbe_get_regs_len(struct net_device *netdev) | |
304 | { | |
305 | #define IXGBE_REGS_LEN 1128 | |
306 | return IXGBE_REGS_LEN * sizeof(u32); | |
307 | } | |
308 | ||
309 | #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_ | |
310 | ||
311 | static void ixgbe_get_regs(struct net_device *netdev, | |
b4617240 | 312 | struct ethtool_regs *regs, void *p) |
9a799d71 AK |
313 | { |
314 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
315 | struct ixgbe_hw *hw = &adapter->hw; | |
316 | u32 *regs_buff = p; | |
317 | u8 i; | |
318 | ||
319 | memset(p, 0, IXGBE_REGS_LEN * sizeof(u32)); | |
320 | ||
321 | regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id; | |
322 | ||
323 | /* General Registers */ | |
324 | regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL); | |
325 | regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS); | |
326 | regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); | |
327 | regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP); | |
328 | regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP); | |
329 | regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL); | |
330 | regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER); | |
331 | regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER); | |
332 | ||
333 | /* NVM Register */ | |
334 | regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC); | |
335 | regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD); | |
336 | regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA); | |
337 | regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL); | |
338 | regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA); | |
339 | regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL); | |
340 | regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA); | |
341 | regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT); | |
342 | regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP); | |
343 | regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC); | |
344 | ||
345 | /* Interrupt */ | |
98c00a1c JB |
346 | /* don't read EICR because it can clear interrupt causes, instead |
347 | * read EICS which is a shadow but doesn't clear EICR */ | |
348 | regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS); | |
9a799d71 AK |
349 | regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS); |
350 | regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS); | |
351 | regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC); | |
352 | regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC); | |
353 | regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM); | |
354 | regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0)); | |
355 | regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0)); | |
356 | regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT); | |
357 | regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA); | |
c44ade9e | 358 | regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0)); |
9a799d71 AK |
359 | regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE); |
360 | ||
361 | /* Flow Control */ | |
362 | regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP); | |
363 | regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0)); | |
364 | regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1)); | |
365 | regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2)); | |
366 | regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3)); | |
367 | for (i = 0; i < 8; i++) | |
368 | regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i)); | |
369 | for (i = 0; i < 8; i++) | |
370 | regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i)); | |
371 | regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV); | |
372 | regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS); | |
373 | ||
374 | /* Receive DMA */ | |
375 | for (i = 0; i < 64; i++) | |
376 | regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i)); | |
377 | for (i = 0; i < 64; i++) | |
378 | regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i)); | |
379 | for (i = 0; i < 64; i++) | |
380 | regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i)); | |
381 | for (i = 0; i < 64; i++) | |
382 | regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i)); | |
383 | for (i = 0; i < 64; i++) | |
384 | regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i)); | |
385 | for (i = 0; i < 64; i++) | |
386 | regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); | |
387 | for (i = 0; i < 16; i++) | |
388 | regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); | |
389 | for (i = 0; i < 16; i++) | |
390 | regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); | |
391 | regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); | |
392 | for (i = 0; i < 8; i++) | |
393 | regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)); | |
394 | regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL); | |
395 | regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN); | |
396 | ||
397 | /* Receive */ | |
398 | regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM); | |
399 | regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL); | |
400 | for (i = 0; i < 16; i++) | |
401 | regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i)); | |
402 | for (i = 0; i < 16; i++) | |
403 | regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i)); | |
c44ade9e | 404 | regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0)); |
9a799d71 AK |
405 | regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL); |
406 | regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); | |
407 | regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL); | |
408 | regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC); | |
409 | regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); | |
410 | for (i = 0; i < 8; i++) | |
411 | regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i)); | |
412 | for (i = 0; i < 8; i++) | |
413 | regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i)); | |
414 | regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP); | |
415 | ||
416 | /* Transmit */ | |
417 | for (i = 0; i < 32; i++) | |
418 | regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i)); | |
419 | for (i = 0; i < 32; i++) | |
420 | regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i)); | |
421 | for (i = 0; i < 32; i++) | |
422 | regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i)); | |
423 | for (i = 0; i < 32; i++) | |
424 | regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i)); | |
425 | for (i = 0; i < 32; i++) | |
426 | regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i)); | |
427 | for (i = 0; i < 32; i++) | |
428 | regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i)); | |
429 | for (i = 0; i < 32; i++) | |
430 | regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i)); | |
431 | for (i = 0; i < 32; i++) | |
432 | regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i)); | |
433 | regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL); | |
434 | for (i = 0; i < 16; i++) | |
435 | regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); | |
436 | regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG); | |
437 | for (i = 0; i < 8; i++) | |
438 | regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i)); | |
439 | regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP); | |
440 | ||
441 | /* Wake Up */ | |
442 | regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC); | |
443 | regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC); | |
444 | regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS); | |
445 | regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV); | |
446 | regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT); | |
447 | regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT); | |
448 | regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL); | |
449 | regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM); | |
450 | regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT); | |
451 | ||
9a799d71 AK |
452 | regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS); |
453 | regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS); | |
454 | regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); | |
455 | regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR); | |
456 | for (i = 0; i < 8; i++) | |
457 | regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i)); | |
458 | for (i = 0; i < 8; i++) | |
459 | regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i)); | |
460 | for (i = 0; i < 8; i++) | |
461 | regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i)); | |
462 | for (i = 0; i < 8; i++) | |
463 | regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i)); | |
464 | for (i = 0; i < 8; i++) | |
465 | regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); | |
466 | for (i = 0; i < 8; i++) | |
467 | regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); | |
468 | ||
469 | /* Statistics */ | |
470 | regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs); | |
471 | regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc); | |
472 | regs_buff[883] = IXGBE_GET_STAT(adapter, errbc); | |
473 | regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc); | |
474 | for (i = 0; i < 8; i++) | |
475 | regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]); | |
476 | regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc); | |
477 | regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc); | |
478 | regs_buff[895] = IXGBE_GET_STAT(adapter, rlec); | |
479 | regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc); | |
480 | regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc); | |
481 | regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc); | |
482 | regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc); | |
483 | for (i = 0; i < 8; i++) | |
484 | regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]); | |
485 | for (i = 0; i < 8; i++) | |
486 | regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]); | |
487 | for (i = 0; i < 8; i++) | |
488 | regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]); | |
489 | for (i = 0; i < 8; i++) | |
490 | regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]); | |
491 | regs_buff[932] = IXGBE_GET_STAT(adapter, prc64); | |
492 | regs_buff[933] = IXGBE_GET_STAT(adapter, prc127); | |
493 | regs_buff[934] = IXGBE_GET_STAT(adapter, prc255); | |
494 | regs_buff[935] = IXGBE_GET_STAT(adapter, prc511); | |
495 | regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023); | |
496 | regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522); | |
497 | regs_buff[938] = IXGBE_GET_STAT(adapter, gprc); | |
498 | regs_buff[939] = IXGBE_GET_STAT(adapter, bprc); | |
499 | regs_buff[940] = IXGBE_GET_STAT(adapter, mprc); | |
500 | regs_buff[941] = IXGBE_GET_STAT(adapter, gptc); | |
501 | regs_buff[942] = IXGBE_GET_STAT(adapter, gorc); | |
502 | regs_buff[944] = IXGBE_GET_STAT(adapter, gotc); | |
503 | for (i = 0; i < 8; i++) | |
504 | regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]); | |
505 | regs_buff[954] = IXGBE_GET_STAT(adapter, ruc); | |
506 | regs_buff[955] = IXGBE_GET_STAT(adapter, rfc); | |
507 | regs_buff[956] = IXGBE_GET_STAT(adapter, roc); | |
508 | regs_buff[957] = IXGBE_GET_STAT(adapter, rjc); | |
509 | regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc); | |
510 | regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc); | |
511 | regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc); | |
512 | regs_buff[961] = IXGBE_GET_STAT(adapter, tor); | |
513 | regs_buff[963] = IXGBE_GET_STAT(adapter, tpr); | |
514 | regs_buff[964] = IXGBE_GET_STAT(adapter, tpt); | |
515 | regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64); | |
516 | regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127); | |
517 | regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255); | |
518 | regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511); | |
519 | regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023); | |
520 | regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522); | |
521 | regs_buff[971] = IXGBE_GET_STAT(adapter, mptc); | |
522 | regs_buff[972] = IXGBE_GET_STAT(adapter, bptc); | |
523 | regs_buff[973] = IXGBE_GET_STAT(adapter, xec); | |
524 | for (i = 0; i < 16; i++) | |
525 | regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]); | |
526 | for (i = 0; i < 16; i++) | |
527 | regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]); | |
528 | for (i = 0; i < 16; i++) | |
529 | regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]); | |
530 | for (i = 0; i < 16; i++) | |
531 | regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]); | |
532 | ||
533 | /* MAC */ | |
534 | regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG); | |
535 | regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL); | |
536 | regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA); | |
537 | regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0); | |
538 | regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1); | |
539 | regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); | |
540 | regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP); | |
541 | regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP); | |
542 | regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP); | |
543 | regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0); | |
544 | regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1); | |
545 | regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP); | |
546 | regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA); | |
547 | regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE); | |
548 | regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD); | |
549 | regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS); | |
550 | regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA); | |
551 | regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD); | |
552 | regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD); | |
553 | regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD); | |
554 | regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG); | |
555 | regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1); | |
556 | regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2); | |
557 | regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS); | |
558 | regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC); | |
559 | regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS); | |
560 | regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC); | |
561 | regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS); | |
562 | regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2); | |
563 | regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3); | |
564 | regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1); | |
565 | regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2); | |
566 | regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL); | |
567 | ||
568 | /* Diagnostic */ | |
569 | regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL); | |
570 | for (i = 0; i < 8; i++) | |
98c00a1c | 571 | regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i)); |
9a799d71 | 572 | regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN); |
98c00a1c JB |
573 | for (i = 0; i < 4; i++) |
574 | regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i)); | |
9a799d71 AK |
575 | regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE); |
576 | regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL); | |
577 | for (i = 0; i < 8; i++) | |
98c00a1c | 578 | regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i)); |
9a799d71 | 579 | regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN); |
98c00a1c JB |
580 | for (i = 0; i < 4; i++) |
581 | regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i)); | |
9a799d71 AK |
582 | regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE); |
583 | regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL); | |
584 | regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0); | |
585 | regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1); | |
586 | regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2); | |
587 | regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3); | |
588 | regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL); | |
589 | regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0); | |
590 | regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1); | |
591 | regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2); | |
592 | regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3); | |
593 | for (i = 0; i < 8; i++) | |
98c00a1c | 594 | regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i)); |
9a799d71 AK |
595 | regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL); |
596 | regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1); | |
597 | regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2); | |
598 | regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1); | |
599 | regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2); | |
600 | regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS); | |
601 | regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL); | |
602 | regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC); | |
603 | regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC); | |
604 | } | |
605 | ||
606 | static int ixgbe_get_eeprom_len(struct net_device *netdev) | |
607 | { | |
608 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
609 | return adapter->hw.eeprom.word_size * 2; | |
610 | } | |
611 | ||
612 | static int ixgbe_get_eeprom(struct net_device *netdev, | |
b4617240 | 613 | struct ethtool_eeprom *eeprom, u8 *bytes) |
9a799d71 AK |
614 | { |
615 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
616 | struct ixgbe_hw *hw = &adapter->hw; | |
617 | u16 *eeprom_buff; | |
618 | int first_word, last_word, eeprom_len; | |
619 | int ret_val = 0; | |
620 | u16 i; | |
621 | ||
622 | if (eeprom->len == 0) | |
623 | return -EINVAL; | |
624 | ||
625 | eeprom->magic = hw->vendor_id | (hw->device_id << 16); | |
626 | ||
627 | first_word = eeprom->offset >> 1; | |
628 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | |
629 | eeprom_len = last_word - first_word + 1; | |
630 | ||
631 | eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL); | |
632 | if (!eeprom_buff) | |
633 | return -ENOMEM; | |
634 | ||
635 | for (i = 0; i < eeprom_len; i++) { | |
c44ade9e | 636 | if ((ret_val = hw->eeprom.ops.read(hw, first_word + i, |
b4617240 | 637 | &eeprom_buff[i]))) |
9a799d71 AK |
638 | break; |
639 | } | |
640 | ||
641 | /* Device's eeprom is always little-endian, word addressable */ | |
642 | for (i = 0; i < eeprom_len; i++) | |
643 | le16_to_cpus(&eeprom_buff[i]); | |
644 | ||
645 | memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); | |
646 | kfree(eeprom_buff); | |
647 | ||
648 | return ret_val; | |
649 | } | |
650 | ||
651 | static void ixgbe_get_drvinfo(struct net_device *netdev, | |
b4617240 | 652 | struct ethtool_drvinfo *drvinfo) |
9a799d71 AK |
653 | { |
654 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
655 | ||
656 | strncpy(drvinfo->driver, ixgbe_driver_name, 32); | |
657 | strncpy(drvinfo->version, ixgbe_driver_version, 32); | |
658 | strncpy(drvinfo->fw_version, "N/A", 32); | |
659 | strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32); | |
660 | drvinfo->n_stats = IXGBE_STATS_LEN; | |
661 | drvinfo->regdump_len = ixgbe_get_regs_len(netdev); | |
662 | } | |
663 | ||
664 | static void ixgbe_get_ringparam(struct net_device *netdev, | |
b4617240 | 665 | struct ethtool_ringparam *ring) |
9a799d71 AK |
666 | { |
667 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
668 | struct ixgbe_ring *tx_ring = adapter->tx_ring; | |
669 | struct ixgbe_ring *rx_ring = adapter->rx_ring; | |
670 | ||
671 | ring->rx_max_pending = IXGBE_MAX_RXD; | |
672 | ring->tx_max_pending = IXGBE_MAX_TXD; | |
673 | ring->rx_mini_max_pending = 0; | |
674 | ring->rx_jumbo_max_pending = 0; | |
675 | ring->rx_pending = rx_ring->count; | |
676 | ring->tx_pending = tx_ring->count; | |
677 | ring->rx_mini_pending = 0; | |
678 | ring->rx_jumbo_pending = 0; | |
679 | } | |
680 | ||
681 | static int ixgbe_set_ringparam(struct net_device *netdev, | |
b4617240 | 682 | struct ethtool_ringparam *ring) |
9a799d71 AK |
683 | { |
684 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
c431f97e | 685 | struct ixgbe_ring *temp_ring; |
9a799d71 | 686 | int i, err; |
c431f97e | 687 | u32 new_rx_count, new_tx_count; |
9a799d71 AK |
688 | |
689 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) | |
690 | return -EINVAL; | |
691 | ||
692 | new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD); | |
693 | new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD); | |
694 | new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE); | |
695 | ||
696 | new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD); | |
697 | new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD); | |
698 | new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE); | |
699 | ||
700 | if ((new_tx_count == adapter->tx_ring->count) && | |
701 | (new_rx_count == adapter->rx_ring->count)) { | |
702 | /* nothing to do */ | |
703 | return 0; | |
704 | } | |
705 | ||
c431f97e JB |
706 | if (adapter->num_tx_queues > adapter->num_rx_queues) |
707 | temp_ring = vmalloc(adapter->num_tx_queues * | |
708 | sizeof(struct ixgbe_ring)); | |
709 | else | |
710 | temp_ring = vmalloc(adapter->num_rx_queues * | |
711 | sizeof(struct ixgbe_ring)); | |
712 | if (!temp_ring) | |
713 | return -ENOMEM; | |
714 | ||
d4f80882 AV |
715 | while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) |
716 | msleep(1); | |
717 | ||
718 | if (netif_running(netdev)) | |
9a799d71 AK |
719 | ixgbe_down(adapter); |
720 | ||
721 | /* | |
722 | * We can't just free everything and then setup again, | |
723 | * because the ISRs in MSI-X mode get passed pointers | |
724 | * to the tx and rx ring structs. | |
725 | */ | |
726 | if (new_tx_count != adapter->tx_ring->count) { | |
c431f97e JB |
727 | memcpy(temp_ring, adapter->tx_ring, |
728 | adapter->num_tx_queues * sizeof(struct ixgbe_ring)); | |
729 | ||
9a799d71 | 730 | for (i = 0; i < adapter->num_tx_queues; i++) { |
c431f97e JB |
731 | temp_ring[i].count = new_tx_count; |
732 | err = ixgbe_setup_tx_resources(adapter, &temp_ring[i]); | |
9a799d71 | 733 | if (err) { |
c431f97e JB |
734 | while (i) { |
735 | i--; | |
b4617240 PW |
736 | ixgbe_free_tx_resources(adapter, |
737 | &temp_ring[i]); | |
c431f97e | 738 | } |
9a799d71 AK |
739 | goto err_setup; |
740 | } | |
9a799d71 | 741 | } |
c431f97e JB |
742 | |
743 | for (i = 0; i < adapter->num_tx_queues; i++) | |
744 | ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]); | |
745 | ||
746 | memcpy(adapter->tx_ring, temp_ring, | |
747 | adapter->num_tx_queues * sizeof(struct ixgbe_ring)); | |
748 | ||
749 | adapter->tx_ring_count = new_tx_count; | |
9a799d71 AK |
750 | } |
751 | ||
752 | if (new_rx_count != adapter->rx_ring->count) { | |
c431f97e JB |
753 | memcpy(temp_ring, adapter->rx_ring, |
754 | adapter->num_rx_queues * sizeof(struct ixgbe_ring)); | |
9a799d71 | 755 | |
c431f97e JB |
756 | for (i = 0; i < adapter->num_rx_queues; i++) { |
757 | temp_ring[i].count = new_rx_count; | |
758 | err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]); | |
9a799d71 | 759 | if (err) { |
c431f97e JB |
760 | while (i) { |
761 | i--; | |
b4617240 PW |
762 | ixgbe_free_rx_resources(adapter, |
763 | &temp_ring[i]); | |
c431f97e | 764 | } |
9a799d71 AK |
765 | goto err_setup; |
766 | } | |
9a799d71 | 767 | } |
c431f97e JB |
768 | |
769 | for (i = 0; i < adapter->num_rx_queues; i++) | |
770 | ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]); | |
771 | ||
772 | memcpy(adapter->rx_ring, temp_ring, | |
773 | adapter->num_rx_queues * sizeof(struct ixgbe_ring)); | |
774 | ||
775 | adapter->rx_ring_count = new_rx_count; | |
9a799d71 AK |
776 | } |
777 | ||
c431f97e | 778 | /* success! */ |
9a799d71 AK |
779 | err = 0; |
780 | err_setup: | |
c431f97e | 781 | if (netif_running(netdev)) |
9a799d71 AK |
782 | ixgbe_up(adapter); |
783 | ||
d4f80882 | 784 | clear_bit(__IXGBE_RESETTING, &adapter->state); |
9a799d71 AK |
785 | return err; |
786 | } | |
787 | ||
b9f2c044 | 788 | static int ixgbe_get_sset_count(struct net_device *netdev, int sset) |
9a799d71 | 789 | { |
b9f2c044 JG |
790 | switch (sset) { |
791 | case ETH_SS_STATS: | |
792 | return IXGBE_STATS_LEN; | |
793 | default: | |
794 | return -EOPNOTSUPP; | |
795 | } | |
9a799d71 AK |
796 | } |
797 | ||
798 | static void ixgbe_get_ethtool_stats(struct net_device *netdev, | |
b4617240 | 799 | struct ethtool_stats *stats, u64 *data) |
9a799d71 AK |
800 | { |
801 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
802 | u64 *queue_stat; | |
803 | int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64); | |
804 | int j, k; | |
805 | int i; | |
177db6ff | 806 | u64 aggregated = 0, flushed = 0, no_desc = 0; |
f6af803f JB |
807 | for (i = 0; i < adapter->num_rx_queues; i++) { |
808 | aggregated += adapter->rx_ring[i].lro_mgr.stats.aggregated; | |
809 | flushed += adapter->rx_ring[i].lro_mgr.stats.flushed; | |
810 | no_desc += adapter->rx_ring[i].lro_mgr.stats.no_desc; | |
811 | } | |
812 | adapter->lro_aggregated = aggregated; | |
813 | adapter->lro_flushed = flushed; | |
814 | adapter->lro_no_desc = no_desc; | |
9a799d71 AK |
815 | |
816 | ixgbe_update_stats(adapter); | |
817 | for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { | |
818 | char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset; | |
819 | data[i] = (ixgbe_gstrings_stats[i].sizeof_stat == | |
b4617240 | 820 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; |
9a799d71 AK |
821 | } |
822 | for (j = 0; j < adapter->num_tx_queues; j++) { | |
823 | queue_stat = (u64 *)&adapter->tx_ring[j].stats; | |
824 | for (k = 0; k < stat_count; k++) | |
825 | data[i + k] = queue_stat[k]; | |
826 | i += k; | |
827 | } | |
828 | for (j = 0; j < adapter->num_rx_queues; j++) { | |
829 | queue_stat = (u64 *)&adapter->rx_ring[j].stats; | |
830 | for (k = 0; k < stat_count; k++) | |
831 | data[i + k] = queue_stat[k]; | |
832 | i += k; | |
833 | } | |
834 | } | |
835 | ||
836 | static void ixgbe_get_strings(struct net_device *netdev, u32 stringset, | |
b4617240 | 837 | u8 *data) |
9a799d71 AK |
838 | { |
839 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
c44ade9e | 840 | char *p = (char *)data; |
9a799d71 AK |
841 | int i; |
842 | ||
843 | switch (stringset) { | |
844 | case ETH_SS_STATS: | |
845 | for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { | |
846 | memcpy(p, ixgbe_gstrings_stats[i].stat_string, | |
847 | ETH_GSTRING_LEN); | |
848 | p += ETH_GSTRING_LEN; | |
849 | } | |
850 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
851 | sprintf(p, "tx_queue_%u_packets", i); | |
852 | p += ETH_GSTRING_LEN; | |
853 | sprintf(p, "tx_queue_%u_bytes", i); | |
854 | p += ETH_GSTRING_LEN; | |
855 | } | |
856 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
857 | sprintf(p, "rx_queue_%u_packets", i); | |
858 | p += ETH_GSTRING_LEN; | |
859 | sprintf(p, "rx_queue_%u_bytes", i); | |
860 | p += ETH_GSTRING_LEN; | |
861 | } | |
b4617240 | 862 | /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */ |
9a799d71 AK |
863 | break; |
864 | } | |
865 | } | |
866 | ||
867 | ||
868 | static void ixgbe_get_wol(struct net_device *netdev, | |
b4617240 | 869 | struct ethtool_wolinfo *wol) |
9a799d71 AK |
870 | { |
871 | wol->supported = 0; | |
872 | wol->wolopts = 0; | |
873 | ||
874 | return; | |
875 | } | |
876 | ||
877 | static int ixgbe_nway_reset(struct net_device *netdev) | |
878 | { | |
879 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
880 | ||
d4f80882 AV |
881 | if (netif_running(netdev)) |
882 | ixgbe_reinit_locked(adapter); | |
9a799d71 AK |
883 | |
884 | return 0; | |
885 | } | |
886 | ||
887 | static int ixgbe_phys_id(struct net_device *netdev, u32 data) | |
888 | { | |
889 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
c44ade9e JB |
890 | struct ixgbe_hw *hw = &adapter->hw; |
891 | u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); | |
9a799d71 AK |
892 | u32 i; |
893 | ||
894 | if (!data || data > 300) | |
895 | data = 300; | |
896 | ||
897 | for (i = 0; i < (data * 1000); i += 400) { | |
c44ade9e | 898 | hw->mac.ops.led_on(hw, IXGBE_LED_ON); |
9a799d71 | 899 | msleep_interruptible(200); |
c44ade9e | 900 | hw->mac.ops.led_off(hw, IXGBE_LED_ON); |
9a799d71 AK |
901 | msleep_interruptible(200); |
902 | } | |
903 | ||
904 | /* Restore LED settings */ | |
905 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg); | |
906 | ||
907 | return 0; | |
908 | } | |
909 | ||
910 | static int ixgbe_get_coalesce(struct net_device *netdev, | |
b4617240 | 911 | struct ethtool_coalesce *ec) |
9a799d71 AK |
912 | { |
913 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
914 | ||
9a799d71 | 915 | ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit; |
30efa5a3 JB |
916 | |
917 | /* only valid if in constant ITR mode */ | |
918 | switch (adapter->itr_setting) { | |
919 | case 0: | |
920 | /* throttling disabled */ | |
921 | ec->rx_coalesce_usecs = 0; | |
922 | break; | |
923 | case 1: | |
924 | /* dynamic ITR mode */ | |
925 | ec->rx_coalesce_usecs = 1; | |
926 | break; | |
927 | default: | |
928 | /* fixed interrupt rate mode */ | |
929 | ec->rx_coalesce_usecs = 1000000/adapter->eitr_param; | |
930 | break; | |
931 | } | |
9a799d71 AK |
932 | return 0; |
933 | } | |
934 | ||
935 | static int ixgbe_set_coalesce(struct net_device *netdev, | |
b4617240 | 936 | struct ethtool_coalesce *ec) |
9a799d71 AK |
937 | { |
938 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
30efa5a3 JB |
939 | struct ixgbe_hw *hw = &adapter->hw; |
940 | int i; | |
9a799d71 AK |
941 | |
942 | if (ec->tx_max_coalesced_frames_irq) | |
30efa5a3 JB |
943 | adapter->tx_ring[0].work_limit = ec->tx_max_coalesced_frames_irq; |
944 | ||
945 | if (ec->rx_coalesce_usecs > 1) { | |
946 | /* store the value in ints/second */ | |
947 | adapter->eitr_param = 1000000/ec->rx_coalesce_usecs; | |
948 | ||
949 | /* static value of interrupt rate */ | |
950 | adapter->itr_setting = adapter->eitr_param; | |
951 | /* clear the lower bit */ | |
952 | adapter->itr_setting &= ~1; | |
953 | } else if (ec->rx_coalesce_usecs == 1) { | |
954 | /* 1 means dynamic mode */ | |
955 | adapter->eitr_param = 20000; | |
956 | adapter->itr_setting = 1; | |
957 | } else { | |
958 | /* any other value means disable eitr, which is best | |
959 | * served by setting the interrupt rate very high */ | |
960 | adapter->eitr_param = 3000000; | |
961 | adapter->itr_setting = 0; | |
962 | } | |
9a799d71 | 963 | |
30efa5a3 JB |
964 | for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) { |
965 | struct ixgbe_q_vector *q_vector = &adapter->q_vector[i]; | |
966 | if (q_vector->txr_count && !q_vector->rxr_count) | |
967 | q_vector->eitr = (adapter->eitr_param >> 1); | |
968 | else | |
969 | /* rx only or mixed */ | |
970 | q_vector->eitr = adapter->eitr_param; | |
971 | IXGBE_WRITE_REG(hw, IXGBE_EITR(i), | |
972 | EITR_INTS_PER_SEC_TO_REG(q_vector->eitr)); | |
9a799d71 AK |
973 | } |
974 | ||
975 | return 0; | |
976 | } | |
977 | ||
978 | ||
b9804972 | 979 | static const struct ethtool_ops ixgbe_ethtool_ops = { |
9a799d71 AK |
980 | .get_settings = ixgbe_get_settings, |
981 | .set_settings = ixgbe_set_settings, | |
982 | .get_drvinfo = ixgbe_get_drvinfo, | |
983 | .get_regs_len = ixgbe_get_regs_len, | |
984 | .get_regs = ixgbe_get_regs, | |
985 | .get_wol = ixgbe_get_wol, | |
986 | .nway_reset = ixgbe_nway_reset, | |
987 | .get_link = ethtool_op_get_link, | |
988 | .get_eeprom_len = ixgbe_get_eeprom_len, | |
989 | .get_eeprom = ixgbe_get_eeprom, | |
990 | .get_ringparam = ixgbe_get_ringparam, | |
991 | .set_ringparam = ixgbe_set_ringparam, | |
992 | .get_pauseparam = ixgbe_get_pauseparam, | |
993 | .set_pauseparam = ixgbe_set_pauseparam, | |
994 | .get_rx_csum = ixgbe_get_rx_csum, | |
995 | .set_rx_csum = ixgbe_set_rx_csum, | |
996 | .get_tx_csum = ixgbe_get_tx_csum, | |
997 | .set_tx_csum = ixgbe_set_tx_csum, | |
998 | .get_sg = ethtool_op_get_sg, | |
999 | .set_sg = ethtool_op_set_sg, | |
1000 | .get_msglevel = ixgbe_get_msglevel, | |
1001 | .set_msglevel = ixgbe_set_msglevel, | |
1002 | .get_tso = ethtool_op_get_tso, | |
1003 | .set_tso = ixgbe_set_tso, | |
1004 | .get_strings = ixgbe_get_strings, | |
1005 | .phys_id = ixgbe_phys_id, | |
b4617240 | 1006 | .get_sset_count = ixgbe_get_sset_count, |
9a799d71 AK |
1007 | .get_ethtool_stats = ixgbe_get_ethtool_stats, |
1008 | .get_coalesce = ixgbe_get_coalesce, | |
1009 | .set_coalesce = ixgbe_set_coalesce, | |
177db6ff MC |
1010 | .get_flags = ethtool_op_get_flags, |
1011 | .set_flags = ethtool_op_set_flags, | |
9a799d71 AK |
1012 | }; |
1013 | ||
1014 | void ixgbe_set_ethtool_ops(struct net_device *netdev) | |
1015 | { | |
1016 | SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops); | |
1017 | } |