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ixgbe: Don't allow user buffer count to exceed 256
[deliverable/linux.git] / drivers / net / ixgbe / ixgbe_fcoe.c
CommitLineData
d3a2ae6d
YZ		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
8c47eaa7 4 Copyright(c) 1999 - 2010 Intel Corporation.
d3a2ae6d
YZ		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29#include "ixgbe.h"
6ee16520
YZ		 30#ifdef CONFIG_IXGBE_DCB
31#include "ixgbe_dcb_82599.h"
32#endif /* CONFIG_IXGBE_DCB */
d3a2ae6d
YZ		 33#include <linux/if_ether.h>
34#include <scsi/scsi_cmnd.h>
35#include <scsi/scsi_device.h>
36#include <scsi/fc/fc_fs.h>
37#include <scsi/fc/fc_fcoe.h>
38#include <scsi/libfc.h>
39#include <scsi/libfcoe.h>
40
d0ed8937
YZ		 41/**
42 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
43 * @rx_desc: advanced rx descriptor
44 *
45 * Returns : true if it is FCoE pkt
46 */
47static inline bool ixgbe_rx_is_fcoe(union ixgbe_adv_rx_desc *rx_desc)
48{
49 u16 p;
50
51 p = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info);
52 if (p & IXGBE_RXDADV_PKTTYPE_ETQF) {
53 p &= IXGBE_RXDADV_PKTTYPE_ETQF_MASK;
54 p >>= IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT;
55 return p == IXGBE_ETQF_FILTER_FCOE;
56 }
57 return false;
58}
59
60/**
61 * ixgbe_fcoe_clear_ddp - clear the given ddp context
62 * @ddp - ptr to the ixgbe_fcoe_ddp
63 *
64 * Returns : none
65 *
66 */
67static inline void ixgbe_fcoe_clear_ddp(struct ixgbe_fcoe_ddp *ddp)
68{
69 ddp->len = 0;
70 ddp->err = 0;
71 ddp->udl = NULL;
72 ddp->udp = 0UL;
73 ddp->sgl = NULL;
74 ddp->sgc = 0;
75}
76
77/**
78 * ixgbe_fcoe_ddp_put - free the ddp context for a given xid
79 * @netdev: the corresponding net_device
80 * @xid: the xid that corresponding ddp will be freed
81 *
82 * This is the implementation of net_device_ops.ndo_fcoe_ddp_done
83 * and it is expected to be called by ULD, i.e., FCP layer of libfc
84 * to release the corresponding ddp context when the I/O is done.
85 *
86 * Returns : data length already ddp-ed in bytes
87 */
88int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid)
89{
90 int len = 0;
91 struct ixgbe_fcoe *fcoe;
92 struct ixgbe_adapter *adapter;
93 struct ixgbe_fcoe_ddp *ddp;
94
95 if (!netdev)
96 goto out_ddp_put;
97
98 if (xid >= IXGBE_FCOE_DDP_MAX)
99 goto out_ddp_put;
100
101 adapter = netdev_priv(netdev);
102 fcoe = &adapter->fcoe;
103 ddp = &fcoe->ddp[xid];
104 if (!ddp->udl)
105 goto out_ddp_put;
106
107 len = ddp->len;
108 /* if there an error, force to invalidate ddp context */
109 if (ddp->err) {
110 spin_lock_bh(&fcoe->lock);
111 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLT, 0);
112 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLTRW,
113 (xid | IXGBE_FCFLTRW_WE));
114 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCBUFF, 0);
115 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
116 (xid | IXGBE_FCDMARW_WE));
117 spin_unlock_bh(&fcoe->lock);
118 }
119 if (ddp->sgl)
120 pci_unmap_sg(adapter->pdev, ddp->sgl, ddp->sgc,
121 DMA_FROM_DEVICE);
122 pci_pool_free(fcoe->pool, ddp->udl, ddp->udp);
123 ixgbe_fcoe_clear_ddp(ddp);
124
125out_ddp_put:
126 return len;
127}
128
129/**
130 * ixgbe_fcoe_ddp_get - called to set up ddp context
131 * @netdev: the corresponding net_device
132 * @xid: the exchange id requesting ddp
133 * @sgl: the scatter-gather list for this request
134 * @sgc: the number of scatter-gather items
135 *
136 * This is the implementation of net_device_ops.ndo_fcoe_ddp_setup
137 * and is expected to be called from ULD, e.g., FCP layer of libfc
138 * to set up ddp for the corresponding xid of the given sglist for
139 * the corresponding I/O.
140 *
141 * Returns : 1 for success and 0 for no ddp
142 */
143int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
144 struct scatterlist *sgl, unsigned int sgc)
145{
146 struct ixgbe_adapter *adapter;
147 struct ixgbe_hw *hw;
148 struct ixgbe_fcoe *fcoe;
149 struct ixgbe_fcoe_ddp *ddp;
150 struct scatterlist *sg;
151 unsigned int i, j, dmacount;
152 unsigned int len;
153 static const unsigned int bufflen = 4096;
154 unsigned int firstoff = 0;
155 unsigned int lastsize;
156 unsigned int thisoff = 0;
157 unsigned int thislen = 0;
158 u32 fcbuff, fcdmarw, fcfltrw;
159 dma_addr_t addr;
160
161 if (!netdev || !sgl)
162 return 0;
163
164 adapter = netdev_priv(netdev);
165 if (xid >= IXGBE_FCOE_DDP_MAX) {
166 DPRINTK(DRV, WARNING, "xid=0x%x out-of-range\n", xid);
167 return 0;
168 }
169
170 fcoe = &adapter->fcoe;
171 if (!fcoe->pool) {
172 DPRINTK(DRV, WARNING, "xid=0x%x no ddp pool for fcoe\n", xid);
173 return 0;
174 }
175
176 ddp = &fcoe->ddp[xid];
177 if (ddp->sgl) {
178 DPRINTK(DRV, ERR, "xid 0x%x w/ non-null sgl=%p nents=%d\n",
179 xid, ddp->sgl, ddp->sgc);
180 return 0;
181 }
182 ixgbe_fcoe_clear_ddp(ddp);
183
184 /* setup dma from scsi command sgl */
185 dmacount = pci_map_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
186 if (dmacount == 0) {
187 DPRINTK(DRV, ERR, "xid 0x%x DMA map error\n", xid);
188 return 0;
189 }
190
191 /* alloc the udl from our ddp pool */
192 ddp->udl = pci_pool_alloc(fcoe->pool, GFP_KERNEL, &ddp->udp);
193 if (!ddp->udl) {
194 DPRINTK(DRV, ERR, "failed allocated ddp context\n");
195 goto out_noddp_unmap;
196 }
197 ddp->sgl = sgl;
198 ddp->sgc = sgc;
199
200 j = 0;
201 for_each_sg(sgl, sg, dmacount, i) {
202 addr = sg_dma_address(sg);
203 len = sg_dma_len(sg);
204 while (len) {
a7551b75
RL		 205 /* max number of buffers allowed in one DDP context */
206 if (j >= IXGBE_BUFFCNT_MAX) {
207 netif_err(adapter, drv, adapter->netdev,
208 "xid=%x:%d,%d,%d:addr=%llx "
209 "not enough descriptors\n",
210 xid, i, j, dmacount, (u64)addr);
211 goto out_noddp_free;
212 }
213
d0ed8937
YZ		 214 /* get the offset of length of current buffer */
215 thisoff = addr & ((dma_addr_t)bufflen - 1);
216 thislen = min((bufflen - thisoff), len);
217 /*
218 * all but the 1st buffer (j == 0)
219 * must be aligned on bufflen
220 */
221 if ((j != 0) && (thisoff))
222 goto out_noddp_free;
223 /*
224 * all but the last buffer
225 * ((i == (dmacount - 1)) && (thislen == len))
226 * must end at bufflen
227 */
228 if (((i != (dmacount - 1)) || (thislen != len))
229 && ((thislen + thisoff) != bufflen))
230 goto out_noddp_free;
231
232 ddp->udl[j] = (u64)(addr - thisoff);
233 /* only the first buffer may have none-zero offset */
234 if (j == 0)
235 firstoff = thisoff;
236 len -= thislen;
237 addr += thislen;
238 j++;
d0ed8937
YZ		 239 }
240 }
241 /* only the last buffer may have non-full bufflen */
242 lastsize = thisoff + thislen;
243
244 fcbuff = (IXGBE_FCBUFF_4KB << IXGBE_FCBUFF_BUFFSIZE_SHIFT);
a7551b75 245 fcbuff |= ((j & 0xff) << IXGBE_FCBUFF_BUFFCNT_SHIFT);
d0ed8937
YZ		 246 fcbuff |= (firstoff << IXGBE_FCBUFF_OFFSET_SHIFT);
247 fcbuff |= (IXGBE_FCBUFF_VALID);
248
249 fcdmarw = xid;
250 fcdmarw |= IXGBE_FCDMARW_WE;
251 fcdmarw |= (lastsize << IXGBE_FCDMARW_LASTSIZE_SHIFT);
252
253 fcfltrw = xid;
254 fcfltrw |= IXGBE_FCFLTRW_WE;
255
256 /* program DMA context */
257 hw = &adapter->hw;
258 spin_lock_bh(&fcoe->lock);
8e20ce94 259 IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));
d0ed8937
YZ		 260 IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
261 IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
262 IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
263 /* program filter context */
264 IXGBE_WRITE_REG(hw, IXGBE_FCPARAM, 0);
265 IXGBE_WRITE_REG(hw, IXGBE_FCFLT, IXGBE_FCFLT_VALID);
266 IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW, fcfltrw);
267 spin_unlock_bh(&fcoe->lock);
268
269 return 1;
270
271out_noddp_free:
272 pci_pool_free(fcoe->pool, ddp->udl, ddp->udp);
273 ixgbe_fcoe_clear_ddp(ddp);
274
275out_noddp_unmap:
276 pci_unmap_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
277 return 0;
278}
279
280/**
281 * ixgbe_fcoe_ddp - check ddp status and mark it done
282 * @adapter: ixgbe adapter
283 * @rx_desc: advanced rx descriptor
284 * @skb: the skb holding the received data
285 *
286 * This checks ddp status.
287 *
3d8fd385
YZ		 288 * Returns : < 0 indicates an error or not a FCiE ddp, 0 indicates
289 * not passing the skb to ULD, > 0 indicates is the length of data
290 * being ddped.
d0ed8937
YZ		 291 */
292int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
293 union ixgbe_adv_rx_desc *rx_desc,
294 struct sk_buff *skb)
295{
296 u16 xid;
d4ab8819 297 u32 fctl;
d0ed8937
YZ		 298 u32 sterr, fceofe, fcerr, fcstat;
299 int rc = -EINVAL;
300 struct ixgbe_fcoe *fcoe;
301 struct ixgbe_fcoe_ddp *ddp;
302 struct fc_frame_header *fh;
303
304 if (!ixgbe_rx_is_fcoe(rx_desc))
305 goto ddp_out;
306
307 skb->ip_summed = CHECKSUM_UNNECESSARY;
308 sterr = le32_to_cpu(rx_desc->wb.upper.status_error);
309 fcerr = (sterr & IXGBE_RXDADV_ERR_FCERR);
310 fceofe = (sterr & IXGBE_RXDADV_ERR_FCEOFE);
311 if (fcerr == IXGBE_FCERR_BADCRC)
312 skb->ip_summed = CHECKSUM_NONE;
313
314 skb_reset_network_header(skb);
315 skb_set_transport_header(skb, skb_network_offset(skb) +
316 sizeof(struct fcoe_hdr));
317 fh = (struct fc_frame_header *)skb_transport_header(skb);
d4ab8819
YZ		 318 fctl = ntoh24(fh->fh_f_ctl);
319 if (fctl & FC_FC_EX_CTX)
320 xid = be16_to_cpu(fh->fh_ox_id);
321 else
322 xid = be16_to_cpu(fh->fh_rx_id);
323
d0ed8937
YZ		 324 if (xid >= IXGBE_FCOE_DDP_MAX)
325 goto ddp_out;
326
327 fcoe = &adapter->fcoe;
328 ddp = &fcoe->ddp[xid];
329 if (!ddp->udl)
330 goto ddp_out;
331
332 ddp->err = (fcerr | fceofe);
333 if (ddp->err)
334 goto ddp_out;
335
336 fcstat = (sterr & IXGBE_RXDADV_STAT_FCSTAT);
337 if (fcstat) {
338 /* update length of DDPed data */
339 ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
340 /* unmap the sg list when FCP_RSP is received */
341 if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_FCPRSP) {
342 pci_unmap_sg(adapter->pdev, ddp->sgl,
343 ddp->sgc, DMA_FROM_DEVICE);
344 ddp->sgl = NULL;
345 ddp->sgc = 0;
346 }
347 /* return 0 to bypass going to ULD for DDPed data */
348 if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_DDP)
349 rc = 0;
17e78b06 350 else if (ddp->len)
3d8fd385 351 rc = ddp->len;
d0ed8937
YZ		 352 }
353
354ddp_out:
355 return rc;
356}
357
bc079228
YZ		 358/**
359 * ixgbe_fso - ixgbe FCoE Sequence Offload (FSO)
360 * @adapter: ixgbe adapter
361 * @tx_ring: tx desc ring
362 * @skb: associated skb
363 * @tx_flags: tx flags
364 * @hdr_len: hdr_len to be returned
365 *
366 * This sets up large send offload for FCoE
367 *
368 * Returns : 0 indicates no FSO, > 0 for FSO, < 0 for error
369 */
370int ixgbe_fso(struct ixgbe_adapter *adapter,
371 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
372 u32 tx_flags, u8 *hdr_len)
373{
374 u8 sof, eof;
375 u32 vlan_macip_lens;
376 u32 fcoe_sof_eof;
377 u32 type_tucmd;
378 u32 mss_l4len_idx;
379 int mss = 0;
380 unsigned int i;
381 struct ixgbe_tx_buffer *tx_buffer_info;
382 struct ixgbe_adv_tx_context_desc *context_desc;
383 struct fc_frame_header *fh;
384
385 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_type != SKB_GSO_FCOE)) {
386 DPRINTK(DRV, ERR, "Wrong gso type %d:expecting SKB_GSO_FCOE\n",
387 skb_shinfo(skb)->gso_type);
388 return -EINVAL;
389 }
390
391 /* resets the header to point fcoe/fc */
392 skb_set_network_header(skb, skb->mac_len);
393 skb_set_transport_header(skb, skb->mac_len +
394 sizeof(struct fcoe_hdr));
395
396 /* sets up SOF and ORIS */
397 fcoe_sof_eof = 0;
398 sof = ((struct fcoe_hdr *)skb_network_header(skb))->fcoe_sof;
399 switch (sof) {
400 case FC_SOF_I2:
401 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIS;
402 break;
403 case FC_SOF_I3:
404 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF;
405 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIS;
406 break;
407 case FC_SOF_N2:
408 break;
409 case FC_SOF_N3:
410 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF;
411 break;
412 default:
413 DPRINTK(DRV, WARNING, "unknown sof = 0x%x\n", sof);
414 return -EINVAL;
415 }
416
417 /* the first byte of the last dword is EOF */
418 skb_copy_bits(skb, skb->len - 4, &eof, 1);
419 /* sets up EOF and ORIE */
420 switch (eof) {
421 case FC_EOF_N:
422 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
423 break;
424 case FC_EOF_T:
425 /* lso needs ORIE */
426 if (skb_is_gso(skb)) {
427 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
428 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIE;
429 } else {
430 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_T;
431 }
432 break;
433 case FC_EOF_NI:
434 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_NI;
435 break;
436 case FC_EOF_A:
437 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_A;
438 break;
439 default:
440 DPRINTK(DRV, WARNING, "unknown eof = 0x%x\n", eof);
441 return -EINVAL;
442 }
443
444 /* sets up PARINC indicating data offset */
445 fh = (struct fc_frame_header *)skb_transport_header(skb);
446 if (fh->fh_f_ctl[2] & FC_FC_REL_OFF)
447 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_PARINC;
448
449 /* hdr_len includes fc_hdr if FCoE lso is enabled */
450 *hdr_len = sizeof(struct fcoe_crc_eof);
451 if (skb_is_gso(skb))
452 *hdr_len += (skb_transport_offset(skb) +
453 sizeof(struct fc_frame_header));
454 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
455 vlan_macip_lens = (skb_transport_offset(skb) +
456 sizeof(struct fc_frame_header));
457 vlan_macip_lens |= ((skb_transport_offset(skb) - 4)
458 << IXGBE_ADVTXD_MACLEN_SHIFT);
459 vlan_macip_lens |= (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
460
461 /* type_tycmd and mss: set TUCMD.FCoE to enable offload */
462 type_tucmd = IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT |
463 IXGBE_ADVTXT_TUCMD_FCOE;
464 if (skb_is_gso(skb))
465 mss = skb_shinfo(skb)->gso_size;
466 /* mss_l4len_id: use 1 for FSO as TSO, no need for L4LEN */
467 mss_l4len_idx = (mss << IXGBE_ADVTXD_MSS_SHIFT) |
468 (1 << IXGBE_ADVTXD_IDX_SHIFT);
469
470 /* write context desc */
471 i = tx_ring->next_to_use;
472 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
473 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
474 context_desc->seqnum_seed = cpu_to_le32(fcoe_sof_eof);
475 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
476 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
477
478 tx_buffer_info = &tx_ring->tx_buffer_info[i];
479 tx_buffer_info->time_stamp = jiffies;
480 tx_buffer_info->next_to_watch = i;
481
482 i++;
483 if (i == tx_ring->count)
484 i = 0;
485 tx_ring->next_to_use = i;
486
487 return skb_is_gso(skb);
488}
489
d3a2ae6d
YZ		 490/**
491 * ixgbe_configure_fcoe - configures registers for fcoe at start
492 * @adapter: ptr to ixgbe adapter
493 *
494 * This sets up FCoE related registers
495 *
496 * Returns : none
497 */
498void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
499{
29ebf6f8 500 int i, fcoe_q, fcoe_i;
d3a2ae6d 501 struct ixgbe_hw *hw = &adapter->hw;
d0ed8937 502 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
29ebf6f8 503 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
61a0f421
YZ		 504#ifdef CONFIG_IXGBE_DCB
505 u8 tc;
506 u32 up2tc;
507#endif
d0ed8937
YZ		 508
509 /* create the pool for ddp if not created yet */
510 if (!fcoe->pool) {
511 /* allocate ddp pool */
512 fcoe->pool = pci_pool_create("ixgbe_fcoe_ddp",
513 adapter->pdev, IXGBE_FCPTR_MAX,
514 IXGBE_FCPTR_ALIGN, PAGE_SIZE);
515 if (!fcoe->pool)
516 DPRINTK(DRV, ERR,
517 "failed to allocated FCoE DDP pool\n");
d3a2ae6d 518
d0ed8937
YZ		 519 spin_lock_init(&fcoe->lock);
520 }
29ebf6f8
YZ		 521
522 /* Enable L2 eth type filter for FCoE */
d3a2ae6d
YZ		 523 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE),
524 (ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN));
29ebf6f8
YZ		 525 if (adapter->ring_feature[RING_F_FCOE].indices) {
526 /* Use multiple rx queues for FCoE by redirection table */
527 for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {
528 fcoe_i = f->mask + i % f->indices;
529 fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;
4a0b9ca0 530 fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
29ebf6f8
YZ		 531 IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);
532 }
533 IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);
534 IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0);
535 } else {
536 /* Use single rx queue for FCoE */
537 fcoe_i = f->mask;
4a0b9ca0 538 fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
29ebf6f8
YZ		 539 IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, 0);
540 IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE),
541 IXGBE_ETQS_QUEUE_EN |
542 (fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
543 }
544
d3a2ae6d
YZ		 545 IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL,
546 IXGBE_FCRXCTRL_FCOELLI |
547 IXGBE_FCRXCTRL_FCCRCBO |
548 (FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT));
61a0f421
YZ		 549#ifdef CONFIG_IXGBE_DCB
550 up2tc = IXGBE_READ_REG(&adapter->hw, IXGBE_RTTUP2TC);
551 for (i = 0; i < MAX_USER_PRIORITY; i++) {
552 tc = (u8)(up2tc >> (i * IXGBE_RTTUP2TC_UP_SHIFT));
553 tc &= (MAX_TRAFFIC_CLASS - 1);
554 if (fcoe->tc == tc) {
555 fcoe->up = i;
556 break;
557 }
558 }
559#endif
d3a2ae6d 560}
d0ed8937
YZ		 561
562/**
563 * ixgbe_cleanup_fcoe - release all fcoe ddp context resources
564 * @adapter : ixgbe adapter
565 *
566 * Cleans up outstanding ddp context resources
567 *
568 * Returns : none
569 */
570void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter)
571{
572 int i;
573 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
574
575 /* release ddp resource */
576 if (fcoe->pool) {
577 for (i = 0; i < IXGBE_FCOE_DDP_MAX; i++)
578 ixgbe_fcoe_ddp_put(adapter->netdev, i);
579 pci_pool_destroy(fcoe->pool);
580 fcoe->pool = NULL;
581 }
582}
8450ff8c
YZ		 583
584/**
585 * ixgbe_fcoe_enable - turn on FCoE offload feature
586 * @netdev: the corresponding netdev
587 *
588 * Turns on FCoE offload feature in 82599.
589 *
590 * Returns : 0 indicates success or -EINVAL on failure
591 */
592int ixgbe_fcoe_enable(struct net_device *netdev)
593{
594 int rc = -EINVAL;
595 struct ixgbe_adapter *adapter = netdev_priv(netdev);
596
597
598 if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
599 goto out_enable;
600
601 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
602 goto out_enable;
603
604 DPRINTK(DRV, INFO, "Enabling FCoE offload features.\n");
605 if (netif_running(netdev))
606 netdev->netdev_ops->ndo_stop(netdev);
607
608 ixgbe_clear_interrupt_scheme(adapter);
609
610 adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
611 adapter->ring_feature[RING_F_FCOE].indices = IXGBE_FCRETA_SIZE;
612 netdev->features |= NETIF_F_FCOE_CRC;
613 netdev->features |= NETIF_F_FSO;
614 netdev->features |= NETIF_F_FCOE_MTU;
615 netdev->vlan_features |= NETIF_F_FCOE_CRC;
616 netdev->vlan_features |= NETIF_F_FSO;
617 netdev->vlan_features |= NETIF_F_FCOE_MTU;
618 netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
8450ff8c
YZ		 619
620 ixgbe_init_interrupt_scheme(adapter);
936332b8 621 netdev_features_change(netdev);
8450ff8c
YZ		 622
623 if (netif_running(netdev))
624 netdev->netdev_ops->ndo_open(netdev);
625 rc = 0;
626
627out_enable:
628 return rc;
629}
630
631/**
632 * ixgbe_fcoe_disable - turn off FCoE offload feature
633 * @netdev: the corresponding netdev
634 *
635 * Turns off FCoE offload feature in 82599.
636 *
637 * Returns : 0 indicates success or -EINVAL on failure
638 */
639int ixgbe_fcoe_disable(struct net_device *netdev)
640{
641 int rc = -EINVAL;
642 struct ixgbe_adapter *adapter = netdev_priv(netdev);
643
644 if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
645 goto out_disable;
646
647 if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
648 goto out_disable;
649
650 DPRINTK(DRV, INFO, "Disabling FCoE offload features.\n");
651 if (netif_running(netdev))
652 netdev->netdev_ops->ndo_stop(netdev);
653
654 ixgbe_clear_interrupt_scheme(adapter);
655
656 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
657 adapter->ring_feature[RING_F_FCOE].indices = 0;
658 netdev->features &= ~NETIF_F_FCOE_CRC;
659 netdev->features &= ~NETIF_F_FSO;
660 netdev->features &= ~NETIF_F_FCOE_MTU;
661 netdev->vlan_features &= ~NETIF_F_FCOE_CRC;
662 netdev->vlan_features &= ~NETIF_F_FSO;
663 netdev->vlan_features &= ~NETIF_F_FCOE_MTU;
664 netdev->fcoe_ddp_xid = 0;
8450ff8c
YZ		 665
666 ixgbe_cleanup_fcoe(adapter);
8450ff8c 667 ixgbe_init_interrupt_scheme(adapter);
936332b8
VD		 668 netdev_features_change(netdev);
669
8450ff8c
YZ		 670 if (netif_running(netdev))
671 netdev->netdev_ops->ndo_open(netdev);
672 rc = 0;
673
674out_disable:
675 return rc;
676}
6ee16520
YZ		 677
678#ifdef CONFIG_IXGBE_DCB
679/**
680 * ixgbe_fcoe_getapp - retrieves current user priority bitmap for FCoE
681 * @adapter : ixgbe adapter
682 *
683 * Finds out the corresponding user priority bitmap from the current
684 * traffic class that FCoE belongs to. Returns 0 as the invalid user
685 * priority bitmap to indicate an error.
686 *
687 * Returns : 802.1p user priority bitmap for FCoE
688 */
689u8 ixgbe_fcoe_getapp(struct ixgbe_adapter *adapter)
690{
61a0f421 691 return 1 << adapter->fcoe.up;
6ee16520
YZ		 692}
693
694/**
695 * ixgbe_fcoe_setapp - sets the user priority bitmap for FCoE
696 * @adapter : ixgbe adapter
697 * @up : 802.1p user priority bitmap
698 *
699 * Finds out the traffic class from the input user priority
700 * bitmap for FCoE.
701 *
702 * Returns : 0 on success otherwise returns 1 on error
703 */
704u8 ixgbe_fcoe_setapp(struct ixgbe_adapter *adapter, u8 up)
705{
706 int i;
707 u32 up2tc;
708
709 /* valid user priority bitmap must not be 0 */
710 if (up) {
711 /* from user priority to the corresponding traffic class */
712 up2tc = IXGBE_READ_REG(&adapter->hw, IXGBE_RTTUP2TC);
713 for (i = 0; i < MAX_USER_PRIORITY; i++) {
714 if (up & (1 << i)) {
715 up2tc >>= (i * IXGBE_RTTUP2TC_UP_SHIFT);
716 up2tc &= (MAX_TRAFFIC_CLASS - 1);
717 adapter->fcoe.tc = (u8)up2tc;
61a0f421 718 adapter->fcoe.up = i;
6ee16520
YZ		 719 return 0;
720 }
721 }
722 }
723
724 return 1;
725}
726#endif /* CONFIG_IXGBE_DCB */
61a1fa10
YZ		 727
728/**
729 * ixgbe_fcoe_get_wwn - get world wide name for the node or the port
730 * @netdev : ixgbe adapter
731 * @wwn : the world wide name
732 * @type: the type of world wide name
733 *
734 * Returns the node or port world wide name if both the prefix and the san
735 * mac address are valid, then the wwn is formed based on the NAA-2 for
736 * IEEE Extended name identifier (ref. to T10 FC-LS Spec., Sec. 15.3).
737 *
738 * Returns : 0 on success
739 */
740int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type)
741{
742 int rc = -EINVAL;
743 u16 prefix = 0xffff;
744 struct ixgbe_adapter *adapter = netdev_priv(netdev);
745 struct ixgbe_mac_info *mac = &adapter->hw.mac;
746
747 switch (type) {
748 case NETDEV_FCOE_WWNN:
749 prefix = mac->wwnn_prefix;
750 break;
751 case NETDEV_FCOE_WWPN:
752 prefix = mac->wwpn_prefix;
753 break;
754 default:
755 break;
756 }
757
758 if ((prefix != 0xffff) &&
759 is_valid_ether_addr(mac->san_addr)) {
760 *wwn = ((u64) prefix << 48) |
761 ((u64) mac->san_addr[0] << 40) |
762 ((u64) mac->san_addr[1] << 32) |
763 ((u64) mac->san_addr[2] << 24) |
764 ((u64) mac->san_addr[3] << 16) |
765 ((u64) mac->san_addr[4] << 8) |
766 ((u64) mac->san_addr[5]);
767 rc = 0;
768 }
769 return rc;
770}
771
772
Linux kernel - Deliverables
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