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9a799d71 AK |
1 | /******************************************************************************* |
2 | ||
3 | Intel 10 Gigabit PCI Express Linux driver | |
4 | Copyright(c) 1999 - 2007 Intel Corporation. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
22 | Contact Information: | |
23 | Linux NICS <linux.nics@intel.com> | |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include <linux/types.h> | |
30 | #include <linux/module.h> | |
31 | #include <linux/pci.h> | |
32 | #include <linux/netdevice.h> | |
33 | #include <linux/vmalloc.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/in.h> | |
36 | #include <linux/ip.h> | |
37 | #include <linux/tcp.h> | |
38 | #include <linux/ipv6.h> | |
39 | #include <net/checksum.h> | |
40 | #include <net/ip6_checksum.h> | |
41 | #include <linux/ethtool.h> | |
42 | #include <linux/if_vlan.h> | |
43 | ||
44 | #include "ixgbe.h" | |
45 | #include "ixgbe_common.h" | |
46 | ||
47 | char ixgbe_driver_name[] = "ixgbe"; | |
9c8eb720 SH |
48 | static const char ixgbe_driver_string[] = |
49 | "Intel(R) 10 Gigabit PCI Express Network Driver"; | |
9a799d71 | 50 | |
ef850045 | 51 | #define DRV_VERSION "1.3.18-k2" |
9c8eb720 SH |
52 | const char ixgbe_driver_version[] = DRV_VERSION; |
53 | static const char ixgbe_copyright[] = | |
54 | "Copyright (c) 1999-2007 Intel Corporation."; | |
9a799d71 AK |
55 | |
56 | static const struct ixgbe_info *ixgbe_info_tbl[] = { | |
3957d63d | 57 | [board_82598] = &ixgbe_82598_info, |
9a799d71 AK |
58 | }; |
59 | ||
60 | /* ixgbe_pci_tbl - PCI Device ID Table | |
61 | * | |
62 | * Wildcard entries (PCI_ANY_ID) should come last | |
63 | * Last entry must be all 0s | |
64 | * | |
65 | * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, | |
66 | * Class, Class Mask, private data (not used) } | |
67 | */ | |
68 | static struct pci_device_id ixgbe_pci_tbl[] = { | |
69 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), | |
3957d63d | 70 | board_82598 }, |
9a799d71 | 71 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), |
3957d63d | 72 | board_82598 }, |
9a799d71 | 73 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT), |
3957d63d | 74 | board_82598 }, |
9a799d71 | 75 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), |
3957d63d | 76 | board_82598 }, |
9a799d71 AK |
77 | |
78 | /* required last entry */ | |
79 | {0, } | |
80 | }; | |
81 | MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl); | |
82 | ||
bd0362dd JC |
83 | #ifdef CONFIG_DCA |
84 | static int ixgbe_notify_dca(struct notifier_block *, unsigned long event, | |
85 | void *p); | |
86 | static struct notifier_block dca_notifier = { | |
87 | .notifier_call = ixgbe_notify_dca, | |
88 | .next = NULL, | |
89 | .priority = 0 | |
90 | }; | |
91 | #endif | |
92 | ||
9a799d71 AK |
93 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); |
94 | MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver"); | |
95 | MODULE_LICENSE("GPL"); | |
96 | MODULE_VERSION(DRV_VERSION); | |
97 | ||
98 | #define DEFAULT_DEBUG_LEVEL_SHIFT 3 | |
99 | ||
5eba3699 AV |
100 | static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter) |
101 | { | |
102 | u32 ctrl_ext; | |
103 | ||
104 | /* Let firmware take over control of h/w */ | |
105 | ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); | |
106 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, | |
107 | ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD); | |
108 | } | |
109 | ||
110 | static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter) | |
111 | { | |
112 | u32 ctrl_ext; | |
113 | ||
114 | /* Let firmware know the driver has taken over */ | |
115 | ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); | |
116 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, | |
117 | ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD); | |
118 | } | |
9a799d71 AK |
119 | |
120 | #ifdef DEBUG | |
121 | /** | |
122 | * ixgbe_get_hw_dev_name - return device name string | |
123 | * used by hardware layer to print debugging information | |
124 | **/ | |
125 | char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw) | |
126 | { | |
127 | struct ixgbe_adapter *adapter = hw->back; | |
128 | struct net_device *netdev = adapter->netdev; | |
129 | return netdev->name; | |
130 | } | |
131 | #endif | |
132 | ||
133 | static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry, | |
134 | u8 msix_vector) | |
135 | { | |
136 | u32 ivar, index; | |
137 | ||
138 | msix_vector |= IXGBE_IVAR_ALLOC_VAL; | |
139 | index = (int_alloc_entry >> 2) & 0x1F; | |
140 | ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index)); | |
141 | ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3))); | |
142 | ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3))); | |
143 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar); | |
144 | } | |
145 | ||
146 | static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter, | |
147 | struct ixgbe_tx_buffer | |
148 | *tx_buffer_info) | |
149 | { | |
150 | if (tx_buffer_info->dma) { | |
151 | pci_unmap_page(adapter->pdev, | |
152 | tx_buffer_info->dma, | |
153 | tx_buffer_info->length, PCI_DMA_TODEVICE); | |
154 | tx_buffer_info->dma = 0; | |
155 | } | |
156 | if (tx_buffer_info->skb) { | |
157 | dev_kfree_skb_any(tx_buffer_info->skb); | |
158 | tx_buffer_info->skb = NULL; | |
159 | } | |
160 | /* tx_buffer_info must be completely set up in the transmit path */ | |
161 | } | |
162 | ||
163 | static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, | |
164 | struct ixgbe_ring *tx_ring, | |
165 | unsigned int eop, | |
166 | union ixgbe_adv_tx_desc *eop_desc) | |
167 | { | |
168 | /* Detect a transmit hang in hardware, this serializes the | |
169 | * check with the clearing of time_stamp and movement of i */ | |
170 | adapter->detect_tx_hung = false; | |
171 | if (tx_ring->tx_buffer_info[eop].dma && | |
172 | time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) && | |
173 | !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) { | |
174 | /* detected Tx unit hang */ | |
175 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" | |
176 | " TDH <%x>\n" | |
177 | " TDT <%x>\n" | |
178 | " next_to_use <%x>\n" | |
179 | " next_to_clean <%x>\n" | |
180 | "tx_buffer_info[next_to_clean]\n" | |
181 | " time_stamp <%lx>\n" | |
182 | " next_to_watch <%x>\n" | |
183 | " jiffies <%lx>\n" | |
184 | " next_to_watch.status <%x>\n", | |
185 | readl(adapter->hw.hw_addr + tx_ring->head), | |
186 | readl(adapter->hw.hw_addr + tx_ring->tail), | |
187 | tx_ring->next_to_use, | |
188 | tx_ring->next_to_clean, | |
189 | tx_ring->tx_buffer_info[eop].time_stamp, | |
190 | eop, jiffies, eop_desc->wb.status); | |
191 | return true; | |
192 | } | |
193 | ||
194 | return false; | |
195 | } | |
196 | ||
e092be60 AV |
197 | #define IXGBE_MAX_TXD_PWR 14 |
198 | #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR) | |
199 | ||
200 | /* Tx Descriptors needed, worst case */ | |
201 | #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \ | |
202 | (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0)) | |
203 | #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \ | |
204 | MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */ | |
205 | ||
9a799d71 AK |
206 | /** |
207 | * ixgbe_clean_tx_irq - Reclaim resources after transmit completes | |
208 | * @adapter: board private structure | |
209 | **/ | |
210 | static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter, | |
211 | struct ixgbe_ring *tx_ring) | |
212 | { | |
213 | struct net_device *netdev = adapter->netdev; | |
214 | union ixgbe_adv_tx_desc *tx_desc, *eop_desc; | |
215 | struct ixgbe_tx_buffer *tx_buffer_info; | |
216 | unsigned int i, eop; | |
217 | bool cleaned = false; | |
e092be60 | 218 | unsigned int total_tx_bytes = 0, total_tx_packets = 0; |
9a799d71 AK |
219 | |
220 | i = tx_ring->next_to_clean; | |
221 | eop = tx_ring->tx_buffer_info[i].next_to_watch; | |
222 | eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); | |
223 | while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) { | |
e092be60 AV |
224 | cleaned = false; |
225 | while (!cleaned) { | |
9a799d71 AK |
226 | tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i); |
227 | tx_buffer_info = &tx_ring->tx_buffer_info[i]; | |
228 | cleaned = (i == eop); | |
229 | ||
230 | tx_ring->stats.bytes += tx_buffer_info->length; | |
e092be60 AV |
231 | if (cleaned) { |
232 | struct sk_buff *skb = tx_buffer_info->skb; | |
e092be60 AV |
233 | unsigned int segs, bytecount; |
234 | segs = skb_shinfo(skb)->gso_segs ?: 1; | |
235 | /* multiply data chunks by size of headers */ | |
236 | bytecount = ((segs - 1) * skb_headlen(skb)) + | |
237 | skb->len; | |
238 | total_tx_packets += segs; | |
239 | total_tx_bytes += bytecount; | |
e092be60 | 240 | } |
9a799d71 AK |
241 | ixgbe_unmap_and_free_tx_resource(adapter, |
242 | tx_buffer_info); | |
243 | tx_desc->wb.status = 0; | |
244 | ||
245 | i++; | |
246 | if (i == tx_ring->count) | |
247 | i = 0; | |
248 | } | |
249 | ||
250 | tx_ring->stats.packets++; | |
251 | ||
252 | eop = tx_ring->tx_buffer_info[i].next_to_watch; | |
253 | eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); | |
254 | ||
255 | /* weight of a sort for tx, avoid endless transmit cleanup */ | |
e092be60 | 256 | if (total_tx_packets >= tx_ring->work_limit) |
9a799d71 AK |
257 | break; |
258 | } | |
259 | ||
260 | tx_ring->next_to_clean = i; | |
261 | ||
e092be60 AV |
262 | #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) |
263 | if (total_tx_packets && netif_carrier_ok(netdev) && | |
264 | (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) { | |
265 | /* Make sure that anybody stopping the queue after this | |
266 | * sees the new next_to_clean. | |
267 | */ | |
268 | smp_mb(); | |
30eba97a AV |
269 | if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) && |
270 | !test_bit(__IXGBE_DOWN, &adapter->state)) { | |
271 | netif_wake_subqueue(netdev, tx_ring->queue_index); | |
272 | adapter->restart_queue++; | |
273 | } | |
e092be60 | 274 | } |
9a799d71 AK |
275 | |
276 | if (adapter->detect_tx_hung) | |
277 | if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc)) | |
30eba97a | 278 | netif_stop_subqueue(netdev, tx_ring->queue_index); |
9a799d71 | 279 | |
e092be60 | 280 | if (total_tx_packets >= tx_ring->work_limit) |
9a799d71 AK |
281 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value); |
282 | ||
f494e8fa AV |
283 | tx_ring->total_bytes += total_tx_bytes; |
284 | tx_ring->total_packets += total_tx_packets; | |
d2f4fbe2 AV |
285 | adapter->net_stats.tx_bytes += total_tx_bytes; |
286 | adapter->net_stats.tx_packets += total_tx_packets; | |
e092be60 | 287 | cleaned = total_tx_packets ? true : false; |
9a799d71 AK |
288 | return cleaned; |
289 | } | |
290 | ||
bd0362dd JC |
291 | #ifdef CONFIG_DCA |
292 | static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter, | |
293 | struct ixgbe_ring *rxr) | |
294 | { | |
295 | u32 rxctrl; | |
296 | int cpu = get_cpu(); | |
297 | int q = rxr - adapter->rx_ring; | |
298 | ||
299 | if (rxr->cpu != cpu) { | |
300 | rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q)); | |
301 | rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK; | |
302 | rxctrl |= dca_get_tag(cpu); | |
303 | rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN; | |
304 | rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN; | |
305 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl); | |
306 | rxr->cpu = cpu; | |
307 | } | |
308 | put_cpu(); | |
309 | } | |
310 | ||
311 | static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter, | |
312 | struct ixgbe_ring *txr) | |
313 | { | |
314 | u32 txctrl; | |
315 | int cpu = get_cpu(); | |
316 | int q = txr - adapter->tx_ring; | |
317 | ||
318 | if (txr->cpu != cpu) { | |
319 | txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q)); | |
320 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK; | |
321 | txctrl |= dca_get_tag(cpu); | |
322 | txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; | |
323 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl); | |
324 | txr->cpu = cpu; | |
325 | } | |
326 | put_cpu(); | |
327 | } | |
328 | ||
329 | static void ixgbe_setup_dca(struct ixgbe_adapter *adapter) | |
330 | { | |
331 | int i; | |
332 | ||
333 | if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED)) | |
334 | return; | |
335 | ||
336 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
337 | adapter->tx_ring[i].cpu = -1; | |
338 | ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]); | |
339 | } | |
340 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
341 | adapter->rx_ring[i].cpu = -1; | |
342 | ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]); | |
343 | } | |
344 | } | |
345 | ||
346 | static int __ixgbe_notify_dca(struct device *dev, void *data) | |
347 | { | |
348 | struct net_device *netdev = dev_get_drvdata(dev); | |
349 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
350 | unsigned long event = *(unsigned long *)data; | |
351 | ||
352 | switch (event) { | |
353 | case DCA_PROVIDER_ADD: | |
354 | adapter->flags |= IXGBE_FLAG_DCA_ENABLED; | |
355 | /* Always use CB2 mode, difference is masked | |
356 | * in the CB driver. */ | |
357 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2); | |
652f093f | 358 | if (dca_add_requester(dev) == 0) { |
bd0362dd JC |
359 | ixgbe_setup_dca(adapter); |
360 | break; | |
361 | } | |
362 | /* Fall Through since DCA is disabled. */ | |
363 | case DCA_PROVIDER_REMOVE: | |
364 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { | |
365 | dca_remove_requester(dev); | |
366 | adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED; | |
367 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1); | |
368 | } | |
369 | break; | |
370 | } | |
371 | ||
652f093f | 372 | return 0; |
bd0362dd JC |
373 | } |
374 | ||
375 | #endif /* CONFIG_DCA */ | |
9a799d71 AK |
376 | /** |
377 | * ixgbe_receive_skb - Send a completed packet up the stack | |
378 | * @adapter: board private structure | |
379 | * @skb: packet to send up | |
177db6ff MC |
380 | * @status: hardware indication of status of receive |
381 | * @rx_ring: rx descriptor ring (for a specific queue) to setup | |
382 | * @rx_desc: rx descriptor | |
9a799d71 AK |
383 | **/ |
384 | static void ixgbe_receive_skb(struct ixgbe_adapter *adapter, | |
177db6ff MC |
385 | struct sk_buff *skb, u8 status, |
386 | struct ixgbe_ring *ring, | |
387 | union ixgbe_adv_rx_desc *rx_desc) | |
9a799d71 | 388 | { |
177db6ff MC |
389 | bool is_vlan = (status & IXGBE_RXD_STAT_VP); |
390 | u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan); | |
9a799d71 | 391 | |
177db6ff MC |
392 | if (adapter->netdev->features & NETIF_F_LRO && |
393 | skb->ip_summed == CHECKSUM_UNNECESSARY) { | |
9a799d71 | 394 | if (adapter->vlgrp && is_vlan) |
177db6ff MC |
395 | lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb, |
396 | adapter->vlgrp, tag, | |
397 | rx_desc); | |
9a799d71 | 398 | else |
177db6ff MC |
399 | lro_receive_skb(&ring->lro_mgr, skb, rx_desc); |
400 | ring->lro_used = true; | |
401 | } else { | |
402 | if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) { | |
403 | if (adapter->vlgrp && is_vlan) | |
404 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag); | |
405 | else | |
406 | netif_receive_skb(skb); | |
407 | } else { | |
408 | if (adapter->vlgrp && is_vlan) | |
409 | vlan_hwaccel_rx(skb, adapter->vlgrp, tag); | |
410 | else | |
411 | netif_rx(skb); | |
412 | } | |
9a799d71 AK |
413 | } |
414 | } | |
415 | ||
e59bd25d AV |
416 | /** |
417 | * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum | |
418 | * @adapter: address of board private structure | |
419 | * @status_err: hardware indication of status of receive | |
420 | * @skb: skb currently being received and modified | |
421 | **/ | |
9a799d71 AK |
422 | static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter, |
423 | u32 status_err, | |
424 | struct sk_buff *skb) | |
425 | { | |
426 | skb->ip_summed = CHECKSUM_NONE; | |
427 | ||
e59bd25d | 428 | /* Ignore Checksum bit is set, or rx csum disabled */ |
9a799d71 | 429 | if ((status_err & IXGBE_RXD_STAT_IXSM) || |
e59bd25d | 430 | !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED)) |
9a799d71 | 431 | return; |
e59bd25d AV |
432 | |
433 | /* if IP and error */ | |
434 | if ((status_err & IXGBE_RXD_STAT_IPCS) && | |
435 | (status_err & IXGBE_RXDADV_ERR_IPE)) { | |
9a799d71 AK |
436 | adapter->hw_csum_rx_error++; |
437 | return; | |
438 | } | |
e59bd25d AV |
439 | |
440 | if (!(status_err & IXGBE_RXD_STAT_L4CS)) | |
441 | return; | |
442 | ||
443 | if (status_err & IXGBE_RXDADV_ERR_TCPE) { | |
444 | adapter->hw_csum_rx_error++; | |
445 | return; | |
446 | } | |
447 | ||
9a799d71 | 448 | /* It must be a TCP or UDP packet with a valid checksum */ |
e59bd25d | 449 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
9a799d71 AK |
450 | adapter->hw_csum_rx_good++; |
451 | } | |
452 | ||
453 | /** | |
454 | * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split | |
455 | * @adapter: address of board private structure | |
456 | **/ | |
457 | static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter, | |
458 | struct ixgbe_ring *rx_ring, | |
459 | int cleaned_count) | |
460 | { | |
461 | struct net_device *netdev = adapter->netdev; | |
462 | struct pci_dev *pdev = adapter->pdev; | |
463 | union ixgbe_adv_rx_desc *rx_desc; | |
464 | struct ixgbe_rx_buffer *rx_buffer_info; | |
465 | struct sk_buff *skb; | |
466 | unsigned int i; | |
467 | unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN; | |
468 | ||
469 | i = rx_ring->next_to_use; | |
470 | rx_buffer_info = &rx_ring->rx_buffer_info[i]; | |
471 | ||
472 | while (cleaned_count--) { | |
473 | rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i); | |
474 | ||
475 | if (!rx_buffer_info->page && | |
476 | (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) { | |
477 | rx_buffer_info->page = alloc_page(GFP_ATOMIC); | |
478 | if (!rx_buffer_info->page) { | |
479 | adapter->alloc_rx_page_failed++; | |
480 | goto no_buffers; | |
481 | } | |
482 | rx_buffer_info->page_dma = | |
483 | pci_map_page(pdev, rx_buffer_info->page, | |
484 | 0, PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
485 | } | |
486 | ||
487 | if (!rx_buffer_info->skb) { | |
488 | skb = netdev_alloc_skb(netdev, bufsz); | |
489 | ||
490 | if (!skb) { | |
491 | adapter->alloc_rx_buff_failed++; | |
492 | goto no_buffers; | |
493 | } | |
494 | ||
495 | /* | |
496 | * Make buffer alignment 2 beyond a 16 byte boundary | |
497 | * this will result in a 16 byte aligned IP header after | |
498 | * the 14 byte MAC header is removed | |
499 | */ | |
500 | skb_reserve(skb, NET_IP_ALIGN); | |
501 | ||
502 | rx_buffer_info->skb = skb; | |
503 | rx_buffer_info->dma = pci_map_single(pdev, skb->data, | |
504 | bufsz, | |
505 | PCI_DMA_FROMDEVICE); | |
506 | } | |
507 | /* Refresh the desc even if buffer_addrs didn't change because | |
508 | * each write-back erases this info. */ | |
509 | if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { | |
510 | rx_desc->read.pkt_addr = | |
511 | cpu_to_le64(rx_buffer_info->page_dma); | |
512 | rx_desc->read.hdr_addr = | |
513 | cpu_to_le64(rx_buffer_info->dma); | |
514 | } else { | |
515 | rx_desc->read.pkt_addr = | |
516 | cpu_to_le64(rx_buffer_info->dma); | |
517 | } | |
518 | ||
519 | i++; | |
520 | if (i == rx_ring->count) | |
521 | i = 0; | |
522 | rx_buffer_info = &rx_ring->rx_buffer_info[i]; | |
523 | } | |
524 | no_buffers: | |
525 | if (rx_ring->next_to_use != i) { | |
526 | rx_ring->next_to_use = i; | |
527 | if (i-- == 0) | |
528 | i = (rx_ring->count - 1); | |
529 | ||
530 | /* | |
531 | * Force memory writes to complete before letting h/w | |
532 | * know there are new descriptors to fetch. (Only | |
533 | * applicable for weak-ordered memory model archs, | |
534 | * such as IA-64). | |
535 | */ | |
536 | wmb(); | |
537 | writel(i, adapter->hw.hw_addr + rx_ring->tail); | |
538 | } | |
539 | } | |
540 | ||
541 | static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter, | |
542 | struct ixgbe_ring *rx_ring, | |
543 | int *work_done, int work_to_do) | |
544 | { | |
545 | struct net_device *netdev = adapter->netdev; | |
546 | struct pci_dev *pdev = adapter->pdev; | |
547 | union ixgbe_adv_rx_desc *rx_desc, *next_rxd; | |
548 | struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer; | |
549 | struct sk_buff *skb; | |
550 | unsigned int i; | |
551 | u32 upper_len, len, staterr; | |
177db6ff MC |
552 | u16 hdr_info; |
553 | bool cleaned = false; | |
9a799d71 | 554 | int cleaned_count = 0; |
d2f4fbe2 | 555 | unsigned int total_rx_bytes = 0, total_rx_packets = 0; |
9a799d71 AK |
556 | |
557 | i = rx_ring->next_to_clean; | |
558 | upper_len = 0; | |
559 | rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i); | |
560 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | |
561 | rx_buffer_info = &rx_ring->rx_buffer_info[i]; | |
9a799d71 AK |
562 | |
563 | while (staterr & IXGBE_RXD_STAT_DD) { | |
564 | if (*work_done >= work_to_do) | |
565 | break; | |
566 | (*work_done)++; | |
567 | ||
568 | if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { | |
569 | hdr_info = | |
570 | le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info); | |
571 | len = | |
572 | ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >> | |
573 | IXGBE_RXDADV_HDRBUFLEN_SHIFT); | |
574 | if (hdr_info & IXGBE_RXDADV_SPH) | |
575 | adapter->rx_hdr_split++; | |
576 | if (len > IXGBE_RX_HDR_SIZE) | |
577 | len = IXGBE_RX_HDR_SIZE; | |
578 | upper_len = le16_to_cpu(rx_desc->wb.upper.length); | |
579 | } else | |
580 | len = le16_to_cpu(rx_desc->wb.upper.length); | |
581 | ||
582 | cleaned = true; | |
583 | skb = rx_buffer_info->skb; | |
584 | prefetch(skb->data - NET_IP_ALIGN); | |
585 | rx_buffer_info->skb = NULL; | |
586 | ||
587 | if (len && !skb_shinfo(skb)->nr_frags) { | |
588 | pci_unmap_single(pdev, rx_buffer_info->dma, | |
589 | adapter->rx_buf_len + NET_IP_ALIGN, | |
590 | PCI_DMA_FROMDEVICE); | |
591 | skb_put(skb, len); | |
592 | } | |
593 | ||
594 | if (upper_len) { | |
595 | pci_unmap_page(pdev, rx_buffer_info->page_dma, | |
596 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
597 | rx_buffer_info->page_dma = 0; | |
598 | skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags, | |
599 | rx_buffer_info->page, 0, upper_len); | |
600 | rx_buffer_info->page = NULL; | |
601 | ||
602 | skb->len += upper_len; | |
603 | skb->data_len += upper_len; | |
604 | skb->truesize += upper_len; | |
605 | } | |
606 | ||
607 | i++; | |
608 | if (i == rx_ring->count) | |
609 | i = 0; | |
610 | next_buffer = &rx_ring->rx_buffer_info[i]; | |
611 | ||
612 | next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i); | |
613 | prefetch(next_rxd); | |
614 | ||
615 | cleaned_count++; | |
616 | if (staterr & IXGBE_RXD_STAT_EOP) { | |
617 | rx_ring->stats.packets++; | |
618 | rx_ring->stats.bytes += skb->len; | |
619 | } else { | |
620 | rx_buffer_info->skb = next_buffer->skb; | |
621 | rx_buffer_info->dma = next_buffer->dma; | |
622 | next_buffer->skb = skb; | |
623 | adapter->non_eop_descs++; | |
624 | goto next_desc; | |
625 | } | |
626 | ||
627 | if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) { | |
628 | dev_kfree_skb_irq(skb); | |
629 | goto next_desc; | |
630 | } | |
631 | ||
632 | ixgbe_rx_checksum(adapter, staterr, skb); | |
d2f4fbe2 AV |
633 | |
634 | /* probably a little skewed due to removing CRC */ | |
635 | total_rx_bytes += skb->len; | |
636 | total_rx_packets++; | |
637 | ||
9a799d71 | 638 | skb->protocol = eth_type_trans(skb, netdev); |
177db6ff | 639 | ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc); |
9a799d71 AK |
640 | netdev->last_rx = jiffies; |
641 | ||
642 | next_desc: | |
643 | rx_desc->wb.upper.status_error = 0; | |
644 | ||
645 | /* return some buffers to hardware, one at a time is too slow */ | |
646 | if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) { | |
647 | ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count); | |
648 | cleaned_count = 0; | |
649 | } | |
650 | ||
651 | /* use prefetched values */ | |
652 | rx_desc = next_rxd; | |
653 | rx_buffer_info = next_buffer; | |
654 | ||
655 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | |
177db6ff MC |
656 | } |
657 | ||
658 | if (rx_ring->lro_used) { | |
659 | lro_flush_all(&rx_ring->lro_mgr); | |
660 | rx_ring->lro_used = false; | |
9a799d71 AK |
661 | } |
662 | ||
663 | rx_ring->next_to_clean = i; | |
664 | cleaned_count = IXGBE_DESC_UNUSED(rx_ring); | |
665 | ||
666 | if (cleaned_count) | |
667 | ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count); | |
668 | ||
d2f4fbe2 AV |
669 | adapter->net_stats.rx_bytes += total_rx_bytes; |
670 | adapter->net_stats.rx_packets += total_rx_packets; | |
671 | ||
f494e8fa AV |
672 | rx_ring->total_packets += total_rx_packets; |
673 | rx_ring->total_bytes += total_rx_bytes; | |
674 | adapter->net_stats.rx_bytes += total_rx_bytes; | |
675 | adapter->net_stats.rx_packets += total_rx_packets; | |
676 | ||
9a799d71 AK |
677 | return cleaned; |
678 | } | |
679 | ||
021230d4 | 680 | static int ixgbe_clean_rxonly(struct napi_struct *, int); |
9a799d71 AK |
681 | /** |
682 | * ixgbe_configure_msix - Configure MSI-X hardware | |
683 | * @adapter: board private structure | |
684 | * | |
685 | * ixgbe_configure_msix sets up the hardware to properly generate MSI-X | |
686 | * interrupts. | |
687 | **/ | |
688 | static void ixgbe_configure_msix(struct ixgbe_adapter *adapter) | |
689 | { | |
021230d4 AV |
690 | struct ixgbe_q_vector *q_vector; |
691 | int i, j, q_vectors, v_idx, r_idx; | |
692 | u32 mask; | |
9a799d71 | 693 | |
021230d4 | 694 | q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
9a799d71 | 695 | |
021230d4 AV |
696 | /* Populate the IVAR table and set the ITR values to the |
697 | * corresponding register. | |
698 | */ | |
699 | for (v_idx = 0; v_idx < q_vectors; v_idx++) { | |
700 | q_vector = &adapter->q_vector[v_idx]; | |
701 | /* XXX for_each_bit(...) */ | |
702 | r_idx = find_first_bit(q_vector->rxr_idx, | |
703 | adapter->num_rx_queues); | |
704 | ||
705 | for (i = 0; i < q_vector->rxr_count; i++) { | |
706 | j = adapter->rx_ring[r_idx].reg_idx; | |
707 | ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx); | |
708 | r_idx = find_next_bit(q_vector->rxr_idx, | |
709 | adapter->num_rx_queues, | |
710 | r_idx + 1); | |
711 | } | |
712 | r_idx = find_first_bit(q_vector->txr_idx, | |
713 | adapter->num_tx_queues); | |
714 | ||
715 | for (i = 0; i < q_vector->txr_count; i++) { | |
716 | j = adapter->tx_ring[r_idx].reg_idx; | |
717 | ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx); | |
718 | r_idx = find_next_bit(q_vector->txr_idx, | |
719 | adapter->num_tx_queues, | |
720 | r_idx + 1); | |
721 | } | |
722 | ||
723 | /* if this is a tx only vector use half the irq (tx) rate */ | |
724 | if (q_vector->txr_count && !q_vector->rxr_count) | |
725 | q_vector->eitr = adapter->tx_eitr; | |
726 | else | |
727 | /* rx only or mixed */ | |
728 | q_vector->eitr = adapter->rx_eitr; | |
729 | ||
730 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), | |
731 | EITR_INTS_PER_SEC_TO_REG(q_vector->eitr)); | |
9a799d71 AK |
732 | } |
733 | ||
021230d4 AV |
734 | ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx); |
735 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950); | |
736 | ||
737 | /* set up to autoclear timer, lsc, and the vectors */ | |
738 | mask = IXGBE_EIMS_ENABLE_MASK; | |
739 | mask &= ~IXGBE_EIMS_OTHER; | |
740 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask); | |
9a799d71 AK |
741 | } |
742 | ||
f494e8fa AV |
743 | enum latency_range { |
744 | lowest_latency = 0, | |
745 | low_latency = 1, | |
746 | bulk_latency = 2, | |
747 | latency_invalid = 255 | |
748 | }; | |
749 | ||
750 | /** | |
751 | * ixgbe_update_itr - update the dynamic ITR value based on statistics | |
752 | * @adapter: pointer to adapter | |
753 | * @eitr: eitr setting (ints per sec) to give last timeslice | |
754 | * @itr_setting: current throttle rate in ints/second | |
755 | * @packets: the number of packets during this measurement interval | |
756 | * @bytes: the number of bytes during this measurement interval | |
757 | * | |
758 | * Stores a new ITR value based on packets and byte | |
759 | * counts during the last interrupt. The advantage of per interrupt | |
760 | * computation is faster updates and more accurate ITR for the current | |
761 | * traffic pattern. Constants in this function were computed | |
762 | * based on theoretical maximum wire speed and thresholds were set based | |
763 | * on testing data as well as attempting to minimize response time | |
764 | * while increasing bulk throughput. | |
765 | * this functionality is controlled by the InterruptThrottleRate module | |
766 | * parameter (see ixgbe_param.c) | |
767 | **/ | |
768 | static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter, | |
769 | u32 eitr, u8 itr_setting, | |
770 | int packets, int bytes) | |
771 | { | |
772 | unsigned int retval = itr_setting; | |
773 | u32 timepassed_us; | |
774 | u64 bytes_perint; | |
775 | ||
776 | if (packets == 0) | |
777 | goto update_itr_done; | |
778 | ||
779 | ||
780 | /* simple throttlerate management | |
781 | * 0-20MB/s lowest (100000 ints/s) | |
782 | * 20-100MB/s low (20000 ints/s) | |
783 | * 100-1249MB/s bulk (8000 ints/s) | |
784 | */ | |
785 | /* what was last interrupt timeslice? */ | |
786 | timepassed_us = 1000000/eitr; | |
787 | bytes_perint = bytes / timepassed_us; /* bytes/usec */ | |
788 | ||
789 | switch (itr_setting) { | |
790 | case lowest_latency: | |
791 | if (bytes_perint > adapter->eitr_low) | |
792 | retval = low_latency; | |
793 | break; | |
794 | case low_latency: | |
795 | if (bytes_perint > adapter->eitr_high) | |
796 | retval = bulk_latency; | |
797 | else if (bytes_perint <= adapter->eitr_low) | |
798 | retval = lowest_latency; | |
799 | break; | |
800 | case bulk_latency: | |
801 | if (bytes_perint <= adapter->eitr_high) | |
802 | retval = low_latency; | |
803 | break; | |
804 | } | |
805 | ||
806 | update_itr_done: | |
807 | return retval; | |
808 | } | |
809 | ||
810 | static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector) | |
811 | { | |
812 | struct ixgbe_adapter *adapter = q_vector->adapter; | |
813 | struct ixgbe_hw *hw = &adapter->hw; | |
814 | u32 new_itr; | |
815 | u8 current_itr, ret_itr; | |
816 | int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) / | |
817 | sizeof(struct ixgbe_q_vector); | |
818 | struct ixgbe_ring *rx_ring, *tx_ring; | |
819 | ||
820 | r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); | |
821 | for (i = 0; i < q_vector->txr_count; i++) { | |
822 | tx_ring = &(adapter->tx_ring[r_idx]); | |
823 | ret_itr = ixgbe_update_itr(adapter, q_vector->eitr, | |
824 | q_vector->tx_eitr, | |
825 | tx_ring->total_packets, | |
826 | tx_ring->total_bytes); | |
827 | /* if the result for this queue would decrease interrupt | |
828 | * rate for this vector then use that result */ | |
829 | q_vector->tx_eitr = ((q_vector->tx_eitr > ret_itr) ? | |
830 | q_vector->tx_eitr - 1 : ret_itr); | |
831 | r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, | |
832 | r_idx + 1); | |
833 | } | |
834 | ||
835 | r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); | |
836 | for (i = 0; i < q_vector->rxr_count; i++) { | |
837 | rx_ring = &(adapter->rx_ring[r_idx]); | |
838 | ret_itr = ixgbe_update_itr(adapter, q_vector->eitr, | |
839 | q_vector->rx_eitr, | |
840 | rx_ring->total_packets, | |
841 | rx_ring->total_bytes); | |
842 | /* if the result for this queue would decrease interrupt | |
843 | * rate for this vector then use that result */ | |
844 | q_vector->rx_eitr = ((q_vector->rx_eitr > ret_itr) ? | |
845 | q_vector->rx_eitr - 1 : ret_itr); | |
846 | r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues, | |
847 | r_idx + 1); | |
848 | } | |
849 | ||
850 | current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr); | |
851 | ||
852 | switch (current_itr) { | |
853 | /* counts and packets in update_itr are dependent on these numbers */ | |
854 | case lowest_latency: | |
855 | new_itr = 100000; | |
856 | break; | |
857 | case low_latency: | |
858 | new_itr = 20000; /* aka hwitr = ~200 */ | |
859 | break; | |
860 | case bulk_latency: | |
861 | default: | |
862 | new_itr = 8000; | |
863 | break; | |
864 | } | |
865 | ||
866 | if (new_itr != q_vector->eitr) { | |
867 | u32 itr_reg; | |
868 | /* do an exponential smoothing */ | |
869 | new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100); | |
870 | q_vector->eitr = new_itr; | |
871 | itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr); | |
872 | /* must write high and low 16 bits to reset counter */ | |
873 | DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx, | |
874 | itr_reg); | |
875 | IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16); | |
876 | } | |
877 | ||
878 | return; | |
879 | } | |
880 | ||
9a799d71 AK |
881 | static irqreturn_t ixgbe_msix_lsc(int irq, void *data) |
882 | { | |
883 | struct net_device *netdev = data; | |
884 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
885 | struct ixgbe_hw *hw = &adapter->hw; | |
886 | u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR); | |
887 | ||
888 | if (eicr & IXGBE_EICR_LSC) { | |
889 | adapter->lsc_int++; | |
890 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) | |
891 | mod_timer(&adapter->watchdog_timer, jiffies); | |
892 | } | |
d4f80882 AV |
893 | |
894 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) | |
895 | IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER); | |
9a799d71 AK |
896 | |
897 | return IRQ_HANDLED; | |
898 | } | |
899 | ||
900 | static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data) | |
901 | { | |
021230d4 AV |
902 | struct ixgbe_q_vector *q_vector = data; |
903 | struct ixgbe_adapter *adapter = q_vector->adapter; | |
904 | struct ixgbe_ring *txr; | |
905 | int i, r_idx; | |
906 | ||
907 | if (!q_vector->txr_count) | |
908 | return IRQ_HANDLED; | |
909 | ||
910 | r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues); | |
911 | for (i = 0; i < q_vector->txr_count; i++) { | |
912 | txr = &(adapter->tx_ring[r_idx]); | |
bd0362dd JC |
913 | #ifdef CONFIG_DCA |
914 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) | |
915 | ixgbe_update_tx_dca(adapter, txr); | |
916 | #endif | |
f494e8fa AV |
917 | txr->total_bytes = 0; |
918 | txr->total_packets = 0; | |
021230d4 AV |
919 | ixgbe_clean_tx_irq(adapter, txr); |
920 | r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues, | |
921 | r_idx + 1); | |
922 | } | |
9a799d71 | 923 | |
9a799d71 AK |
924 | return IRQ_HANDLED; |
925 | } | |
926 | ||
021230d4 AV |
927 | /** |
928 | * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues) | |
929 | * @irq: unused | |
930 | * @data: pointer to our q_vector struct for this interrupt vector | |
931 | **/ | |
9a799d71 AK |
932 | static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data) |
933 | { | |
021230d4 AV |
934 | struct ixgbe_q_vector *q_vector = data; |
935 | struct ixgbe_adapter *adapter = q_vector->adapter; | |
936 | struct ixgbe_ring *rxr; | |
937 | int r_idx; | |
938 | ||
939 | r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); | |
940 | if (!q_vector->rxr_count) | |
941 | return IRQ_HANDLED; | |
942 | ||
943 | rxr = &(adapter->rx_ring[r_idx]); | |
944 | /* disable interrupts on this vector only */ | |
945 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->v_idx); | |
f494e8fa AV |
946 | rxr->total_bytes = 0; |
947 | rxr->total_packets = 0; | |
021230d4 AV |
948 | netif_rx_schedule(adapter->netdev, &q_vector->napi); |
949 | ||
950 | return IRQ_HANDLED; | |
951 | } | |
952 | ||
953 | static irqreturn_t ixgbe_msix_clean_many(int irq, void *data) | |
954 | { | |
955 | ixgbe_msix_clean_rx(irq, data); | |
956 | ixgbe_msix_clean_tx(irq, data); | |
9a799d71 | 957 | |
9a799d71 AK |
958 | return IRQ_HANDLED; |
959 | } | |
960 | ||
021230d4 AV |
961 | /** |
962 | * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine | |
963 | * @napi: napi struct with our devices info in it | |
964 | * @budget: amount of work driver is allowed to do this pass, in packets | |
965 | * | |
966 | **/ | |
9a799d71 AK |
967 | static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget) |
968 | { | |
021230d4 AV |
969 | struct ixgbe_q_vector *q_vector = |
970 | container_of(napi, struct ixgbe_q_vector, napi); | |
971 | struct ixgbe_adapter *adapter = q_vector->adapter; | |
972 | struct ixgbe_ring *rxr; | |
9a799d71 | 973 | int work_done = 0; |
021230d4 | 974 | long r_idx; |
9a799d71 | 975 | |
021230d4 AV |
976 | r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues); |
977 | rxr = &(adapter->rx_ring[r_idx]); | |
bd0362dd JC |
978 | #ifdef CONFIG_DCA |
979 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) | |
980 | ixgbe_update_rx_dca(adapter, rxr); | |
981 | #endif | |
9a799d71 AK |
982 | |
983 | ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget); | |
984 | ||
021230d4 AV |
985 | /* If all Rx work done, exit the polling mode */ |
986 | if (work_done < budget) { | |
987 | netif_rx_complete(adapter->netdev, napi); | |
f494e8fa AV |
988 | if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS) |
989 | ixgbe_set_itr_msix(q_vector); | |
9a799d71 | 990 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) |
021230d4 | 991 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rxr->v_idx); |
9a799d71 AK |
992 | } |
993 | ||
994 | return work_done; | |
995 | } | |
996 | ||
021230d4 AV |
997 | static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx, |
998 | int r_idx) | |
999 | { | |
1000 | a->q_vector[v_idx].adapter = a; | |
1001 | set_bit(r_idx, a->q_vector[v_idx].rxr_idx); | |
1002 | a->q_vector[v_idx].rxr_count++; | |
1003 | a->rx_ring[r_idx].v_idx = 1 << v_idx; | |
1004 | } | |
1005 | ||
1006 | static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx, | |
1007 | int r_idx) | |
1008 | { | |
1009 | a->q_vector[v_idx].adapter = a; | |
1010 | set_bit(r_idx, a->q_vector[v_idx].txr_idx); | |
1011 | a->q_vector[v_idx].txr_count++; | |
1012 | a->tx_ring[r_idx].v_idx = 1 << v_idx; | |
1013 | } | |
1014 | ||
9a799d71 | 1015 | /** |
021230d4 AV |
1016 | * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors |
1017 | * @adapter: board private structure to initialize | |
1018 | * @vectors: allotted vector count for descriptor rings | |
9a799d71 | 1019 | * |
021230d4 AV |
1020 | * This function maps descriptor rings to the queue-specific vectors |
1021 | * we were allotted through the MSI-X enabling code. Ideally, we'd have | |
1022 | * one vector per ring/queue, but on a constrained vector budget, we | |
1023 | * group the rings as "efficiently" as possible. You would add new | |
1024 | * mapping configurations in here. | |
9a799d71 | 1025 | **/ |
021230d4 AV |
1026 | static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter, |
1027 | int vectors) | |
1028 | { | |
1029 | int v_start = 0; | |
1030 | int rxr_idx = 0, txr_idx = 0; | |
1031 | int rxr_remaining = adapter->num_rx_queues; | |
1032 | int txr_remaining = adapter->num_tx_queues; | |
1033 | int i, j; | |
1034 | int rqpv, tqpv; | |
1035 | int err = 0; | |
1036 | ||
1037 | /* No mapping required if MSI-X is disabled. */ | |
1038 | if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) | |
1039 | goto out; | |
9a799d71 | 1040 | |
021230d4 AV |
1041 | /* |
1042 | * The ideal configuration... | |
1043 | * We have enough vectors to map one per queue. | |
1044 | */ | |
1045 | if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) { | |
1046 | for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++) | |
1047 | map_vector_to_rxq(adapter, v_start, rxr_idx); | |
9a799d71 | 1048 | |
021230d4 AV |
1049 | for (; txr_idx < txr_remaining; v_start++, txr_idx++) |
1050 | map_vector_to_txq(adapter, v_start, txr_idx); | |
9a799d71 | 1051 | |
9a799d71 | 1052 | goto out; |
021230d4 | 1053 | } |
9a799d71 | 1054 | |
021230d4 AV |
1055 | /* |
1056 | * If we don't have enough vectors for a 1-to-1 | |
1057 | * mapping, we'll have to group them so there are | |
1058 | * multiple queues per vector. | |
1059 | */ | |
1060 | /* Re-adjusting *qpv takes care of the remainder. */ | |
1061 | for (i = v_start; i < vectors; i++) { | |
1062 | rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i); | |
1063 | for (j = 0; j < rqpv; j++) { | |
1064 | map_vector_to_rxq(adapter, i, rxr_idx); | |
1065 | rxr_idx++; | |
1066 | rxr_remaining--; | |
1067 | } | |
1068 | } | |
1069 | for (i = v_start; i < vectors; i++) { | |
1070 | tqpv = DIV_ROUND_UP(txr_remaining, vectors - i); | |
1071 | for (j = 0; j < tqpv; j++) { | |
1072 | map_vector_to_txq(adapter, i, txr_idx); | |
1073 | txr_idx++; | |
1074 | txr_remaining--; | |
9a799d71 | 1075 | } |
9a799d71 AK |
1076 | } |
1077 | ||
021230d4 AV |
1078 | out: |
1079 | return err; | |
1080 | } | |
1081 | ||
1082 | /** | |
1083 | * ixgbe_request_msix_irqs - Initialize MSI-X interrupts | |
1084 | * @adapter: board private structure | |
1085 | * | |
1086 | * ixgbe_request_msix_irqs allocates MSI-X vectors and requests | |
1087 | * interrupts from the kernel. | |
1088 | **/ | |
1089 | static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter) | |
1090 | { | |
1091 | struct net_device *netdev = adapter->netdev; | |
1092 | irqreturn_t (*handler)(int, void *); | |
1093 | int i, vector, q_vectors, err; | |
1094 | ||
1095 | /* Decrement for Other and TCP Timer vectors */ | |
1096 | q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | |
1097 | ||
1098 | /* Map the Tx/Rx rings to the vectors we were allotted. */ | |
1099 | err = ixgbe_map_rings_to_vectors(adapter, q_vectors); | |
1100 | if (err) | |
1101 | goto out; | |
1102 | ||
1103 | #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \ | |
1104 | (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \ | |
1105 | &ixgbe_msix_clean_many) | |
1106 | for (vector = 0; vector < q_vectors; vector++) { | |
1107 | handler = SET_HANDLER(&adapter->q_vector[vector]); | |
1108 | sprintf(adapter->name[vector], "%s:v%d-%s", | |
1109 | netdev->name, vector, | |
1110 | (handler == &ixgbe_msix_clean_rx) ? "Rx" : | |
1111 | ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx")); | |
1112 | err = request_irq(adapter->msix_entries[vector].vector, | |
1113 | handler, 0, adapter->name[vector], | |
1114 | &(adapter->q_vector[vector])); | |
9a799d71 AK |
1115 | if (err) { |
1116 | DPRINTK(PROBE, ERR, | |
1117 | "request_irq failed for MSIX interrupt " | |
1118 | "Error: %d\n", err); | |
021230d4 | 1119 | goto free_queue_irqs; |
9a799d71 | 1120 | } |
9a799d71 AK |
1121 | } |
1122 | ||
021230d4 AV |
1123 | sprintf(adapter->name[vector], "%s:lsc", netdev->name); |
1124 | err = request_irq(adapter->msix_entries[vector].vector, | |
1125 | &ixgbe_msix_lsc, 0, adapter->name[vector], netdev); | |
9a799d71 AK |
1126 | if (err) { |
1127 | DPRINTK(PROBE, ERR, | |
1128 | "request_irq for msix_lsc failed: %d\n", err); | |
021230d4 | 1129 | goto free_queue_irqs; |
9a799d71 AK |
1130 | } |
1131 | ||
9a799d71 AK |
1132 | return 0; |
1133 | ||
021230d4 AV |
1134 | free_queue_irqs: |
1135 | for (i = vector - 1; i >= 0; i--) | |
1136 | free_irq(adapter->msix_entries[--vector].vector, | |
1137 | &(adapter->q_vector[i])); | |
1138 | adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; | |
1139 | pci_disable_msix(adapter->pdev); | |
9a799d71 AK |
1140 | kfree(adapter->msix_entries); |
1141 | adapter->msix_entries = NULL; | |
021230d4 | 1142 | out: |
9a799d71 AK |
1143 | return err; |
1144 | } | |
1145 | ||
f494e8fa AV |
1146 | static void ixgbe_set_itr(struct ixgbe_adapter *adapter) |
1147 | { | |
1148 | struct ixgbe_hw *hw = &adapter->hw; | |
1149 | struct ixgbe_q_vector *q_vector = adapter->q_vector; | |
1150 | u8 current_itr; | |
1151 | u32 new_itr = q_vector->eitr; | |
1152 | struct ixgbe_ring *rx_ring = &adapter->rx_ring[0]; | |
1153 | struct ixgbe_ring *tx_ring = &adapter->tx_ring[0]; | |
1154 | ||
1155 | q_vector->tx_eitr = ixgbe_update_itr(adapter, new_itr, | |
1156 | q_vector->tx_eitr, | |
1157 | tx_ring->total_packets, | |
1158 | tx_ring->total_bytes); | |
1159 | q_vector->rx_eitr = ixgbe_update_itr(adapter, new_itr, | |
1160 | q_vector->rx_eitr, | |
1161 | rx_ring->total_packets, | |
1162 | rx_ring->total_bytes); | |
1163 | ||
1164 | current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr); | |
1165 | ||
1166 | switch (current_itr) { | |
1167 | /* counts and packets in update_itr are dependent on these numbers */ | |
1168 | case lowest_latency: | |
1169 | new_itr = 100000; | |
1170 | break; | |
1171 | case low_latency: | |
1172 | new_itr = 20000; /* aka hwitr = ~200 */ | |
1173 | break; | |
1174 | case bulk_latency: | |
1175 | new_itr = 8000; | |
1176 | break; | |
1177 | default: | |
1178 | break; | |
1179 | } | |
1180 | ||
1181 | if (new_itr != q_vector->eitr) { | |
1182 | u32 itr_reg; | |
1183 | /* do an exponential smoothing */ | |
1184 | new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100); | |
1185 | q_vector->eitr = new_itr; | |
1186 | itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr); | |
1187 | /* must write high and low 16 bits to reset counter */ | |
1188 | IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16); | |
1189 | } | |
1190 | ||
1191 | return; | |
1192 | } | |
1193 | ||
021230d4 AV |
1194 | static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter); |
1195 | ||
9a799d71 | 1196 | /** |
021230d4 | 1197 | * ixgbe_intr - legacy mode Interrupt Handler |
9a799d71 AK |
1198 | * @irq: interrupt number |
1199 | * @data: pointer to a network interface device structure | |
1200 | * @pt_regs: CPU registers structure | |
1201 | **/ | |
1202 | static irqreturn_t ixgbe_intr(int irq, void *data) | |
1203 | { | |
1204 | struct net_device *netdev = data; | |
1205 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1206 | struct ixgbe_hw *hw = &adapter->hw; | |
1207 | u32 eicr; | |
1208 | ||
9a799d71 | 1209 | |
021230d4 AV |
1210 | /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read |
1211 | * therefore no explict interrupt disable is necessary */ | |
1212 | eicr = IXGBE_READ_REG(hw, IXGBE_EICR); | |
9a799d71 AK |
1213 | if (!eicr) |
1214 | return IRQ_NONE; /* Not our interrupt */ | |
1215 | ||
1216 | if (eicr & IXGBE_EICR_LSC) { | |
1217 | adapter->lsc_int++; | |
1218 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) | |
1219 | mod_timer(&adapter->watchdog_timer, jiffies); | |
1220 | } | |
021230d4 AV |
1221 | |
1222 | ||
1223 | if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) { | |
f494e8fa AV |
1224 | adapter->tx_ring[0].total_packets = 0; |
1225 | adapter->tx_ring[0].total_bytes = 0; | |
1226 | adapter->rx_ring[0].total_packets = 0; | |
1227 | adapter->rx_ring[0].total_bytes = 0; | |
021230d4 AV |
1228 | /* would disable interrupts here but EIAM disabled it */ |
1229 | __netif_rx_schedule(netdev, &adapter->q_vector[0].napi); | |
9a799d71 AK |
1230 | } |
1231 | ||
1232 | return IRQ_HANDLED; | |
1233 | } | |
1234 | ||
021230d4 AV |
1235 | static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter) |
1236 | { | |
1237 | int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | |
1238 | ||
1239 | for (i = 0; i < q_vectors; i++) { | |
1240 | struct ixgbe_q_vector *q_vector = &adapter->q_vector[i]; | |
1241 | bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES); | |
1242 | bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES); | |
1243 | q_vector->rxr_count = 0; | |
1244 | q_vector->txr_count = 0; | |
1245 | } | |
1246 | } | |
1247 | ||
9a799d71 AK |
1248 | /** |
1249 | * ixgbe_request_irq - initialize interrupts | |
1250 | * @adapter: board private structure | |
1251 | * | |
1252 | * Attempts to configure interrupts using the best available | |
1253 | * capabilities of the hardware and kernel. | |
1254 | **/ | |
021230d4 | 1255 | static int ixgbe_request_irq(struct ixgbe_adapter *adapter) |
9a799d71 AK |
1256 | { |
1257 | struct net_device *netdev = adapter->netdev; | |
021230d4 | 1258 | int err; |
9a799d71 | 1259 | |
021230d4 AV |
1260 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { |
1261 | err = ixgbe_request_msix_irqs(adapter); | |
1262 | } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) { | |
1263 | err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0, | |
1264 | netdev->name, netdev); | |
1265 | } else { | |
1266 | err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED, | |
1267 | netdev->name, netdev); | |
9a799d71 AK |
1268 | } |
1269 | ||
9a799d71 AK |
1270 | if (err) |
1271 | DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err); | |
1272 | ||
9a799d71 AK |
1273 | return err; |
1274 | } | |
1275 | ||
1276 | static void ixgbe_free_irq(struct ixgbe_adapter *adapter) | |
1277 | { | |
1278 | struct net_device *netdev = adapter->netdev; | |
1279 | ||
1280 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { | |
021230d4 | 1281 | int i, q_vectors; |
9a799d71 | 1282 | |
021230d4 AV |
1283 | q_vectors = adapter->num_msix_vectors; |
1284 | ||
1285 | i = q_vectors - 1; | |
9a799d71 | 1286 | free_irq(adapter->msix_entries[i].vector, netdev); |
9a799d71 | 1287 | |
021230d4 AV |
1288 | i--; |
1289 | for (; i >= 0; i--) { | |
1290 | free_irq(adapter->msix_entries[i].vector, | |
1291 | &(adapter->q_vector[i])); | |
1292 | } | |
1293 | ||
1294 | ixgbe_reset_q_vectors(adapter); | |
1295 | } else { | |
1296 | free_irq(adapter->pdev->irq, netdev); | |
9a799d71 AK |
1297 | } |
1298 | } | |
1299 | ||
1300 | /** | |
1301 | * ixgbe_irq_disable - Mask off interrupt generation on the NIC | |
1302 | * @adapter: board private structure | |
1303 | **/ | |
1304 | static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter) | |
1305 | { | |
9a799d71 AK |
1306 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); |
1307 | IXGBE_WRITE_FLUSH(&adapter->hw); | |
021230d4 AV |
1308 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { |
1309 | int i; | |
1310 | for (i = 0; i < adapter->num_msix_vectors; i++) | |
1311 | synchronize_irq(adapter->msix_entries[i].vector); | |
1312 | } else { | |
1313 | synchronize_irq(adapter->pdev->irq); | |
1314 | } | |
9a799d71 AK |
1315 | } |
1316 | ||
1317 | /** | |
1318 | * ixgbe_irq_enable - Enable default interrupt generation settings | |
1319 | * @adapter: board private structure | |
1320 | **/ | |
1321 | static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter) | |
1322 | { | |
021230d4 AV |
1323 | u32 mask; |
1324 | mask = IXGBE_EIMS_ENABLE_MASK; | |
1325 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); | |
d4f80882 | 1326 | IXGBE_WRITE_FLUSH(&adapter->hw); |
9a799d71 AK |
1327 | } |
1328 | ||
1329 | /** | |
1330 | * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts | |
1331 | * | |
1332 | **/ | |
1333 | static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter) | |
1334 | { | |
9a799d71 AK |
1335 | struct ixgbe_hw *hw = &adapter->hw; |
1336 | ||
021230d4 AV |
1337 | IXGBE_WRITE_REG(hw, IXGBE_EITR(0), |
1338 | EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr)); | |
9a799d71 AK |
1339 | |
1340 | ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0); | |
021230d4 AV |
1341 | ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0); |
1342 | ||
1343 | map_vector_to_rxq(adapter, 0, 0); | |
1344 | map_vector_to_txq(adapter, 0, 0); | |
1345 | ||
1346 | DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n"); | |
9a799d71 AK |
1347 | } |
1348 | ||
1349 | /** | |
1350 | * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset | |
1351 | * @adapter: board private structure | |
1352 | * | |
1353 | * Configure the Tx unit of the MAC after a reset. | |
1354 | **/ | |
1355 | static void ixgbe_configure_tx(struct ixgbe_adapter *adapter) | |
1356 | { | |
1357 | u64 tdba; | |
1358 | struct ixgbe_hw *hw = &adapter->hw; | |
021230d4 | 1359 | u32 i, j, tdlen, txctrl; |
9a799d71 AK |
1360 | |
1361 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
1362 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
021230d4 | 1363 | j = adapter->tx_ring[i].reg_idx; |
9a799d71 AK |
1364 | tdba = adapter->tx_ring[i].dma; |
1365 | tdlen = adapter->tx_ring[i].count * | |
021230d4 AV |
1366 | sizeof(union ixgbe_adv_tx_desc); |
1367 | IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), | |
1368 | (tdba & DMA_32BIT_MASK)); | |
1369 | IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); | |
1370 | IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen); | |
1371 | IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); | |
1372 | IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); | |
1373 | adapter->tx_ring[i].head = IXGBE_TDH(j); | |
1374 | adapter->tx_ring[i].tail = IXGBE_TDT(j); | |
1375 | /* Disable Tx Head Writeback RO bit, since this hoses | |
1376 | * bookkeeping if things aren't delivered in order. | |
1377 | */ | |
1378 | txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); | |
1379 | txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN; | |
1380 | IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), txctrl); | |
9a799d71 | 1381 | } |
9a799d71 AK |
1382 | } |
1383 | ||
1384 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ | |
1385 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | |
1386 | ||
1387 | #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 | |
177db6ff MC |
1388 | /** |
1389 | * ixgbe_get_skb_hdr - helper function for LRO header processing | |
1390 | * @skb: pointer to sk_buff to be added to LRO packet | |
1391 | * @iphdr: pointer to tcp header structure | |
1392 | * @tcph: pointer to tcp header structure | |
1393 | * @hdr_flags: pointer to header flags | |
1394 | * @priv: private data | |
1395 | **/ | |
1396 | static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph, | |
1397 | u64 *hdr_flags, void *priv) | |
1398 | { | |
1399 | union ixgbe_adv_rx_desc *rx_desc = priv; | |
1400 | ||
1401 | /* Verify that this is a valid IPv4 TCP packet */ | |
1402 | if (!(rx_desc->wb.lower.lo_dword.pkt_info & | |
1403 | (IXGBE_RXDADV_PKTTYPE_IPV4 | IXGBE_RXDADV_PKTTYPE_TCP))) | |
1404 | return -1; | |
1405 | ||
1406 | /* Set network headers */ | |
1407 | skb_reset_network_header(skb); | |
1408 | skb_set_transport_header(skb, ip_hdrlen(skb)); | |
1409 | *iphdr = ip_hdr(skb); | |
1410 | *tcph = tcp_hdr(skb); | |
1411 | *hdr_flags = LRO_IPV4 | LRO_TCP; | |
1412 | return 0; | |
1413 | } | |
1414 | ||
9a799d71 AK |
1415 | /** |
1416 | * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset | |
1417 | * @adapter: board private structure | |
1418 | * | |
1419 | * Configure the Rx unit of the MAC after a reset. | |
1420 | **/ | |
1421 | static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) | |
1422 | { | |
1423 | u64 rdba; | |
1424 | struct ixgbe_hw *hw = &adapter->hw; | |
1425 | struct net_device *netdev = adapter->netdev; | |
1426 | int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; | |
021230d4 | 1427 | int i, j; |
9a799d71 AK |
1428 | u32 rdlen, rxctrl, rxcsum; |
1429 | u32 random[10]; | |
9a799d71 | 1430 | u32 fctrl, hlreg0; |
9a799d71 | 1431 | u32 pages; |
021230d4 | 1432 | u32 reta = 0, mrqc, srrctl; |
9a799d71 AK |
1433 | |
1434 | /* Decide whether to use packet split mode or not */ | |
1435 | if (netdev->mtu > ETH_DATA_LEN) | |
1436 | adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED; | |
1437 | else | |
1438 | adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED; | |
1439 | ||
1440 | /* Set the RX buffer length according to the mode */ | |
1441 | if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { | |
1442 | adapter->rx_buf_len = IXGBE_RX_HDR_SIZE; | |
1443 | } else { | |
1444 | if (netdev->mtu <= ETH_DATA_LEN) | |
1445 | adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
1446 | else | |
1447 | adapter->rx_buf_len = ALIGN(max_frame, 1024); | |
1448 | } | |
1449 | ||
1450 | fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); | |
1451 | fctrl |= IXGBE_FCTRL_BAM; | |
021230d4 | 1452 | fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */ |
9a799d71 AK |
1453 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl); |
1454 | ||
1455 | hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0); | |
1456 | if (adapter->netdev->mtu <= ETH_DATA_LEN) | |
1457 | hlreg0 &= ~IXGBE_HLREG0_JUMBOEN; | |
1458 | else | |
1459 | hlreg0 |= IXGBE_HLREG0_JUMBOEN; | |
1460 | IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); | |
1461 | ||
1462 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); | |
1463 | ||
1464 | srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0)); | |
1465 | srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; | |
1466 | srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; | |
1467 | ||
1468 | if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { | |
1469 | srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; | |
1470 | srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; | |
1471 | srrctl |= ((IXGBE_RX_HDR_SIZE << | |
1472 | IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) & | |
1473 | IXGBE_SRRCTL_BSIZEHDR_MASK); | |
1474 | } else { | |
1475 | srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; | |
1476 | ||
1477 | if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE) | |
1478 | srrctl |= | |
1479 | IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; | |
1480 | else | |
1481 | srrctl |= | |
1482 | adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; | |
1483 | } | |
1484 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl); | |
1485 | ||
1486 | rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc); | |
1487 | /* disable receives while setting up the descriptors */ | |
1488 | rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); | |
1489 | IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN); | |
1490 | ||
1491 | /* Setup the HW Rx Head and Tail Descriptor Pointers and | |
1492 | * the Base and Length of the Rx Descriptor Ring */ | |
1493 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
1494 | rdba = adapter->rx_ring[i].dma; | |
1495 | IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK)); | |
1496 | IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32)); | |
1497 | IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen); | |
1498 | IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0); | |
1499 | IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0); | |
1500 | adapter->rx_ring[i].head = IXGBE_RDH(i); | |
1501 | adapter->rx_ring[i].tail = IXGBE_RDT(i); | |
1502 | } | |
1503 | ||
177db6ff MC |
1504 | /* Intitial LRO Settings */ |
1505 | adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE; | |
1506 | adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS; | |
1507 | adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr; | |
1508 | adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID; | |
1509 | if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) | |
1510 | adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI; | |
1511 | adapter->rx_ring[i].lro_mgr.dev = adapter->netdev; | |
1512 | adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY; | |
1513 | adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY; | |
1514 | ||
021230d4 | 1515 | if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) { |
9a799d71 | 1516 | /* Fill out redirection table */ |
021230d4 AV |
1517 | for (i = 0, j = 0; i < 128; i++, j++) { |
1518 | if (j == adapter->ring_feature[RING_F_RSS].indices) | |
1519 | j = 0; | |
1520 | /* reta = 4-byte sliding window of | |
1521 | * 0x00..(indices-1)(indices-1)00..etc. */ | |
1522 | reta = (reta << 8) | (j * 0x11); | |
1523 | if ((i & 3) == 3) | |
1524 | IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); | |
9a799d71 AK |
1525 | } |
1526 | ||
1527 | /* Fill out hash function seeds */ | |
021230d4 AV |
1528 | /* XXX use a random constant here to glue certain flows */ |
1529 | get_random_bytes(&random[0], 40); | |
9a799d71 | 1530 | for (i = 0; i < 10; i++) |
021230d4 | 1531 | IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), random[i]); |
9a799d71 AK |
1532 | |
1533 | mrqc = IXGBE_MRQC_RSSEN | |
1534 | /* Perform hash on these packet types */ | |
1535 | | IXGBE_MRQC_RSS_FIELD_IPV4 | |
1536 | | IXGBE_MRQC_RSS_FIELD_IPV4_TCP | |
1537 | | IXGBE_MRQC_RSS_FIELD_IPV4_UDP | |
1538 | | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP | |
1539 | | IXGBE_MRQC_RSS_FIELD_IPV6_EX | |
1540 | | IXGBE_MRQC_RSS_FIELD_IPV6 | |
1541 | | IXGBE_MRQC_RSS_FIELD_IPV6_TCP | |
1542 | | IXGBE_MRQC_RSS_FIELD_IPV6_UDP | |
1543 | | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP; | |
1544 | IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); | |
021230d4 | 1545 | } |
9a799d71 | 1546 | |
021230d4 AV |
1547 | rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); |
1548 | ||
1549 | if (adapter->flags & IXGBE_FLAG_RSS_ENABLED || | |
1550 | adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) { | |
1551 | /* Disable indicating checksum in descriptor, enables | |
1552 | * RSS hash */ | |
9a799d71 | 1553 | rxcsum |= IXGBE_RXCSUM_PCSD; |
9a799d71 | 1554 | } |
021230d4 AV |
1555 | if (!(rxcsum & IXGBE_RXCSUM_PCSD)) { |
1556 | /* Enable IPv4 payload checksum for UDP fragments | |
1557 | * if PCSD is not set */ | |
1558 | rxcsum |= IXGBE_RXCSUM_IPPCSE; | |
1559 | } | |
1560 | ||
1561 | IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); | |
9a799d71 AK |
1562 | } |
1563 | ||
1564 | static void ixgbe_vlan_rx_register(struct net_device *netdev, | |
1565 | struct vlan_group *grp) | |
1566 | { | |
1567 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1568 | u32 ctrl; | |
1569 | ||
d4f80882 AV |
1570 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) |
1571 | ixgbe_irq_disable(adapter); | |
9a799d71 AK |
1572 | adapter->vlgrp = grp; |
1573 | ||
1574 | if (grp) { | |
1575 | /* enable VLAN tag insert/strip */ | |
1576 | ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL); | |
746b9f02 | 1577 | ctrl |= IXGBE_VLNCTRL_VME; |
9a799d71 AK |
1578 | ctrl &= ~IXGBE_VLNCTRL_CFIEN; |
1579 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl); | |
1580 | } | |
1581 | ||
d4f80882 AV |
1582 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) |
1583 | ixgbe_irq_enable(adapter); | |
9a799d71 AK |
1584 | } |
1585 | ||
1586 | static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid) | |
1587 | { | |
1588 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1589 | ||
1590 | /* add VID to filter table */ | |
1591 | ixgbe_set_vfta(&adapter->hw, vid, 0, true); | |
1592 | } | |
1593 | ||
1594 | static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) | |
1595 | { | |
1596 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1597 | ||
d4f80882 AV |
1598 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) |
1599 | ixgbe_irq_disable(adapter); | |
1600 | ||
9a799d71 | 1601 | vlan_group_set_device(adapter->vlgrp, vid, NULL); |
d4f80882 AV |
1602 | |
1603 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) | |
1604 | ixgbe_irq_enable(adapter); | |
9a799d71 AK |
1605 | |
1606 | /* remove VID from filter table */ | |
1607 | ixgbe_set_vfta(&adapter->hw, vid, 0, false); | |
1608 | } | |
1609 | ||
1610 | static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter) | |
1611 | { | |
1612 | ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
1613 | ||
1614 | if (adapter->vlgrp) { | |
1615 | u16 vid; | |
1616 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { | |
1617 | if (!vlan_group_get_device(adapter->vlgrp, vid)) | |
1618 | continue; | |
1619 | ixgbe_vlan_rx_add_vid(adapter->netdev, vid); | |
1620 | } | |
1621 | } | |
1622 | } | |
1623 | ||
1624 | /** | |
1625 | * ixgbe_set_multi - Multicast and Promiscuous mode set | |
1626 | * @netdev: network interface device structure | |
1627 | * | |
1628 | * The set_multi entry point is called whenever the multicast address | |
1629 | * list or the network interface flags are updated. This routine is | |
1630 | * responsible for configuring the hardware for proper multicast, | |
1631 | * promiscuous mode, and all-multi behavior. | |
1632 | **/ | |
1633 | static void ixgbe_set_multi(struct net_device *netdev) | |
1634 | { | |
1635 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
1636 | struct ixgbe_hw *hw = &adapter->hw; | |
1637 | struct dev_mc_list *mc_ptr; | |
1638 | u8 *mta_list; | |
1639 | u32 fctrl; | |
1640 | int i; | |
1641 | ||
1642 | /* Check for Promiscuous and All Multicast modes */ | |
1643 | ||
1644 | fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); | |
1645 | ||
1646 | if (netdev->flags & IFF_PROMISC) { | |
1647 | fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); | |
746b9f02 | 1648 | fctrl &= ~IXGBE_VLNCTRL_VFE; |
9a799d71 | 1649 | } else { |
746b9f02 PM |
1650 | if (netdev->flags & IFF_ALLMULTI) { |
1651 | fctrl |= IXGBE_FCTRL_MPE; | |
1652 | fctrl &= ~IXGBE_FCTRL_UPE; | |
1653 | } else { | |
1654 | fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); | |
1655 | } | |
78ed11a5 | 1656 | fctrl |= IXGBE_VLNCTRL_VFE; |
9a799d71 AK |
1657 | } |
1658 | ||
1659 | IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); | |
1660 | ||
1661 | if (netdev->mc_count) { | |
1662 | mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC); | |
1663 | if (!mta_list) | |
1664 | return; | |
1665 | ||
1666 | /* Shared function expects packed array of only addresses. */ | |
1667 | mc_ptr = netdev->mc_list; | |
1668 | ||
1669 | for (i = 0; i < netdev->mc_count; i++) { | |
1670 | if (!mc_ptr) | |
1671 | break; | |
1672 | memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr, | |
1673 | ETH_ALEN); | |
1674 | mc_ptr = mc_ptr->next; | |
1675 | } | |
1676 | ||
1677 | ixgbe_update_mc_addr_list(hw, mta_list, i, 0); | |
1678 | kfree(mta_list); | |
1679 | } else { | |
1680 | ixgbe_update_mc_addr_list(hw, NULL, 0, 0); | |
1681 | } | |
1682 | ||
1683 | } | |
1684 | ||
021230d4 AV |
1685 | static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter) |
1686 | { | |
1687 | int q_idx; | |
1688 | struct ixgbe_q_vector *q_vector; | |
1689 | int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | |
1690 | ||
1691 | /* legacy and MSI only use one vector */ | |
1692 | if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) | |
1693 | q_vectors = 1; | |
1694 | ||
1695 | for (q_idx = 0; q_idx < q_vectors; q_idx++) { | |
1696 | q_vector = &adapter->q_vector[q_idx]; | |
1697 | if (!q_vector->rxr_count) | |
1698 | continue; | |
1699 | napi_enable(&q_vector->napi); | |
1700 | } | |
1701 | } | |
1702 | ||
1703 | static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter) | |
1704 | { | |
1705 | int q_idx; | |
1706 | struct ixgbe_q_vector *q_vector; | |
1707 | int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | |
1708 | ||
1709 | /* legacy and MSI only use one vector */ | |
1710 | if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) | |
1711 | q_vectors = 1; | |
1712 | ||
1713 | for (q_idx = 0; q_idx < q_vectors; q_idx++) { | |
1714 | q_vector = &adapter->q_vector[q_idx]; | |
1715 | if (!q_vector->rxr_count) | |
1716 | continue; | |
1717 | napi_disable(&q_vector->napi); | |
1718 | } | |
1719 | } | |
1720 | ||
9a799d71 AK |
1721 | static void ixgbe_configure(struct ixgbe_adapter *adapter) |
1722 | { | |
1723 | struct net_device *netdev = adapter->netdev; | |
1724 | int i; | |
1725 | ||
1726 | ixgbe_set_multi(netdev); | |
1727 | ||
1728 | ixgbe_restore_vlan(adapter); | |
1729 | ||
1730 | ixgbe_configure_tx(adapter); | |
1731 | ixgbe_configure_rx(adapter); | |
1732 | for (i = 0; i < adapter->num_rx_queues; i++) | |
1733 | ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i], | |
1734 | (adapter->rx_ring[i].count - 1)); | |
1735 | } | |
1736 | ||
1737 | static int ixgbe_up_complete(struct ixgbe_adapter *adapter) | |
1738 | { | |
1739 | struct net_device *netdev = adapter->netdev; | |
9a799d71 | 1740 | struct ixgbe_hw *hw = &adapter->hw; |
021230d4 | 1741 | int i, j = 0; |
9a799d71 | 1742 | int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; |
021230d4 AV |
1743 | u32 txdctl, rxdctl, mhadd; |
1744 | u32 gpie; | |
9a799d71 | 1745 | |
5eba3699 AV |
1746 | ixgbe_get_hw_control(adapter); |
1747 | ||
021230d4 AV |
1748 | if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) || |
1749 | (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) { | |
9a799d71 AK |
1750 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { |
1751 | gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME | | |
1752 | IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD); | |
1753 | } else { | |
1754 | /* MSI only */ | |
021230d4 | 1755 | gpie = 0; |
9a799d71 | 1756 | } |
021230d4 AV |
1757 | /* XXX: to interrupt immediately for EICS writes, enable this */ |
1758 | /* gpie |= IXGBE_GPIE_EIMEN; */ | |
1759 | IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); | |
9a799d71 AK |
1760 | } |
1761 | ||
021230d4 AV |
1762 | if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { |
1763 | /* legacy interrupts, use EIAM to auto-mask when reading EICR, | |
1764 | * specifically only auto mask tx and rx interrupts */ | |
1765 | IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); | |
1766 | } | |
9a799d71 | 1767 | |
021230d4 | 1768 | mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); |
9a799d71 AK |
1769 | if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) { |
1770 | mhadd &= ~IXGBE_MHADD_MFS_MASK; | |
1771 | mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT; | |
1772 | ||
1773 | IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); | |
1774 | } | |
1775 | ||
1776 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
021230d4 AV |
1777 | j = adapter->tx_ring[i].reg_idx; |
1778 | txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j)); | |
9a799d71 | 1779 | txdctl |= IXGBE_TXDCTL_ENABLE; |
021230d4 | 1780 | IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl); |
9a799d71 AK |
1781 | } |
1782 | ||
1783 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
021230d4 AV |
1784 | j = adapter->rx_ring[i].reg_idx; |
1785 | rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); | |
1786 | /* enable PTHRESH=32 descriptors (half the internal cache) | |
1787 | * and HTHRESH=0 descriptors (to minimize latency on fetch), | |
1788 | * this also removes a pesky rx_no_buffer_count increment */ | |
1789 | rxdctl |= 0x0020; | |
9a799d71 | 1790 | rxdctl |= IXGBE_RXDCTL_ENABLE; |
021230d4 | 1791 | IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl); |
9a799d71 AK |
1792 | } |
1793 | /* enable all receives */ | |
1794 | rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); | |
1795 | rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN); | |
1796 | IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl); | |
1797 | ||
1798 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) | |
1799 | ixgbe_configure_msix(adapter); | |
1800 | else | |
1801 | ixgbe_configure_msi_and_legacy(adapter); | |
1802 | ||
1803 | clear_bit(__IXGBE_DOWN, &adapter->state); | |
021230d4 AV |
1804 | ixgbe_napi_enable_all(adapter); |
1805 | ||
1806 | /* clear any pending interrupts, may auto mask */ | |
1807 | IXGBE_READ_REG(hw, IXGBE_EICR); | |
1808 | ||
9a799d71 AK |
1809 | ixgbe_irq_enable(adapter); |
1810 | ||
1811 | /* bring the link up in the watchdog, this could race with our first | |
1812 | * link up interrupt but shouldn't be a problem */ | |
1813 | mod_timer(&adapter->watchdog_timer, jiffies); | |
1814 | return 0; | |
1815 | } | |
1816 | ||
d4f80882 AV |
1817 | void ixgbe_reinit_locked(struct ixgbe_adapter *adapter) |
1818 | { | |
1819 | WARN_ON(in_interrupt()); | |
1820 | while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) | |
1821 | msleep(1); | |
1822 | ixgbe_down(adapter); | |
1823 | ixgbe_up(adapter); | |
1824 | clear_bit(__IXGBE_RESETTING, &adapter->state); | |
1825 | } | |
1826 | ||
9a799d71 AK |
1827 | int ixgbe_up(struct ixgbe_adapter *adapter) |
1828 | { | |
1829 | /* hardware has been reset, we need to reload some things */ | |
1830 | ixgbe_configure(adapter); | |
1831 | ||
1832 | return ixgbe_up_complete(adapter); | |
1833 | } | |
1834 | ||
1835 | void ixgbe_reset(struct ixgbe_adapter *adapter) | |
1836 | { | |
1837 | if (ixgbe_init_hw(&adapter->hw)) | |
1838 | DPRINTK(PROBE, ERR, "Hardware Error\n"); | |
1839 | ||
1840 | /* reprogram the RAR[0] in case user changed it. */ | |
1841 | ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV); | |
1842 | ||
1843 | } | |
1844 | ||
1845 | #ifdef CONFIG_PM | |
1846 | static int ixgbe_resume(struct pci_dev *pdev) | |
1847 | { | |
1848 | struct net_device *netdev = pci_get_drvdata(pdev); | |
1849 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
021230d4 | 1850 | u32 err; |
9a799d71 AK |
1851 | |
1852 | pci_set_power_state(pdev, PCI_D0); | |
1853 | pci_restore_state(pdev); | |
1854 | err = pci_enable_device(pdev); | |
1855 | if (err) { | |
1856 | printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \ | |
1857 | "suspend\n"); | |
1858 | return err; | |
1859 | } | |
1860 | pci_set_master(pdev); | |
1861 | ||
1862 | pci_enable_wake(pdev, PCI_D3hot, 0); | |
1863 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
1864 | ||
1865 | if (netif_running(netdev)) { | |
021230d4 | 1866 | err = ixgbe_request_irq(adapter); |
9a799d71 AK |
1867 | if (err) |
1868 | return err; | |
1869 | } | |
1870 | ||
1871 | ixgbe_reset(adapter); | |
1872 | ||
1873 | if (netif_running(netdev)) | |
1874 | ixgbe_up(adapter); | |
1875 | ||
1876 | netif_device_attach(netdev); | |
1877 | ||
1878 | return 0; | |
1879 | } | |
1880 | #endif | |
1881 | ||
1882 | /** | |
1883 | * ixgbe_clean_rx_ring - Free Rx Buffers per Queue | |
1884 | * @adapter: board private structure | |
1885 | * @rx_ring: ring to free buffers from | |
1886 | **/ | |
1887 | static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter, | |
1888 | struct ixgbe_ring *rx_ring) | |
1889 | { | |
1890 | struct pci_dev *pdev = adapter->pdev; | |
1891 | unsigned long size; | |
1892 | unsigned int i; | |
1893 | ||
1894 | /* Free all the Rx ring sk_buffs */ | |
1895 | ||
1896 | for (i = 0; i < rx_ring->count; i++) { | |
1897 | struct ixgbe_rx_buffer *rx_buffer_info; | |
1898 | ||
1899 | rx_buffer_info = &rx_ring->rx_buffer_info[i]; | |
1900 | if (rx_buffer_info->dma) { | |
1901 | pci_unmap_single(pdev, rx_buffer_info->dma, | |
1902 | adapter->rx_buf_len, | |
1903 | PCI_DMA_FROMDEVICE); | |
1904 | rx_buffer_info->dma = 0; | |
1905 | } | |
1906 | if (rx_buffer_info->skb) { | |
1907 | dev_kfree_skb(rx_buffer_info->skb); | |
1908 | rx_buffer_info->skb = NULL; | |
1909 | } | |
1910 | if (!rx_buffer_info->page) | |
1911 | continue; | |
1912 | pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE, | |
1913 | PCI_DMA_FROMDEVICE); | |
1914 | rx_buffer_info->page_dma = 0; | |
1915 | ||
1916 | put_page(rx_buffer_info->page); | |
1917 | rx_buffer_info->page = NULL; | |
1918 | } | |
1919 | ||
1920 | size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count; | |
1921 | memset(rx_ring->rx_buffer_info, 0, size); | |
1922 | ||
1923 | /* Zero out the descriptor ring */ | |
1924 | memset(rx_ring->desc, 0, rx_ring->size); | |
1925 | ||
1926 | rx_ring->next_to_clean = 0; | |
1927 | rx_ring->next_to_use = 0; | |
1928 | ||
1929 | writel(0, adapter->hw.hw_addr + rx_ring->head); | |
1930 | writel(0, adapter->hw.hw_addr + rx_ring->tail); | |
1931 | } | |
1932 | ||
1933 | /** | |
1934 | * ixgbe_clean_tx_ring - Free Tx Buffers | |
1935 | * @adapter: board private structure | |
1936 | * @tx_ring: ring to be cleaned | |
1937 | **/ | |
1938 | static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter, | |
1939 | struct ixgbe_ring *tx_ring) | |
1940 | { | |
1941 | struct ixgbe_tx_buffer *tx_buffer_info; | |
1942 | unsigned long size; | |
1943 | unsigned int i; | |
1944 | ||
1945 | /* Free all the Tx ring sk_buffs */ | |
1946 | ||
1947 | for (i = 0; i < tx_ring->count; i++) { | |
1948 | tx_buffer_info = &tx_ring->tx_buffer_info[i]; | |
1949 | ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info); | |
1950 | } | |
1951 | ||
1952 | size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count; | |
1953 | memset(tx_ring->tx_buffer_info, 0, size); | |
1954 | ||
1955 | /* Zero out the descriptor ring */ | |
1956 | memset(tx_ring->desc, 0, tx_ring->size); | |
1957 | ||
1958 | tx_ring->next_to_use = 0; | |
1959 | tx_ring->next_to_clean = 0; | |
1960 | ||
1961 | writel(0, adapter->hw.hw_addr + tx_ring->head); | |
1962 | writel(0, adapter->hw.hw_addr + tx_ring->tail); | |
1963 | } | |
1964 | ||
1965 | /** | |
021230d4 | 1966 | * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues |
9a799d71 AK |
1967 | * @adapter: board private structure |
1968 | **/ | |
021230d4 | 1969 | static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter) |
9a799d71 AK |
1970 | { |
1971 | int i; | |
1972 | ||
021230d4 AV |
1973 | for (i = 0; i < adapter->num_rx_queues; i++) |
1974 | ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]); | |
9a799d71 AK |
1975 | } |
1976 | ||
1977 | /** | |
021230d4 | 1978 | * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues |
9a799d71 AK |
1979 | * @adapter: board private structure |
1980 | **/ | |
021230d4 | 1981 | static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter) |
9a799d71 AK |
1982 | { |
1983 | int i; | |
1984 | ||
021230d4 AV |
1985 | for (i = 0; i < adapter->num_tx_queues; i++) |
1986 | ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]); | |
9a799d71 AK |
1987 | } |
1988 | ||
1989 | void ixgbe_down(struct ixgbe_adapter *adapter) | |
1990 | { | |
1991 | struct net_device *netdev = adapter->netdev; | |
1992 | u32 rxctrl; | |
1993 | ||
1994 | /* signal that we are down to the interrupt handler */ | |
1995 | set_bit(__IXGBE_DOWN, &adapter->state); | |
1996 | ||
1997 | /* disable receives */ | |
1998 | rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL); | |
1999 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, | |
2000 | rxctrl & ~IXGBE_RXCTRL_RXEN); | |
2001 | ||
2002 | netif_tx_disable(netdev); | |
2003 | ||
2004 | /* disable transmits in the hardware */ | |
2005 | ||
2006 | /* flush both disables */ | |
2007 | IXGBE_WRITE_FLUSH(&adapter->hw); | |
2008 | msleep(10); | |
2009 | ||
2010 | ixgbe_irq_disable(adapter); | |
2011 | ||
021230d4 | 2012 | ixgbe_napi_disable_all(adapter); |
9a799d71 AK |
2013 | del_timer_sync(&adapter->watchdog_timer); |
2014 | ||
2015 | netif_carrier_off(netdev); | |
2016 | netif_stop_queue(netdev); | |
2017 | ||
6f4a0e45 PL |
2018 | if (!pci_channel_offline(adapter->pdev)) |
2019 | ixgbe_reset(adapter); | |
9a799d71 AK |
2020 | ixgbe_clean_all_tx_rings(adapter); |
2021 | ixgbe_clean_all_rx_rings(adapter); | |
2022 | ||
2023 | } | |
2024 | ||
2025 | static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state) | |
2026 | { | |
2027 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2028 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
2029 | #ifdef CONFIG_PM | |
2030 | int retval = 0; | |
2031 | #endif | |
2032 | ||
2033 | netif_device_detach(netdev); | |
2034 | ||
2035 | if (netif_running(netdev)) { | |
2036 | ixgbe_down(adapter); | |
2037 | ixgbe_free_irq(adapter); | |
2038 | } | |
2039 | ||
2040 | #ifdef CONFIG_PM | |
2041 | retval = pci_save_state(pdev); | |
2042 | if (retval) | |
2043 | return retval; | |
2044 | #endif | |
2045 | ||
2046 | pci_enable_wake(pdev, PCI_D3hot, 0); | |
2047 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
2048 | ||
5eba3699 AV |
2049 | ixgbe_release_hw_control(adapter); |
2050 | ||
9a799d71 AK |
2051 | pci_disable_device(pdev); |
2052 | ||
2053 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
2054 | ||
2055 | return 0; | |
2056 | } | |
2057 | ||
2058 | static void ixgbe_shutdown(struct pci_dev *pdev) | |
2059 | { | |
2060 | ixgbe_suspend(pdev, PMSG_SUSPEND); | |
2061 | } | |
2062 | ||
2063 | /** | |
021230d4 AV |
2064 | * ixgbe_poll - NAPI Rx polling callback |
2065 | * @napi: structure for representing this polling device | |
2066 | * @budget: how many packets driver is allowed to clean | |
2067 | * | |
2068 | * This function is used for legacy and MSI, NAPI mode | |
9a799d71 | 2069 | **/ |
021230d4 | 2070 | static int ixgbe_poll(struct napi_struct *napi, int budget) |
9a799d71 | 2071 | { |
021230d4 AV |
2072 | struct ixgbe_q_vector *q_vector = container_of(napi, |
2073 | struct ixgbe_q_vector, napi); | |
2074 | struct ixgbe_adapter *adapter = q_vector->adapter; | |
d2c7ddd6 | 2075 | int tx_cleaned = 0, work_done = 0; |
9a799d71 | 2076 | |
bd0362dd JC |
2077 | #ifdef CONFIG_DCA |
2078 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { | |
2079 | ixgbe_update_tx_dca(adapter, adapter->tx_ring); | |
2080 | ixgbe_update_rx_dca(adapter, adapter->rx_ring); | |
2081 | } | |
2082 | #endif | |
2083 | ||
d2c7ddd6 | 2084 | tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring); |
021230d4 | 2085 | ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget); |
9a799d71 | 2086 | |
d2c7ddd6 DM |
2087 | if (tx_cleaned) |
2088 | work_done = budget; | |
2089 | ||
53e52c72 DM |
2090 | /* If budget not fully consumed, exit the polling mode */ |
2091 | if (work_done < budget) { | |
021230d4 | 2092 | netif_rx_complete(adapter->netdev, napi); |
f494e8fa AV |
2093 | if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS) |
2094 | ixgbe_set_itr(adapter); | |
d4f80882 AV |
2095 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) |
2096 | ixgbe_irq_enable(adapter); | |
9a799d71 AK |
2097 | } |
2098 | ||
2099 | return work_done; | |
2100 | } | |
2101 | ||
2102 | /** | |
2103 | * ixgbe_tx_timeout - Respond to a Tx Hang | |
2104 | * @netdev: network interface device structure | |
2105 | **/ | |
2106 | static void ixgbe_tx_timeout(struct net_device *netdev) | |
2107 | { | |
2108 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
2109 | ||
2110 | /* Do the reset outside of interrupt context */ | |
2111 | schedule_work(&adapter->reset_task); | |
2112 | } | |
2113 | ||
2114 | static void ixgbe_reset_task(struct work_struct *work) | |
2115 | { | |
2116 | struct ixgbe_adapter *adapter; | |
2117 | adapter = container_of(work, struct ixgbe_adapter, reset_task); | |
2118 | ||
2119 | adapter->tx_timeout_count++; | |
2120 | ||
d4f80882 | 2121 | ixgbe_reinit_locked(adapter); |
9a799d71 AK |
2122 | } |
2123 | ||
021230d4 AV |
2124 | static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter, |
2125 | int vectors) | |
2126 | { | |
2127 | int err, vector_threshold; | |
2128 | ||
2129 | /* We'll want at least 3 (vector_threshold): | |
2130 | * 1) TxQ[0] Cleanup | |
2131 | * 2) RxQ[0] Cleanup | |
2132 | * 3) Other (Link Status Change, etc.) | |
2133 | * 4) TCP Timer (optional) | |
2134 | */ | |
2135 | vector_threshold = MIN_MSIX_COUNT; | |
2136 | ||
2137 | /* The more we get, the more we will assign to Tx/Rx Cleanup | |
2138 | * for the separate queues...where Rx Cleanup >= Tx Cleanup. | |
2139 | * Right now, we simply care about how many we'll get; we'll | |
2140 | * set them up later while requesting irq's. | |
2141 | */ | |
2142 | while (vectors >= vector_threshold) { | |
2143 | err = pci_enable_msix(adapter->pdev, adapter->msix_entries, | |
2144 | vectors); | |
2145 | if (!err) /* Success in acquiring all requested vectors. */ | |
2146 | break; | |
2147 | else if (err < 0) | |
2148 | vectors = 0; /* Nasty failure, quit now */ | |
2149 | else /* err == number of vectors we should try again with */ | |
2150 | vectors = err; | |
2151 | } | |
2152 | ||
2153 | if (vectors < vector_threshold) { | |
2154 | /* Can't allocate enough MSI-X interrupts? Oh well. | |
2155 | * This just means we'll go with either a single MSI | |
2156 | * vector or fall back to legacy interrupts. | |
2157 | */ | |
2158 | DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n"); | |
2159 | adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; | |
2160 | kfree(adapter->msix_entries); | |
2161 | adapter->msix_entries = NULL; | |
2162 | adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; | |
2163 | adapter->num_tx_queues = 1; | |
2164 | adapter->num_rx_queues = 1; | |
2165 | } else { | |
2166 | adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */ | |
2167 | adapter->num_msix_vectors = vectors; | |
2168 | } | |
2169 | } | |
2170 | ||
2171 | static void __devinit ixgbe_set_num_queues(struct ixgbe_adapter *adapter) | |
2172 | { | |
2173 | int nrq, ntq; | |
2174 | int feature_mask = 0, rss_i, rss_m; | |
2175 | ||
2176 | /* Number of supported queues */ | |
2177 | switch (adapter->hw.mac.type) { | |
2178 | case ixgbe_mac_82598EB: | |
2179 | rss_i = adapter->ring_feature[RING_F_RSS].indices; | |
2180 | rss_m = 0; | |
2181 | feature_mask |= IXGBE_FLAG_RSS_ENABLED; | |
2182 | ||
2183 | switch (adapter->flags & feature_mask) { | |
2184 | case (IXGBE_FLAG_RSS_ENABLED): | |
2185 | rss_m = 0xF; | |
2186 | nrq = rss_i; | |
30eba97a | 2187 | ntq = rss_i; |
021230d4 AV |
2188 | break; |
2189 | case 0: | |
2190 | default: | |
2191 | rss_i = 0; | |
2192 | rss_m = 0; | |
2193 | nrq = 1; | |
2194 | ntq = 1; | |
2195 | break; | |
2196 | } | |
2197 | ||
2198 | adapter->ring_feature[RING_F_RSS].indices = rss_i; | |
2199 | adapter->ring_feature[RING_F_RSS].mask = rss_m; | |
2200 | break; | |
2201 | default: | |
2202 | nrq = 1; | |
2203 | ntq = 1; | |
2204 | break; | |
2205 | } | |
2206 | ||
2207 | adapter->num_rx_queues = nrq; | |
2208 | adapter->num_tx_queues = ntq; | |
2209 | } | |
2210 | ||
2211 | /** | |
2212 | * ixgbe_cache_ring_register - Descriptor ring to register mapping | |
2213 | * @adapter: board private structure to initialize | |
2214 | * | |
2215 | * Once we know the feature-set enabled for the device, we'll cache | |
2216 | * the register offset the descriptor ring is assigned to. | |
2217 | **/ | |
2218 | static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter) | |
2219 | { | |
2220 | /* TODO: Remove all uses of the indices in the cases where multiple | |
2221 | * features are OR'd together, if the feature set makes sense. | |
2222 | */ | |
2223 | int feature_mask = 0, rss_i; | |
2224 | int i, txr_idx, rxr_idx; | |
2225 | ||
2226 | /* Number of supported queues */ | |
2227 | switch (adapter->hw.mac.type) { | |
2228 | case ixgbe_mac_82598EB: | |
2229 | rss_i = adapter->ring_feature[RING_F_RSS].indices; | |
2230 | txr_idx = 0; | |
2231 | rxr_idx = 0; | |
2232 | feature_mask |= IXGBE_FLAG_RSS_ENABLED; | |
2233 | switch (adapter->flags & feature_mask) { | |
2234 | case (IXGBE_FLAG_RSS_ENABLED): | |
2235 | for (i = 0; i < adapter->num_rx_queues; i++) | |
2236 | adapter->rx_ring[i].reg_idx = i; | |
2237 | for (i = 0; i < adapter->num_tx_queues; i++) | |
2238 | adapter->tx_ring[i].reg_idx = i; | |
2239 | break; | |
2240 | case 0: | |
2241 | default: | |
2242 | break; | |
2243 | } | |
2244 | break; | |
2245 | default: | |
2246 | break; | |
2247 | } | |
2248 | } | |
2249 | ||
9a799d71 AK |
2250 | /** |
2251 | * ixgbe_alloc_queues - Allocate memory for all rings | |
2252 | * @adapter: board private structure to initialize | |
2253 | * | |
2254 | * We allocate one ring per queue at run-time since we don't know the | |
2255 | * number of queues at compile-time. The polling_netdev array is | |
2256 | * intended for Multiqueue, but should work fine with a single queue. | |
2257 | **/ | |
2258 | static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter) | |
2259 | { | |
2260 | int i; | |
2261 | ||
2262 | adapter->tx_ring = kcalloc(adapter->num_tx_queues, | |
2263 | sizeof(struct ixgbe_ring), GFP_KERNEL); | |
2264 | if (!adapter->tx_ring) | |
021230d4 | 2265 | goto err_tx_ring_allocation; |
9a799d71 AK |
2266 | |
2267 | adapter->rx_ring = kcalloc(adapter->num_rx_queues, | |
2268 | sizeof(struct ixgbe_ring), GFP_KERNEL); | |
021230d4 AV |
2269 | if (!adapter->rx_ring) |
2270 | goto err_rx_ring_allocation; | |
9a799d71 | 2271 | |
021230d4 AV |
2272 | for (i = 0; i < adapter->num_tx_queues; i++) { |
2273 | adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD; | |
2274 | adapter->tx_ring[i].queue_index = i; | |
2275 | } | |
9a799d71 | 2276 | for (i = 0; i < adapter->num_rx_queues; i++) { |
9a799d71 | 2277 | adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD; |
021230d4 AV |
2278 | adapter->rx_ring[i].queue_index = i; |
2279 | } | |
2280 | ||
2281 | ixgbe_cache_ring_register(adapter); | |
2282 | ||
2283 | return 0; | |
2284 | ||
2285 | err_rx_ring_allocation: | |
2286 | kfree(adapter->tx_ring); | |
2287 | err_tx_ring_allocation: | |
2288 | return -ENOMEM; | |
2289 | } | |
2290 | ||
2291 | /** | |
2292 | * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported | |
2293 | * @adapter: board private structure to initialize | |
2294 | * | |
2295 | * Attempt to configure the interrupts using the best available | |
2296 | * capabilities of the hardware and the kernel. | |
2297 | **/ | |
2298 | static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter | |
2299 | *adapter) | |
2300 | { | |
2301 | int err = 0; | |
2302 | int vector, v_budget; | |
2303 | ||
2304 | /* | |
2305 | * It's easy to be greedy for MSI-X vectors, but it really | |
2306 | * doesn't do us much good if we have a lot more vectors | |
2307 | * than CPU's. So let's be conservative and only ask for | |
2308 | * (roughly) twice the number of vectors as there are CPU's. | |
2309 | */ | |
2310 | v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues, | |
2311 | (int)(num_online_cpus() * 2)) + NON_Q_VECTORS; | |
2312 | ||
2313 | /* | |
2314 | * At the same time, hardware can only support a maximum of | |
2315 | * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq, | |
2316 | * we can easily reach upwards of 64 Rx descriptor queues and | |
2317 | * 32 Tx queues. Thus, we cap it off in those rare cases where | |
2318 | * the cpu count also exceeds our vector limit. | |
2319 | */ | |
2320 | v_budget = min(v_budget, MAX_MSIX_COUNT); | |
2321 | ||
2322 | /* A failure in MSI-X entry allocation isn't fatal, but it does | |
2323 | * mean we disable MSI-X capabilities of the adapter. */ | |
2324 | adapter->msix_entries = kcalloc(v_budget, | |
2325 | sizeof(struct msix_entry), GFP_KERNEL); | |
2326 | if (!adapter->msix_entries) { | |
2327 | adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; | |
2328 | ixgbe_set_num_queues(adapter); | |
2329 | kfree(adapter->tx_ring); | |
2330 | kfree(adapter->rx_ring); | |
2331 | err = ixgbe_alloc_queues(adapter); | |
2332 | if (err) { | |
2333 | DPRINTK(PROBE, ERR, "Unable to allocate memory " | |
2334 | "for queues\n"); | |
2335 | goto out; | |
2336 | } | |
2337 | ||
2338 | goto try_msi; | |
2339 | } | |
2340 | ||
2341 | for (vector = 0; vector < v_budget; vector++) | |
2342 | adapter->msix_entries[vector].entry = vector; | |
2343 | ||
2344 | ixgbe_acquire_msix_vectors(adapter, v_budget); | |
2345 | ||
2346 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) | |
2347 | goto out; | |
2348 | ||
2349 | try_msi: | |
2350 | err = pci_enable_msi(adapter->pdev); | |
2351 | if (!err) { | |
2352 | adapter->flags |= IXGBE_FLAG_MSI_ENABLED; | |
2353 | } else { | |
2354 | DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, " | |
2355 | "falling back to legacy. Error: %d\n", err); | |
2356 | /* reset err */ | |
2357 | err = 0; | |
2358 | } | |
2359 | ||
2360 | out: | |
30eba97a AV |
2361 | /* Notify the stack of the (possibly) reduced Tx Queue count. */ |
2362 | adapter->netdev->egress_subqueue_count = adapter->num_tx_queues; | |
021230d4 AV |
2363 | |
2364 | return err; | |
2365 | } | |
2366 | ||
2367 | static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter) | |
2368 | { | |
2369 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { | |
2370 | adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; | |
2371 | pci_disable_msix(adapter->pdev); | |
2372 | kfree(adapter->msix_entries); | |
2373 | adapter->msix_entries = NULL; | |
2374 | } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) { | |
2375 | adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED; | |
2376 | pci_disable_msi(adapter->pdev); | |
2377 | } | |
2378 | return; | |
2379 | } | |
2380 | ||
2381 | /** | |
2382 | * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme | |
2383 | * @adapter: board private structure to initialize | |
2384 | * | |
2385 | * We determine which interrupt scheme to use based on... | |
2386 | * - Kernel support (MSI, MSI-X) | |
2387 | * - which can be user-defined (via MODULE_PARAM) | |
2388 | * - Hardware queue count (num_*_queues) | |
2389 | * - defined by miscellaneous hardware support/features (RSS, etc.) | |
2390 | **/ | |
2391 | static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter) | |
2392 | { | |
2393 | int err; | |
2394 | ||
2395 | /* Number of supported queues */ | |
2396 | ixgbe_set_num_queues(adapter); | |
2397 | ||
2398 | err = ixgbe_alloc_queues(adapter); | |
2399 | if (err) { | |
2400 | DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n"); | |
2401 | goto err_alloc_queues; | |
2402 | } | |
2403 | ||
2404 | err = ixgbe_set_interrupt_capability(adapter); | |
2405 | if (err) { | |
2406 | DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n"); | |
2407 | goto err_set_interrupt; | |
9a799d71 AK |
2408 | } |
2409 | ||
021230d4 AV |
2410 | DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, " |
2411 | "Tx Queue count = %u\n", | |
2412 | (adapter->num_rx_queues > 1) ? "Enabled" : | |
2413 | "Disabled", adapter->num_rx_queues, adapter->num_tx_queues); | |
2414 | ||
2415 | set_bit(__IXGBE_DOWN, &adapter->state); | |
2416 | ||
9a799d71 | 2417 | return 0; |
021230d4 AV |
2418 | |
2419 | err_set_interrupt: | |
2420 | kfree(adapter->tx_ring); | |
2421 | kfree(adapter->rx_ring); | |
2422 | err_alloc_queues: | |
2423 | return err; | |
9a799d71 AK |
2424 | } |
2425 | ||
2426 | /** | |
2427 | * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter) | |
2428 | * @adapter: board private structure to initialize | |
2429 | * | |
2430 | * ixgbe_sw_init initializes the Adapter private data structure. | |
2431 | * Fields are initialized based on PCI device information and | |
2432 | * OS network device settings (MTU size). | |
2433 | **/ | |
2434 | static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter) | |
2435 | { | |
2436 | struct ixgbe_hw *hw = &adapter->hw; | |
2437 | struct pci_dev *pdev = adapter->pdev; | |
021230d4 AV |
2438 | unsigned int rss; |
2439 | ||
2440 | /* Set capability flags */ | |
2441 | rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus()); | |
2442 | adapter->ring_feature[RING_F_RSS].indices = rss; | |
2443 | adapter->flags |= IXGBE_FLAG_RSS_ENABLED; | |
9a799d71 | 2444 | |
f494e8fa AV |
2445 | /* Enable Dynamic interrupt throttling by default */ |
2446 | adapter->rx_eitr = 1; | |
2447 | adapter->tx_eitr = 1; | |
2448 | ||
9a799d71 AK |
2449 | /* default flow control settings */ |
2450 | hw->fc.original_type = ixgbe_fc_full; | |
2451 | hw->fc.type = ixgbe_fc_full; | |
2452 | ||
021230d4 | 2453 | /* select 10G link by default */ |
9a799d71 AK |
2454 | hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN; |
2455 | if (hw->mac.ops.reset(hw)) { | |
2456 | dev_err(&pdev->dev, "HW Init failed\n"); | |
2457 | return -EIO; | |
2458 | } | |
3957d63d AK |
2459 | if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true, |
2460 | false)) { | |
9a799d71 AK |
2461 | dev_err(&pdev->dev, "Link Speed setup failed\n"); |
2462 | return -EIO; | |
2463 | } | |
2464 | ||
2465 | /* initialize eeprom parameters */ | |
2466 | if (ixgbe_init_eeprom(hw)) { | |
2467 | dev_err(&pdev->dev, "EEPROM initialization failed\n"); | |
2468 | return -EIO; | |
2469 | } | |
2470 | ||
021230d4 | 2471 | /* enable rx csum by default */ |
9a799d71 AK |
2472 | adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED; |
2473 | ||
9a799d71 AK |
2474 | set_bit(__IXGBE_DOWN, &adapter->state); |
2475 | ||
2476 | return 0; | |
2477 | } | |
2478 | ||
2479 | /** | |
2480 | * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors) | |
2481 | * @adapter: board private structure | |
2482 | * @txdr: tx descriptor ring (for a specific queue) to setup | |
2483 | * | |
2484 | * Return 0 on success, negative on failure | |
2485 | **/ | |
2486 | int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter, | |
2487 | struct ixgbe_ring *txdr) | |
2488 | { | |
2489 | struct pci_dev *pdev = adapter->pdev; | |
2490 | int size; | |
2491 | ||
2492 | size = sizeof(struct ixgbe_tx_buffer) * txdr->count; | |
2493 | txdr->tx_buffer_info = vmalloc(size); | |
2494 | if (!txdr->tx_buffer_info) { | |
2495 | DPRINTK(PROBE, ERR, | |
2496 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
2497 | return -ENOMEM; | |
2498 | } | |
2499 | memset(txdr->tx_buffer_info, 0, size); | |
2500 | ||
2501 | /* round up to nearest 4K */ | |
2502 | txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc); | |
2503 | txdr->size = ALIGN(txdr->size, 4096); | |
2504 | ||
2505 | txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); | |
2506 | if (!txdr->desc) { | |
2507 | vfree(txdr->tx_buffer_info); | |
2508 | DPRINTK(PROBE, ERR, | |
2509 | "Memory allocation failed for the tx desc ring\n"); | |
2510 | return -ENOMEM; | |
2511 | } | |
2512 | ||
9a799d71 AK |
2513 | txdr->next_to_use = 0; |
2514 | txdr->next_to_clean = 0; | |
2515 | txdr->work_limit = txdr->count; | |
9a799d71 AK |
2516 | |
2517 | return 0; | |
2518 | } | |
2519 | ||
2520 | /** | |
2521 | * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors) | |
2522 | * @adapter: board private structure | |
2523 | * @rxdr: rx descriptor ring (for a specific queue) to setup | |
2524 | * | |
2525 | * Returns 0 on success, negative on failure | |
2526 | **/ | |
2527 | int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter, | |
2528 | struct ixgbe_ring *rxdr) | |
2529 | { | |
2530 | struct pci_dev *pdev = adapter->pdev; | |
021230d4 | 2531 | int size; |
9a799d71 | 2532 | |
177db6ff MC |
2533 | size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS; |
2534 | rxdr->lro_mgr.lro_arr = vmalloc(size); | |
2535 | if (!rxdr->lro_mgr.lro_arr) | |
2536 | return -ENOMEM; | |
2537 | memset(rxdr->lro_mgr.lro_arr, 0, size); | |
2538 | ||
9a799d71 AK |
2539 | size = sizeof(struct ixgbe_rx_buffer) * rxdr->count; |
2540 | rxdr->rx_buffer_info = vmalloc(size); | |
2541 | if (!rxdr->rx_buffer_info) { | |
2542 | DPRINTK(PROBE, ERR, | |
2543 | "vmalloc allocation failed for the rx desc ring\n"); | |
177db6ff | 2544 | goto alloc_failed; |
9a799d71 AK |
2545 | } |
2546 | memset(rxdr->rx_buffer_info, 0, size); | |
2547 | ||
9a799d71 | 2548 | /* Round up to nearest 4K */ |
021230d4 | 2549 | rxdr->size = rxdr->count * sizeof(union ixgbe_adv_rx_desc); |
9a799d71 AK |
2550 | rxdr->size = ALIGN(rxdr->size, 4096); |
2551 | ||
2552 | rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); | |
2553 | ||
2554 | if (!rxdr->desc) { | |
2555 | DPRINTK(PROBE, ERR, | |
2556 | "Memory allocation failed for the rx desc ring\n"); | |
2557 | vfree(rxdr->rx_buffer_info); | |
177db6ff | 2558 | goto alloc_failed; |
9a799d71 AK |
2559 | } |
2560 | ||
2561 | rxdr->next_to_clean = 0; | |
2562 | rxdr->next_to_use = 0; | |
9a799d71 AK |
2563 | |
2564 | return 0; | |
177db6ff MC |
2565 | |
2566 | alloc_failed: | |
2567 | vfree(rxdr->lro_mgr.lro_arr); | |
2568 | rxdr->lro_mgr.lro_arr = NULL; | |
2569 | return -ENOMEM; | |
9a799d71 AK |
2570 | } |
2571 | ||
2572 | /** | |
2573 | * ixgbe_free_tx_resources - Free Tx Resources per Queue | |
2574 | * @adapter: board private structure | |
2575 | * @tx_ring: Tx descriptor ring for a specific queue | |
2576 | * | |
2577 | * Free all transmit software resources | |
2578 | **/ | |
2579 | static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter, | |
2580 | struct ixgbe_ring *tx_ring) | |
2581 | { | |
2582 | struct pci_dev *pdev = adapter->pdev; | |
2583 | ||
2584 | ixgbe_clean_tx_ring(adapter, tx_ring); | |
2585 | ||
2586 | vfree(tx_ring->tx_buffer_info); | |
2587 | tx_ring->tx_buffer_info = NULL; | |
2588 | ||
2589 | pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); | |
2590 | ||
2591 | tx_ring->desc = NULL; | |
2592 | } | |
2593 | ||
2594 | /** | |
2595 | * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues | |
2596 | * @adapter: board private structure | |
2597 | * | |
2598 | * Free all transmit software resources | |
2599 | **/ | |
2600 | static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter) | |
2601 | { | |
2602 | int i; | |
2603 | ||
2604 | for (i = 0; i < adapter->num_tx_queues; i++) | |
2605 | ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]); | |
2606 | } | |
2607 | ||
2608 | /** | |
2609 | * ixgbe_free_rx_resources - Free Rx Resources | |
2610 | * @adapter: board private structure | |
2611 | * @rx_ring: ring to clean the resources from | |
2612 | * | |
2613 | * Free all receive software resources | |
2614 | **/ | |
2615 | static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter, | |
2616 | struct ixgbe_ring *rx_ring) | |
2617 | { | |
2618 | struct pci_dev *pdev = adapter->pdev; | |
2619 | ||
177db6ff MC |
2620 | vfree(rx_ring->lro_mgr.lro_arr); |
2621 | rx_ring->lro_mgr.lro_arr = NULL; | |
2622 | ||
9a799d71 AK |
2623 | ixgbe_clean_rx_ring(adapter, rx_ring); |
2624 | ||
2625 | vfree(rx_ring->rx_buffer_info); | |
2626 | rx_ring->rx_buffer_info = NULL; | |
2627 | ||
2628 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); | |
2629 | ||
2630 | rx_ring->desc = NULL; | |
2631 | } | |
2632 | ||
2633 | /** | |
2634 | * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues | |
2635 | * @adapter: board private structure | |
2636 | * | |
2637 | * Free all receive software resources | |
2638 | **/ | |
2639 | static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter) | |
2640 | { | |
2641 | int i; | |
2642 | ||
2643 | for (i = 0; i < adapter->num_rx_queues; i++) | |
2644 | ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]); | |
2645 | } | |
2646 | ||
2647 | /** | |
021230d4 | 2648 | * ixgbe_setup_all_tx_resources - allocate all queues Tx resources |
9a799d71 AK |
2649 | * @adapter: board private structure |
2650 | * | |
2651 | * If this function returns with an error, then it's possible one or | |
2652 | * more of the rings is populated (while the rest are not). It is the | |
2653 | * callers duty to clean those orphaned rings. | |
2654 | * | |
2655 | * Return 0 on success, negative on failure | |
2656 | **/ | |
2657 | static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter) | |
2658 | { | |
2659 | int i, err = 0; | |
2660 | ||
2661 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
2662 | err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]); | |
2663 | if (err) { | |
2664 | DPRINTK(PROBE, ERR, | |
2665 | "Allocation for Tx Queue %u failed\n", i); | |
2666 | break; | |
2667 | } | |
2668 | } | |
2669 | ||
2670 | return err; | |
2671 | } | |
2672 | ||
2673 | /** | |
021230d4 | 2674 | * ixgbe_setup_all_rx_resources - allocate all queues Rx resources |
9a799d71 AK |
2675 | * @adapter: board private structure |
2676 | * | |
2677 | * If this function returns with an error, then it's possible one or | |
2678 | * more of the rings is populated (while the rest are not). It is the | |
2679 | * callers duty to clean those orphaned rings. | |
2680 | * | |
2681 | * Return 0 on success, negative on failure | |
2682 | **/ | |
2683 | ||
2684 | static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter) | |
2685 | { | |
2686 | int i, err = 0; | |
2687 | ||
2688 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
2689 | err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]); | |
2690 | if (err) { | |
2691 | DPRINTK(PROBE, ERR, | |
2692 | "Allocation for Rx Queue %u failed\n", i); | |
2693 | break; | |
2694 | } | |
2695 | } | |
2696 | ||
2697 | return err; | |
2698 | } | |
2699 | ||
2700 | /** | |
2701 | * ixgbe_change_mtu - Change the Maximum Transfer Unit | |
2702 | * @netdev: network interface device structure | |
2703 | * @new_mtu: new value for maximum frame size | |
2704 | * | |
2705 | * Returns 0 on success, negative on failure | |
2706 | **/ | |
2707 | static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu) | |
2708 | { | |
2709 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
2710 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; | |
2711 | ||
2712 | if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) || | |
2713 | (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE)) | |
2714 | return -EINVAL; | |
2715 | ||
021230d4 AV |
2716 | DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n", |
2717 | netdev->mtu, new_mtu); | |
2718 | /* must set new MTU before calling down or up */ | |
9a799d71 AK |
2719 | netdev->mtu = new_mtu; |
2720 | ||
d4f80882 AV |
2721 | if (netif_running(netdev)) |
2722 | ixgbe_reinit_locked(adapter); | |
9a799d71 AK |
2723 | |
2724 | return 0; | |
2725 | } | |
2726 | ||
2727 | /** | |
2728 | * ixgbe_open - Called when a network interface is made active | |
2729 | * @netdev: network interface device structure | |
2730 | * | |
2731 | * Returns 0 on success, negative value on failure | |
2732 | * | |
2733 | * The open entry point is called when a network interface is made | |
2734 | * active by the system (IFF_UP). At this point all resources needed | |
2735 | * for transmit and receive operations are allocated, the interrupt | |
2736 | * handler is registered with the OS, the watchdog timer is started, | |
2737 | * and the stack is notified that the interface is ready. | |
2738 | **/ | |
2739 | static int ixgbe_open(struct net_device *netdev) | |
2740 | { | |
2741 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
2742 | int err; | |
4bebfaa5 AK |
2743 | |
2744 | /* disallow open during test */ | |
2745 | if (test_bit(__IXGBE_TESTING, &adapter->state)) | |
2746 | return -EBUSY; | |
9a799d71 | 2747 | |
9a799d71 AK |
2748 | /* allocate transmit descriptors */ |
2749 | err = ixgbe_setup_all_tx_resources(adapter); | |
2750 | if (err) | |
2751 | goto err_setup_tx; | |
2752 | ||
9a799d71 AK |
2753 | /* allocate receive descriptors */ |
2754 | err = ixgbe_setup_all_rx_resources(adapter); | |
2755 | if (err) | |
2756 | goto err_setup_rx; | |
2757 | ||
2758 | ixgbe_configure(adapter); | |
2759 | ||
021230d4 | 2760 | err = ixgbe_request_irq(adapter); |
9a799d71 AK |
2761 | if (err) |
2762 | goto err_req_irq; | |
2763 | ||
9a799d71 AK |
2764 | err = ixgbe_up_complete(adapter); |
2765 | if (err) | |
2766 | goto err_up; | |
2767 | ||
2768 | return 0; | |
2769 | ||
2770 | err_up: | |
5eba3699 | 2771 | ixgbe_release_hw_control(adapter); |
9a799d71 AK |
2772 | ixgbe_free_irq(adapter); |
2773 | err_req_irq: | |
2774 | ixgbe_free_all_rx_resources(adapter); | |
2775 | err_setup_rx: | |
2776 | ixgbe_free_all_tx_resources(adapter); | |
2777 | err_setup_tx: | |
2778 | ixgbe_reset(adapter); | |
2779 | ||
2780 | return err; | |
2781 | } | |
2782 | ||
2783 | /** | |
2784 | * ixgbe_close - Disables a network interface | |
2785 | * @netdev: network interface device structure | |
2786 | * | |
2787 | * Returns 0, this is not allowed to fail | |
2788 | * | |
2789 | * The close entry point is called when an interface is de-activated | |
2790 | * by the OS. The hardware is still under the drivers control, but | |
2791 | * needs to be disabled. A global MAC reset is issued to stop the | |
2792 | * hardware, and all transmit and receive resources are freed. | |
2793 | **/ | |
2794 | static int ixgbe_close(struct net_device *netdev) | |
2795 | { | |
2796 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
9a799d71 AK |
2797 | |
2798 | ixgbe_down(adapter); | |
2799 | ixgbe_free_irq(adapter); | |
2800 | ||
2801 | ixgbe_free_all_tx_resources(adapter); | |
2802 | ixgbe_free_all_rx_resources(adapter); | |
2803 | ||
5eba3699 | 2804 | ixgbe_release_hw_control(adapter); |
9a799d71 AK |
2805 | |
2806 | return 0; | |
2807 | } | |
2808 | ||
2809 | /** | |
2810 | * ixgbe_update_stats - Update the board statistics counters. | |
2811 | * @adapter: board private structure | |
2812 | **/ | |
2813 | void ixgbe_update_stats(struct ixgbe_adapter *adapter) | |
2814 | { | |
2815 | struct ixgbe_hw *hw = &adapter->hw; | |
6f11eef7 AV |
2816 | u64 total_mpc = 0; |
2817 | u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot; | |
9a799d71 AK |
2818 | |
2819 | adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); | |
6f11eef7 AV |
2820 | for (i = 0; i < 8; i++) { |
2821 | /* for packet buffers not used, the register should read 0 */ | |
2822 | mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i)); | |
2823 | missed_rx += mpc; | |
2824 | adapter->stats.mpc[i] += mpc; | |
2825 | total_mpc += adapter->stats.mpc[i]; | |
2826 | adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i)); | |
2827 | } | |
2828 | adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); | |
2829 | /* work around hardware counting issue */ | |
2830 | adapter->stats.gprc -= missed_rx; | |
2831 | ||
2832 | /* 82598 hardware only has a 32 bit counter in the high register */ | |
9a799d71 | 2833 | adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); |
6f11eef7 AV |
2834 | adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); |
2835 | adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH); | |
9a799d71 AK |
2836 | bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); |
2837 | adapter->stats.bprc += bprc; | |
2838 | adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); | |
2839 | adapter->stats.mprc -= bprc; | |
2840 | adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC); | |
2841 | adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); | |
2842 | adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); | |
2843 | adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); | |
2844 | adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); | |
2845 | adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); | |
2846 | adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); | |
9a799d71 AK |
2847 | adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); |
2848 | adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); | |
9a799d71 | 2849 | adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); |
6f11eef7 AV |
2850 | lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); |
2851 | adapter->stats.lxontxc += lxon; | |
2852 | lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); | |
2853 | adapter->stats.lxofftxc += lxoff; | |
9a799d71 AK |
2854 | adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC); |
2855 | adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); | |
6f11eef7 AV |
2856 | adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); |
2857 | /* | |
2858 | * 82598 errata - tx of flow control packets is included in tx counters | |
2859 | */ | |
2860 | xon_off_tot = lxon + lxoff; | |
2861 | adapter->stats.gptc -= xon_off_tot; | |
2862 | adapter->stats.mptc -= xon_off_tot; | |
2863 | adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN)); | |
9a799d71 AK |
2864 | adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC); |
2865 | adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC); | |
2866 | adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC); | |
9a799d71 AK |
2867 | adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR); |
2868 | adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); | |
6f11eef7 | 2869 | adapter->stats.ptc64 -= xon_off_tot; |
9a799d71 AK |
2870 | adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); |
2871 | adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); | |
2872 | adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); | |
2873 | adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); | |
2874 | adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); | |
9a799d71 AK |
2875 | adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); |
2876 | ||
2877 | /* Fill out the OS statistics structure */ | |
9a799d71 AK |
2878 | adapter->net_stats.multicast = adapter->stats.mprc; |
2879 | ||
2880 | /* Rx Errors */ | |
2881 | adapter->net_stats.rx_errors = adapter->stats.crcerrs + | |
2882 | adapter->stats.rlec; | |
2883 | adapter->net_stats.rx_dropped = 0; | |
2884 | adapter->net_stats.rx_length_errors = adapter->stats.rlec; | |
2885 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; | |
6f11eef7 | 2886 | adapter->net_stats.rx_missed_errors = total_mpc; |
9a799d71 AK |
2887 | } |
2888 | ||
2889 | /** | |
2890 | * ixgbe_watchdog - Timer Call-back | |
2891 | * @data: pointer to adapter cast into an unsigned long | |
2892 | **/ | |
2893 | static void ixgbe_watchdog(unsigned long data) | |
2894 | { | |
2895 | struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; | |
2896 | struct net_device *netdev = adapter->netdev; | |
2897 | bool link_up; | |
2898 | u32 link_speed = 0; | |
30eba97a | 2899 | int i; |
9a799d71 | 2900 | |
3957d63d | 2901 | adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up); |
9a799d71 AK |
2902 | |
2903 | if (link_up) { | |
2904 | if (!netif_carrier_ok(netdev)) { | |
2905 | u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); | |
2906 | u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS); | |
2907 | #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE) | |
2908 | #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X) | |
2909 | DPRINTK(LINK, INFO, "NIC Link is Up %s, " | |
2910 | "Flow Control: %s\n", | |
2911 | (link_speed == IXGBE_LINK_SPEED_10GB_FULL ? | |
2912 | "10 Gbps" : | |
2913 | (link_speed == IXGBE_LINK_SPEED_1GB_FULL ? | |
5a059e9d | 2914 | "1 Gbps" : "unknown speed")), |
9a799d71 AK |
2915 | ((FLOW_RX && FLOW_TX) ? "RX/TX" : |
2916 | (FLOW_RX ? "RX" : | |
2917 | (FLOW_TX ? "TX" : "None")))); | |
2918 | ||
2919 | netif_carrier_on(netdev); | |
2920 | netif_wake_queue(netdev); | |
30eba97a AV |
2921 | for (i = 0; i < adapter->num_tx_queues; i++) |
2922 | netif_wake_subqueue(netdev, i); | |
9a799d71 AK |
2923 | } else { |
2924 | /* Force detection of hung controller */ | |
2925 | adapter->detect_tx_hung = true; | |
2926 | } | |
2927 | } else { | |
2928 | if (netif_carrier_ok(netdev)) { | |
2929 | DPRINTK(LINK, INFO, "NIC Link is Down\n"); | |
2930 | netif_carrier_off(netdev); | |
2931 | netif_stop_queue(netdev); | |
2932 | } | |
2933 | } | |
2934 | ||
2935 | ixgbe_update_stats(adapter); | |
2936 | ||
021230d4 AV |
2937 | if (!test_bit(__IXGBE_DOWN, &adapter->state)) { |
2938 | /* Cause software interrupt to ensure rx rings are cleaned */ | |
2939 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { | |
2940 | u32 eics = | |
2941 | (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1; | |
2942 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, eics); | |
2943 | } else { | |
2944 | /* for legacy and MSI interrupts don't set any bits that | |
2945 | * are enabled for EIAM, because this operation would | |
2946 | * set *both* EIMS and EICS for any bit in EIAM */ | |
2947 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, | |
2948 | (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER)); | |
2949 | } | |
2950 | /* Reset the timer */ | |
9a799d71 AK |
2951 | mod_timer(&adapter->watchdog_timer, |
2952 | round_jiffies(jiffies + 2 * HZ)); | |
021230d4 | 2953 | } |
9a799d71 AK |
2954 | } |
2955 | ||
9a799d71 AK |
2956 | static int ixgbe_tso(struct ixgbe_adapter *adapter, |
2957 | struct ixgbe_ring *tx_ring, struct sk_buff *skb, | |
2958 | u32 tx_flags, u8 *hdr_len) | |
2959 | { | |
2960 | struct ixgbe_adv_tx_context_desc *context_desc; | |
2961 | unsigned int i; | |
2962 | int err; | |
2963 | struct ixgbe_tx_buffer *tx_buffer_info; | |
2964 | u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0; | |
2965 | u32 mss_l4len_idx = 0, l4len; | |
9a799d71 AK |
2966 | |
2967 | if (skb_is_gso(skb)) { | |
2968 | if (skb_header_cloned(skb)) { | |
2969 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
2970 | if (err) | |
2971 | return err; | |
2972 | } | |
2973 | l4len = tcp_hdrlen(skb); | |
2974 | *hdr_len += l4len; | |
2975 | ||
8327d000 | 2976 | if (skb->protocol == htons(ETH_P_IP)) { |
9a799d71 AK |
2977 | struct iphdr *iph = ip_hdr(skb); |
2978 | iph->tot_len = 0; | |
2979 | iph->check = 0; | |
2980 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, | |
2981 | iph->daddr, 0, | |
2982 | IPPROTO_TCP, | |
2983 | 0); | |
2984 | adapter->hw_tso_ctxt++; | |
2985 | } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) { | |
2986 | ipv6_hdr(skb)->payload_len = 0; | |
2987 | tcp_hdr(skb)->check = | |
2988 | ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, | |
2989 | &ipv6_hdr(skb)->daddr, | |
2990 | 0, IPPROTO_TCP, 0); | |
2991 | adapter->hw_tso6_ctxt++; | |
2992 | } | |
2993 | ||
2994 | i = tx_ring->next_to_use; | |
2995 | ||
2996 | tx_buffer_info = &tx_ring->tx_buffer_info[i]; | |
2997 | context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i); | |
2998 | ||
2999 | /* VLAN MACLEN IPLEN */ | |
3000 | if (tx_flags & IXGBE_TX_FLAGS_VLAN) | |
3001 | vlan_macip_lens |= | |
3002 | (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK); | |
3003 | vlan_macip_lens |= ((skb_network_offset(skb)) << | |
3004 | IXGBE_ADVTXD_MACLEN_SHIFT); | |
3005 | *hdr_len += skb_network_offset(skb); | |
3006 | vlan_macip_lens |= | |
3007 | (skb_transport_header(skb) - skb_network_header(skb)); | |
3008 | *hdr_len += | |
3009 | (skb_transport_header(skb) - skb_network_header(skb)); | |
3010 | context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); | |
3011 | context_desc->seqnum_seed = 0; | |
3012 | ||
3013 | /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ | |
3014 | type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT | | |
3015 | IXGBE_ADVTXD_DTYP_CTXT); | |
3016 | ||
8327d000 | 3017 | if (skb->protocol == htons(ETH_P_IP)) |
9a799d71 AK |
3018 | type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; |
3019 | type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP; | |
3020 | context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); | |
3021 | ||
3022 | /* MSS L4LEN IDX */ | |
3023 | mss_l4len_idx |= | |
3024 | (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT); | |
3025 | mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT); | |
3026 | context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx); | |
3027 | ||
3028 | tx_buffer_info->time_stamp = jiffies; | |
3029 | tx_buffer_info->next_to_watch = i; | |
3030 | ||
3031 | i++; | |
3032 | if (i == tx_ring->count) | |
3033 | i = 0; | |
3034 | tx_ring->next_to_use = i; | |
3035 | ||
3036 | return true; | |
3037 | } | |
3038 | return false; | |
3039 | } | |
3040 | ||
3041 | static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter, | |
3042 | struct ixgbe_ring *tx_ring, | |
3043 | struct sk_buff *skb, u32 tx_flags) | |
3044 | { | |
3045 | struct ixgbe_adv_tx_context_desc *context_desc; | |
3046 | unsigned int i; | |
3047 | struct ixgbe_tx_buffer *tx_buffer_info; | |
3048 | u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0; | |
3049 | ||
3050 | if (skb->ip_summed == CHECKSUM_PARTIAL || | |
3051 | (tx_flags & IXGBE_TX_FLAGS_VLAN)) { | |
3052 | i = tx_ring->next_to_use; | |
3053 | tx_buffer_info = &tx_ring->tx_buffer_info[i]; | |
3054 | context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i); | |
3055 | ||
3056 | if (tx_flags & IXGBE_TX_FLAGS_VLAN) | |
3057 | vlan_macip_lens |= | |
3058 | (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK); | |
3059 | vlan_macip_lens |= (skb_network_offset(skb) << | |
3060 | IXGBE_ADVTXD_MACLEN_SHIFT); | |
3061 | if (skb->ip_summed == CHECKSUM_PARTIAL) | |
3062 | vlan_macip_lens |= (skb_transport_header(skb) - | |
3063 | skb_network_header(skb)); | |
3064 | ||
3065 | context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); | |
3066 | context_desc->seqnum_seed = 0; | |
3067 | ||
3068 | type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT | | |
3069 | IXGBE_ADVTXD_DTYP_CTXT); | |
3070 | ||
3071 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
41825d71 AK |
3072 | switch (skb->protocol) { |
3073 | case __constant_htons(ETH_P_IP): | |
9a799d71 | 3074 | type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; |
41825d71 AK |
3075 | if (ip_hdr(skb)->protocol == IPPROTO_TCP) |
3076 | type_tucmd_mlhl |= | |
3077 | IXGBE_ADVTXD_TUCMD_L4T_TCP; | |
3078 | break; | |
3079 | ||
3080 | case __constant_htons(ETH_P_IPV6): | |
3081 | /* XXX what about other V6 headers?? */ | |
3082 | if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) | |
3083 | type_tucmd_mlhl |= | |
3084 | IXGBE_ADVTXD_TUCMD_L4T_TCP; | |
3085 | break; | |
9a799d71 | 3086 | |
41825d71 AK |
3087 | default: |
3088 | if (unlikely(net_ratelimit())) { | |
3089 | DPRINTK(PROBE, WARNING, | |
3090 | "partial checksum but proto=%x!\n", | |
3091 | skb->protocol); | |
3092 | } | |
3093 | break; | |
3094 | } | |
9a799d71 AK |
3095 | } |
3096 | ||
3097 | context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); | |
3098 | context_desc->mss_l4len_idx = 0; | |
3099 | ||
3100 | tx_buffer_info->time_stamp = jiffies; | |
3101 | tx_buffer_info->next_to_watch = i; | |
3102 | adapter->hw_csum_tx_good++; | |
3103 | i++; | |
3104 | if (i == tx_ring->count) | |
3105 | i = 0; | |
3106 | tx_ring->next_to_use = i; | |
3107 | ||
3108 | return true; | |
3109 | } | |
3110 | return false; | |
3111 | } | |
3112 | ||
3113 | static int ixgbe_tx_map(struct ixgbe_adapter *adapter, | |
3114 | struct ixgbe_ring *tx_ring, | |
3115 | struct sk_buff *skb, unsigned int first) | |
3116 | { | |
3117 | struct ixgbe_tx_buffer *tx_buffer_info; | |
3118 | unsigned int len = skb->len; | |
3119 | unsigned int offset = 0, size, count = 0, i; | |
3120 | unsigned int nr_frags = skb_shinfo(skb)->nr_frags; | |
3121 | unsigned int f; | |
3122 | ||
3123 | len -= skb->data_len; | |
3124 | ||
3125 | i = tx_ring->next_to_use; | |
3126 | ||
3127 | while (len) { | |
3128 | tx_buffer_info = &tx_ring->tx_buffer_info[i]; | |
3129 | size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD); | |
3130 | ||
3131 | tx_buffer_info->length = size; | |
3132 | tx_buffer_info->dma = pci_map_single(adapter->pdev, | |
3133 | skb->data + offset, | |
3134 | size, PCI_DMA_TODEVICE); | |
3135 | tx_buffer_info->time_stamp = jiffies; | |
3136 | tx_buffer_info->next_to_watch = i; | |
3137 | ||
3138 | len -= size; | |
3139 | offset += size; | |
3140 | count++; | |
3141 | i++; | |
3142 | if (i == tx_ring->count) | |
3143 | i = 0; | |
3144 | } | |
3145 | ||
3146 | for (f = 0; f < nr_frags; f++) { | |
3147 | struct skb_frag_struct *frag; | |
3148 | ||
3149 | frag = &skb_shinfo(skb)->frags[f]; | |
3150 | len = frag->size; | |
3151 | offset = frag->page_offset; | |
3152 | ||
3153 | while (len) { | |
3154 | tx_buffer_info = &tx_ring->tx_buffer_info[i]; | |
3155 | size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD); | |
3156 | ||
3157 | tx_buffer_info->length = size; | |
3158 | tx_buffer_info->dma = pci_map_page(adapter->pdev, | |
3159 | frag->page, | |
3160 | offset, | |
3161 | size, PCI_DMA_TODEVICE); | |
3162 | tx_buffer_info->time_stamp = jiffies; | |
3163 | tx_buffer_info->next_to_watch = i; | |
3164 | ||
3165 | len -= size; | |
3166 | offset += size; | |
3167 | count++; | |
3168 | i++; | |
3169 | if (i == tx_ring->count) | |
3170 | i = 0; | |
3171 | } | |
3172 | } | |
3173 | if (i == 0) | |
3174 | i = tx_ring->count - 1; | |
3175 | else | |
3176 | i = i - 1; | |
3177 | tx_ring->tx_buffer_info[i].skb = skb; | |
3178 | tx_ring->tx_buffer_info[first].next_to_watch = i; | |
3179 | ||
3180 | return count; | |
3181 | } | |
3182 | ||
3183 | static void ixgbe_tx_queue(struct ixgbe_adapter *adapter, | |
3184 | struct ixgbe_ring *tx_ring, | |
3185 | int tx_flags, int count, u32 paylen, u8 hdr_len) | |
3186 | { | |
3187 | union ixgbe_adv_tx_desc *tx_desc = NULL; | |
3188 | struct ixgbe_tx_buffer *tx_buffer_info; | |
3189 | u32 olinfo_status = 0, cmd_type_len = 0; | |
3190 | unsigned int i; | |
3191 | u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS; | |
3192 | ||
3193 | cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA; | |
3194 | ||
3195 | cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT; | |
3196 | ||
3197 | if (tx_flags & IXGBE_TX_FLAGS_VLAN) | |
3198 | cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE; | |
3199 | ||
3200 | if (tx_flags & IXGBE_TX_FLAGS_TSO) { | |
3201 | cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE; | |
3202 | ||
3203 | olinfo_status |= IXGBE_TXD_POPTS_TXSM << | |
3204 | IXGBE_ADVTXD_POPTS_SHIFT; | |
3205 | ||
3206 | if (tx_flags & IXGBE_TX_FLAGS_IPV4) | |
3207 | olinfo_status |= IXGBE_TXD_POPTS_IXSM << | |
3208 | IXGBE_ADVTXD_POPTS_SHIFT; | |
3209 | ||
3210 | } else if (tx_flags & IXGBE_TX_FLAGS_CSUM) | |
3211 | olinfo_status |= IXGBE_TXD_POPTS_TXSM << | |
3212 | IXGBE_ADVTXD_POPTS_SHIFT; | |
3213 | ||
3214 | olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT); | |
3215 | ||
3216 | i = tx_ring->next_to_use; | |
3217 | while (count--) { | |
3218 | tx_buffer_info = &tx_ring->tx_buffer_info[i]; | |
3219 | tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i); | |
3220 | tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma); | |
3221 | tx_desc->read.cmd_type_len = | |
3222 | cpu_to_le32(cmd_type_len | tx_buffer_info->length); | |
3223 | tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status); | |
3224 | ||
3225 | i++; | |
3226 | if (i == tx_ring->count) | |
3227 | i = 0; | |
3228 | } | |
3229 | ||
3230 | tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd); | |
3231 | ||
3232 | /* | |
3233 | * Force memory writes to complete before letting h/w | |
3234 | * know there are new descriptors to fetch. (Only | |
3235 | * applicable for weak-ordered memory model archs, | |
3236 | * such as IA-64). | |
3237 | */ | |
3238 | wmb(); | |
3239 | ||
3240 | tx_ring->next_to_use = i; | |
3241 | writel(i, adapter->hw.hw_addr + tx_ring->tail); | |
3242 | } | |
3243 | ||
e092be60 AV |
3244 | static int __ixgbe_maybe_stop_tx(struct net_device *netdev, |
3245 | struct ixgbe_ring *tx_ring, int size) | |
3246 | { | |
3247 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
3248 | ||
30eba97a | 3249 | netif_stop_subqueue(netdev, tx_ring->queue_index); |
e092be60 AV |
3250 | /* Herbert's original patch had: |
3251 | * smp_mb__after_netif_stop_queue(); | |
3252 | * but since that doesn't exist yet, just open code it. */ | |
3253 | smp_mb(); | |
3254 | ||
3255 | /* We need to check again in a case another CPU has just | |
3256 | * made room available. */ | |
3257 | if (likely(IXGBE_DESC_UNUSED(tx_ring) < size)) | |
3258 | return -EBUSY; | |
3259 | ||
3260 | /* A reprieve! - use start_queue because it doesn't call schedule */ | |
30eba97a | 3261 | netif_wake_subqueue(netdev, tx_ring->queue_index); |
e092be60 AV |
3262 | ++adapter->restart_queue; |
3263 | return 0; | |
3264 | } | |
3265 | ||
3266 | static int ixgbe_maybe_stop_tx(struct net_device *netdev, | |
3267 | struct ixgbe_ring *tx_ring, int size) | |
3268 | { | |
3269 | if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size)) | |
3270 | return 0; | |
3271 | return __ixgbe_maybe_stop_tx(netdev, tx_ring, size); | |
3272 | } | |
3273 | ||
3274 | ||
9a799d71 AK |
3275 | static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev) |
3276 | { | |
3277 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
3278 | struct ixgbe_ring *tx_ring; | |
3279 | unsigned int len = skb->len; | |
3280 | unsigned int first; | |
3281 | unsigned int tx_flags = 0; | |
30eba97a AV |
3282 | u8 hdr_len = 0; |
3283 | int r_idx = 0, tso; | |
9a799d71 AK |
3284 | unsigned int mss = 0; |
3285 | int count = 0; | |
3286 | unsigned int f; | |
3287 | unsigned int nr_frags = skb_shinfo(skb)->nr_frags; | |
3288 | len -= skb->data_len; | |
30eba97a | 3289 | r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping; |
30eba97a | 3290 | tx_ring = &adapter->tx_ring[r_idx]; |
9a799d71 | 3291 | |
9a799d71 AK |
3292 | |
3293 | if (skb->len <= 0) { | |
3294 | dev_kfree_skb(skb); | |
3295 | return NETDEV_TX_OK; | |
3296 | } | |
3297 | mss = skb_shinfo(skb)->gso_size; | |
3298 | ||
3299 | if (mss) | |
3300 | count++; | |
3301 | else if (skb->ip_summed == CHECKSUM_PARTIAL) | |
3302 | count++; | |
3303 | ||
3304 | count += TXD_USE_COUNT(len); | |
3305 | for (f = 0; f < nr_frags; f++) | |
3306 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size); | |
3307 | ||
e092be60 | 3308 | if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) { |
9a799d71 | 3309 | adapter->tx_busy++; |
9a799d71 AK |
3310 | return NETDEV_TX_BUSY; |
3311 | } | |
9a799d71 AK |
3312 | if (adapter->vlgrp && vlan_tx_tag_present(skb)) { |
3313 | tx_flags |= IXGBE_TX_FLAGS_VLAN; | |
3314 | tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT); | |
3315 | } | |
3316 | ||
8327d000 | 3317 | if (skb->protocol == htons(ETH_P_IP)) |
9a799d71 AK |
3318 | tx_flags |= IXGBE_TX_FLAGS_IPV4; |
3319 | first = tx_ring->next_to_use; | |
3320 | tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len); | |
3321 | if (tso < 0) { | |
3322 | dev_kfree_skb_any(skb); | |
3323 | return NETDEV_TX_OK; | |
3324 | } | |
3325 | ||
3326 | if (tso) | |
3327 | tx_flags |= IXGBE_TX_FLAGS_TSO; | |
3328 | else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) && | |
3329 | (skb->ip_summed == CHECKSUM_PARTIAL)) | |
3330 | tx_flags |= IXGBE_TX_FLAGS_CSUM; | |
3331 | ||
3332 | ixgbe_tx_queue(adapter, tx_ring, tx_flags, | |
3333 | ixgbe_tx_map(adapter, tx_ring, skb, first), | |
3334 | skb->len, hdr_len); | |
3335 | ||
3336 | netdev->trans_start = jiffies; | |
3337 | ||
e092be60 | 3338 | ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED); |
9a799d71 AK |
3339 | |
3340 | return NETDEV_TX_OK; | |
3341 | } | |
3342 | ||
3343 | /** | |
3344 | * ixgbe_get_stats - Get System Network Statistics | |
3345 | * @netdev: network interface device structure | |
3346 | * | |
3347 | * Returns the address of the device statistics structure. | |
3348 | * The statistics are actually updated from the timer callback. | |
3349 | **/ | |
3350 | static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev) | |
3351 | { | |
3352 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
3353 | ||
3354 | /* only return the current stats */ | |
3355 | return &adapter->net_stats; | |
3356 | } | |
3357 | ||
3358 | /** | |
3359 | * ixgbe_set_mac - Change the Ethernet Address of the NIC | |
3360 | * @netdev: network interface device structure | |
3361 | * @p: pointer to an address structure | |
3362 | * | |
3363 | * Returns 0 on success, negative on failure | |
3364 | **/ | |
3365 | static int ixgbe_set_mac(struct net_device *netdev, void *p) | |
3366 | { | |
3367 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
3368 | struct sockaddr *addr = p; | |
3369 | ||
3370 | if (!is_valid_ether_addr(addr->sa_data)) | |
3371 | return -EADDRNOTAVAIL; | |
3372 | ||
3373 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
3374 | memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); | |
3375 | ||
3376 | ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV); | |
3377 | ||
3378 | return 0; | |
3379 | } | |
3380 | ||
3381 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
3382 | /* | |
3383 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
3384 | * without having to re-enable interrupts. It's not called while | |
3385 | * the interrupt routine is executing. | |
3386 | */ | |
3387 | static void ixgbe_netpoll(struct net_device *netdev) | |
3388 | { | |
3389 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
3390 | ||
3391 | disable_irq(adapter->pdev->irq); | |
3392 | adapter->flags |= IXGBE_FLAG_IN_NETPOLL; | |
3393 | ixgbe_intr(adapter->pdev->irq, netdev); | |
3394 | adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL; | |
3395 | enable_irq(adapter->pdev->irq); | |
3396 | } | |
3397 | #endif | |
3398 | ||
021230d4 AV |
3399 | /** |
3400 | * ixgbe_napi_add_all - prep napi structs for use | |
3401 | * @adapter: private struct | |
3402 | * helper function to napi_add each possible q_vector->napi | |
3403 | */ | |
3404 | static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter) | |
3405 | { | |
3406 | int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | |
3407 | int (*poll)(struct napi_struct *, int); | |
3408 | ||
3409 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { | |
3410 | poll = &ixgbe_clean_rxonly; | |
3411 | } else { | |
3412 | poll = &ixgbe_poll; | |
3413 | /* only one q_vector for legacy modes */ | |
3414 | q_vectors = 1; | |
3415 | } | |
3416 | ||
3417 | for (i = 0; i < q_vectors; i++) { | |
3418 | struct ixgbe_q_vector *q_vector = &adapter->q_vector[i]; | |
3419 | netif_napi_add(adapter->netdev, &q_vector->napi, | |
3420 | (*poll), 64); | |
3421 | } | |
3422 | } | |
3423 | ||
9a799d71 AK |
3424 | /** |
3425 | * ixgbe_probe - Device Initialization Routine | |
3426 | * @pdev: PCI device information struct | |
3427 | * @ent: entry in ixgbe_pci_tbl | |
3428 | * | |
3429 | * Returns 0 on success, negative on failure | |
3430 | * | |
3431 | * ixgbe_probe initializes an adapter identified by a pci_dev structure. | |
3432 | * The OS initialization, configuring of the adapter private structure, | |
3433 | * and a hardware reset occur. | |
3434 | **/ | |
3435 | static int __devinit ixgbe_probe(struct pci_dev *pdev, | |
3436 | const struct pci_device_id *ent) | |
3437 | { | |
3438 | struct net_device *netdev; | |
3439 | struct ixgbe_adapter *adapter = NULL; | |
3440 | struct ixgbe_hw *hw; | |
3441 | const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data]; | |
3442 | unsigned long mmio_start, mmio_len; | |
3443 | static int cards_found; | |
3444 | int i, err, pci_using_dac; | |
3445 | u16 link_status, link_speed, link_width; | |
3446 | u32 part_num; | |
3447 | ||
3448 | err = pci_enable_device(pdev); | |
3449 | if (err) | |
3450 | return err; | |
3451 | ||
3452 | if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) && | |
3453 | !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) { | |
3454 | pci_using_dac = 1; | |
3455 | } else { | |
3456 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
3457 | if (err) { | |
3458 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
3459 | if (err) { | |
3460 | dev_err(&pdev->dev, "No usable DMA " | |
3461 | "configuration, aborting\n"); | |
3462 | goto err_dma; | |
3463 | } | |
3464 | } | |
3465 | pci_using_dac = 0; | |
3466 | } | |
3467 | ||
3468 | err = pci_request_regions(pdev, ixgbe_driver_name); | |
3469 | if (err) { | |
3470 | dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err); | |
3471 | goto err_pci_reg; | |
3472 | } | |
3473 | ||
3474 | pci_set_master(pdev); | |
fb3b27bc | 3475 | pci_save_state(pdev); |
9a799d71 | 3476 | |
30eba97a | 3477 | netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES); |
9a799d71 AK |
3478 | if (!netdev) { |
3479 | err = -ENOMEM; | |
3480 | goto err_alloc_etherdev; | |
3481 | } | |
3482 | ||
9a799d71 AK |
3483 | SET_NETDEV_DEV(netdev, &pdev->dev); |
3484 | ||
3485 | pci_set_drvdata(pdev, netdev); | |
3486 | adapter = netdev_priv(netdev); | |
3487 | ||
3488 | adapter->netdev = netdev; | |
3489 | adapter->pdev = pdev; | |
3490 | hw = &adapter->hw; | |
3491 | hw->back = adapter; | |
3492 | adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1; | |
3493 | ||
3494 | mmio_start = pci_resource_start(pdev, 0); | |
3495 | mmio_len = pci_resource_len(pdev, 0); | |
3496 | ||
3497 | hw->hw_addr = ioremap(mmio_start, mmio_len); | |
3498 | if (!hw->hw_addr) { | |
3499 | err = -EIO; | |
3500 | goto err_ioremap; | |
3501 | } | |
3502 | ||
3503 | for (i = 1; i <= 5; i++) { | |
3504 | if (pci_resource_len(pdev, i) == 0) | |
3505 | continue; | |
3506 | } | |
3507 | ||
3508 | netdev->open = &ixgbe_open; | |
3509 | netdev->stop = &ixgbe_close; | |
3510 | netdev->hard_start_xmit = &ixgbe_xmit_frame; | |
3511 | netdev->get_stats = &ixgbe_get_stats; | |
3512 | netdev->set_multicast_list = &ixgbe_set_multi; | |
3513 | netdev->set_mac_address = &ixgbe_set_mac; | |
3514 | netdev->change_mtu = &ixgbe_change_mtu; | |
3515 | ixgbe_set_ethtool_ops(netdev); | |
3516 | netdev->tx_timeout = &ixgbe_tx_timeout; | |
3517 | netdev->watchdog_timeo = 5 * HZ; | |
9a799d71 AK |
3518 | netdev->vlan_rx_register = ixgbe_vlan_rx_register; |
3519 | netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid; | |
3520 | netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid; | |
3521 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
3522 | netdev->poll_controller = ixgbe_netpoll; | |
3523 | #endif | |
3524 | strcpy(netdev->name, pci_name(pdev)); | |
3525 | ||
3526 | netdev->mem_start = mmio_start; | |
3527 | netdev->mem_end = mmio_start + mmio_len; | |
3528 | ||
3529 | adapter->bd_number = cards_found; | |
3530 | ||
3531 | /* PCI config space info */ | |
3532 | hw->vendor_id = pdev->vendor; | |
3533 | hw->device_id = pdev->device; | |
3534 | hw->revision_id = pdev->revision; | |
3535 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
3536 | hw->subsystem_device_id = pdev->subsystem_device; | |
3537 | ||
3538 | /* Setup hw api */ | |
3539 | memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops)); | |
021230d4 | 3540 | hw->mac.type = ii->mac; |
9a799d71 AK |
3541 | |
3542 | err = ii->get_invariants(hw); | |
3543 | if (err) | |
3544 | goto err_hw_init; | |
3545 | ||
3546 | /* setup the private structure */ | |
3547 | err = ixgbe_sw_init(adapter); | |
3548 | if (err) | |
3549 | goto err_sw_init; | |
3550 | ||
3551 | netdev->features = NETIF_F_SG | | |
3552 | NETIF_F_HW_CSUM | | |
3553 | NETIF_F_HW_VLAN_TX | | |
3554 | NETIF_F_HW_VLAN_RX | | |
3555 | NETIF_F_HW_VLAN_FILTER; | |
3556 | ||
177db6ff | 3557 | netdev->features |= NETIF_F_LRO; |
9a799d71 | 3558 | netdev->features |= NETIF_F_TSO; |
9a799d71 | 3559 | netdev->features |= NETIF_F_TSO6; |
ad31c402 JK |
3560 | |
3561 | netdev->vlan_features |= NETIF_F_TSO; | |
3562 | netdev->vlan_features |= NETIF_F_TSO6; | |
3563 | netdev->vlan_features |= NETIF_F_HW_CSUM; | |
3564 | netdev->vlan_features |= NETIF_F_SG; | |
3565 | ||
9a799d71 AK |
3566 | if (pci_using_dac) |
3567 | netdev->features |= NETIF_F_HIGHDMA; | |
3568 | ||
9a799d71 AK |
3569 | /* make sure the EEPROM is good */ |
3570 | if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) { | |
3571 | dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n"); | |
3572 | err = -EIO; | |
3573 | goto err_eeprom; | |
3574 | } | |
3575 | ||
3576 | memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len); | |
3577 | memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len); | |
3578 | ||
3579 | if (ixgbe_validate_mac_addr(netdev->dev_addr)) { | |
3580 | err = -EIO; | |
3581 | goto err_eeprom; | |
3582 | } | |
3583 | ||
3584 | init_timer(&adapter->watchdog_timer); | |
3585 | adapter->watchdog_timer.function = &ixgbe_watchdog; | |
3586 | adapter->watchdog_timer.data = (unsigned long)adapter; | |
3587 | ||
3588 | INIT_WORK(&adapter->reset_task, ixgbe_reset_task); | |
3589 | ||
3590 | /* initialize default flow control settings */ | |
3591 | hw->fc.original_type = ixgbe_fc_full; | |
3592 | hw->fc.type = ixgbe_fc_full; | |
3593 | hw->fc.high_water = IXGBE_DEFAULT_FCRTH; | |
3594 | hw->fc.low_water = IXGBE_DEFAULT_FCRTL; | |
3595 | hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE; | |
3596 | ||
021230d4 AV |
3597 | err = ixgbe_init_interrupt_scheme(adapter); |
3598 | if (err) | |
3599 | goto err_sw_init; | |
9a799d71 AK |
3600 | |
3601 | /* print bus type/speed/width info */ | |
3602 | pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status); | |
3603 | link_speed = link_status & IXGBE_PCI_LINK_SPEED; | |
3604 | link_width = link_status & IXGBE_PCI_LINK_WIDTH; | |
3605 | dev_info(&pdev->dev, "(PCI Express:%s:%s) " | |
3606 | "%02x:%02x:%02x:%02x:%02x:%02x\n", | |
3607 | ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" : | |
3608 | (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" : | |
3609 | "Unknown"), | |
3610 | ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" : | |
3611 | (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" : | |
3612 | (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" : | |
3613 | (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" : | |
3614 | "Unknown"), | |
3615 | netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2], | |
3616 | netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]); | |
3617 | ixgbe_read_part_num(hw, &part_num); | |
3618 | dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n", | |
3619 | hw->mac.type, hw->phy.type, | |
3620 | (part_num >> 8), (part_num & 0xff)); | |
3621 | ||
0c254d86 AK |
3622 | if (link_width <= IXGBE_PCI_LINK_WIDTH_4) { |
3623 | dev_warn(&pdev->dev, "PCI-Express bandwidth available for " | |
3624 | "this card is not sufficient for optimal " | |
3625 | "performance.\n"); | |
3626 | dev_warn(&pdev->dev, "For optimal performance a x8 " | |
3627 | "PCI-Express slot is required.\n"); | |
3628 | } | |
3629 | ||
9a799d71 AK |
3630 | /* reset the hardware with the new settings */ |
3631 | ixgbe_start_hw(hw); | |
3632 | ||
3633 | netif_carrier_off(netdev); | |
3634 | netif_stop_queue(netdev); | |
30eba97a AV |
3635 | for (i = 0; i < adapter->num_tx_queues; i++) |
3636 | netif_stop_subqueue(netdev, i); | |
9a799d71 | 3637 | |
021230d4 AV |
3638 | ixgbe_napi_add_all(adapter); |
3639 | ||
9a799d71 AK |
3640 | strcpy(netdev->name, "eth%d"); |
3641 | err = register_netdev(netdev); | |
3642 | if (err) | |
3643 | goto err_register; | |
3644 | ||
bd0362dd | 3645 | #ifdef CONFIG_DCA |
652f093f | 3646 | if (dca_add_requester(&pdev->dev) == 0) { |
bd0362dd JC |
3647 | adapter->flags |= IXGBE_FLAG_DCA_ENABLED; |
3648 | /* always use CB2 mode, difference is masked | |
3649 | * in the CB driver */ | |
3650 | IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2); | |
3651 | ixgbe_setup_dca(adapter); | |
3652 | } | |
3653 | #endif | |
9a799d71 AK |
3654 | |
3655 | dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n"); | |
3656 | cards_found++; | |
3657 | return 0; | |
3658 | ||
3659 | err_register: | |
5eba3699 | 3660 | ixgbe_release_hw_control(adapter); |
9a799d71 AK |
3661 | err_hw_init: |
3662 | err_sw_init: | |
021230d4 | 3663 | ixgbe_reset_interrupt_capability(adapter); |
9a799d71 AK |
3664 | err_eeprom: |
3665 | iounmap(hw->hw_addr); | |
3666 | err_ioremap: | |
3667 | free_netdev(netdev); | |
3668 | err_alloc_etherdev: | |
3669 | pci_release_regions(pdev); | |
3670 | err_pci_reg: | |
3671 | err_dma: | |
3672 | pci_disable_device(pdev); | |
3673 | return err; | |
3674 | } | |
3675 | ||
3676 | /** | |
3677 | * ixgbe_remove - Device Removal Routine | |
3678 | * @pdev: PCI device information struct | |
3679 | * | |
3680 | * ixgbe_remove is called by the PCI subsystem to alert the driver | |
3681 | * that it should release a PCI device. The could be caused by a | |
3682 | * Hot-Plug event, or because the driver is going to be removed from | |
3683 | * memory. | |
3684 | **/ | |
3685 | static void __devexit ixgbe_remove(struct pci_dev *pdev) | |
3686 | { | |
3687 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3688 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
3689 | ||
3690 | set_bit(__IXGBE_DOWN, &adapter->state); | |
3691 | del_timer_sync(&adapter->watchdog_timer); | |
3692 | ||
3693 | flush_scheduled_work(); | |
3694 | ||
bd0362dd JC |
3695 | #ifdef CONFIG_DCA |
3696 | if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { | |
3697 | adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED; | |
3698 | dca_remove_requester(&pdev->dev); | |
3699 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1); | |
3700 | } | |
3701 | ||
3702 | #endif | |
9a799d71 AK |
3703 | unregister_netdev(netdev); |
3704 | ||
021230d4 | 3705 | ixgbe_reset_interrupt_capability(adapter); |
5eba3699 | 3706 | |
021230d4 | 3707 | ixgbe_release_hw_control(adapter); |
9a799d71 AK |
3708 | |
3709 | iounmap(adapter->hw.hw_addr); | |
3710 | pci_release_regions(pdev); | |
3711 | ||
021230d4 AV |
3712 | DPRINTK(PROBE, INFO, "complete\n"); |
3713 | kfree(adapter->tx_ring); | |
3714 | kfree(adapter->rx_ring); | |
3715 | ||
9a799d71 AK |
3716 | free_netdev(netdev); |
3717 | ||
3718 | pci_disable_device(pdev); | |
3719 | } | |
3720 | ||
3721 | /** | |
3722 | * ixgbe_io_error_detected - called when PCI error is detected | |
3723 | * @pdev: Pointer to PCI device | |
3724 | * @state: The current pci connection state | |
3725 | * | |
3726 | * This function is called after a PCI bus error affecting | |
3727 | * this device has been detected. | |
3728 | */ | |
3729 | static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev, | |
3730 | pci_channel_state_t state) | |
3731 | { | |
3732 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3733 | struct ixgbe_adapter *adapter = netdev->priv; | |
3734 | ||
3735 | netif_device_detach(netdev); | |
3736 | ||
3737 | if (netif_running(netdev)) | |
3738 | ixgbe_down(adapter); | |
3739 | pci_disable_device(pdev); | |
3740 | ||
3741 | /* Request a slot slot reset. */ | |
3742 | return PCI_ERS_RESULT_NEED_RESET; | |
3743 | } | |
3744 | ||
3745 | /** | |
3746 | * ixgbe_io_slot_reset - called after the pci bus has been reset. | |
3747 | * @pdev: Pointer to PCI device | |
3748 | * | |
3749 | * Restart the card from scratch, as if from a cold-boot. | |
3750 | */ | |
3751 | static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev) | |
3752 | { | |
3753 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3754 | struct ixgbe_adapter *adapter = netdev->priv; | |
3755 | ||
3756 | if (pci_enable_device(pdev)) { | |
3757 | DPRINTK(PROBE, ERR, | |
3758 | "Cannot re-enable PCI device after reset.\n"); | |
3759 | return PCI_ERS_RESULT_DISCONNECT; | |
3760 | } | |
3761 | pci_set_master(pdev); | |
fb3b27bc | 3762 | pci_restore_state(pdev); |
9a799d71 AK |
3763 | |
3764 | pci_enable_wake(pdev, PCI_D3hot, 0); | |
3765 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
3766 | ||
3767 | ixgbe_reset(adapter); | |
3768 | ||
3769 | return PCI_ERS_RESULT_RECOVERED; | |
3770 | } | |
3771 | ||
3772 | /** | |
3773 | * ixgbe_io_resume - called when traffic can start flowing again. | |
3774 | * @pdev: Pointer to PCI device | |
3775 | * | |
3776 | * This callback is called when the error recovery driver tells us that | |
3777 | * its OK to resume normal operation. | |
3778 | */ | |
3779 | static void ixgbe_io_resume(struct pci_dev *pdev) | |
3780 | { | |
3781 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3782 | struct ixgbe_adapter *adapter = netdev->priv; | |
3783 | ||
3784 | if (netif_running(netdev)) { | |
3785 | if (ixgbe_up(adapter)) { | |
3786 | DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n"); | |
3787 | return; | |
3788 | } | |
3789 | } | |
3790 | ||
3791 | netif_device_attach(netdev); | |
3792 | ||
3793 | } | |
3794 | ||
3795 | static struct pci_error_handlers ixgbe_err_handler = { | |
3796 | .error_detected = ixgbe_io_error_detected, | |
3797 | .slot_reset = ixgbe_io_slot_reset, | |
3798 | .resume = ixgbe_io_resume, | |
3799 | }; | |
3800 | ||
3801 | static struct pci_driver ixgbe_driver = { | |
3802 | .name = ixgbe_driver_name, | |
3803 | .id_table = ixgbe_pci_tbl, | |
3804 | .probe = ixgbe_probe, | |
3805 | .remove = __devexit_p(ixgbe_remove), | |
3806 | #ifdef CONFIG_PM | |
3807 | .suspend = ixgbe_suspend, | |
3808 | .resume = ixgbe_resume, | |
3809 | #endif | |
3810 | .shutdown = ixgbe_shutdown, | |
3811 | .err_handler = &ixgbe_err_handler | |
3812 | }; | |
3813 | ||
3814 | /** | |
3815 | * ixgbe_init_module - Driver Registration Routine | |
3816 | * | |
3817 | * ixgbe_init_module is the first routine called when the driver is | |
3818 | * loaded. All it does is register with the PCI subsystem. | |
3819 | **/ | |
3820 | static int __init ixgbe_init_module(void) | |
3821 | { | |
3822 | int ret; | |
3823 | printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name, | |
3824 | ixgbe_driver_string, ixgbe_driver_version); | |
3825 | ||
3826 | printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright); | |
3827 | ||
bd0362dd JC |
3828 | #ifdef CONFIG_DCA |
3829 | dca_register_notify(&dca_notifier); | |
3830 | ||
3831 | #endif | |
9a799d71 AK |
3832 | ret = pci_register_driver(&ixgbe_driver); |
3833 | return ret; | |
3834 | } | |
3835 | module_init(ixgbe_init_module); | |
3836 | ||
3837 | /** | |
3838 | * ixgbe_exit_module - Driver Exit Cleanup Routine | |
3839 | * | |
3840 | * ixgbe_exit_module is called just before the driver is removed | |
3841 | * from memory. | |
3842 | **/ | |
3843 | static void __exit ixgbe_exit_module(void) | |
3844 | { | |
bd0362dd JC |
3845 | #ifdef CONFIG_DCA |
3846 | dca_unregister_notify(&dca_notifier); | |
3847 | #endif | |
9a799d71 AK |
3848 | pci_unregister_driver(&ixgbe_driver); |
3849 | } | |
bd0362dd JC |
3850 | |
3851 | #ifdef CONFIG_DCA | |
3852 | static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event, | |
3853 | void *p) | |
3854 | { | |
3855 | int ret_val; | |
3856 | ||
3857 | ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event, | |
3858 | __ixgbe_notify_dca); | |
3859 | ||
3860 | return ret_val ? NOTIFY_BAD : NOTIFY_DONE; | |
3861 | } | |
3862 | #endif /* CONFIG_DCA */ | |
3863 | ||
9a799d71 AK |
3864 | module_exit(ixgbe_exit_module); |
3865 | ||
3866 | /* ixgbe_main.c */ |