[RT2x00]: add driver for Ralink wireless hardware
[deliverable/linux.git] / drivers / net / lance.c
CommitLineData
1da177e4
LT
1/* lance.c: An AMD LANCE/PCnet ethernet driver for Linux. */
2/*
3 Written/copyright 1993-1998 by Donald Becker.
4
5 Copyright 1993 United States Government as represented by the
6 Director, National Security Agency.
7 This software may be used and distributed according to the terms
8 of the GNU General Public License, incorporated herein by reference.
9
10 This driver is for the Allied Telesis AT1500 and HP J2405A, and should work
11 with most other LANCE-based bus-master (NE2100/NE2500) ethercards.
12
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
16 Annapolis MD 21403
17
18 Andrey V. Savochkin:
19 - alignment problem with 1.3.* kernel and some minor changes.
20 Thomas Bogendoerfer (tsbogend@bigbug.franken.de):
21 - added support for Linux/Alpha, but removed most of it, because
6aa20a22 22 it worked only for the PCI chip.
1da177e4
LT
23 - added hook for the 32bit lance driver
24 - added PCnetPCI II (79C970A) to chip table
25 Paul Gortmaker (gpg109@rsphy1.anu.edu.au):
26 - hopefully fix above so Linux/Alpha can use ISA cards too.
27 8/20/96 Fixed 7990 autoIRQ failure and reversed unneeded alignment -djb
28 v1.12 10/27/97 Module support -djb
29 v1.14 2/3/98 Module support modified, made PCI support optional -djb
30 v1.15 5/27/99 Fixed bug in the cleanup_module(). dev->priv was freed
31 before unregister_netdev() which caused NULL pointer
32 reference later in the chain (in rtnetlink_fill_ifinfo())
33 -- Mika Kuoppala <miku@iki.fi>
6aa20a22 34
1da177e4
LT
35 Forward ported v1.14 to 2.1.129, merged the PCI and misc changes from
36 the 2.1 version of the old driver - Alan Cox
37
38 Get rid of check_region, check kmalloc return in lance_probe1
39 Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 11/01/2001
40
41 Reworked detection, added support for Racal InterLan EtherBlaster cards
42 Vesselin Kostadinov <vesok at yahoo dot com > - 22/4/2004
43*/
44
d5b20697 45static const char version[] = "lance.c:v1.16 2006/11/09 dplatt@3do.com, becker@cesdis.gsfc.nasa.gov\n";
1da177e4
LT
46
47#include <linux/module.h>
48#include <linux/kernel.h>
49#include <linux/string.h>
50#include <linux/delay.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/slab.h>
54#include <linux/interrupt.h>
55#include <linux/pci.h>
56#include <linux/init.h>
57#include <linux/netdevice.h>
58#include <linux/etherdevice.h>
59#include <linux/skbuff.h>
d7fe0f24 60#include <linux/mm.h>
1da177e4
LT
61#include <linux/bitops.h>
62
63#include <asm/io.h>
64#include <asm/dma.h>
65
66static unsigned int lance_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0};
67static int lance_probe1(struct net_device *dev, int ioaddr, int irq, int options);
68static int __init do_lance_probe(struct net_device *dev);
69
70
71static struct card {
72 char id_offset14;
73 char id_offset15;
74} cards[] = {
75 { //"normal"
76 .id_offset14 = 0x57,
77 .id_offset15 = 0x57,
78 },
79 { //NI6510EB
80 .id_offset14 = 0x52,
81 .id_offset15 = 0x44,
82 },
83 { //Racal InterLan EtherBlaster
84 .id_offset14 = 0x52,
85 .id_offset15 = 0x49,
86 },
87};
88#define NUM_CARDS 3
89
90#ifdef LANCE_DEBUG
91static int lance_debug = LANCE_DEBUG;
92#else
93static int lance_debug = 1;
94#endif
95
96/*
97 Theory of Operation
98
99I. Board Compatibility
100
101This device driver is designed for the AMD 79C960, the "PCnet-ISA
102single-chip ethernet controller for ISA". This chip is used in a wide
103variety of boards from vendors such as Allied Telesis, HP, Kingston,
104and Boca. This driver is also intended to work with older AMD 7990
105designs, such as the NE1500 and NE2100, and newer 79C961. For convenience,
106I use the name LANCE to refer to all of the AMD chips, even though it properly
107refers only to the original 7990.
108
109II. Board-specific settings
110
111The driver is designed to work the boards that use the faster
112bus-master mode, rather than in shared memory mode. (Only older designs
113have on-board buffer memory needed to support the slower shared memory mode.)
114
115Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA
116channel. This driver probes the likely base addresses:
117{0x300, 0x320, 0x340, 0x360}.
118After the board is found it generates a DMA-timeout interrupt and uses
119autoIRQ to find the IRQ line. The DMA channel can be set with the low bits
120of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is
121probed for by enabling each free DMA channel in turn and checking if
122initialization succeeds.
123
124The HP-J2405A board is an exception: with this board it is easy to read the
125EEPROM-set values for the base, IRQ, and DMA. (Of course you must already
126_know_ the base address -- that field is for writing the EEPROM.)
127
128III. Driver operation
129
130IIIa. Ring buffers
131The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes
132the base and length of the data buffer, along with status bits. The length
133of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of
134the buffer length (rather than being directly the buffer length) for
135implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to
136ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries
137needlessly uses extra space and reduces the chance that an upper layer will
138be able to reorder queued Tx packets based on priority. Decreasing the number
139of entries makes it more difficult to achieve back-to-back packet transmission
140and increases the chance that Rx ring will overflow. (Consider the worst case
141of receiving back-to-back minimum-sized packets.)
142
143The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver
144statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to
145avoid the administrative overhead. For the Rx side this avoids dynamically
146allocating full-sized buffers "just in case", at the expense of a
147memory-to-memory data copy for each packet received. For most systems this
148is a good tradeoff: the Rx buffer will always be in low memory, the copy
149is inexpensive, and it primes the cache for later packet processing. For Tx
150the buffers are only used when needed as low-memory bounce buffers.
151
152IIIB. 16M memory limitations.
153For the ISA bus master mode all structures used directly by the LANCE,
154the initialization block, Rx and Tx rings, and data buffers, must be
155accessible from the ISA bus, i.e. in the lower 16M of real memory.
156This is a problem for current Linux kernels on >16M machines. The network
157devices are initialized after memory initialization, and the kernel doles out
158memory from the top of memory downward. The current solution is to have a
159special network initialization routine that's called before memory
160initialization; this will eventually be generalized for all network devices.
161As mentioned before, low-memory "bounce-buffers" are used when needed.
162
163IIIC. Synchronization
164The driver runs as two independent, single-threaded flows of control. One
165is the send-packet routine, which enforces single-threaded use by the
166dev->tbusy flag. The other thread is the interrupt handler, which is single
167threaded by the hardware and other software.
168
169The send packet thread has partial control over the Tx ring and 'dev->tbusy'
170flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
171queue slot is empty, it clears the tbusy flag when finished otherwise it sets
172the 'lp->tx_full' flag.
173
174The interrupt handler has exclusive control over the Rx ring and records stats
175from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so
176we can't avoid the interrupt overhead by having the Tx routine reap the Tx
177stats.) After reaping the stats, it marks the queue entry as empty by setting
178the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the
179tx_full and tbusy flags.
180
181*/
182
183/* Set the number of Tx and Rx buffers, using Log_2(# buffers).
184 Reasonable default values are 16 Tx buffers, and 16 Rx buffers.
185 That translates to 4 and 4 (16 == 2^^4).
186 This is a compile-time option for efficiency.
187 */
188#ifndef LANCE_LOG_TX_BUFFERS
189#define LANCE_LOG_TX_BUFFERS 4
190#define LANCE_LOG_RX_BUFFERS 4
191#endif
192
193#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
194#define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
195#define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
196
197#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
198#define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
199#define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
200
201#define PKT_BUF_SZ 1544
202
203/* Offsets from base I/O address. */
204#define LANCE_DATA 0x10
205#define LANCE_ADDR 0x12
206#define LANCE_RESET 0x14
207#define LANCE_BUS_IF 0x16
208#define LANCE_TOTAL_SIZE 0x18
209
210#define TX_TIMEOUT 20
211
212/* The LANCE Rx and Tx ring descriptors. */
213struct lance_rx_head {
214 s32 base;
215 s16 buf_length; /* This length is 2s complement (negative)! */
216 s16 msg_length; /* This length is "normal". */
217};
218
219struct lance_tx_head {
220 s32 base;
221 s16 length; /* Length is 2s complement (negative)! */
222 s16 misc;
223};
224
225/* The LANCE initialization block, described in databook. */
226struct lance_init_block {
227 u16 mode; /* Pre-set mode (reg. 15) */
228 u8 phys_addr[6]; /* Physical ethernet address */
229 u32 filter[2]; /* Multicast filter (unused). */
230 /* Receive and transmit ring base, along with extra bits. */
231 u32 rx_ring; /* Tx and Rx ring base pointers */
232 u32 tx_ring;
233};
234
235struct lance_private {
236 /* The Tx and Rx ring entries must be aligned on 8-byte boundaries. */
237 struct lance_rx_head rx_ring[RX_RING_SIZE];
238 struct lance_tx_head tx_ring[TX_RING_SIZE];
239 struct lance_init_block init_block;
240 const char *name;
241 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
242 struct sk_buff* tx_skbuff[TX_RING_SIZE];
243 /* The addresses of receive-in-place skbuffs. */
244 struct sk_buff* rx_skbuff[RX_RING_SIZE];
245 unsigned long rx_buffs; /* Address of Rx and Tx buffers. */
246 /* Tx low-memory "bounce buffer" address. */
247 char (*tx_bounce_buffs)[PKT_BUF_SZ];
248 int cur_rx, cur_tx; /* The next free ring entry */
249 int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
250 int dma;
251 struct net_device_stats stats;
252 unsigned char chip_version; /* See lance_chip_type. */
253 spinlock_t devlock;
254};
255
256#define LANCE_MUST_PAD 0x00000001
257#define LANCE_ENABLE_AUTOSELECT 0x00000002
258#define LANCE_MUST_REINIT_RING 0x00000004
259#define LANCE_MUST_UNRESET 0x00000008
260#define LANCE_HAS_MISSED_FRAME 0x00000010
261
262/* A mapping from the chip ID number to the part number and features.
263 These are from the datasheets -- in real life the '970 version
264 reportedly has the same ID as the '965. */
265static struct lance_chip_type {
266 int id_number;
267 const char *name;
268 int flags;
269} chip_table[] = {
270 {0x0000, "LANCE 7990", /* Ancient lance chip. */
271 LANCE_MUST_PAD + LANCE_MUST_UNRESET},
272 {0x0003, "PCnet/ISA 79C960", /* 79C960 PCnet/ISA. */
273 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
274 LANCE_HAS_MISSED_FRAME},
275 {0x2260, "PCnet/ISA+ 79C961", /* 79C961 PCnet/ISA+, Plug-n-Play. */
276 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
277 LANCE_HAS_MISSED_FRAME},
278 {0x2420, "PCnet/PCI 79C970", /* 79C970 or 79C974 PCnet-SCSI, PCI. */
279 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
280 LANCE_HAS_MISSED_FRAME},
281 /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call
282 it the PCnet32. */
283 {0x2430, "PCnet32", /* 79C965 PCnet for VL bus. */
284 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
285 LANCE_HAS_MISSED_FRAME},
286 {0x2621, "PCnet/PCI-II 79C970A", /* 79C970A PCInetPCI II. */
287 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
288 LANCE_HAS_MISSED_FRAME},
289 {0x0, "PCnet (unknown)",
290 LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING +
291 LANCE_HAS_MISSED_FRAME},
292};
293
294enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, PCNET_PCI_II=5, LANCE_UNKNOWN=6};
295
296
297/* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers.
298 Assume yes until we know the memory size. */
299static unsigned char lance_need_isa_bounce_buffers = 1;
300
301static int lance_open(struct net_device *dev);
9e24974d 302static void lance_init_ring(struct net_device *dev, gfp_t mode);
1da177e4
LT
303static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev);
304static int lance_rx(struct net_device *dev);
7d12e780 305static irqreturn_t lance_interrupt(int irq, void *dev_id);
1da177e4
LT
306static int lance_close(struct net_device *dev);
307static struct net_device_stats *lance_get_stats(struct net_device *dev);
308static void set_multicast_list(struct net_device *dev);
309static void lance_tx_timeout (struct net_device *dev);
310
6aa20a22 311
1da177e4 312
1da177e4
LT
313#ifdef MODULE
314#define MAX_CARDS 8 /* Max number of interfaces (cards) per module */
315
316static struct net_device *dev_lance[MAX_CARDS];
317static int io[MAX_CARDS];
318static int dma[MAX_CARDS];
319static int irq[MAX_CARDS];
320
321module_param_array(io, int, NULL, 0);
322module_param_array(dma, int, NULL, 0);
323module_param_array(irq, int, NULL, 0);
324module_param(lance_debug, int, 0);
325MODULE_PARM_DESC(io, "LANCE/PCnet I/O base address(es),required");
326MODULE_PARM_DESC(dma, "LANCE/PCnet ISA DMA channel (ignored for some devices)");
327MODULE_PARM_DESC(irq, "LANCE/PCnet IRQ number (ignored for some devices)");
328MODULE_PARM_DESC(lance_debug, "LANCE/PCnet debug level (0-7)");
329
3805f0e2 330int __init init_module(void)
1da177e4
LT
331{
332 struct net_device *dev;
333 int this_dev, found = 0;
334
335 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
336 if (io[this_dev] == 0) {
337 if (this_dev != 0) /* only complain once */
338 break;
339 printk(KERN_NOTICE "lance.c: Module autoprobing not allowed. Append \"io=0xNNN\" value(s).\n");
340 return -EPERM;
341 }
342 dev = alloc_etherdev(0);
343 if (!dev)
344 break;
345 dev->irq = irq[this_dev];
346 dev->base_addr = io[this_dev];
347 dev->dma = dma[this_dev];
348 if (do_lance_probe(dev) == 0) {
b1fc5505 349 dev_lance[found++] = dev;
350 continue;
1da177e4
LT
351 }
352 free_netdev(dev);
353 break;
354 }
355 if (found != 0)
356 return 0;
357 return -ENXIO;
358}
359
64916f1e
DV
360static void cleanup_card(struct net_device *dev)
361{
362 struct lance_private *lp = dev->priv;
363 if (dev->dma != 4)
364 free_dma(dev->dma);
365 release_region(dev->base_addr, LANCE_TOTAL_SIZE);
366 kfree(lp->tx_bounce_buffs);
367 kfree((void*)lp->rx_buffs);
368 kfree(lp);
369}
370
afc8eb46 371void __exit cleanup_module(void)
1da177e4
LT
372{
373 int this_dev;
374
375 for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) {
376 struct net_device *dev = dev_lance[this_dev];
377 if (dev) {
6aa20a22 378 unregister_netdev(dev);
1da177e4
LT
379 cleanup_card(dev);
380 free_netdev(dev);
381 }
382 }
383}
384#endif /* MODULE */
385MODULE_LICENSE("GPL");
386
387
388/* Starting in v2.1.*, the LANCE/PCnet probe is now similar to the other
389 board probes now that kmalloc() can allocate ISA DMA-able regions.
390 This also allows the LANCE driver to be used as a module.
391 */
392static int __init do_lance_probe(struct net_device *dev)
393{
394 int *port, result;
395
396 if (high_memory <= phys_to_virt(16*1024*1024))
397 lance_need_isa_bounce_buffers = 0;
398
399 for (port = lance_portlist; *port; port++) {
400 int ioaddr = *port;
401 struct resource *r = request_region(ioaddr, LANCE_TOTAL_SIZE,
402 "lance-probe");
403
404 if (r) {
405 /* Detect the card with minimal I/O reads */
406 char offset14 = inb(ioaddr + 14);
407 int card;
408 for (card = 0; card < NUM_CARDS; ++card)
409 if (cards[card].id_offset14 == offset14)
410 break;
411 if (card < NUM_CARDS) {/*yes, the first byte matches*/
412 char offset15 = inb(ioaddr + 15);
413 for (card = 0; card < NUM_CARDS; ++card)
414 if ((cards[card].id_offset14 == offset14) &&
415 (cards[card].id_offset15 == offset15))
416 break;
417 }
418 if (card < NUM_CARDS) { /*Signature OK*/
419 result = lance_probe1(dev, ioaddr, 0, 0);
420 if (!result) {
421 struct lance_private *lp = dev->priv;
422 int ver = lp->chip_version;
423
424 r->name = chip_table[ver].name;
425 return 0;
426 }
427 }
428 release_region(ioaddr, LANCE_TOTAL_SIZE);
429 }
430 }
431 return -ENODEV;
432}
433
434#ifndef MODULE
435struct net_device * __init lance_probe(int unit)
436{
437 struct net_device *dev = alloc_etherdev(0);
438 int err;
439
440 if (!dev)
441 return ERR_PTR(-ENODEV);
442
443 sprintf(dev->name, "eth%d", unit);
444 netdev_boot_setup_check(dev);
445
446 err = do_lance_probe(dev);
447 if (err)
448 goto out;
1da177e4 449 return dev;
1da177e4
LT
450out:
451 free_netdev(dev);
452 return ERR_PTR(err);
453}
454#endif
455
456static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int options)
457{
458 struct lance_private *lp;
459 long dma_channels; /* Mark spuriously-busy DMA channels */
460 int i, reset_val, lance_version;
461 const char *chipname;
462 /* Flags for specific chips or boards. */
463 unsigned char hpJ2405A = 0; /* HP ISA adaptor */
464 int hp_builtin = 0; /* HP on-board ethernet. */
465 static int did_version; /* Already printed version info. */
466 unsigned long flags;
467 int err = -ENOMEM;
c44fec11 468 void __iomem *bios;
1da177e4
LT
469
470 /* First we look for special cases.
471 Check for HP's on-board ethernet by looking for 'HP' in the BIOS.
472 There are two HP versions, check the BIOS for the configuration port.
473 This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com.
474 */
c44fec11
AV
475 bios = ioremap(0xf00f0, 0x14);
476 if (!bios)
477 return -ENOMEM;
478 if (readw(bios + 0x12) == 0x5048) {
1da177e4 479 static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360};
c44fec11 480 int hp_port = (readl(bios + 1) & 1) ? 0x499 : 0x99;
1da177e4
LT
481 /* We can have boards other than the built-in! Verify this is on-board. */
482 if ((inb(hp_port) & 0xc0) == 0x80
483 && ioaddr_table[inb(hp_port) & 3] == ioaddr)
484 hp_builtin = hp_port;
485 }
c44fec11 486 iounmap(bios);
1da177e4
LT
487 /* We also recognize the HP Vectra on-board here, but check below. */
488 hpJ2405A = (inb(ioaddr) == 0x08 && inb(ioaddr+1) == 0x00
489 && inb(ioaddr+2) == 0x09);
490
491 /* Reset the LANCE. */
492 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */
493
494 /* The Un-Reset needed is only needed for the real NE2100, and will
495 confuse the HP board. */
496 if (!hpJ2405A)
497 outw(reset_val, ioaddr+LANCE_RESET);
498
499 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */
500 if (inw(ioaddr+LANCE_DATA) != 0x0004)
501 return -ENODEV;
502
503 /* Get the version of the chip. */
504 outw(88, ioaddr+LANCE_ADDR);
505 if (inw(ioaddr+LANCE_ADDR) != 88) {
506 lance_version = 0;
507 } else { /* Good, it's a newer chip. */
508 int chip_version = inw(ioaddr+LANCE_DATA);
509 outw(89, ioaddr+LANCE_ADDR);
510 chip_version |= inw(ioaddr+LANCE_DATA) << 16;
511 if (lance_debug > 2)
512 printk(" LANCE chip version is %#x.\n", chip_version);
513 if ((chip_version & 0xfff) != 0x003)
514 return -ENODEV;
515 chip_version = (chip_version >> 12) & 0xffff;
516 for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) {
517 if (chip_table[lance_version].id_number == chip_version)
518 break;
519 }
520 }
521
522 /* We can't allocate dev->priv from alloc_etherdev() because it must
523 a ISA DMA-able region. */
1da177e4
LT
524 chipname = chip_table[lance_version].name;
525 printk("%s: %s at %#3x,", dev->name, chipname, ioaddr);
526
527 /* There is a 16 byte station address PROM at the base address.
528 The first six bytes are the station address. */
529 for (i = 0; i < 6; i++)
530 printk(" %2.2x", dev->dev_addr[i] = inb(ioaddr + i));
531
532 dev->base_addr = ioaddr;
533 /* Make certain the data structures used by the LANCE are aligned and DMAble. */
6aa20a22 534
dd00cc48 535 lp = kzalloc(sizeof(*lp), GFP_DMA | GFP_KERNEL);
1da177e4
LT
536 if(lp==NULL)
537 return -ENODEV;
538 if (lance_debug > 6) printk(" (#0x%05lx)", (unsigned long)lp);
1da177e4
LT
539 dev->priv = lp;
540 lp->name = chipname;
541 lp->rx_buffs = (unsigned long)kmalloc(PKT_BUF_SZ*RX_RING_SIZE,
542 GFP_DMA | GFP_KERNEL);
543 if (!lp->rx_buffs)
544 goto out_lp;
545 if (lance_need_isa_bounce_buffers) {
546 lp->tx_bounce_buffs = kmalloc(PKT_BUF_SZ*TX_RING_SIZE,
547 GFP_DMA | GFP_KERNEL);
548 if (!lp->tx_bounce_buffs)
549 goto out_rx;
550 } else
551 lp->tx_bounce_buffs = NULL;
552
553 lp->chip_version = lance_version;
554 spin_lock_init(&lp->devlock);
555
556 lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */
557 for (i = 0; i < 6; i++)
558 lp->init_block.phys_addr[i] = dev->dev_addr[i];
559 lp->init_block.filter[0] = 0x00000000;
560 lp->init_block.filter[1] = 0x00000000;
561 lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
562 lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
563
564 outw(0x0001, ioaddr+LANCE_ADDR);
565 inw(ioaddr+LANCE_ADDR);
566 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
567 outw(0x0002, ioaddr+LANCE_ADDR);
568 inw(ioaddr+LANCE_ADDR);
569 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
570 outw(0x0000, ioaddr+LANCE_ADDR);
571 inw(ioaddr+LANCE_ADDR);
572
573 if (irq) { /* Set iff PCI card. */
574 dev->dma = 4; /* Native bus-master, no DMA channel needed. */
575 dev->irq = irq;
576 } else if (hp_builtin) {
577 static const char dma_tbl[4] = {3, 5, 6, 0};
578 static const char irq_tbl[4] = {3, 4, 5, 9};
579 unsigned char port_val = inb(hp_builtin);
580 dev->dma = dma_tbl[(port_val >> 4) & 3];
581 dev->irq = irq_tbl[(port_val >> 2) & 3];
582 printk(" HP Vectra IRQ %d DMA %d.\n", dev->irq, dev->dma);
583 } else if (hpJ2405A) {
584 static const char dma_tbl[4] = {3, 5, 6, 7};
585 static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15};
586 short reset_val = inw(ioaddr+LANCE_RESET);
587 dev->dma = dma_tbl[(reset_val >> 2) & 3];
588 dev->irq = irq_tbl[(reset_val >> 4) & 7];
589 printk(" HP J2405A IRQ %d DMA %d.\n", dev->irq, dev->dma);
590 } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */
591 short bus_info;
592 outw(8, ioaddr+LANCE_ADDR);
593 bus_info = inw(ioaddr+LANCE_BUS_IF);
594 dev->dma = bus_info & 0x07;
595 dev->irq = (bus_info >> 4) & 0x0F;
596 } else {
597 /* The DMA channel may be passed in PARAM1. */
598 if (dev->mem_start & 0x07)
599 dev->dma = dev->mem_start & 0x07;
600 }
601
602 if (dev->dma == 0) {
603 /* Read the DMA channel status register, so that we can avoid
604 stuck DMA channels in the DMA detection below. */
605 dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) |
606 (inb(DMA2_STAT_REG) & 0xf0);
607 }
608 err = -ENODEV;
609 if (dev->irq >= 2)
610 printk(" assigned IRQ %d", dev->irq);
611 else if (lance_version != 0) { /* 7990 boards need DMA detection first. */
612 unsigned long irq_mask;
613
614 /* To auto-IRQ we enable the initialization-done and DMA error
615 interrupts. For ISA boards we get a DMA error, but VLB and PCI
616 boards will work. */
617 irq_mask = probe_irq_on();
618
619 /* Trigger an initialization just for the interrupt. */
620 outw(0x0041, ioaddr+LANCE_DATA);
621
622 mdelay(20);
623 dev->irq = probe_irq_off(irq_mask);
624 if (dev->irq)
625 printk(", probed IRQ %d", dev->irq);
626 else {
627 printk(", failed to detect IRQ line.\n");
628 goto out_tx;
629 }
630
631 /* Check for the initialization done bit, 0x0100, which means
632 that we don't need a DMA channel. */
633 if (inw(ioaddr+LANCE_DATA) & 0x0100)
634 dev->dma = 4;
635 }
636
637 if (dev->dma == 4) {
638 printk(", no DMA needed.\n");
639 } else if (dev->dma) {
640 if (request_dma(dev->dma, chipname)) {
641 printk("DMA %d allocation failed.\n", dev->dma);
642 goto out_tx;
643 } else
644 printk(", assigned DMA %d.\n", dev->dma);
645 } else { /* OK, we have to auto-DMA. */
646 for (i = 0; i < 4; i++) {
647 static const char dmas[] = { 5, 6, 7, 3 };
648 int dma = dmas[i];
649 int boguscnt;
650
651 /* Don't enable a permanently busy DMA channel, or the machine
652 will hang. */
653 if (test_bit(dma, &dma_channels))
654 continue;
655 outw(0x7f04, ioaddr+LANCE_DATA); /* Clear the memory error bits. */
656 if (request_dma(dma, chipname))
657 continue;
6aa20a22 658
1da177e4
LT
659 flags=claim_dma_lock();
660 set_dma_mode(dma, DMA_MODE_CASCADE);
661 enable_dma(dma);
662 release_dma_lock(flags);
663
664 /* Trigger an initialization. */
665 outw(0x0001, ioaddr+LANCE_DATA);
666 for (boguscnt = 100; boguscnt > 0; --boguscnt)
667 if (inw(ioaddr+LANCE_DATA) & 0x0900)
668 break;
669 if (inw(ioaddr+LANCE_DATA) & 0x0100) {
670 dev->dma = dma;
671 printk(", DMA %d.\n", dev->dma);
672 break;
673 } else {
674 flags=claim_dma_lock();
675 disable_dma(dma);
676 release_dma_lock(flags);
677 free_dma(dma);
678 }
679 }
680 if (i == 4) { /* Failure: bail. */
681 printk("DMA detection failed.\n");
682 goto out_tx;
683 }
684 }
685
686 if (lance_version == 0 && dev->irq == 0) {
687 /* We may auto-IRQ now that we have a DMA channel. */
688 /* Trigger an initialization just for the interrupt. */
689 unsigned long irq_mask;
690
691 irq_mask = probe_irq_on();
692 outw(0x0041, ioaddr+LANCE_DATA);
693
694 mdelay(40);
695 dev->irq = probe_irq_off(irq_mask);
696 if (dev->irq == 0) {
697 printk(" Failed to detect the 7990 IRQ line.\n");
698 goto out_dma;
699 }
700 printk(" Auto-IRQ detected IRQ%d.\n", dev->irq);
701 }
702
703 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
704 /* Turn on auto-select of media (10baseT or BNC) so that the user
705 can watch the LEDs even if the board isn't opened. */
706 outw(0x0002, ioaddr+LANCE_ADDR);
707 /* Don't touch 10base2 power bit. */
708 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
709 }
710
711 if (lance_debug > 0 && did_version++ == 0)
712 printk(version);
713
714 /* The LANCE-specific entries in the device structure. */
715 dev->open = lance_open;
716 dev->hard_start_xmit = lance_start_xmit;
717 dev->stop = lance_close;
718 dev->get_stats = lance_get_stats;
719 dev->set_multicast_list = set_multicast_list;
720 dev->tx_timeout = lance_tx_timeout;
721 dev->watchdog_timeo = TX_TIMEOUT;
722
b1fc5505 723 err = register_netdev(dev);
724 if (err)
725 goto out_dma;
1da177e4
LT
726 return 0;
727out_dma:
728 if (dev->dma != 4)
729 free_dma(dev->dma);
730out_tx:
731 kfree(lp->tx_bounce_buffs);
732out_rx:
733 kfree((void*)lp->rx_buffs);
734out_lp:
735 kfree(lp);
736 return err;
737}
738
6aa20a22 739
1da177e4
LT
740static int
741lance_open(struct net_device *dev)
742{
743 struct lance_private *lp = dev->priv;
744 int ioaddr = dev->base_addr;
745 int i;
746
747 if (dev->irq == 0 ||
748 request_irq(dev->irq, &lance_interrupt, 0, lp->name, dev)) {
749 return -EAGAIN;
750 }
751
752 /* We used to allocate DMA here, but that was silly.
753 DMA lines can't be shared! We now permanently allocate them. */
754
755 /* Reset the LANCE */
756 inw(ioaddr+LANCE_RESET);
757
758 /* The DMA controller is used as a no-operation slave, "cascade mode". */
759 if (dev->dma != 4) {
760 unsigned long flags=claim_dma_lock();
761 enable_dma(dev->dma);
762 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
763 release_dma_lock(flags);
764 }
765
766 /* Un-Reset the LANCE, needed only for the NE2100. */
767 if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET)
768 outw(0, ioaddr+LANCE_RESET);
769
770 if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) {
771 /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */
772 outw(0x0002, ioaddr+LANCE_ADDR);
773 /* Only touch autoselect bit. */
774 outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);
775 }
776
777 if (lance_debug > 1)
778 printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",
779 dev->name, dev->irq, dev->dma,
780 (u32) isa_virt_to_bus(lp->tx_ring),
781 (u32) isa_virt_to_bus(lp->rx_ring),
782 (u32) isa_virt_to_bus(&lp->init_block));
783
784 lance_init_ring(dev, GFP_KERNEL);
785 /* Re-initialize the LANCE, and start it when done. */
786 outw(0x0001, ioaddr+LANCE_ADDR);
787 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA);
788 outw(0x0002, ioaddr+LANCE_ADDR);
789 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA);
790
791 outw(0x0004, ioaddr+LANCE_ADDR);
792 outw(0x0915, ioaddr+LANCE_DATA);
793
794 outw(0x0000, ioaddr+LANCE_ADDR);
795 outw(0x0001, ioaddr+LANCE_DATA);
796
797 netif_start_queue (dev);
798
799 i = 0;
800 while (i++ < 100)
801 if (inw(ioaddr+LANCE_DATA) & 0x0100)
802 break;
6aa20a22 803 /*
1da177e4
LT
804 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton
805 * reports that doing so triggers a bug in the '974.
806 */
807 outw(0x0042, ioaddr+LANCE_DATA);
808
809 if (lance_debug > 2)
810 printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",
811 dev->name, i, (u32) isa_virt_to_bus(&lp->init_block), inw(ioaddr+LANCE_DATA));
812
813 return 0; /* Always succeed */
814}
815
816/* The LANCE has been halted for one reason or another (busmaster memory
817 arbitration error, Tx FIFO underflow, driver stopped it to reconfigure,
818 etc.). Modern LANCE variants always reload their ring-buffer
819 configuration when restarted, so we must reinitialize our ring
820 context before restarting. As part of this reinitialization,
821 find all packets still on the Tx ring and pretend that they had been
822 sent (in effect, drop the packets on the floor) - the higher-level
823 protocols will time out and retransmit. It'd be better to shuffle
824 these skbs to a temp list and then actually re-Tx them after
825 restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com
826*/
827
6aa20a22 828static void
1da177e4
LT
829lance_purge_ring(struct net_device *dev)
830{
831 struct lance_private *lp = dev->priv;
832 int i;
833
834 /* Free all the skbuffs in the Rx and Tx queues. */
835 for (i = 0; i < RX_RING_SIZE; i++) {
836 struct sk_buff *skb = lp->rx_skbuff[i];
837 lp->rx_skbuff[i] = NULL;
838 lp->rx_ring[i].base = 0; /* Not owned by LANCE chip. */
839 if (skb)
840 dev_kfree_skb_any(skb);
841 }
842 for (i = 0; i < TX_RING_SIZE; i++) {
843 if (lp->tx_skbuff[i]) {
844 dev_kfree_skb_any(lp->tx_skbuff[i]);
845 lp->tx_skbuff[i] = NULL;
846 }
847 }
848}
849
850
851/* Initialize the LANCE Rx and Tx rings. */
852static void
9e24974d 853lance_init_ring(struct net_device *dev, gfp_t gfp)
1da177e4
LT
854{
855 struct lance_private *lp = dev->priv;
856 int i;
857
858 lp->cur_rx = lp->cur_tx = 0;
859 lp->dirty_rx = lp->dirty_tx = 0;
860
861 for (i = 0; i < RX_RING_SIZE; i++) {
862 struct sk_buff *skb;
863 void *rx_buff;
864
865 skb = alloc_skb(PKT_BUF_SZ, GFP_DMA | gfp);
866 lp->rx_skbuff[i] = skb;
867 if (skb) {
868 skb->dev = dev;
689be439 869 rx_buff = skb->data;
1da177e4
LT
870 } else
871 rx_buff = kmalloc(PKT_BUF_SZ, GFP_DMA | gfp);
872 if (rx_buff == NULL)
873 lp->rx_ring[i].base = 0;
874 else
875 lp->rx_ring[i].base = (u32)isa_virt_to_bus(rx_buff) | 0x80000000;
876 lp->rx_ring[i].buf_length = -PKT_BUF_SZ;
877 }
878 /* The Tx buffer address is filled in as needed, but we do need to clear
879 the upper ownership bit. */
880 for (i = 0; i < TX_RING_SIZE; i++) {
881 lp->tx_skbuff[i] = NULL;
882 lp->tx_ring[i].base = 0;
883 }
884
885 lp->init_block.mode = 0x0000;
886 for (i = 0; i < 6; i++)
887 lp->init_block.phys_addr[i] = dev->dev_addr[i];
888 lp->init_block.filter[0] = 0x00000000;
889 lp->init_block.filter[1] = 0x00000000;
890 lp->init_block.rx_ring = ((u32)isa_virt_to_bus(lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS;
891 lp->init_block.tx_ring = ((u32)isa_virt_to_bus(lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS;
892}
893
894static void
895lance_restart(struct net_device *dev, unsigned int csr0_bits, int must_reinit)
896{
897 struct lance_private *lp = dev->priv;
898
899 if (must_reinit ||
900 (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) {
901 lance_purge_ring(dev);
902 lance_init_ring(dev, GFP_ATOMIC);
903 }
904 outw(0x0000, dev->base_addr + LANCE_ADDR);
905 outw(csr0_bits, dev->base_addr + LANCE_DATA);
906}
907
908
909static void lance_tx_timeout (struct net_device *dev)
910{
911 struct lance_private *lp = (struct lance_private *) dev->priv;
912 int ioaddr = dev->base_addr;
913
914 outw (0, ioaddr + LANCE_ADDR);
915 printk ("%s: transmit timed out, status %4.4x, resetting.\n",
916 dev->name, inw (ioaddr + LANCE_DATA));
917 outw (0x0004, ioaddr + LANCE_DATA);
918 lp->stats.tx_errors++;
919#ifndef final_version
920 if (lance_debug > 3) {
921 int i;
922 printk (" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.",
923 lp->dirty_tx, lp->cur_tx, netif_queue_stopped(dev) ? " (full)" : "",
924 lp->cur_rx);
925 for (i = 0; i < RX_RING_SIZE; i++)
926 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
927 lp->rx_ring[i].base, -lp->rx_ring[i].buf_length,
928 lp->rx_ring[i].msg_length);
929 for (i = 0; i < TX_RING_SIZE; i++)
930 printk ("%s %08x %04x %04x", i & 0x3 ? "" : "\n ",
931 lp->tx_ring[i].base, -lp->tx_ring[i].length,
932 lp->tx_ring[i].misc);
933 printk ("\n");
934 }
935#endif
936 lance_restart (dev, 0x0043, 1);
937
938 dev->trans_start = jiffies;
939 netif_wake_queue (dev);
940}
941
942
943static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
944{
945 struct lance_private *lp = dev->priv;
946 int ioaddr = dev->base_addr;
947 int entry;
948 unsigned long flags;
949
950 spin_lock_irqsave(&lp->devlock, flags);
951
952 if (lance_debug > 3) {
953 outw(0x0000, ioaddr+LANCE_ADDR);
954 printk("%s: lance_start_xmit() called, csr0 %4.4x.\n", dev->name,
955 inw(ioaddr+LANCE_DATA));
956 outw(0x0000, ioaddr+LANCE_DATA);
957 }
958
959 /* Fill in a Tx ring entry */
960
961 /* Mask to ring buffer boundary. */
962 entry = lp->cur_tx & TX_RING_MOD_MASK;
963
964 /* Caution: the write order is important here, set the base address
965 with the "ownership" bits last. */
966
967 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
968 if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) {
969 if (skb->len < ETH_ZLEN) {
5b057c6b 970 if (skb_padto(skb, ETH_ZLEN))
1da177e4
LT
971 goto out;
972 lp->tx_ring[entry].length = -ETH_ZLEN;
973 }
6aa20a22 974 else
1da177e4
LT
975 lp->tx_ring[entry].length = -skb->len;
976 } else
977 lp->tx_ring[entry].length = -skb->len;
978
979 lp->tx_ring[entry].misc = 0x0000;
980
981 lp->stats.tx_bytes += skb->len;
982
983 /* If any part of this buffer is >16M we must copy it to a low-memory
984 buffer. */
985 if ((u32)isa_virt_to_bus(skb->data) + skb->len > 0x01000000) {
986 if (lance_debug > 5)
987 printk("%s: bouncing a high-memory packet (%#x).\n",
988 dev->name, (u32)isa_virt_to_bus(skb->data));
d626f62b 989 skb_copy_from_linear_data(skb, &lp->tx_bounce_buffs[entry], skb->len);
1da177e4
LT
990 lp->tx_ring[entry].base =
991 ((u32)isa_virt_to_bus((lp->tx_bounce_buffs + entry)) & 0xffffff) | 0x83000000;
992 dev_kfree_skb(skb);
993 } else {
994 lp->tx_skbuff[entry] = skb;
995 lp->tx_ring[entry].base = ((u32)isa_virt_to_bus(skb->data) & 0xffffff) | 0x83000000;
996 }
997 lp->cur_tx++;
998
999 /* Trigger an immediate send poll. */
1000 outw(0x0000, ioaddr+LANCE_ADDR);
1001 outw(0x0048, ioaddr+LANCE_DATA);
1002
1003 dev->trans_start = jiffies;
1004
1005 if ((lp->cur_tx - lp->dirty_tx) >= TX_RING_SIZE)
1006 netif_stop_queue(dev);
1007
1008out:
1009 spin_unlock_irqrestore(&lp->devlock, flags);
1010 return 0;
1011}
1012
1013/* The LANCE interrupt handler. */
7d12e780 1014static irqreturn_t lance_interrupt(int irq, void *dev_id)
1da177e4
LT
1015{
1016 struct net_device *dev = dev_id;
1017 struct lance_private *lp;
1018 int csr0, ioaddr, boguscnt=10;
1019 int must_restart;
1020
1da177e4
LT
1021 ioaddr = dev->base_addr;
1022 lp = dev->priv;
6aa20a22 1023
1da177e4
LT
1024 spin_lock (&lp->devlock);
1025
1026 outw(0x00, dev->base_addr + LANCE_ADDR);
1027 while ((csr0 = inw(dev->base_addr + LANCE_DATA)) & 0x8600
1028 && --boguscnt >= 0) {
1029 /* Acknowledge all of the current interrupt sources ASAP. */
1030 outw(csr0 & ~0x004f, dev->base_addr + LANCE_DATA);
1031
1032 must_restart = 0;
1033
1034 if (lance_debug > 5)
1035 printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n",
1036 dev->name, csr0, inw(dev->base_addr + LANCE_DATA));
1037
1038 if (csr0 & 0x0400) /* Rx interrupt */
1039 lance_rx(dev);
1040
1041 if (csr0 & 0x0200) { /* Tx-done interrupt */
1042 int dirty_tx = lp->dirty_tx;
1043
1044 while (dirty_tx < lp->cur_tx) {
1045 int entry = dirty_tx & TX_RING_MOD_MASK;
1046 int status = lp->tx_ring[entry].base;
6aa20a22 1047
1da177e4
LT
1048 if (status < 0)
1049 break; /* It still hasn't been Txed */
1050
1051 lp->tx_ring[entry].base = 0;
1052
1053 if (status & 0x40000000) {
1054 /* There was an major error, log it. */
1055 int err_status = lp->tx_ring[entry].misc;
1056 lp->stats.tx_errors++;
1057 if (err_status & 0x0400) lp->stats.tx_aborted_errors++;
1058 if (err_status & 0x0800) lp->stats.tx_carrier_errors++;
1059 if (err_status & 0x1000) lp->stats.tx_window_errors++;
1060 if (err_status & 0x4000) {
1061 /* Ackk! On FIFO errors the Tx unit is turned off! */
1062 lp->stats.tx_fifo_errors++;
1063 /* Remove this verbosity later! */
1064 printk("%s: Tx FIFO error! Status %4.4x.\n",
1065 dev->name, csr0);
1066 /* Restart the chip. */
1067 must_restart = 1;
1068 }
1069 } else {
1070 if (status & 0x18000000)
1071 lp->stats.collisions++;
1072 lp->stats.tx_packets++;
1073 }
1074
1075 /* We must free the original skb if it's not a data-only copy
1076 in the bounce buffer. */
1077 if (lp->tx_skbuff[entry]) {
1078 dev_kfree_skb_irq(lp->tx_skbuff[entry]);
1079 lp->tx_skbuff[entry] = NULL;
1080 }
1081 dirty_tx++;
1082 }
1083
1084#ifndef final_version
1085 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
1086 printk("out-of-sync dirty pointer, %d vs. %d, full=%s.\n",
1087 dirty_tx, lp->cur_tx,
1088 netif_queue_stopped(dev) ? "yes" : "no");
1089 dirty_tx += TX_RING_SIZE;
1090 }
1091#endif
1092
1093 /* if the ring is no longer full, accept more packets */
1094 if (netif_queue_stopped(dev) &&
1095 dirty_tx > lp->cur_tx - TX_RING_SIZE + 2)
1096 netif_wake_queue (dev);
1097
1098 lp->dirty_tx = dirty_tx;
1099 }
1100
1101 /* Log misc errors. */
1102 if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */
1103 if (csr0 & 0x1000) lp->stats.rx_errors++; /* Missed a Rx frame. */
1104 if (csr0 & 0x0800) {
1105 printk("%s: Bus master arbitration failure, status %4.4x.\n",
1106 dev->name, csr0);
1107 /* Restart the chip. */
1108 must_restart = 1;
1109 }
1110
1111 if (must_restart) {
1112 /* stop the chip to clear the error condition, then restart */
1113 outw(0x0000, dev->base_addr + LANCE_ADDR);
1114 outw(0x0004, dev->base_addr + LANCE_DATA);
1115 lance_restart(dev, 0x0002, 0);
1116 }
1117 }
1118
1119 /* Clear any other interrupt, and set interrupt enable. */
1120 outw(0x0000, dev->base_addr + LANCE_ADDR);
1121 outw(0x7940, dev->base_addr + LANCE_DATA);
1122
1123 if (lance_debug > 4)
1124 printk("%s: exiting interrupt, csr%d=%#4.4x.\n",
1125 dev->name, inw(ioaddr + LANCE_ADDR),
1126 inw(dev->base_addr + LANCE_DATA));
1127
1128 spin_unlock (&lp->devlock);
1129 return IRQ_HANDLED;
1130}
1131
1132static int
1133lance_rx(struct net_device *dev)
1134{
1135 struct lance_private *lp = dev->priv;
1136 int entry = lp->cur_rx & RX_RING_MOD_MASK;
1137 int i;
6aa20a22 1138
1da177e4
LT
1139 /* If we own the next entry, it's a new packet. Send it up. */
1140 while (lp->rx_ring[entry].base >= 0) {
1141 int status = lp->rx_ring[entry].base >> 24;
1142
1143 if (status != 0x03) { /* There was an error. */
1144 /* There is a tricky error noted by John Murphy,
1145 <murf@perftech.com> to Russ Nelson: Even with full-sized
1146 buffers it's possible for a jabber packet to use two
1147 buffers, with only the last correctly noting the error. */
1148 if (status & 0x01) /* Only count a general error at the */
1149 lp->stats.rx_errors++; /* end of a packet.*/
1150 if (status & 0x20) lp->stats.rx_frame_errors++;
1151 if (status & 0x10) lp->stats.rx_over_errors++;
1152 if (status & 0x08) lp->stats.rx_crc_errors++;
1153 if (status & 0x04) lp->stats.rx_fifo_errors++;
1154 lp->rx_ring[entry].base &= 0x03ffffff;
1155 }
6aa20a22 1156 else
1da177e4
LT
1157 {
1158 /* Malloc up new buffer, compatible with net3. */
1159 short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4;
1160 struct sk_buff *skb;
6aa20a22 1161
1da177e4
LT
1162 if(pkt_len<60)
1163 {
1164 printk("%s: Runt packet!\n",dev->name);
1165 lp->stats.rx_errors++;
1166 }
1167 else
1168 {
1169 skb = dev_alloc_skb(pkt_len+2);
6aa20a22 1170 if (skb == NULL)
1da177e4
LT
1171 {
1172 printk("%s: Memory squeeze, deferring packet.\n", dev->name);
1173 for (i=0; i < RX_RING_SIZE; i++)
1174 if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0)
1175 break;
1176
6aa20a22 1177 if (i > RX_RING_SIZE -2)
1da177e4
LT
1178 {
1179 lp->stats.rx_dropped++;
1180 lp->rx_ring[entry].base |= 0x80000000;
1181 lp->cur_rx++;
1182 }
1183 break;
1184 }
1da177e4
LT
1185 skb_reserve(skb,2); /* 16 byte align */
1186 skb_put(skb,pkt_len); /* Make room */
8c7b7faa 1187 skb_copy_to_linear_data(skb,
1da177e4 1188 (unsigned char *)isa_bus_to_virt((lp->rx_ring[entry].base & 0x00ffffff)),
8c7b7faa 1189 pkt_len);
1da177e4
LT
1190 skb->protocol=eth_type_trans(skb,dev);
1191 netif_rx(skb);
1192 dev->last_rx = jiffies;
1193 lp->stats.rx_packets++;
1194 lp->stats.rx_bytes+=pkt_len;
1195 }
1196 }
1197 /* The docs say that the buffer length isn't touched, but Andrew Boyd
1198 of QNX reports that some revs of the 79C965 clear it. */
1199 lp->rx_ring[entry].buf_length = -PKT_BUF_SZ;
1200 lp->rx_ring[entry].base |= 0x80000000;
1201 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1202 }
1203
1204 /* We should check that at least two ring entries are free. If not,
1205 we should free one and mark stats->rx_dropped++. */
1206
1207 return 0;
1208}
1209
1210static int
1211lance_close(struct net_device *dev)
1212{
1213 int ioaddr = dev->base_addr;
1214 struct lance_private *lp = dev->priv;
1215
1216 netif_stop_queue (dev);
1217
1218 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1219 outw(112, ioaddr+LANCE_ADDR);
1220 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1221 }
1222 outw(0, ioaddr+LANCE_ADDR);
1223
1224 if (lance_debug > 1)
1225 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1226 dev->name, inw(ioaddr+LANCE_DATA));
1227
1228 /* We stop the LANCE here -- it occasionally polls
1229 memory if we don't. */
1230 outw(0x0004, ioaddr+LANCE_DATA);
1231
1232 if (dev->dma != 4)
1233 {
1234 unsigned long flags=claim_dma_lock();
1235 disable_dma(dev->dma);
1236 release_dma_lock(flags);
1237 }
1238 free_irq(dev->irq, dev);
1239
1240 lance_purge_ring(dev);
1241
1242 return 0;
1243}
1244
1245static struct net_device_stats *lance_get_stats(struct net_device *dev)
1246{
1247 struct lance_private *lp = dev->priv;
1248
1249 if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) {
1250 short ioaddr = dev->base_addr;
1251 short saved_addr;
1252 unsigned long flags;
1253
1254 spin_lock_irqsave(&lp->devlock, flags);
1255 saved_addr = inw(ioaddr+LANCE_ADDR);
1256 outw(112, ioaddr+LANCE_ADDR);
1257 lp->stats.rx_missed_errors = inw(ioaddr+LANCE_DATA);
1258 outw(saved_addr, ioaddr+LANCE_ADDR);
1259 spin_unlock_irqrestore(&lp->devlock, flags);
1260 }
1261
1262 return &lp->stats;
1263}
1264
1265/* Set or clear the multicast filter for this adaptor.
1266 */
1267
1268static void set_multicast_list(struct net_device *dev)
1269{
1270 short ioaddr = dev->base_addr;
1271
1272 outw(0, ioaddr+LANCE_ADDR);
1273 outw(0x0004, ioaddr+LANCE_DATA); /* Temporarily stop the lance. */
1274
1275 if (dev->flags&IFF_PROMISC) {
1da177e4
LT
1276 outw(15, ioaddr+LANCE_ADDR);
1277 outw(0x8000, ioaddr+LANCE_DATA); /* Set promiscuous mode */
1278 } else {
1279 short multicast_table[4];
1280 int i;
1281 int num_addrs=dev->mc_count;
1282 if(dev->flags&IFF_ALLMULTI)
1283 num_addrs=1;
1284 /* FIXIT: We don't use the multicast table, but rely on upper-layer filtering. */
1285 memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table));
1286 for (i = 0; i < 4; i++) {
1287 outw(8 + i, ioaddr+LANCE_ADDR);
1288 outw(multicast_table[i], ioaddr+LANCE_DATA);
1289 }
1290 outw(15, ioaddr+LANCE_ADDR);
1291 outw(0x0000, ioaddr+LANCE_DATA); /* Unset promiscuous mode */
1292 }
1293
1294 lance_restart(dev, 0x0142, 0); /* Resume normal operation */
1295
1296}
1297
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