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c27a02cd YP |
1 | /* |
2 | * Copyright (c) 2007 Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/etherdevice.h> | |
35 | #include <linux/tcp.h> | |
36 | #include <linux/if_vlan.h> | |
37 | #include <linux/delay.h> | |
38 | ||
39 | #include <linux/mlx4/driver.h> | |
40 | #include <linux/mlx4/device.h> | |
41 | #include <linux/mlx4/cmd.h> | |
42 | #include <linux/mlx4/cq.h> | |
43 | ||
44 | #include "mlx4_en.h" | |
45 | #include "en_port.h" | |
46 | ||
47 | ||
48 | static void mlx4_en_vlan_rx_register(struct net_device *dev, struct vlan_group *grp) | |
49 | { | |
50 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
51 | struct mlx4_en_dev *mdev = priv->mdev; | |
52 | int err; | |
53 | ||
453a6082 | 54 | en_dbg(HW, priv, "Registering VLAN group:%p\n", grp); |
c27a02cd YP |
55 | priv->vlgrp = grp; |
56 | ||
57 | mutex_lock(&mdev->state_lock); | |
58 | if (mdev->device_up && priv->port_up) { | |
59 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, grp); | |
60 | if (err) | |
453a6082 | 61 | en_err(priv, "Failed configuring VLAN filter\n"); |
c27a02cd YP |
62 | } |
63 | mutex_unlock(&mdev->state_lock); | |
64 | } | |
65 | ||
66 | static void mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid) | |
67 | { | |
68 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
69 | struct mlx4_en_dev *mdev = priv->mdev; | |
70 | int err; | |
71 | ||
72 | if (!priv->vlgrp) | |
73 | return; | |
74 | ||
453a6082 YP |
75 | en_dbg(HW, priv, "adding VLAN:%d (vlgrp entry:%p)\n", |
76 | vid, vlan_group_get_device(priv->vlgrp, vid)); | |
c27a02cd YP |
77 | |
78 | /* Add VID to port VLAN filter */ | |
79 | mutex_lock(&mdev->state_lock); | |
80 | if (mdev->device_up && priv->port_up) { | |
81 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp); | |
82 | if (err) | |
453a6082 | 83 | en_err(priv, "Failed configuring VLAN filter\n"); |
c27a02cd YP |
84 | } |
85 | mutex_unlock(&mdev->state_lock); | |
86 | } | |
87 | ||
88 | static void mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) | |
89 | { | |
90 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
91 | struct mlx4_en_dev *mdev = priv->mdev; | |
92 | int err; | |
93 | ||
94 | if (!priv->vlgrp) | |
95 | return; | |
96 | ||
453a6082 YP |
97 | en_dbg(HW, priv, "Killing VID:%d (vlgrp:%p vlgrp entry:%p)\n", |
98 | vid, priv->vlgrp, vlan_group_get_device(priv->vlgrp, vid)); | |
c27a02cd YP |
99 | vlan_group_set_device(priv->vlgrp, vid, NULL); |
100 | ||
101 | /* Remove VID from port VLAN filter */ | |
102 | mutex_lock(&mdev->state_lock); | |
103 | if (mdev->device_up && priv->port_up) { | |
104 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp); | |
105 | if (err) | |
453a6082 | 106 | en_err(priv, "Failed configuring VLAN filter\n"); |
c27a02cd YP |
107 | } |
108 | mutex_unlock(&mdev->state_lock); | |
109 | } | |
110 | ||
111 | static u64 mlx4_en_mac_to_u64(u8 *addr) | |
112 | { | |
113 | u64 mac = 0; | |
114 | int i; | |
115 | ||
116 | for (i = 0; i < ETH_ALEN; i++) { | |
117 | mac <<= 8; | |
118 | mac |= addr[i]; | |
119 | } | |
120 | return mac; | |
121 | } | |
122 | ||
123 | static int mlx4_en_set_mac(struct net_device *dev, void *addr) | |
124 | { | |
125 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
126 | struct mlx4_en_dev *mdev = priv->mdev; | |
127 | struct sockaddr *saddr = addr; | |
128 | ||
129 | if (!is_valid_ether_addr(saddr->sa_data)) | |
130 | return -EADDRNOTAVAIL; | |
131 | ||
132 | memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); | |
133 | priv->mac = mlx4_en_mac_to_u64(dev->dev_addr); | |
134 | queue_work(mdev->workqueue, &priv->mac_task); | |
135 | return 0; | |
136 | } | |
137 | ||
138 | static void mlx4_en_do_set_mac(struct work_struct *work) | |
139 | { | |
140 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
141 | mac_task); | |
142 | struct mlx4_en_dev *mdev = priv->mdev; | |
143 | int err = 0; | |
144 | ||
145 | mutex_lock(&mdev->state_lock); | |
146 | if (priv->port_up) { | |
147 | /* Remove old MAC and insert the new one */ | |
148 | mlx4_unregister_mac(mdev->dev, priv->port, priv->mac_index); | |
149 | err = mlx4_register_mac(mdev->dev, priv->port, | |
150 | priv->mac, &priv->mac_index); | |
151 | if (err) | |
453a6082 | 152 | en_err(priv, "Failed changing HW MAC address\n"); |
c27a02cd | 153 | } else |
453a6082 YP |
154 | en_dbg(HW, priv, "Port is down while " |
155 | "registering mac, exiting...\n"); | |
c27a02cd YP |
156 | |
157 | mutex_unlock(&mdev->state_lock); | |
158 | } | |
159 | ||
160 | static void mlx4_en_clear_list(struct net_device *dev) | |
161 | { | |
162 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
163 | struct dev_mc_list *plist = priv->mc_list; | |
164 | struct dev_mc_list *next; | |
165 | ||
166 | while (plist) { | |
167 | next = plist->next; | |
168 | kfree(plist); | |
169 | plist = next; | |
170 | } | |
171 | priv->mc_list = NULL; | |
172 | } | |
173 | ||
174 | static void mlx4_en_cache_mclist(struct net_device *dev) | |
175 | { | |
176 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
c27a02cd YP |
177 | struct dev_mc_list *mclist; |
178 | struct dev_mc_list *tmp; | |
179 | struct dev_mc_list *plist = NULL; | |
180 | ||
181 | for (mclist = dev->mc_list; mclist; mclist = mclist->next) { | |
182 | tmp = kmalloc(sizeof(struct dev_mc_list), GFP_ATOMIC); | |
183 | if (!tmp) { | |
453a6082 | 184 | en_err(priv, "failed to allocate multicast list\n"); |
c27a02cd YP |
185 | mlx4_en_clear_list(dev); |
186 | return; | |
187 | } | |
188 | memcpy(tmp, mclist, sizeof(struct dev_mc_list)); | |
189 | tmp->next = NULL; | |
190 | if (plist) | |
191 | plist->next = tmp; | |
192 | else | |
193 | priv->mc_list = tmp; | |
194 | plist = tmp; | |
195 | } | |
196 | } | |
197 | ||
198 | ||
199 | static void mlx4_en_set_multicast(struct net_device *dev) | |
200 | { | |
201 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
202 | ||
203 | if (!priv->port_up) | |
204 | return; | |
205 | ||
206 | queue_work(priv->mdev->workqueue, &priv->mcast_task); | |
207 | } | |
208 | ||
209 | static void mlx4_en_do_set_multicast(struct work_struct *work) | |
210 | { | |
211 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
212 | mcast_task); | |
213 | struct mlx4_en_dev *mdev = priv->mdev; | |
214 | struct net_device *dev = priv->dev; | |
215 | struct dev_mc_list *mclist; | |
216 | u64 mcast_addr = 0; | |
217 | int err; | |
218 | ||
219 | mutex_lock(&mdev->state_lock); | |
220 | if (!mdev->device_up) { | |
453a6082 YP |
221 | en_dbg(HW, priv, "Card is not up, " |
222 | "ignoring multicast change.\n"); | |
c27a02cd YP |
223 | goto out; |
224 | } | |
225 | if (!priv->port_up) { | |
453a6082 YP |
226 | en_dbg(HW, priv, "Port is down, " |
227 | "ignoring multicast change.\n"); | |
c27a02cd YP |
228 | goto out; |
229 | } | |
230 | ||
231 | /* | |
232 | * Promsicuous mode: disable all filters | |
233 | */ | |
234 | ||
235 | if (dev->flags & IFF_PROMISC) { | |
236 | if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { | |
237 | if (netif_msg_rx_status(priv)) | |
453a6082 | 238 | en_warn(priv, "Entering promiscuous mode\n"); |
c27a02cd YP |
239 | priv->flags |= MLX4_EN_FLAG_PROMISC; |
240 | ||
241 | /* Enable promiscouos mode */ | |
242 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, | |
243 | priv->base_qpn, 1); | |
244 | if (err) | |
453a6082 YP |
245 | en_err(priv, "Failed enabling " |
246 | "promiscous mode\n"); | |
c27a02cd YP |
247 | |
248 | /* Disable port multicast filter (unconditionally) */ | |
249 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
250 | 0, MLX4_MCAST_DISABLE); | |
251 | if (err) | |
453a6082 YP |
252 | en_err(priv, "Failed disabling " |
253 | "multicast filter\n"); | |
c27a02cd YP |
254 | |
255 | /* Disable port VLAN filter */ | |
256 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, NULL); | |
257 | if (err) | |
453a6082 | 258 | en_err(priv, "Failed disabling VLAN filter\n"); |
c27a02cd YP |
259 | } |
260 | goto out; | |
261 | } | |
262 | ||
263 | /* | |
264 | * Not in promiscous mode | |
265 | */ | |
266 | ||
267 | if (priv->flags & MLX4_EN_FLAG_PROMISC) { | |
268 | if (netif_msg_rx_status(priv)) | |
453a6082 | 269 | en_warn(priv, "Leaving promiscuous mode\n"); |
c27a02cd YP |
270 | priv->flags &= ~MLX4_EN_FLAG_PROMISC; |
271 | ||
272 | /* Disable promiscouos mode */ | |
273 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, | |
274 | priv->base_qpn, 0); | |
275 | if (err) | |
453a6082 | 276 | en_err(priv, "Failed disabling promiscous mode\n"); |
c27a02cd YP |
277 | |
278 | /* Enable port VLAN filter */ | |
279 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv->port, priv->vlgrp); | |
280 | if (err) | |
453a6082 | 281 | en_err(priv, "Failed enabling VLAN filter\n"); |
c27a02cd YP |
282 | } |
283 | ||
284 | /* Enable/disable the multicast filter according to IFF_ALLMULTI */ | |
285 | if (dev->flags & IFF_ALLMULTI) { | |
286 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
287 | 0, MLX4_MCAST_DISABLE); | |
288 | if (err) | |
453a6082 | 289 | en_err(priv, "Failed disabling multicast filter\n"); |
c27a02cd YP |
290 | } else { |
291 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
292 | 0, MLX4_MCAST_DISABLE); | |
293 | if (err) | |
453a6082 | 294 | en_err(priv, "Failed disabling multicast filter\n"); |
c27a02cd YP |
295 | |
296 | /* Flush mcast filter and init it with broadcast address */ | |
297 | mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, | |
298 | 1, MLX4_MCAST_CONFIG); | |
299 | ||
300 | /* Update multicast list - we cache all addresses so they won't | |
301 | * change while HW is updated holding the command semaphor */ | |
302 | netif_tx_lock_bh(dev); | |
303 | mlx4_en_cache_mclist(dev); | |
304 | netif_tx_unlock_bh(dev); | |
305 | for (mclist = priv->mc_list; mclist; mclist = mclist->next) { | |
306 | mcast_addr = mlx4_en_mac_to_u64(mclist->dmi_addr); | |
307 | mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, | |
308 | mcast_addr, 0, MLX4_MCAST_CONFIG); | |
309 | } | |
310 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
311 | 0, MLX4_MCAST_ENABLE); | |
312 | if (err) | |
453a6082 | 313 | en_err(priv, "Failed enabling multicast filter\n"); |
c27a02cd YP |
314 | |
315 | mlx4_en_clear_list(dev); | |
316 | } | |
317 | out: | |
318 | mutex_unlock(&mdev->state_lock); | |
319 | } | |
320 | ||
321 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
322 | static void mlx4_en_netpoll(struct net_device *dev) | |
323 | { | |
324 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
325 | struct mlx4_en_cq *cq; | |
326 | unsigned long flags; | |
327 | int i; | |
328 | ||
329 | for (i = 0; i < priv->rx_ring_num; i++) { | |
330 | cq = &priv->rx_cq[i]; | |
331 | spin_lock_irqsave(&cq->lock, flags); | |
332 | napi_synchronize(&cq->napi); | |
333 | mlx4_en_process_rx_cq(dev, cq, 0); | |
334 | spin_unlock_irqrestore(&cq->lock, flags); | |
335 | } | |
336 | } | |
337 | #endif | |
338 | ||
339 | static void mlx4_en_tx_timeout(struct net_device *dev) | |
340 | { | |
341 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
342 | struct mlx4_en_dev *mdev = priv->mdev; | |
343 | ||
344 | if (netif_msg_timer(priv)) | |
453a6082 | 345 | en_warn(priv, "Tx timeout called on port:%d\n", priv->port); |
c27a02cd | 346 | |
1e338db5 | 347 | priv->port_stats.tx_timeout++; |
453a6082 | 348 | en_dbg(DRV, priv, "Scheduling watchdog\n"); |
1e338db5 | 349 | queue_work(mdev->workqueue, &priv->watchdog_task); |
c27a02cd YP |
350 | } |
351 | ||
352 | ||
353 | static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev) | |
354 | { | |
355 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
356 | ||
357 | spin_lock_bh(&priv->stats_lock); | |
358 | memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats)); | |
359 | spin_unlock_bh(&priv->stats_lock); | |
360 | ||
361 | return &priv->ret_stats; | |
362 | } | |
363 | ||
364 | static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) | |
365 | { | |
c27a02cd YP |
366 | struct mlx4_en_cq *cq; |
367 | int i; | |
368 | ||
369 | /* If we haven't received a specific coalescing setting | |
98a1708d | 370 | * (module param), we set the moderation parameters as follows: |
c27a02cd YP |
371 | * - moder_cnt is set to the number of mtu sized packets to |
372 | * satisfy our coelsing target. | |
373 | * - moder_time is set to a fixed value. | |
374 | */ | |
3db36fb2 | 375 | priv->rx_frames = MLX4_EN_RX_COAL_TARGET; |
60b9f9e5 | 376 | priv->rx_usecs = MLX4_EN_RX_COAL_TIME; |
453a6082 YP |
377 | en_dbg(INTR, priv, "Default coalesing params for mtu:%d - " |
378 | "rx_frames:%d rx_usecs:%d\n", | |
c27a02cd YP |
379 | priv->dev->mtu, priv->rx_frames, priv->rx_usecs); |
380 | ||
381 | /* Setup cq moderation params */ | |
382 | for (i = 0; i < priv->rx_ring_num; i++) { | |
383 | cq = &priv->rx_cq[i]; | |
384 | cq->moder_cnt = priv->rx_frames; | |
385 | cq->moder_time = priv->rx_usecs; | |
386 | } | |
387 | ||
388 | for (i = 0; i < priv->tx_ring_num; i++) { | |
389 | cq = &priv->tx_cq[i]; | |
390 | cq->moder_cnt = MLX4_EN_TX_COAL_PKTS; | |
391 | cq->moder_time = MLX4_EN_TX_COAL_TIME; | |
392 | } | |
393 | ||
394 | /* Reset auto-moderation params */ | |
395 | priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; | |
396 | priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; | |
397 | priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; | |
398 | priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; | |
399 | priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; | |
60b9f9e5 | 400 | priv->adaptive_rx_coal = 1; |
c27a02cd YP |
401 | priv->last_moder_time = MLX4_EN_AUTO_CONF; |
402 | priv->last_moder_jiffies = 0; | |
403 | priv->last_moder_packets = 0; | |
404 | priv->last_moder_tx_packets = 0; | |
405 | priv->last_moder_bytes = 0; | |
406 | } | |
407 | ||
408 | static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) | |
409 | { | |
410 | unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); | |
c27a02cd YP |
411 | struct mlx4_en_cq *cq; |
412 | unsigned long packets; | |
413 | unsigned long rate; | |
414 | unsigned long avg_pkt_size; | |
415 | unsigned long rx_packets; | |
416 | unsigned long rx_bytes; | |
a35ee541 | 417 | unsigned long rx_byte_diff; |
c27a02cd YP |
418 | unsigned long tx_packets; |
419 | unsigned long tx_pkt_diff; | |
420 | unsigned long rx_pkt_diff; | |
421 | int moder_time; | |
422 | int i, err; | |
423 | ||
424 | if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) | |
425 | return; | |
426 | ||
427 | spin_lock_bh(&priv->stats_lock); | |
428 | rx_packets = priv->stats.rx_packets; | |
429 | rx_bytes = priv->stats.rx_bytes; | |
430 | tx_packets = priv->stats.tx_packets; | |
431 | spin_unlock_bh(&priv->stats_lock); | |
432 | ||
433 | if (!priv->last_moder_jiffies || !period) | |
434 | goto out; | |
435 | ||
436 | tx_pkt_diff = ((unsigned long) (tx_packets - | |
437 | priv->last_moder_tx_packets)); | |
438 | rx_pkt_diff = ((unsigned long) (rx_packets - | |
439 | priv->last_moder_packets)); | |
440 | packets = max(tx_pkt_diff, rx_pkt_diff); | |
a35ee541 YP |
441 | rx_byte_diff = rx_bytes - priv->last_moder_bytes; |
442 | rx_byte_diff = rx_byte_diff ? rx_byte_diff : 1; | |
c27a02cd YP |
443 | rate = packets * HZ / period; |
444 | avg_pkt_size = packets ? ((unsigned long) (rx_bytes - | |
445 | priv->last_moder_bytes)) / packets : 0; | |
446 | ||
447 | /* Apply auto-moderation only when packet rate exceeds a rate that | |
448 | * it matters */ | |
449 | if (rate > MLX4_EN_RX_RATE_THRESH) { | |
450 | /* If tx and rx packet rates are not balanced, assume that | |
451 | * traffic is mainly BW bound and apply maximum moderation. | |
452 | * Otherwise, moderate according to packet rate */ | |
a35ee541 YP |
453 | if (2 * tx_pkt_diff > 3 * rx_pkt_diff && |
454 | rx_pkt_diff / rx_byte_diff < | |
455 | MLX4_EN_SMALL_PKT_SIZE) | |
456 | moder_time = priv->rx_usecs_low; | |
457 | else if (2 * rx_pkt_diff > 3 * tx_pkt_diff) | |
c27a02cd | 458 | moder_time = priv->rx_usecs_high; |
a35ee541 | 459 | else { |
c27a02cd YP |
460 | if (rate < priv->pkt_rate_low) |
461 | moder_time = priv->rx_usecs_low; | |
462 | else if (rate > priv->pkt_rate_high) | |
463 | moder_time = priv->rx_usecs_high; | |
464 | else | |
465 | moder_time = (rate - priv->pkt_rate_low) * | |
466 | (priv->rx_usecs_high - priv->rx_usecs_low) / | |
467 | (priv->pkt_rate_high - priv->pkt_rate_low) + | |
468 | priv->rx_usecs_low; | |
469 | } | |
470 | } else { | |
471 | /* When packet rate is low, use default moderation rather than | |
472 | * 0 to prevent interrupt storms if traffic suddenly increases */ | |
473 | moder_time = priv->rx_usecs; | |
474 | } | |
475 | ||
453a6082 YP |
476 | en_dbg(INTR, priv, "tx rate:%lu rx_rate:%lu\n", |
477 | tx_pkt_diff * HZ / period, rx_pkt_diff * HZ / period); | |
c27a02cd | 478 | |
453a6082 YP |
479 | en_dbg(INTR, priv, "Rx moder_time changed from:%d to %d period:%lu " |
480 | "[jiff] packets:%lu avg_pkt_size:%lu rate:%lu [p/s])\n", | |
c27a02cd YP |
481 | priv->last_moder_time, moder_time, period, packets, |
482 | avg_pkt_size, rate); | |
483 | ||
484 | if (moder_time != priv->last_moder_time) { | |
485 | priv->last_moder_time = moder_time; | |
486 | for (i = 0; i < priv->rx_ring_num; i++) { | |
487 | cq = &priv->rx_cq[i]; | |
488 | cq->moder_time = moder_time; | |
489 | err = mlx4_en_set_cq_moder(priv, cq); | |
490 | if (err) { | |
453a6082 | 491 | en_err(priv, "Failed modifying moderation for cq:%d\n", i); |
c27a02cd YP |
492 | break; |
493 | } | |
494 | } | |
495 | } | |
496 | ||
497 | out: | |
498 | priv->last_moder_packets = rx_packets; | |
499 | priv->last_moder_tx_packets = tx_packets; | |
500 | priv->last_moder_bytes = rx_bytes; | |
501 | priv->last_moder_jiffies = jiffies; | |
502 | } | |
503 | ||
504 | static void mlx4_en_do_get_stats(struct work_struct *work) | |
505 | { | |
bf6aede7 | 506 | struct delayed_work *delay = to_delayed_work(work); |
c27a02cd YP |
507 | struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, |
508 | stats_task); | |
509 | struct mlx4_en_dev *mdev = priv->mdev; | |
510 | int err; | |
511 | ||
512 | err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); | |
513 | if (err) | |
453a6082 | 514 | en_dbg(HW, priv, "Could not update stats \n"); |
c27a02cd YP |
515 | |
516 | mutex_lock(&mdev->state_lock); | |
517 | if (mdev->device_up) { | |
518 | if (priv->port_up) | |
519 | mlx4_en_auto_moderation(priv); | |
520 | ||
521 | queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); | |
522 | } | |
523 | mutex_unlock(&mdev->state_lock); | |
524 | } | |
525 | ||
526 | static void mlx4_en_linkstate(struct work_struct *work) | |
527 | { | |
528 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
529 | linkstate_task); | |
530 | struct mlx4_en_dev *mdev = priv->mdev; | |
531 | int linkstate = priv->link_state; | |
532 | ||
533 | mutex_lock(&mdev->state_lock); | |
534 | /* If observable port state changed set carrier state and | |
535 | * report to system log */ | |
536 | if (priv->last_link_state != linkstate) { | |
537 | if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) { | |
453a6082 | 538 | en_dbg(LINK, priv, "Link Down\n"); |
c27a02cd YP |
539 | netif_carrier_off(priv->dev); |
540 | } else { | |
453a6082 | 541 | en_dbg(LINK, priv, "Link Up\n"); |
c27a02cd YP |
542 | netif_carrier_on(priv->dev); |
543 | } | |
544 | } | |
545 | priv->last_link_state = linkstate; | |
546 | mutex_unlock(&mdev->state_lock); | |
547 | } | |
548 | ||
549 | ||
18cc42a3 | 550 | int mlx4_en_start_port(struct net_device *dev) |
c27a02cd YP |
551 | { |
552 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
553 | struct mlx4_en_dev *mdev = priv->mdev; | |
554 | struct mlx4_en_cq *cq; | |
555 | struct mlx4_en_tx_ring *tx_ring; | |
c27a02cd YP |
556 | int rx_index = 0; |
557 | int tx_index = 0; | |
c27a02cd YP |
558 | int err = 0; |
559 | int i; | |
560 | int j; | |
561 | ||
562 | if (priv->port_up) { | |
453a6082 | 563 | en_dbg(DRV, priv, "start port called while port already up\n"); |
c27a02cd YP |
564 | return 0; |
565 | } | |
566 | ||
567 | /* Calculate Rx buf size */ | |
568 | dev->mtu = min(dev->mtu, priv->max_mtu); | |
569 | mlx4_en_calc_rx_buf(dev); | |
453a6082 | 570 | en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); |
38aab07c | 571 | |
c27a02cd | 572 | /* Configure rx cq's and rings */ |
38aab07c YP |
573 | err = mlx4_en_activate_rx_rings(priv); |
574 | if (err) { | |
453a6082 | 575 | en_err(priv, "Failed to activate RX rings\n"); |
38aab07c YP |
576 | return err; |
577 | } | |
c27a02cd YP |
578 | for (i = 0; i < priv->rx_ring_num; i++) { |
579 | cq = &priv->rx_cq[i]; | |
c27a02cd YP |
580 | |
581 | err = mlx4_en_activate_cq(priv, cq); | |
582 | if (err) { | |
453a6082 | 583 | en_err(priv, "Failed activating Rx CQ\n"); |
a4233304 | 584 | goto cq_err; |
c27a02cd YP |
585 | } |
586 | for (j = 0; j < cq->size; j++) | |
587 | cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK; | |
588 | err = mlx4_en_set_cq_moder(priv, cq); | |
589 | if (err) { | |
453a6082 | 590 | en_err(priv, "Failed setting cq moderation parameters"); |
c27a02cd YP |
591 | mlx4_en_deactivate_cq(priv, cq); |
592 | goto cq_err; | |
593 | } | |
594 | mlx4_en_arm_cq(priv, cq); | |
38aab07c | 595 | priv->rx_ring[i].cqn = cq->mcq.cqn; |
c27a02cd YP |
596 | ++rx_index; |
597 | } | |
598 | ||
c27a02cd YP |
599 | err = mlx4_en_config_rss_steer(priv); |
600 | if (err) { | |
453a6082 | 601 | en_err(priv, "Failed configuring rss steering\n"); |
38aab07c | 602 | goto cq_err; |
c27a02cd YP |
603 | } |
604 | ||
605 | /* Configure tx cq's and rings */ | |
606 | for (i = 0; i < priv->tx_ring_num; i++) { | |
607 | /* Configure cq */ | |
608 | cq = &priv->tx_cq[i]; | |
609 | err = mlx4_en_activate_cq(priv, cq); | |
610 | if (err) { | |
453a6082 | 611 | en_err(priv, "Failed allocating Tx CQ\n"); |
c27a02cd YP |
612 | goto tx_err; |
613 | } | |
614 | err = mlx4_en_set_cq_moder(priv, cq); | |
615 | if (err) { | |
453a6082 | 616 | en_err(priv, "Failed setting cq moderation parameters"); |
c27a02cd YP |
617 | mlx4_en_deactivate_cq(priv, cq); |
618 | goto tx_err; | |
619 | } | |
453a6082 | 620 | en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i); |
c27a02cd YP |
621 | cq->buf->wqe_index = cpu_to_be16(0xffff); |
622 | ||
623 | /* Configure ring */ | |
624 | tx_ring = &priv->tx_ring[i]; | |
625 | err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn, | |
626 | priv->rx_ring[0].srq.srqn); | |
627 | if (err) { | |
453a6082 | 628 | en_err(priv, "Failed allocating Tx ring\n"); |
c27a02cd YP |
629 | mlx4_en_deactivate_cq(priv, cq); |
630 | goto tx_err; | |
631 | } | |
632 | /* Set initial ownership of all Tx TXBBs to SW (1) */ | |
633 | for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) | |
634 | *((u32 *) (tx_ring->buf + j)) = 0xffffffff; | |
635 | ++tx_index; | |
636 | } | |
637 | ||
638 | /* Configure port */ | |
639 | err = mlx4_SET_PORT_general(mdev->dev, priv->port, | |
640 | priv->rx_skb_size + ETH_FCS_LEN, | |
d53b93f2 YP |
641 | priv->prof->tx_pause, |
642 | priv->prof->tx_ppp, | |
643 | priv->prof->rx_pause, | |
644 | priv->prof->rx_ppp); | |
c27a02cd | 645 | if (err) { |
453a6082 YP |
646 | en_err(priv, "Failed setting port general configurations " |
647 | "for port %d, with error %d\n", priv->port, err); | |
c27a02cd YP |
648 | goto tx_err; |
649 | } | |
650 | /* Set default qp number */ | |
651 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); | |
652 | if (err) { | |
453a6082 | 653 | en_err(priv, "Failed setting default qp numbers\n"); |
c27a02cd YP |
654 | goto tx_err; |
655 | } | |
656 | /* Set port mac number */ | |
453a6082 | 657 | en_dbg(DRV, priv, "Setting mac for port %d\n", priv->port); |
c27a02cd YP |
658 | err = mlx4_register_mac(mdev->dev, priv->port, |
659 | priv->mac, &priv->mac_index); | |
660 | if (err) { | |
453a6082 | 661 | en_err(priv, "Failed setting port mac\n"); |
c27a02cd YP |
662 | goto tx_err; |
663 | } | |
664 | ||
665 | /* Init port */ | |
453a6082 | 666 | en_dbg(HW, priv, "Initializing port\n"); |
c27a02cd YP |
667 | err = mlx4_INIT_PORT(mdev->dev, priv->port); |
668 | if (err) { | |
453a6082 | 669 | en_err(priv, "Failed Initializing port\n"); |
c27a02cd YP |
670 | goto mac_err; |
671 | } | |
672 | ||
673 | /* Schedule multicast task to populate multicast list */ | |
674 | queue_work(mdev->workqueue, &priv->mcast_task); | |
675 | ||
676 | priv->port_up = true; | |
a11faac7 | 677 | netif_tx_start_all_queues(dev); |
c27a02cd YP |
678 | return 0; |
679 | ||
680 | mac_err: | |
681 | mlx4_unregister_mac(mdev->dev, priv->port, priv->mac_index); | |
682 | tx_err: | |
683 | while (tx_index--) { | |
684 | mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]); | |
685 | mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]); | |
686 | } | |
687 | ||
688 | mlx4_en_release_rss_steer(priv); | |
c27a02cd YP |
689 | cq_err: |
690 | while (rx_index--) | |
691 | mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]); | |
38aab07c YP |
692 | for (i = 0; i < priv->rx_ring_num; i++) |
693 | mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]); | |
c27a02cd YP |
694 | |
695 | return err; /* need to close devices */ | |
696 | } | |
697 | ||
698 | ||
18cc42a3 | 699 | void mlx4_en_stop_port(struct net_device *dev) |
c27a02cd YP |
700 | { |
701 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
702 | struct mlx4_en_dev *mdev = priv->mdev; | |
703 | int i; | |
704 | ||
705 | if (!priv->port_up) { | |
453a6082 | 706 | en_dbg(DRV, priv, "stop port called while port already down\n"); |
c27a02cd YP |
707 | return; |
708 | } | |
c27a02cd YP |
709 | |
710 | /* Synchronize with tx routine */ | |
711 | netif_tx_lock_bh(dev); | |
3c05f5ef | 712 | netif_tx_stop_all_queues(dev); |
c27a02cd YP |
713 | netif_tx_unlock_bh(dev); |
714 | ||
715 | /* close port*/ | |
3c05f5ef | 716 | priv->port_up = false; |
c27a02cd YP |
717 | mlx4_CLOSE_PORT(mdev->dev, priv->port); |
718 | ||
719 | /* Unregister Mac address for the port */ | |
720 | mlx4_unregister_mac(mdev->dev, priv->port, priv->mac_index); | |
721 | ||
722 | /* Free TX Rings */ | |
723 | for (i = 0; i < priv->tx_ring_num; i++) { | |
724 | mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]); | |
725 | mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]); | |
726 | } | |
727 | msleep(10); | |
728 | ||
729 | for (i = 0; i < priv->tx_ring_num; i++) | |
730 | mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]); | |
731 | ||
732 | /* Free RSS qps */ | |
733 | mlx4_en_release_rss_steer(priv); | |
734 | ||
735 | /* Free RX Rings */ | |
736 | for (i = 0; i < priv->rx_ring_num; i++) { | |
737 | mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]); | |
738 | while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state)) | |
739 | msleep(1); | |
740 | mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]); | |
741 | } | |
742 | } | |
743 | ||
744 | static void mlx4_en_restart(struct work_struct *work) | |
745 | { | |
746 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
747 | watchdog_task); | |
748 | struct mlx4_en_dev *mdev = priv->mdev; | |
749 | struct net_device *dev = priv->dev; | |
750 | ||
453a6082 | 751 | en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); |
1e338db5 YP |
752 | |
753 | mutex_lock(&mdev->state_lock); | |
754 | if (priv->port_up) { | |
755 | mlx4_en_stop_port(dev); | |
756 | if (mlx4_en_start_port(dev)) | |
453a6082 | 757 | en_err(priv, "Failed restarting port %d\n", priv->port); |
1e338db5 YP |
758 | } |
759 | mutex_unlock(&mdev->state_lock); | |
c27a02cd YP |
760 | } |
761 | ||
762 | ||
763 | static int mlx4_en_open(struct net_device *dev) | |
764 | { | |
765 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
766 | struct mlx4_en_dev *mdev = priv->mdev; | |
767 | int i; | |
768 | int err = 0; | |
769 | ||
770 | mutex_lock(&mdev->state_lock); | |
771 | ||
772 | if (!mdev->device_up) { | |
453a6082 | 773 | en_err(priv, "Cannot open - device down/disabled\n"); |
c27a02cd YP |
774 | err = -EBUSY; |
775 | goto out; | |
776 | } | |
777 | ||
778 | /* Reset HW statistics and performance counters */ | |
779 | if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) | |
453a6082 | 780 | en_dbg(HW, priv, "Failed dumping statistics\n"); |
c27a02cd YP |
781 | |
782 | memset(&priv->stats, 0, sizeof(priv->stats)); | |
783 | memset(&priv->pstats, 0, sizeof(priv->pstats)); | |
784 | ||
785 | for (i = 0; i < priv->tx_ring_num; i++) { | |
786 | priv->tx_ring[i].bytes = 0; | |
787 | priv->tx_ring[i].packets = 0; | |
788 | } | |
789 | for (i = 0; i < priv->rx_ring_num; i++) { | |
790 | priv->rx_ring[i].bytes = 0; | |
791 | priv->rx_ring[i].packets = 0; | |
792 | } | |
793 | ||
794 | mlx4_en_set_default_moderation(priv); | |
795 | err = mlx4_en_start_port(dev); | |
796 | if (err) | |
453a6082 | 797 | en_err(priv, "Failed starting port:%d\n", priv->port); |
c27a02cd YP |
798 | |
799 | out: | |
800 | mutex_unlock(&mdev->state_lock); | |
801 | return err; | |
802 | } | |
803 | ||
804 | ||
805 | static int mlx4_en_close(struct net_device *dev) | |
806 | { | |
807 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
808 | struct mlx4_en_dev *mdev = priv->mdev; | |
809 | ||
453a6082 | 810 | en_dbg(IFDOWN, priv, "Close port called\n"); |
c27a02cd YP |
811 | |
812 | mutex_lock(&mdev->state_lock); | |
813 | ||
814 | mlx4_en_stop_port(dev); | |
815 | netif_carrier_off(dev); | |
816 | ||
817 | mutex_unlock(&mdev->state_lock); | |
818 | return 0; | |
819 | } | |
820 | ||
18cc42a3 | 821 | void mlx4_en_free_resources(struct mlx4_en_priv *priv) |
c27a02cd YP |
822 | { |
823 | int i; | |
824 | ||
825 | for (i = 0; i < priv->tx_ring_num; i++) { | |
826 | if (priv->tx_ring[i].tx_info) | |
827 | mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]); | |
828 | if (priv->tx_cq[i].buf) | |
829 | mlx4_en_destroy_cq(priv, &priv->tx_cq[i]); | |
830 | } | |
831 | ||
832 | for (i = 0; i < priv->rx_ring_num; i++) { | |
833 | if (priv->rx_ring[i].rx_info) | |
834 | mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i]); | |
835 | if (priv->rx_cq[i].buf) | |
836 | mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); | |
837 | } | |
838 | } | |
839 | ||
18cc42a3 | 840 | int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) |
c27a02cd | 841 | { |
c27a02cd YP |
842 | struct mlx4_en_port_profile *prof = priv->prof; |
843 | int i; | |
844 | ||
845 | /* Create tx Rings */ | |
846 | for (i = 0; i < priv->tx_ring_num; i++) { | |
847 | if (mlx4_en_create_cq(priv, &priv->tx_cq[i], | |
848 | prof->tx_ring_size, i, TX)) | |
849 | goto err; | |
850 | ||
851 | if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], | |
852 | prof->tx_ring_size, TXBB_SIZE)) | |
853 | goto err; | |
854 | } | |
855 | ||
856 | /* Create rx Rings */ | |
857 | for (i = 0; i < priv->rx_ring_num; i++) { | |
858 | if (mlx4_en_create_cq(priv, &priv->rx_cq[i], | |
859 | prof->rx_ring_size, i, RX)) | |
860 | goto err; | |
861 | ||
862 | if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], | |
863 | prof->rx_ring_size, priv->stride)) | |
864 | goto err; | |
865 | } | |
866 | ||
867 | return 0; | |
868 | ||
869 | err: | |
453a6082 | 870 | en_err(priv, "Failed to allocate NIC resources\n"); |
c27a02cd YP |
871 | return -ENOMEM; |
872 | } | |
873 | ||
874 | ||
875 | void mlx4_en_destroy_netdev(struct net_device *dev) | |
876 | { | |
877 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
878 | struct mlx4_en_dev *mdev = priv->mdev; | |
879 | ||
453a6082 | 880 | en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); |
c27a02cd YP |
881 | |
882 | /* Unregister device - this will close the port if it was up */ | |
883 | if (priv->registered) | |
884 | unregister_netdev(dev); | |
885 | ||
886 | if (priv->allocated) | |
887 | mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); | |
888 | ||
889 | cancel_delayed_work(&priv->stats_task); | |
c27a02cd YP |
890 | /* flush any pending task for this netdev */ |
891 | flush_workqueue(mdev->workqueue); | |
892 | ||
893 | /* Detach the netdev so tasks would not attempt to access it */ | |
894 | mutex_lock(&mdev->state_lock); | |
895 | mdev->pndev[priv->port] = NULL; | |
896 | mutex_unlock(&mdev->state_lock); | |
897 | ||
898 | mlx4_en_free_resources(priv); | |
899 | free_netdev(dev); | |
900 | } | |
901 | ||
902 | static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) | |
903 | { | |
904 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
905 | struct mlx4_en_dev *mdev = priv->mdev; | |
906 | int err = 0; | |
907 | ||
453a6082 | 908 | en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", |
c27a02cd YP |
909 | dev->mtu, new_mtu); |
910 | ||
911 | if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) { | |
453a6082 | 912 | en_err(priv, "Bad MTU size:%d.\n", new_mtu); |
c27a02cd YP |
913 | return -EPERM; |
914 | } | |
915 | dev->mtu = new_mtu; | |
916 | ||
917 | if (netif_running(dev)) { | |
918 | mutex_lock(&mdev->state_lock); | |
919 | if (!mdev->device_up) { | |
920 | /* NIC is probably restarting - let watchdog task reset | |
921 | * the port */ | |
453a6082 | 922 | en_dbg(DRV, priv, "Change MTU called with card down!?\n"); |
c27a02cd YP |
923 | } else { |
924 | mlx4_en_stop_port(dev); | |
925 | mlx4_en_set_default_moderation(priv); | |
926 | err = mlx4_en_start_port(dev); | |
927 | if (err) { | |
453a6082 | 928 | en_err(priv, "Failed restarting port:%d\n", |
c27a02cd YP |
929 | priv->port); |
930 | queue_work(mdev->workqueue, &priv->watchdog_task); | |
931 | } | |
932 | } | |
933 | mutex_unlock(&mdev->state_lock); | |
934 | } | |
935 | return 0; | |
936 | } | |
937 | ||
3addc568 SH |
938 | static const struct net_device_ops mlx4_netdev_ops = { |
939 | .ndo_open = mlx4_en_open, | |
940 | .ndo_stop = mlx4_en_close, | |
941 | .ndo_start_xmit = mlx4_en_xmit, | |
f813cad8 | 942 | .ndo_select_queue = mlx4_en_select_queue, |
3addc568 SH |
943 | .ndo_get_stats = mlx4_en_get_stats, |
944 | .ndo_set_multicast_list = mlx4_en_set_multicast, | |
945 | .ndo_set_mac_address = mlx4_en_set_mac, | |
52255bbe | 946 | .ndo_validate_addr = eth_validate_addr, |
3addc568 SH |
947 | .ndo_change_mtu = mlx4_en_change_mtu, |
948 | .ndo_tx_timeout = mlx4_en_tx_timeout, | |
949 | .ndo_vlan_rx_register = mlx4_en_vlan_rx_register, | |
950 | .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, | |
951 | .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, | |
952 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
953 | .ndo_poll_controller = mlx4_en_netpoll, | |
954 | #endif | |
955 | }; | |
956 | ||
c27a02cd YP |
957 | int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, |
958 | struct mlx4_en_port_profile *prof) | |
959 | { | |
960 | struct net_device *dev; | |
961 | struct mlx4_en_priv *priv; | |
962 | int i; | |
963 | int err; | |
964 | ||
f813cad8 | 965 | dev = alloc_etherdev_mq(sizeof(struct mlx4_en_priv), prof->tx_ring_num); |
c27a02cd YP |
966 | if (dev == NULL) { |
967 | mlx4_err(mdev, "Net device allocation failed\n"); | |
968 | return -ENOMEM; | |
969 | } | |
970 | ||
971 | SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev); | |
972 | ||
973 | /* | |
974 | * Initialize driver private data | |
975 | */ | |
976 | ||
977 | priv = netdev_priv(dev); | |
978 | memset(priv, 0, sizeof(struct mlx4_en_priv)); | |
979 | priv->dev = dev; | |
980 | priv->mdev = mdev; | |
981 | priv->prof = prof; | |
982 | priv->port = port; | |
983 | priv->port_up = false; | |
984 | priv->rx_csum = 1; | |
985 | priv->flags = prof->flags; | |
986 | priv->tx_ring_num = prof->tx_ring_num; | |
987 | priv->rx_ring_num = prof->rx_ring_num; | |
988 | priv->mc_list = NULL; | |
989 | priv->mac_index = -1; | |
990 | priv->msg_enable = MLX4_EN_MSG_LEVEL; | |
991 | spin_lock_init(&priv->stats_lock); | |
992 | INIT_WORK(&priv->mcast_task, mlx4_en_do_set_multicast); | |
993 | INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac); | |
c27a02cd YP |
994 | INIT_WORK(&priv->watchdog_task, mlx4_en_restart); |
995 | INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); | |
996 | INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); | |
997 | ||
998 | /* Query for default mac and max mtu */ | |
999 | priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; | |
1000 | priv->mac = mdev->dev->caps.def_mac[priv->port]; | |
1001 | if (ILLEGAL_MAC(priv->mac)) { | |
453a6082 | 1002 | en_err(priv, "Port: %d, invalid mac burned: 0x%llx, quiting\n", |
c27a02cd YP |
1003 | priv->port, priv->mac); |
1004 | err = -EINVAL; | |
1005 | goto out; | |
1006 | } | |
1007 | ||
1008 | priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + | |
1009 | DS_SIZE * MLX4_EN_MAX_RX_FRAGS); | |
1010 | err = mlx4_en_alloc_resources(priv); | |
1011 | if (err) | |
1012 | goto out; | |
1013 | ||
c27a02cd YP |
1014 | /* Allocate page for receive rings */ |
1015 | err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, | |
1016 | MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE); | |
1017 | if (err) { | |
453a6082 | 1018 | en_err(priv, "Failed to allocate page for rx qps\n"); |
c27a02cd YP |
1019 | goto out; |
1020 | } | |
1021 | priv->allocated = 1; | |
1022 | ||
c27a02cd YP |
1023 | /* |
1024 | * Initialize netdev entry points | |
1025 | */ | |
3addc568 | 1026 | dev->netdev_ops = &mlx4_netdev_ops; |
c27a02cd | 1027 | dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; |
f813cad8 | 1028 | dev->real_num_tx_queues = MLX4_EN_NUM_TX_RINGS; |
3addc568 | 1029 | |
c27a02cd YP |
1030 | SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops); |
1031 | ||
1032 | /* Set defualt MAC */ | |
1033 | dev->addr_len = ETH_ALEN; | |
1034 | for (i = 0; i < ETH_ALEN; i++) | |
1035 | dev->dev_addr[ETH_ALEN - 1 - i] = | |
1036 | (u8) (priv->mac >> (8 * i)); | |
1037 | ||
1038 | /* | |
1039 | * Set driver features | |
1040 | */ | |
1041 | dev->features |= NETIF_F_SG; | |
e486973e | 1042 | dev->vlan_features |= NETIF_F_SG; |
45b4d66d | 1043 | dev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
e486973e | 1044 | dev->vlan_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
c27a02cd YP |
1045 | dev->features |= NETIF_F_HIGHDMA; |
1046 | dev->features |= NETIF_F_HW_VLAN_TX | | |
1047 | NETIF_F_HW_VLAN_RX | | |
1048 | NETIF_F_HW_VLAN_FILTER; | |
1049 | if (mdev->profile.num_lro) | |
1050 | dev->features |= NETIF_F_LRO; | |
1051 | if (mdev->LSO_support) { | |
1052 | dev->features |= NETIF_F_TSO; | |
1053 | dev->features |= NETIF_F_TSO6; | |
e486973e YP |
1054 | dev->vlan_features |= NETIF_F_TSO; |
1055 | dev->vlan_features |= NETIF_F_TSO6; | |
c27a02cd YP |
1056 | } |
1057 | ||
1058 | mdev->pndev[port] = dev; | |
1059 | ||
1060 | netif_carrier_off(dev); | |
1061 | err = register_netdev(dev); | |
1062 | if (err) { | |
453a6082 | 1063 | en_err(priv, "Netdev registration failed for port %d\n", port); |
c27a02cd YP |
1064 | goto out; |
1065 | } | |
453a6082 YP |
1066 | |
1067 | en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num); | |
1068 | en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num); | |
1069 | ||
c27a02cd YP |
1070 | priv->registered = 1; |
1071 | queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); | |
1072 | return 0; | |
1073 | ||
1074 | out: | |
1075 | mlx4_en_destroy_netdev(dev); | |
1076 | return err; | |
1077 | } | |
1078 |