[deliverable/linux.git] / drivers / net / netxen / netxen_nic_ctx.c

/*
 * Copyright (C) 2003 - 2009 NetXen, Inc.
 * All rights reserved.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
 * MA  02111-1307, USA.
 *
 * The full GNU General Public License is included in this distribution
 * in the file called LICENSE.
 *
 * Contact Information:
 *    info@netxen.com
 * NetXen Inc,
 * 18922 Forge Drive
 * Cupertino, CA 95014-0701
 *
 */

#include "netxen_nic_hw.h"
#include "netxen_nic.h"
#include "netxen_nic_phan_reg.h"

#define NXHAL_VERSION	1

static int
netxen_api_lock(struct netxen_adapter *adapter)
{
	u32 done = 0, timeout = 0;

	for (;;) {
		/* Acquire PCIE HW semaphore5 */
		netxen_nic_read_w0(adapter,
			NETXEN_PCIE_REG(PCIE_SEM5_LOCK), &done);

		if (done == 1)
			break;

		if (++timeout >= NX_OS_CRB_RETRY_COUNT) {
			printk(KERN_ERR "%s: lock timeout.\n", __func__);
			return -1;
		}

		msleep(1);
	}

#if 0
	netxen_nic_write_w1(adapter,
		NETXEN_API_LOCK_ID, NX_OS_API_LOCK_DRIVER);
#endif
	return 0;
}

static int
netxen_api_unlock(struct netxen_adapter *adapter)
{
	u32 val;

	/* Release PCIE HW semaphore5 */
	netxen_nic_read_w0(adapter,
		NETXEN_PCIE_REG(PCIE_SEM5_UNLOCK), &val);
	return 0;
}

static u32
netxen_poll_rsp(struct netxen_adapter *adapter)
{
	u32 rsp = NX_CDRP_RSP_OK;
	int	timeout = 0;

	do {
		/* give atleast 1ms for firmware to respond */
		msleep(1);

		if (++timeout > NX_OS_CRB_RETRY_COUNT)
			return NX_CDRP_RSP_TIMEOUT;

		netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET, &rsp);
	} while (!NX_CDRP_IS_RSP(rsp));

	return rsp;
}

static u32
netxen_issue_cmd(struct netxen_adapter *adapter,
	u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
{
	u32 rsp;
	u32 signature = 0;
	u32 rcode = NX_RCODE_SUCCESS;

	signature = NX_CDRP_SIGNATURE_MAKE(pci_fn, version);

	/* Acquire semaphore before accessing CRB */
	if (netxen_api_lock(adapter))
		return NX_RCODE_TIMEOUT;

	netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET, signature);

	netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET, arg1);

	netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET, arg2);

	netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET, arg3);

	netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET,
			NX_CDRP_FORM_CMD(cmd));

	rsp = netxen_poll_rsp(adapter);

	if (rsp == NX_CDRP_RSP_TIMEOUT) {
		printk(KERN_ERR "%s: card response timeout.\n",
				netxen_nic_driver_name);

		rcode = NX_RCODE_TIMEOUT;
	} else if (rsp == NX_CDRP_RSP_FAIL) {
		netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode);

		printk(KERN_ERR "%s: failed card response code:0x%x\n",
				netxen_nic_driver_name, rcode);
	}

	/* Release semaphore */
	netxen_api_unlock(adapter);

	return rcode;
}

int
nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu)
{
	u32 rcode = NX_RCODE_SUCCESS;
	struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;

	if (recv_ctx->state == NX_HOST_CTX_STATE_ACTIVE)
		rcode = netxen_issue_cmd(adapter,
				adapter->ahw.pci_func,
				NXHAL_VERSION,
				recv_ctx->context_id,
				mtu,
				0,
				NX_CDRP_CMD_SET_MTU);

	if (rcode != NX_RCODE_SUCCESS)
		return -EIO;

	return 0;
}

static int
nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
{
	void *addr;
	nx_hostrq_rx_ctx_t *prq;
	nx_cardrsp_rx_ctx_t *prsp;
	nx_hostrq_rds_ring_t *prq_rds;
	nx_hostrq_sds_ring_t *prq_sds;
	nx_cardrsp_rds_ring_t *prsp_rds;
	nx_cardrsp_sds_ring_t *prsp_sds;
	struct nx_host_rds_ring *rds_ring;
	struct nx_host_sds_ring *sds_ring;

	dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
	u64 phys_addr;

	int i, nrds_rings, nsds_rings;
	size_t rq_size, rsp_size;
	u32 cap, reg, val;

	int err;

	struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;

	nrds_rings = adapter->max_rds_rings;
	nsds_rings = adapter->max_sds_rings;

	rq_size =
		SIZEOF_HOSTRQ_RX(nx_hostrq_rx_ctx_t, nrds_rings, nsds_rings);
	rsp_size =
		SIZEOF_CARDRSP_RX(nx_cardrsp_rx_ctx_t, nrds_rings, nsds_rings);

	addr = pci_alloc_consistent(adapter->pdev,
				rq_size, &hostrq_phys_addr);
	if (addr == NULL)
		return -ENOMEM;
	prq = (nx_hostrq_rx_ctx_t *)addr;

	addr = pci_alloc_consistent(adapter->pdev,
			rsp_size, &cardrsp_phys_addr);
	if (addr == NULL) {
		err = -ENOMEM;
		goto out_free_rq;
	}
	prsp = (nx_cardrsp_rx_ctx_t *)addr;

	prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);

	cap = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN);
	cap |= (NX_CAP0_JUMBO_CONTIGUOUS | NX_CAP0_LRO_CONTIGUOUS);

	prq->capabilities[0] = cpu_to_le32(cap);
	prq->host_int_crb_mode =
		cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
	prq->host_rds_crb_mode =
		cpu_to_le32(NX_HOST_RDS_CRB_MODE_UNIQUE);

	prq->num_rds_rings = cpu_to_le16(nrds_rings);
	prq->num_sds_rings = cpu_to_le16(nsds_rings);
	prq->rds_ring_offset = cpu_to_le32(0);

	val = le32_to_cpu(prq->rds_ring_offset) +
		(sizeof(nx_hostrq_rds_ring_t) * nrds_rings);
	prq->sds_ring_offset = cpu_to_le32(val);

	prq_rds = (nx_hostrq_rds_ring_t *)(prq->data +
			le32_to_cpu(prq->rds_ring_offset));

	for (i = 0; i < nrds_rings; i++) {

		rds_ring = &recv_ctx->rds_rings[i];

		prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
		prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
		prq_rds[i].ring_kind = cpu_to_le32(i);
		prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
	}

	prq_sds = (nx_hostrq_sds_ring_t *)(prq->data +
			le32_to_cpu(prq->sds_ring_offset));

	for (i = 0; i < nsds_rings; i++) {

		sds_ring = &recv_ctx->sds_rings[i];

		prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
		prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
		prq_sds[i].msi_index = cpu_to_le16(i);
	}

	phys_addr = hostrq_phys_addr;
	err = netxen_issue_cmd(adapter,
			adapter->ahw.pci_func,
			NXHAL_VERSION,
			(u32)(phys_addr >> 32),
			(u32)(phys_addr & 0xffffffff),
			rq_size,
			NX_CDRP_CMD_CREATE_RX_CTX);
	if (err) {
		printk(KERN_WARNING
			"Failed to create rx ctx in firmware%d\n", err);
		goto out_free_rsp;
	}


	prsp_rds = ((nx_cardrsp_rds_ring_t *)
			 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);

	for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
		rds_ring = &recv_ctx->rds_rings[i];

		reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
		rds_ring->crb_rcv_producer = NETXEN_NIC_REG(reg - 0x200);
	}

	prsp_sds = ((nx_cardrsp_sds_ring_t *)
			&prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);

	for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
		sds_ring = &recv_ctx->sds_rings[i];

		reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
		sds_ring->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200);

		reg = le32_to_cpu(prsp_sds[i].interrupt_crb);
		sds_ring->crb_intr_mask = NETXEN_NIC_REG(reg - 0x200);
	}

	recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
	recv_ctx->context_id = le16_to_cpu(prsp->context_id);
	recv_ctx->virt_port = prsp->virt_port;

out_free_rsp:
	pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
out_free_rq:
	pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
	return err;
}

static void
nx_fw_cmd_destroy_rx_ctx(struct netxen_adapter *adapter)
{
	struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;

	if (netxen_issue_cmd(adapter,
			adapter->ahw.pci_func,
			NXHAL_VERSION,
			recv_ctx->context_id,
			NX_DESTROY_CTX_RESET,
			0,
			NX_CDRP_CMD_DESTROY_RX_CTX)) {

		printk(KERN_WARNING
			"%s: Failed to destroy rx ctx in firmware\n",
			netxen_nic_driver_name);
	}
}

static int
nx_fw_cmd_create_tx_ctx(struct netxen_adapter *adapter)
{
	nx_hostrq_tx_ctx_t	*prq;
	nx_hostrq_cds_ring_t	*prq_cds;
	nx_cardrsp_tx_ctx_t	*prsp;
	void	*rq_addr, *rsp_addr;
	size_t	rq_size, rsp_size;
	u32	temp;
	int	err = 0;
	u64	offset, phys_addr;
	dma_addr_t	rq_phys_addr, rsp_phys_addr;

	rq_size = SIZEOF_HOSTRQ_TX(nx_hostrq_tx_ctx_t);
	rq_addr = pci_alloc_consistent(adapter->pdev,
		rq_size, &rq_phys_addr);
	if (!rq_addr)
		return -ENOMEM;

	rsp_size = SIZEOF_CARDRSP_TX(nx_cardrsp_tx_ctx_t);
	rsp_addr = pci_alloc_consistent(adapter->pdev,
		rsp_size, &rsp_phys_addr);
	if (!rsp_addr) {
		err = -ENOMEM;
		goto out_free_rq;
	}

	memset(rq_addr, 0, rq_size);
	prq = (nx_hostrq_tx_ctx_t *)rq_addr;

	memset(rsp_addr, 0, rsp_size);
	prsp = (nx_cardrsp_tx_ctx_t *)rsp_addr;

	prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);

	temp = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN | NX_CAP0_LSO);
	prq->capabilities[0] = cpu_to_le32(temp);

	prq->host_int_crb_mode =
		cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);

	prq->interrupt_ctl = 0;
	prq->msi_index = 0;

	prq->dummy_dma_addr = cpu_to_le64(adapter->dummy_dma.phys_addr);

	offset = adapter->ctx_desc_phys_addr+sizeof(struct netxen_ring_ctx);
	prq->cmd_cons_dma_addr = cpu_to_le64(offset);

	prq_cds = &prq->cds_ring;

	prq_cds->host_phys_addr =
		cpu_to_le64(adapter->ahw.cmd_desc_phys_addr);

	prq_cds->ring_size = cpu_to_le32(adapter->num_txd);

	phys_addr = rq_phys_addr;
	err = netxen_issue_cmd(adapter,
			adapter->ahw.pci_func,
			NXHAL_VERSION,
			(u32)(phys_addr >> 32),
			((u32)phys_addr & 0xffffffff),
			rq_size,
			NX_CDRP_CMD_CREATE_TX_CTX);

	if (err == NX_RCODE_SUCCESS) {
		temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
		adapter->crb_addr_cmd_producer =
			NETXEN_NIC_REG(temp - 0x200);
#if 0
		adapter->tx_state =
			le32_to_cpu(prsp->host_ctx_state);
#endif
		adapter->tx_context_id =
			le16_to_cpu(prsp->context_id);
	} else {
		printk(KERN_WARNING
			"Failed to create tx ctx in firmware%d\n", err);
		err = -EIO;
	}

	pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);

out_free_rq:
	pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);

	return err;
}

static void
nx_fw_cmd_destroy_tx_ctx(struct netxen_adapter *adapter)
{
	if (netxen_issue_cmd(adapter,
			adapter->ahw.pci_func,
			NXHAL_VERSION,
			adapter->tx_context_id,
			NX_DESTROY_CTX_RESET,
			0,
			NX_CDRP_CMD_DESTROY_TX_CTX)) {

		printk(KERN_WARNING
			"%s: Failed to destroy tx ctx in firmware\n",
			netxen_nic_driver_name);
	}
}

static u64 ctx_addr_sig_regs[][3] = {
	{NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)},
	{NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)},
	{NETXEN_NIC_REG(0x198), NETXEN_NIC_REG(0x19c), NETXEN_NIC_REG(0x1c8)},
	{NETXEN_NIC_REG(0x1a0), NETXEN_NIC_REG(0x1a4), NETXEN_NIC_REG(0x1cc)}
};

#define CRB_CTX_ADDR_REG_LO(FUNC_ID)	(ctx_addr_sig_regs[FUNC_ID][0])
#define CRB_CTX_ADDR_REG_HI(FUNC_ID)	(ctx_addr_sig_regs[FUNC_ID][2])
#define CRB_CTX_SIGNATURE_REG(FUNC_ID)	(ctx_addr_sig_regs[FUNC_ID][1])

#define lower32(x)	((u32)((x) & 0xffffffff))
#define upper32(x)	((u32)(((u64)(x) >> 32) & 0xffffffff))

static struct netxen_recv_crb recv_crb_registers[] = {
	/* Instance 0 */
	{
		/* crb_rcv_producer: */
		{
			NETXEN_NIC_REG(0x100),
			/* Jumbo frames */
			NETXEN_NIC_REG(0x110),
			/* LRO */
			NETXEN_NIC_REG(0x120)
		},
		/* crb_sts_consumer: */
		NETXEN_NIC_REG(0x138),
	},
	/* Instance 1 */
	{
		/* crb_rcv_producer: */
		{
			NETXEN_NIC_REG(0x144),
			/* Jumbo frames */
			NETXEN_NIC_REG(0x154),
			/* LRO */
			NETXEN_NIC_REG(0x164)
		},
		/* crb_sts_consumer: */
		NETXEN_NIC_REG(0x17c),
	},
	/* Instance 2 */
	{
		/* crb_rcv_producer: */
		{
			NETXEN_NIC_REG(0x1d8),
			/* Jumbo frames */
			NETXEN_NIC_REG(0x1f8),
			/* LRO */
			NETXEN_NIC_REG(0x208)
		},
		/* crb_sts_consumer: */
		NETXEN_NIC_REG(0x220),
	},
	/* Instance 3 */
	{
		/* crb_rcv_producer: */
		{
			NETXEN_NIC_REG(0x22c),
			/* Jumbo frames */
			NETXEN_NIC_REG(0x23c),
			/* LRO */
			NETXEN_NIC_REG(0x24c)
		},
		/* crb_sts_consumer: */
		NETXEN_NIC_REG(0x264),
	},
};

static int
netxen_init_old_ctx(struct netxen_adapter *adapter)
{
	struct netxen_recv_context *recv_ctx;
	struct nx_host_rds_ring *rds_ring;
	struct nx_host_sds_ring *sds_ring;
	int ring;
	int func_id = adapter->portnum;

	adapter->ctx_desc->cmd_ring_addr =
		cpu_to_le64(adapter->ahw.cmd_desc_phys_addr);
	adapter->ctx_desc->cmd_ring_size =
		cpu_to_le32(adapter->num_txd);

	recv_ctx = &adapter->recv_ctx;

	for (ring = 0; ring < adapter->max_rds_rings; ring++) {
		rds_ring = &recv_ctx->rds_rings[ring];

		adapter->ctx_desc->rcv_ctx[ring].rcv_ring_addr =
			cpu_to_le64(rds_ring->phys_addr);
		adapter->ctx_desc->rcv_ctx[ring].rcv_ring_size =
			cpu_to_le32(rds_ring->num_desc);
	}
	sds_ring = &recv_ctx->sds_rings[0];
	adapter->ctx_desc->sts_ring_addr = cpu_to_le64(sds_ring->phys_addr);
	adapter->ctx_desc->sts_ring_size = cpu_to_le32(sds_ring->num_desc);

	adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_LO(func_id),
			lower32(adapter->ctx_desc_phys_addr));
	adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_HI(func_id),
			upper32(adapter->ctx_desc_phys_addr));
	adapter->pci_write_normalize(adapter, CRB_CTX_SIGNATURE_REG(func_id),
			NETXEN_CTX_SIGNATURE | func_id);
	return 0;
}

static uint32_t sw_int_mask[4] = {
	CRB_SW_INT_MASK_0, CRB_SW_INT_MASK_1,
	CRB_SW_INT_MASK_2, CRB_SW_INT_MASK_3
};

int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
{
	struct netxen_hardware_context *hw = &adapter->ahw;
	u32 state = 0;
	void *addr;
	int err = 0;
	int ring;
	struct netxen_recv_context *recv_ctx;
	struct nx_host_rds_ring *rds_ring;
	struct nx_host_sds_ring *sds_ring;

	struct pci_dev *pdev = adapter->pdev;
	struct net_device *netdev = adapter->netdev;

	err = netxen_receive_peg_ready(adapter);
	if (err) {
		printk(KERN_ERR "Rcv Peg initialization not complete:%x.\n",
				state);
		return err;
	}

	addr = pci_alloc_consistent(pdev,
			sizeof(struct netxen_ring_ctx) + sizeof(uint32_t),
			&adapter->ctx_desc_phys_addr);

	if (addr == NULL) {
		dev_err(&pdev->dev, "failed to allocate hw context\n");
		return -ENOMEM;
	}
	memset(addr, 0, sizeof(struct netxen_ring_ctx));
	adapter->ctx_desc = (struct netxen_ring_ctx *)addr;
	adapter->ctx_desc->ctx_id = cpu_to_le32(adapter->portnum);
	adapter->ctx_desc->cmd_consumer_offset =
		cpu_to_le64(adapter->ctx_desc_phys_addr +
			sizeof(struct netxen_ring_ctx));
	adapter->cmd_consumer =
		(__le32 *)(((char *)addr) + sizeof(struct netxen_ring_ctx));

	/* cmd desc ring */
	addr = pci_alloc_consistent(pdev,
			TX_DESC_RINGSIZE(adapter),
			&hw->cmd_desc_phys_addr);

	if (addr == NULL) {
		dev_err(&pdev->dev, "%s: failed to allocate tx desc ring\n",
				netdev->name);
		return -ENOMEM;
	}

	hw->cmd_desc_head = (struct cmd_desc_type0 *)addr;

	recv_ctx = &adapter->recv_ctx;

	for (ring = 0; ring < adapter->max_rds_rings; ring++) {
		rds_ring = &recv_ctx->rds_rings[ring];
		addr = pci_alloc_consistent(adapter->pdev,
				RCV_DESC_RINGSIZE(rds_ring),
				&rds_ring->phys_addr);
		if (addr == NULL) {
			dev_err(&pdev->dev,
				"%s: failed to allocate rds ring [%d]\n",
				netdev->name, ring);
			err = -ENOMEM;
			goto err_out_free;
		}
		rds_ring->desc_head = (struct rcv_desc *)addr;

		if (adapter->fw_major < 4)
			rds_ring->crb_rcv_producer =
				recv_crb_registers[adapter->portnum].
				crb_rcv_producer[ring];
	}

	for (ring = 0; ring < adapter->max_sds_rings; ring++) {
		sds_ring = &recv_ctx->sds_rings[ring];

		addr = pci_alloc_consistent(adapter->pdev,
				STATUS_DESC_RINGSIZE(sds_ring),
				&sds_ring->phys_addr);
		if (addr == NULL) {
			dev_err(&pdev->dev,
				"%s: failed to allocate sds ring [%d]\n",
				netdev->name, ring);
			err = -ENOMEM;
			goto err_out_free;
		}
		sds_ring->desc_head = (struct status_desc *)addr;
	}


	if (adapter->fw_major >= 4) {
		err = nx_fw_cmd_create_rx_ctx(adapter);
		if (err)
			goto err_out_free;
		err = nx_fw_cmd_create_tx_ctx(adapter);
		if (err)
			goto err_out_free;
	} else {
		sds_ring = &recv_ctx->sds_rings[0];
		sds_ring->crb_sts_consumer =
			recv_crb_registers[adapter->portnum].crb_sts_consumer;

		recv_ctx->sds_rings[0].crb_intr_mask =
				sw_int_mask[adapter->portnum];

		err = netxen_init_old_ctx(adapter);
		if (err) {
			netxen_free_hw_resources(adapter);
			return err;
		}

	}

	return 0;

err_out_free:
	netxen_free_hw_resources(adapter);
	return err;
}

void netxen_free_hw_resources(struct netxen_adapter *adapter)
{
	struct netxen_recv_context *recv_ctx;
	struct nx_host_rds_ring *rds_ring;
	struct nx_host_sds_ring *sds_ring;
	int ring;

	if (adapter->fw_major >= 4) {
		nx_fw_cmd_destroy_tx_ctx(adapter);
		nx_fw_cmd_destroy_rx_ctx(adapter);
	}

	if (adapter->ctx_desc != NULL) {
		pci_free_consistent(adapter->pdev,
				sizeof(struct netxen_ring_ctx) +
				sizeof(uint32_t),
				adapter->ctx_desc,
				adapter->ctx_desc_phys_addr);
		adapter->ctx_desc = NULL;
	}

	if (adapter->ahw.cmd_desc_head != NULL) {
		pci_free_consistent(adapter->pdev,
				sizeof(struct cmd_desc_type0) *
				adapter->num_txd,
				adapter->ahw.cmd_desc_head,
				adapter->ahw.cmd_desc_phys_addr);
		adapter->ahw.cmd_desc_head = NULL;
	}

	recv_ctx = &adapter->recv_ctx;
	for (ring = 0; ring < adapter->max_rds_rings; ring++) {
		rds_ring = &recv_ctx->rds_rings[ring];

		if (rds_ring->desc_head != NULL) {
			pci_free_consistent(adapter->pdev,
					RCV_DESC_RINGSIZE(rds_ring),
					rds_ring->desc_head,
					rds_ring->phys_addr);
			rds_ring->desc_head = NULL;
		}
	}

	for (ring = 0; ring < adapter->max_sds_rings; ring++) {
		sds_ring = &recv_ctx->sds_rings[ring];

		if (sds_ring->desc_head != NULL) {
			pci_free_consistent(adapter->pdev,
				STATUS_DESC_RINGSIZE(sds_ring),
				sds_ring->desc_head,
				sds_ring->phys_addr);
			sds_ring->desc_head = NULL;
		}
	}
}
Commit	Line	Data
d9e651bc	1	/*
5d242f1c	2	* Copyright (C) 2003 - 2009 NetXen, Inc.
d9e651bc DP	3	* All rights reserved.
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* as published by the Free Software Foundation; either version 2
	8	* of the License, or (at your option) any later version.
	9	*
	10	* This program is distributed in the hope that it will be useful, but
	11	* WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 59 Temple Place - Suite 330, Boston,
	18	* MA 02111-1307, USA.
	19	*
	20	* The full GNU General Public License is included in this distribution
	21	* in the file called LICENSE.
	22	*
	23	* Contact Information:
	24	* info@netxen.com
5d242f1c DP	25	* NetXen Inc,
	26	* 18922 Forge Drive
	27	* Cupertino, CA 95014-0701
d9e651bc DP	28	*
	29	*/
	30
	31	#include "netxen_nic_hw.h"
	32	#include "netxen_nic.h"
	33	#include "netxen_nic_phan_reg.h"
	34
	35	#define NXHAL_VERSION 1
	36
	37	static int
	38	netxen_api_lock(struct netxen_adapter *adapter)
	39	{
	40	u32 done = 0, timeout = 0;
	41
	42	for (;;) {
	43	/* Acquire PCIE HW semaphore5 */
	44	netxen_nic_read_w0(adapter,
	45	NETXEN_PCIE_REG(PCIE_SEM5_LOCK), &done);
	46
	47	if (done == 1)
	48	break;
	49
	50	if (++timeout >= NX_OS_CRB_RETRY_COUNT) {
	51	printk(KERN_ERR "%s: lock timeout.\n", __func__);
	52	return -1;
	53	}
	54
	55	msleep(1);
	56	}
	57
	58	#if 0
	59	netxen_nic_write_w1(adapter,
	60	NETXEN_API_LOCK_ID, NX_OS_API_LOCK_DRIVER);
	61	#endif
	62	return 0;
	63	}
	64
	65	static int
	66	netxen_api_unlock(struct netxen_adapter *adapter)
	67	{
	68	u32 val;
	69
	70	/* Release PCIE HW semaphore5 */
	71	netxen_nic_read_w0(adapter,
	72	NETXEN_PCIE_REG(PCIE_SEM5_UNLOCK), &val);
	73	return 0;
	74	}
	75
	76	static u32
	77	netxen_poll_rsp(struct netxen_adapter *adapter)
	78	{
2edbb454	79	u32 rsp = NX_CDRP_RSP_OK;
d9e651bc DP	80	int timeout = 0;
	81
	82	do {
	83	/* give atleast 1ms for firmware to respond */
	84	msleep(1);
	85
	86	if (++timeout > NX_OS_CRB_RETRY_COUNT)
	87	return NX_CDRP_RSP_TIMEOUT;
	88
2edbb454	89	netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET, &rsp);
d9e651bc DP	90	} while (!NX_CDRP_IS_RSP(rsp));
	91
	92	return rsp;
	93	}
	94
	95	static u32
	96	netxen_issue_cmd(struct netxen_adapter *adapter,
	97	u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
	98	{
	99	u32 rsp;
	100	u32 signature = 0;
	101	u32 rcode = NX_RCODE_SUCCESS;
	102
	103	signature = NX_CDRP_SIGNATURE_MAKE(pci_fn, version);
	104
	105	/* Acquire semaphore before accessing CRB */
	106	if (netxen_api_lock(adapter))
	107	return NX_RCODE_TIMEOUT;
	108
2edbb454	109	netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET, signature);
d9e651bc	110
2edbb454	111	netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET, arg1);
d9e651bc	112
2edbb454	113	netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET, arg2);
d9e651bc	114
2edbb454	115	netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET, arg3);
d9e651bc DP	116
d9e651bc DP	117	netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET,
2edbb454	118	NX_CDRP_FORM_CMD(cmd));
d9e651bc DP	119
	120	rsp = netxen_poll_rsp(adapter);
	121
	122	if (rsp == NX_CDRP_RSP_TIMEOUT) {
	123	printk(KERN_ERR "%s: card response timeout.\n",
	124	netxen_nic_driver_name);
	125
	126	rcode = NX_RCODE_TIMEOUT;
	127	} else if (rsp == NX_CDRP_RSP_FAIL) {
	128	netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode);
d9e651bc DP	129
	130	printk(KERN_ERR "%s: failed card response code:0x%x\n",
	131	netxen_nic_driver_name, rcode);
	132	}
	133
	134	/* Release semaphore */
	135	netxen_api_unlock(adapter);
	136
	137	return rcode;
	138	}
	139
9ad27643 DP	140	int
9ad27643 DP	141	nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu)
d9e651bc DP	142	{
d9e651bc DP	143	u32 rcode = NX_RCODE_SUCCESS;
becf46a0	144	struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
d9e651bc DP	145
	146	if (recv_ctx->state == NX_HOST_CTX_STATE_ACTIVE)
	147	rcode = netxen_issue_cmd(adapter,
	148	adapter->ahw.pci_func,
	149	NXHAL_VERSION,
	150	recv_ctx->context_id,
	151	mtu,
	152	0,
	153	NX_CDRP_CMD_SET_MTU);
	154
9ad27643 DP	155	if (rcode != NX_RCODE_SUCCESS)
	156	return -EIO;
	157
	158	return 0;
d9e651bc DP	159	}
	160
	161	static int
	162	nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
	163	{
	164	void *addr;
	165	nx_hostrq_rx_ctx_t *prq;
	166	nx_cardrsp_rx_ctx_t *prsp;
	167	nx_hostrq_rds_ring_t *prq_rds;
	168	nx_hostrq_sds_ring_t *prq_sds;
	169	nx_cardrsp_rds_ring_t *prsp_rds;
	170	nx_cardrsp_sds_ring_t *prsp_sds;
	171	struct nx_host_rds_ring *rds_ring;
d8b100c5	172	struct nx_host_sds_ring *sds_ring;
d9e651bc DP	173
	174	dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
	175	u64 phys_addr;
	176
	177	int i, nrds_rings, nsds_rings;
	178	size_t rq_size, rsp_size;
2edbb454	179	u32 cap, reg, val;
d9e651bc DP	180
	181	int err;
	182
becf46a0	183	struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
d9e651bc	184
d9e651bc	185	nrds_rings = adapter->max_rds_rings;
d8b100c5	186	nsds_rings = adapter->max_sds_rings;
d9e651bc DP	187
	188	rq_size =
	189	SIZEOF_HOSTRQ_RX(nx_hostrq_rx_ctx_t, nrds_rings, nsds_rings);
	190	rsp_size =
	191	SIZEOF_CARDRSP_RX(nx_cardrsp_rx_ctx_t, nrds_rings, nsds_rings);
	192
	193	addr = pci_alloc_consistent(adapter->pdev,
	194	rq_size, &hostrq_phys_addr);
	195	if (addr == NULL)
	196	return -ENOMEM;
	197	prq = (nx_hostrq_rx_ctx_t *)addr;
	198
	199	addr = pci_alloc_consistent(adapter->pdev,
	200	rsp_size, &cardrsp_phys_addr);
	201	if (addr == NULL) {
	202	err = -ENOMEM;
	203	goto out_free_rq;
	204	}
	205	prsp = (nx_cardrsp_rx_ctx_t *)addr;
	206
	207	prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
	208
	209	cap = (NX_CAP0_LEGACY_CONTEXT \| NX_CAP0_LEGACY_MN);
	210	cap \|= (NX_CAP0_JUMBO_CONTIGUOUS \| NX_CAP0_LRO_CONTIGUOUS);
	211
	212	prq->capabilities[0] = cpu_to_le32(cap);
	213	prq->host_int_crb_mode =
	214	cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
	215	prq->host_rds_crb_mode =
	216	cpu_to_le32(NX_HOST_RDS_CRB_MODE_UNIQUE);
	217
	218	prq->num_rds_rings = cpu_to_le16(nrds_rings);
	219	prq->num_sds_rings = cpu_to_le16(nsds_rings);
2edbb454 DP	220	prq->rds_ring_offset = cpu_to_le32(0);
	221
	222	val = le32_to_cpu(prq->rds_ring_offset) +
d9e651bc	223	(sizeof(nx_hostrq_rds_ring_t) * nrds_rings);
2edbb454	224	prq->sds_ring_offset = cpu_to_le32(val);
d9e651bc	225
2edbb454 DP	226	prq_rds = (nx_hostrq_rds_ring_t *)(prq->data +
2edbb454 DP	227	le32_to_cpu(prq->rds_ring_offset));
d9e651bc DP	228
	229	for (i = 0; i < nrds_rings; i++) {
	230
	231	rds_ring = &recv_ctx->rds_rings[i];
	232
	233	prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
438627c7	234	prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
d9e651bc DP	235	prq_rds[i].ring_kind = cpu_to_le32(i);
	236	prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
	237	}
	238
2edbb454 DP	239	prq_sds = (nx_hostrq_sds_ring_t *)(prq->data +
2edbb454 DP	240	le32_to_cpu(prq->sds_ring_offset));
d9e651bc	241
d8b100c5 DP	242	for (i = 0; i < nsds_rings; i++) {
	243
	244	sds_ring = &recv_ctx->sds_rings[i];
	245
	246	prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
	247	prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
	248	prq_sds[i].msi_index = cpu_to_le16(i);
	249	}
d9e651bc DP	250
	251	phys_addr = hostrq_phys_addr;
	252	err = netxen_issue_cmd(adapter,
	253	adapter->ahw.pci_func,
	254	NXHAL_VERSION,
	255	(u32)(phys_addr >> 32),
	256	(u32)(phys_addr & 0xffffffff),
	257	rq_size,
	258	NX_CDRP_CMD_CREATE_RX_CTX);
	259	if (err) {
	260	printk(KERN_WARNING
	261	"Failed to create rx ctx in firmware%d\n", err);
	262	goto out_free_rsp;
	263	}
	264
	265
	266	prsp_rds = ((nx_cardrsp_rds_ring_t *)
2edbb454	267	&prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
d9e651bc	268
2edbb454	269	for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
d9e651bc DP	270	rds_ring = &recv_ctx->rds_rings[i];
	271
	272	reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
	273	rds_ring->crb_rcv_producer = NETXEN_NIC_REG(reg - 0x200);
	274	}
	275
	276	prsp_sds = ((nx_cardrsp_sds_ring_t *)
2edbb454	277	&prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
d9e651bc	278
d8b100c5 DP	279	for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
	280	sds_ring = &recv_ctx->sds_rings[i];
	281
	282	reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
	283	sds_ring->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200);
	284
	285	reg = le32_to_cpu(prsp_sds[i].interrupt_crb);
	286	sds_ring->crb_intr_mask = NETXEN_NIC_REG(reg - 0x200);
	287	}
d9e651bc DP	288
	289	recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
	290	recv_ctx->context_id = le16_to_cpu(prsp->context_id);
2edbb454	291	recv_ctx->virt_port = prsp->virt_port;
d9e651bc DP	292
	293	out_free_rsp:
	294	pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
	295	out_free_rq:
	296	pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
	297	return err;
	298	}
	299
	300	static void
	301	nx_fw_cmd_destroy_rx_ctx(struct netxen_adapter *adapter)
	302	{
becf46a0	303	struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
d9e651bc DP	304
	305	if (netxen_issue_cmd(adapter,
	306	adapter->ahw.pci_func,
	307	NXHAL_VERSION,
	308	recv_ctx->context_id,
	309	NX_DESTROY_CTX_RESET,
	310	0,
	311	NX_CDRP_CMD_DESTROY_RX_CTX)) {
	312
	313	printk(KERN_WARNING
	314	"%s: Failed to destroy rx ctx in firmware\n",
	315	netxen_nic_driver_name);
	316	}
	317	}
	318
	319	static int
	320	nx_fw_cmd_create_tx_ctx(struct netxen_adapter *adapter)
	321	{
	322	nx_hostrq_tx_ctx_t *prq;
	323	nx_hostrq_cds_ring_t *prq_cds;
	324	nx_cardrsp_tx_ctx_t *prsp;
	325	void rq_addr, rsp_addr;
	326	size_t rq_size, rsp_size;
	327	u32 temp;
	328	int err = 0;
	329	u64 offset, phys_addr;
	330	dma_addr_t rq_phys_addr, rsp_phys_addr;
	331
	332	rq_size = SIZEOF_HOSTRQ_TX(nx_hostrq_tx_ctx_t);
	333	rq_addr = pci_alloc_consistent(adapter->pdev,
	334	rq_size, &rq_phys_addr);
	335	if (!rq_addr)
	336	return -ENOMEM;
	337
	338	rsp_size = SIZEOF_CARDRSP_TX(nx_cardrsp_tx_ctx_t);
	339	rsp_addr = pci_alloc_consistent(adapter->pdev,
	340	rsp_size, &rsp_phys_addr);
	341	if (!rsp_addr) {
	342	err = -ENOMEM;
	343	goto out_free_rq;
	344	}
	345
	346	memset(rq_addr, 0, rq_size);
	347	prq = (nx_hostrq_tx_ctx_t *)rq_addr;
	348
	349	memset(rsp_addr, 0, rsp_size);
	350	prsp = (nx_cardrsp_tx_ctx_t *)rsp_addr;
	351
	352	prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
	353
	354	temp = (NX_CAP0_LEGACY_CONTEXT \| NX_CAP0_LEGACY_MN \| NX_CAP0_LSO);
	355	prq->capabilities[0] = cpu_to_le32(temp);
	356
	357	prq->host_int_crb_mode =
	358	cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
	359
	360	prq->interrupt_ctl = 0;
	361	prq->msi_index = 0;
	362
	363	prq->dummy_dma_addr = cpu_to_le64(adapter->dummy_dma.phys_addr);
	364
	365	offset = adapter->ctx_desc_phys_addr+sizeof(struct netxen_ring_ctx);
	366	prq->cmd_cons_dma_addr = cpu_to_le64(offset);
	367
368	prq_cds = &prq->cds_ring;
369
370	prq_cds->host_phys_addr =
371	cpu_to_le64(adapter->ahw.cmd_desc_phys_addr);
372
438627c7	373	prq_cds->ring_size = cpu_to_le32(adapter->num_txd);
d9e651bc DP	374
	375	phys_addr = rq_phys_addr;
	376	err = netxen_issue_cmd(adapter,
	377	adapter->ahw.pci_func,
	378	NXHAL_VERSION,
	379	(u32)(phys_addr >> 32),
	380	((u32)phys_addr & 0xffffffff),
	381	rq_size,
	382	NX_CDRP_CMD_CREATE_TX_CTX);
	383
	384	if (err == NX_RCODE_SUCCESS) {
	385	temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
	386	adapter->crb_addr_cmd_producer =
	387	NETXEN_NIC_REG(temp - 0x200);
	388	#if 0
	389	adapter->tx_state =
	390	le32_to_cpu(prsp->host_ctx_state);
	391	#endif
	392	adapter->tx_context_id =
	393	le16_to_cpu(prsp->context_id);
	394	} else {
	395	printk(KERN_WARNING
	396	"Failed to create tx ctx in firmware%d\n", err);
	397	err = -EIO;
	398	}
	399
	400	pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
	401
	402	out_free_rq:
	403	pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
	404
	405	return err;
	406	}
	407
	408	static void
	409	nx_fw_cmd_destroy_tx_ctx(struct netxen_adapter *adapter)
	410	{
	411	if (netxen_issue_cmd(adapter,
	412	adapter->ahw.pci_func,
	413	NXHAL_VERSION,
	414	adapter->tx_context_id,
	415	NX_DESTROY_CTX_RESET,
	416	0,
	417	NX_CDRP_CMD_DESTROY_TX_CTX)) {
	418
	419	printk(KERN_WARNING
	420	"%s: Failed to destroy tx ctx in firmware\n",
	421	netxen_nic_driver_name);
	422	}
	423	}
	424
	425	static u64 ctx_addr_sig_regs[][3] = {
	426	{NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)},
	427	{NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)},
	428	{NETXEN_NIC_REG(0x198), NETXEN_NIC_REG(0x19c), NETXEN_NIC_REG(0x1c8)},
	429	{NETXEN_NIC_REG(0x1a0), NETXEN_NIC_REG(0x1a4), NETXEN_NIC_REG(0x1cc)}
	430	};
	431
	432	#define CRB_CTX_ADDR_REG_LO(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][0])
	433	#define CRB_CTX_ADDR_REG_HI(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][2])
	434	#define CRB_CTX_SIGNATURE_REG(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][1])
	435
	436	#define lower32(x) ((u32)((x) & 0xffffffff))
	437	#define upper32(x) ((u32)(((u64)(x) >> 32) & 0xffffffff))
438
439	static struct netxen_recv_crb recv_crb_registers[] = {
440	/* Instance 0 */
441	{
442	/* crb_rcv_producer: */
443	{
444	NETXEN_NIC_REG(0x100),
445	/* Jumbo frames */
446	NETXEN_NIC_REG(0x110),
447	/* LRO */
448	NETXEN_NIC_REG(0x120)
449	},
450	/* crb_sts_consumer: */
451	NETXEN_NIC_REG(0x138),
452	},
453	/* Instance 1 */
454	{
455	/* crb_rcv_producer: */
456	{
457	NETXEN_NIC_REG(0x144),
458	/* Jumbo frames */
459	NETXEN_NIC_REG(0x154),
460	/* LRO */
461	NETXEN_NIC_REG(0x164)
462	},
463	/* crb_sts_consumer: */
464	NETXEN_NIC_REG(0x17c),
465	},
466	/* Instance 2 */
467	{
468	/* crb_rcv_producer: */
469	{
470	NETXEN_NIC_REG(0x1d8),
471	/* Jumbo frames */
472	NETXEN_NIC_REG(0x1f8),
473	/* LRO */
474	NETXEN_NIC_REG(0x208)
475	},
476	/* crb_sts_consumer: */
477	NETXEN_NIC_REG(0x220),
478	},
479	/* Instance 3 */
480	{
481	/* crb_rcv_producer: */
482	{
483	NETXEN_NIC_REG(0x22c),
484	/* Jumbo frames */
485	NETXEN_NIC_REG(0x23c),
486	/* LRO */
487	NETXEN_NIC_REG(0x24c)
488	},
489	/* crb_sts_consumer: */
490	NETXEN_NIC_REG(0x264),
491	},
492	};
493
494	static int
495	netxen_init_old_ctx(struct netxen_adapter *adapter)
496	{
497	struct netxen_recv_context *recv_ctx;
498	struct nx_host_rds_ring *rds_ring;
d8b100c5	499	struct nx_host_sds_ring *sds_ring;
becf46a0	500	int ring;
d9e651bc DP	501	int func_id = adapter->portnum;
	502
	503	adapter->ctx_desc->cmd_ring_addr =
	504	cpu_to_le64(adapter->ahw.cmd_desc_phys_addr);
	505	adapter->ctx_desc->cmd_ring_size =
438627c7	506	cpu_to_le32(adapter->num_txd);
d9e651bc	507
becf46a0	508	recv_ctx = &adapter->recv_ctx;
d9e651bc	509
becf46a0 DP	510	for (ring = 0; ring < adapter->max_rds_rings; ring++) {
becf46a0 DP	511	rds_ring = &recv_ctx->rds_rings[ring];
d9e651bc	512
becf46a0 DP	513	adapter->ctx_desc->rcv_ctx[ring].rcv_ring_addr =
	514	cpu_to_le64(rds_ring->phys_addr);
	515	adapter->ctx_desc->rcv_ctx[ring].rcv_ring_size =
438627c7	516	cpu_to_le32(rds_ring->num_desc);
d9e651bc	517	}
d8b100c5 DP	518	sds_ring = &recv_ctx->sds_rings[0];
	519	adapter->ctx_desc->sts_ring_addr = cpu_to_le64(sds_ring->phys_addr);
	520	adapter->ctx_desc->sts_ring_size = cpu_to_le32(sds_ring->num_desc);
d9e651bc DP	521
	522	adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_LO(func_id),
	523	lower32(adapter->ctx_desc_phys_addr));
	524	adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_HI(func_id),
	525	upper32(adapter->ctx_desc_phys_addr));
	526	adapter->pci_write_normalize(adapter, CRB_CTX_SIGNATURE_REG(func_id),
	527	NETXEN_CTX_SIGNATURE \| func_id);
	528	return 0;
	529	}
	530
	531	static uint32_t sw_int_mask[4] = {
	532	CRB_SW_INT_MASK_0, CRB_SW_INT_MASK_1,
	533	CRB_SW_INT_MASK_2, CRB_SW_INT_MASK_3
	534	};
	535
	536	int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
	537	{
	538	struct netxen_hardware_context *hw = &adapter->ahw;
	539	u32 state = 0;
	540	void *addr;
	541	int err = 0;
becf46a0	542	int ring;
d9e651bc DP	543	struct netxen_recv_context *recv_ctx;
d9e651bc DP	544	struct nx_host_rds_ring *rds_ring;
d8b100c5 DP	545	struct nx_host_sds_ring *sds_ring;
	546
	547	struct pci_dev *pdev = adapter->pdev;
	548	struct net_device *netdev = adapter->netdev;
d9e651bc DP	549
	550	err = netxen_receive_peg_ready(adapter);
	551	if (err) {
	552	printk(KERN_ERR "Rcv Peg initialization not complete:%x.\n",
	553	state);
	554	return err;
	555	}
	556
d8b100c5	557	addr = pci_alloc_consistent(pdev,
d9e651bc DP	558	sizeof(struct netxen_ring_ctx) + sizeof(uint32_t),
	559	&adapter->ctx_desc_phys_addr);
	560
	561	if (addr == NULL) {
d8b100c5	562	dev_err(&pdev->dev, "failed to allocate hw context\n");
d9e651bc DP	563	return -ENOMEM;
	564	}
	565	memset(addr, 0, sizeof(struct netxen_ring_ctx));
	566	adapter->ctx_desc = (struct netxen_ring_ctx *)addr;
	567	adapter->ctx_desc->ctx_id = cpu_to_le32(adapter->portnum);
	568	adapter->ctx_desc->cmd_consumer_offset =
	569	cpu_to_le64(adapter->ctx_desc_phys_addr +
	570	sizeof(struct netxen_ring_ctx));
	571	adapter->cmd_consumer =
	572	(__le32 )(((char )addr) + sizeof(struct netxen_ring_ctx));
	573
	574	/* cmd desc ring */
d8b100c5 DP	575	addr = pci_alloc_consistent(pdev,
d8b100c5 DP	576	TX_DESC_RINGSIZE(adapter),
d9e651bc DP	577	&hw->cmd_desc_phys_addr);
	578
	579	if (addr == NULL) {
d8b100c5 DP	580	dev_err(&pdev->dev, "%s: failed to allocate tx desc ring\n",
d8b100c5 DP	581	netdev->name);
d9e651bc DP	582	return -ENOMEM;
	583	}
	584
	585	hw->cmd_desc_head = (struct cmd_desc_type0 *)addr;
	586
becf46a0	587	recv_ctx = &adapter->recv_ctx;
d9e651bc	588
becf46a0	589	for (ring = 0; ring < adapter->max_rds_rings; ring++) {
becf46a0	590	rds_ring = &recv_ctx->rds_rings[ring];
d9e651bc	591	addr = pci_alloc_consistent(adapter->pdev,
d8b100c5	592	RCV_DESC_RINGSIZE(rds_ring),
becf46a0	593	&rds_ring->phys_addr);
d9e651bc	594	if (addr == NULL) {
d8b100c5 DP	595	dev_err(&pdev->dev,
	596	"%s: failed to allocate rds ring [%d]\n",
	597	netdev->name, ring);
d9e651bc DP	598	err = -ENOMEM;
	599	goto err_out_free;
	600	}
becf46a0	601	rds_ring->desc_head = (struct rcv_desc *)addr;
d9e651bc DP	602
d9e651bc DP	603	if (adapter->fw_major < 4)
becf46a0	604	rds_ring->crb_rcv_producer =
d9e651bc	605	recv_crb_registers[adapter->portnum].
becf46a0	606	crb_rcv_producer[ring];
d9e651bc DP	607	}
d9e651bc DP	608
d8b100c5 DP	609	for (ring = 0; ring < adapter->max_sds_rings; ring++) {
	610	sds_ring = &recv_ctx->sds_rings[ring];
	611
	612	addr = pci_alloc_consistent(adapter->pdev,
	613	STATUS_DESC_RINGSIZE(sds_ring),
	614	&sds_ring->phys_addr);
	615	if (addr == NULL) {
	616	dev_err(&pdev->dev,
	617	"%s: failed to allocate sds ring [%d]\n",
	618	netdev->name, ring);
	619	err = -ENOMEM;
	620	goto err_out_free;
	621	}
	622	sds_ring->desc_head = (struct status_desc *)addr;
becf46a0	623	}
becf46a0	624
becf46a0	625
d9e651bc	626	if (adapter->fw_major >= 4) {
d9e651bc DP	627	err = nx_fw_cmd_create_rx_ctx(adapter);
	628	if (err)
	629	goto err_out_free;
	630	err = nx_fw_cmd_create_tx_ctx(adapter);
	631	if (err)
	632	goto err_out_free;
	633	} else {
d8b100c5 DP	634	sds_ring = &recv_ctx->sds_rings[0];
	635	sds_ring->crb_sts_consumer =
	636	recv_crb_registers[adapter->portnum].crb_sts_consumer;
d9e651bc	637
d8b100c5 DP	638	recv_ctx->sds_rings[0].crb_intr_mask =
d8b100c5 DP	639	sw_int_mask[adapter->portnum];
d9e651bc DP	640
	641	err = netxen_init_old_ctx(adapter);
	642	if (err) {
	643	netxen_free_hw_resources(adapter);
	644	return err;
	645	}
	646
	647	}
	648
	649	return 0;
	650
	651	err_out_free:
	652	netxen_free_hw_resources(adapter);
	653	return err;
	654	}
	655
	656	void netxen_free_hw_resources(struct netxen_adapter *adapter)
	657	{
	658	struct netxen_recv_context *recv_ctx;
	659	struct nx_host_rds_ring *rds_ring;
d8b100c5	660	struct nx_host_sds_ring *sds_ring;
becf46a0	661	int ring;
d9e651bc DP	662
	663	if (adapter->fw_major >= 4) {
	664	nx_fw_cmd_destroy_tx_ctx(adapter);
	665	nx_fw_cmd_destroy_rx_ctx(adapter);
	666	}
	667
	668	if (adapter->ctx_desc != NULL) {
	669	pci_free_consistent(adapter->pdev,
	670	sizeof(struct netxen_ring_ctx) +
	671	sizeof(uint32_t),
	672	adapter->ctx_desc,
	673	adapter->ctx_desc_phys_addr);
	674	adapter->ctx_desc = NULL;
	675	}
	676
	677	if (adapter->ahw.cmd_desc_head != NULL) {
	678	pci_free_consistent(adapter->pdev,
	679	sizeof(struct cmd_desc_type0) *
438627c7	680	adapter->num_txd,
d9e651bc DP	681	adapter->ahw.cmd_desc_head,
	682	adapter->ahw.cmd_desc_phys_addr);
	683	adapter->ahw.cmd_desc_head = NULL;
	684	}
	685
becf46a0 DP	686	recv_ctx = &adapter->recv_ctx;
	687	for (ring = 0; ring < adapter->max_rds_rings; ring++) {
	688	rds_ring = &recv_ctx->rds_rings[ring];
d9e651bc	689
becf46a0	690	if (rds_ring->desc_head != NULL) {
d9e651bc	691	pci_free_consistent(adapter->pdev,
d8b100c5	692	RCV_DESC_RINGSIZE(rds_ring),
becf46a0 DP	693	rds_ring->desc_head,
	694	rds_ring->phys_addr);
	695	rds_ring->desc_head = NULL;
d9e651bc DP	696	}
d9e651bc DP	697	}
becf46a0	698
d8b100c5 DP	699	for (ring = 0; ring < adapter->max_sds_rings; ring++) {
	700	sds_ring = &recv_ctx->sds_rings[ring];
	701
	702	if (sds_ring->desc_head != NULL) {
	703	pci_free_consistent(adapter->pdev,
	704	STATUS_DESC_RINGSIZE(sds_ring),
	705	sds_ring->desc_head,
	706	sds_ring->phys_addr);
	707	sds_ring->desc_head = NULL;
	708	}
becf46a0	709	}
d9e651bc DP	710	}
d9e651bc DP	711