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netdev: convert bulk of drivers to netdev_tx_t
[deliverable/linux.git] / drivers / net / netxen / netxen_nic_init.c
CommitLineData
3d396eb1 1/*
5d242f1c 2 * Copyright (C) 2003 - 2009 NetXen, Inc.
3d396eb1 3 * All rights reserved.
80922fbc 4 *
3d396eb1
AK		 5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
80922fbc 9 *
3d396eb1
AK		 10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
80922fbc 14 *
3d396eb1
AK		 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
80922fbc 19 *
3d396eb1
AK		 20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
80922fbc 22 *
3d396eb1
AK		 23 * Contact Information:
24 * info@netxen.com
5d242f1c
DP		 25 * NetXen Inc,
26 * 18922 Forge Drive
27 * Cupertino, CA 95014-0701
3d396eb1
AK		 28 *
29 */
30
31#include <linux/netdevice.h>
32#include <linux/delay.h>
33#include "netxen_nic.h"
34#include "netxen_nic_hw.h"
3d396eb1
AK		 35
36struct crb_addr_pair {
e0e20a1a
LCMT		 37 u32 addr;
38 u32 data;
3d396eb1
AK		 39};
40
41#define NETXEN_MAX_CRB_XFORM 60
42static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
e0e20a1a 43#define NETXEN_ADDR_ERROR (0xffffffff)
3d396eb1
AK		 44
45#define crb_addr_transform(name) \
46 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
47 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
48
cb8011ad
AK		 49#define NETXEN_NIC_XDMA_RESET 0x8000ff
50
becf46a0 51static void
d8b100c5
DP		 52netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
53 struct nx_host_rds_ring *rds_ring);
993fb90c 54
3d396eb1
AK		 55static void crb_addr_transform_setup(void)
56{
57 crb_addr_transform(XDMA);
58 crb_addr_transform(TIMR);
59 crb_addr_transform(SRE);
60 crb_addr_transform(SQN3);
61 crb_addr_transform(SQN2);
62 crb_addr_transform(SQN1);
63 crb_addr_transform(SQN0);
64 crb_addr_transform(SQS3);
65 crb_addr_transform(SQS2);
66 crb_addr_transform(SQS1);
67 crb_addr_transform(SQS0);
68 crb_addr_transform(RPMX7);
69 crb_addr_transform(RPMX6);
70 crb_addr_transform(RPMX5);
71 crb_addr_transform(RPMX4);
72 crb_addr_transform(RPMX3);
73 crb_addr_transform(RPMX2);
74 crb_addr_transform(RPMX1);
75 crb_addr_transform(RPMX0);
76 crb_addr_transform(ROMUSB);
77 crb_addr_transform(SN);
78 crb_addr_transform(QMN);
79 crb_addr_transform(QMS);
80 crb_addr_transform(PGNI);
81 crb_addr_transform(PGND);
82 crb_addr_transform(PGN3);
83 crb_addr_transform(PGN2);
84 crb_addr_transform(PGN1);
85 crb_addr_transform(PGN0);
86 crb_addr_transform(PGSI);
87 crb_addr_transform(PGSD);
88 crb_addr_transform(PGS3);
89 crb_addr_transform(PGS2);
90 crb_addr_transform(PGS1);
91 crb_addr_transform(PGS0);
92 crb_addr_transform(PS);
93 crb_addr_transform(PH);
94 crb_addr_transform(NIU);
95 crb_addr_transform(I2Q);
96 crb_addr_transform(EG);
97 crb_addr_transform(MN);
98 crb_addr_transform(MS);
99 crb_addr_transform(CAS2);
100 crb_addr_transform(CAS1);
101 crb_addr_transform(CAS0);
102 crb_addr_transform(CAM);
103 crb_addr_transform(C2C1);
104 crb_addr_transform(C2C0);
1fcca1a5 105 crb_addr_transform(SMB);
e4c93c81
DP		 106 crb_addr_transform(OCM0);
107 crb_addr_transform(I2C0);
3d396eb1
AK		 108}
109
2956640d 110void netxen_release_rx_buffers(struct netxen_adapter *adapter)
3d396eb1 111{
2956640d 112 struct netxen_recv_context *recv_ctx;
48bfd1e0 113 struct nx_host_rds_ring *rds_ring;
2956640d 114 struct netxen_rx_buffer *rx_buf;
becf46a0
DP		 115 int i, ring;
116
117 recv_ctx = &adapter->recv_ctx;
118 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
119 rds_ring = &recv_ctx->rds_rings[ring];
438627c7 120 for (i = 0; i < rds_ring->num_desc; ++i) {
becf46a0
DP		 121 rx_buf = &(rds_ring->rx_buf_arr[i]);
122 if (rx_buf->state == NETXEN_BUFFER_FREE)
123 continue;
124 pci_unmap_single(adapter->pdev,
125 rx_buf->dma,
126 rds_ring->dma_size,
127 PCI_DMA_FROMDEVICE);
128 if (rx_buf->skb != NULL)
129 dev_kfree_skb_any(rx_buf->skb);
2956640d
DP		 130 }
131 }
132}
133
134void netxen_release_tx_buffers(struct netxen_adapter *adapter)
135{
136 struct netxen_cmd_buffer *cmd_buf;
137 struct netxen_skb_frag *buffrag;
138 int i, j;
4ea528a1 139 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
2956640d 140
d877f1e3
DP		 141 cmd_buf = tx_ring->cmd_buf_arr;
142 for (i = 0; i < tx_ring->num_desc; i++) {
2956640d
DP		 143 buffrag = cmd_buf->frag_array;
144 if (buffrag->dma) {
145 pci_unmap_single(adapter->pdev, buffrag->dma,
146 buffrag->length, PCI_DMA_TODEVICE);
147 buffrag->dma = 0ULL;
148 }
149 for (j = 0; j < cmd_buf->frag_count; j++) {
150 buffrag++;
151 if (buffrag->dma) {
152 pci_unmap_page(adapter->pdev, buffrag->dma,
153 buffrag->length,
154 PCI_DMA_TODEVICE);
155 buffrag->dma = 0ULL;
156 }
157 }
2956640d
DP		 158 if (cmd_buf->skb) {
159 dev_kfree_skb_any(cmd_buf->skb);
160 cmd_buf->skb = NULL;
161 }
162 cmd_buf++;
163 }
164}
165
166void netxen_free_sw_resources(struct netxen_adapter *adapter)
167{
168 struct netxen_recv_context *recv_ctx;
48bfd1e0 169 struct nx_host_rds_ring *rds_ring;
d877f1e3 170 struct nx_host_tx_ring *tx_ring;
becf46a0
DP		 171 int ring;
172
173 recv_ctx = &adapter->recv_ctx;
4ea528a1
DP		 174
175 if (recv_ctx->rds_rings == NULL)
176 goto skip_rds;
177
becf46a0
DP		 178 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
179 rds_ring = &recv_ctx->rds_rings[ring];
f2333a01
F		 180 vfree(rds_ring->rx_buf_arr);
181 rds_ring->rx_buf_arr = NULL;
2956640d 182 }
4ea528a1
DP		 183 kfree(recv_ctx->rds_rings);
184
185skip_rds:
186 if (adapter->tx_ring == NULL)
187 return;
becf46a0 188
4ea528a1 189 tx_ring = adapter->tx_ring;
f2333a01 190 vfree(tx_ring->cmd_buf_arr);
2956640d
DP		 191}
192
193int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
194{
195 struct netxen_recv_context *recv_ctx;
48bfd1e0 196 struct nx_host_rds_ring *rds_ring;
d8b100c5 197 struct nx_host_sds_ring *sds_ring;
4ea528a1 198 struct nx_host_tx_ring *tx_ring;
2956640d 199 struct netxen_rx_buffer *rx_buf;
4ea528a1 200 int ring, i, size;
2956640d
DP		 201
202 struct netxen_cmd_buffer *cmd_buf_arr;
203 struct net_device *netdev = adapter->netdev;
d877f1e3 204 struct pci_dev *pdev = adapter->pdev;
2956640d 205
4ea528a1
DP		 206 size = sizeof(struct nx_host_tx_ring);
207 tx_ring = kzalloc(size, GFP_KERNEL);
208 if (tx_ring == NULL) {
209 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
210 netdev->name);
211 return -ENOMEM;
212 }
213 adapter->tx_ring = tx_ring;
214
d877f1e3 215 tx_ring->num_desc = adapter->num_txd;
b2af9cb0 216 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
4ea528a1
DP		 217
218 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
2956640d 219 if (cmd_buf_arr == NULL) {
d877f1e3 220 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
2956640d
DP		 221 netdev->name);
222 return -ENOMEM;
223 }
d877f1e3
DP		 224 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
225 tx_ring->cmd_buf_arr = cmd_buf_arr;
2956640d 226
becf46a0 227 recv_ctx = &adapter->recv_ctx;
4ea528a1
DP		 228
229 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
230 rds_ring = kzalloc(size, GFP_KERNEL);
231 if (rds_ring == NULL) {
232 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
233 netdev->name);
234 return -ENOMEM;
235 }
236 recv_ctx->rds_rings = rds_ring;
237
becf46a0
DP		 238 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
239 rds_ring = &recv_ctx->rds_rings[ring];
438627c7
DP		 240 switch (ring) {
241 case RCV_RING_NORMAL:
242 rds_ring->num_desc = adapter->num_rxd;
becf46a0
DP		 243 if (adapter->ahw.cut_through) {
244 rds_ring->dma_size =
245 NX_CT_DEFAULT_RX_BUF_LEN;
48bfd1e0 246 rds_ring->skb_size =
becf46a0
DP		 247 NX_CT_DEFAULT_RX_BUF_LEN;
248 } else {
9b08beba
DP		 249 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
250 rds_ring->dma_size =
251 NX_P3_RX_BUF_MAX_LEN;
252 else
253 rds_ring->dma_size =
254 NX_P2_RX_BUF_MAX_LEN;
becf46a0 255 rds_ring->skb_size =
9b08beba 256 rds_ring->dma_size + NET_IP_ALIGN;
becf46a0
DP		 257 }
258 break;
2956640d 259
438627c7
DP		 260 case RCV_RING_JUMBO:
261 rds_ring->num_desc = adapter->num_jumbo_rxd;
becf46a0
DP		 262 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
263 rds_ring->dma_size =
264 NX_P3_RX_JUMBO_BUF_MAX_LEN;
265 else
266 rds_ring->dma_size =
267 NX_P2_RX_JUMBO_BUF_MAX_LEN;
268 rds_ring->skb_size =
269 rds_ring->dma_size + NET_IP_ALIGN;
270 break;
2956640d 271
becf46a0 272 case RCV_RING_LRO:
438627c7 273 rds_ring->num_desc = adapter->num_lro_rxd;
9b08beba
DP		 274 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH;
275 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
becf46a0
DP		 276 break;
277
278 }
279 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
d8b100c5 280 vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
becf46a0
DP		 281 if (rds_ring->rx_buf_arr == NULL) {
282 printk(KERN_ERR "%s: Failed to allocate "
283 "rx buffer ring %d\n",
284 netdev->name, ring);
285 /* free whatever was already allocated */
286 goto err_out;
287 }
d8b100c5 288 memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
becf46a0
DP		 289 INIT_LIST_HEAD(&rds_ring->free_list);
290 /*
291 * Now go through all of them, set reference handles
292 * and put them in the queues.
293 */
becf46a0 294 rx_buf = rds_ring->rx_buf_arr;
4ea528a1 295 for (i = 0; i < rds_ring->num_desc; i++) {
becf46a0
DP		 296 list_add_tail(&rx_buf->list,
297 &rds_ring->free_list);
298 rx_buf->ref_handle = i;
299 rx_buf->state = NETXEN_BUFFER_FREE;
300 rx_buf++;
3d396eb1 301 }
d8b100c5
DP		 302 spin_lock_init(&rds_ring->lock);
303 }
304
305 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
306 sds_ring = &recv_ctx->sds_rings[ring];
307 sds_ring->irq = adapter->msix_entries[ring].vector;
d8b100c5
DP		 308 sds_ring->adapter = adapter;
309 sds_ring->num_desc = adapter->num_rxd;
310
311 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
312 INIT_LIST_HEAD(&sds_ring->free_list[i]);
3d396eb1 313 }
2956640d
DP		 314
315 return 0;
316
317err_out:
318 netxen_free_sw_resources(adapter);
319 return -ENOMEM;
3d396eb1
AK		 320}
321
3d396eb1
AK		 322void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
323{
cb7e4b6e
DP		 324 adapter->init_port = netxen_niu_xg_init_port;
325 adapter->stop_port = netxen_niu_disable_xg_port;
326
327 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
328 adapter->macaddr_set = netxen_p2_nic_set_mac_addr;
329 adapter->set_multi = netxen_p2_nic_set_multi;
80922fbc 330 adapter->set_mtu = netxen_nic_set_mtu_xgb;
3ad4467c 331 adapter->set_promisc = netxen_p2_nic_set_promisc;
cb7e4b6e 332 } else {
9ad27643
DP		 333 adapter->set_mtu = nx_fw_cmd_set_mtu;
334 adapter->set_promisc = netxen_p3_nic_set_promisc;
3d0a3cc9
DP		 335 adapter->macaddr_set = netxen_p3_nic_set_mac_addr;
336 adapter->set_multi = netxen_p3_nic_set_multi;
cb7e4b6e 337
3ad4467c
DP		 338 if (adapter->ahw.port_type == NETXEN_NIC_GBE) {
339 adapter->phy_read = nx_fw_cmd_query_phy;
340 adapter->phy_write = nx_fw_cmd_set_phy;
341 }
cb7e4b6e 342 }
3d396eb1
AK		 343}
344
345/*
346 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
347 * address to external PCI CRB address.
348 */
993fb90c 349static u32 netxen_decode_crb_addr(u32 addr)
3d396eb1
AK		 350{
351 int i;
e0e20a1a 352 u32 base_addr, offset, pci_base;
3d396eb1
AK		 353
354 crb_addr_transform_setup();
355
356 pci_base = NETXEN_ADDR_ERROR;
357 base_addr = addr & 0xfff00000;
358 offset = addr & 0x000fffff;
359
360 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
361 if (crb_addr_xform[i] == base_addr) {
362 pci_base = i << 20;
363 break;
364 }
365 }
366 if (pci_base == NETXEN_ADDR_ERROR)
367 return pci_base;
368 else
369 return (pci_base + offset);
370}
371
c9517e58 372#define NETXEN_MAX_ROM_WAIT_USEC 100
3d396eb1 373
993fb90c 374static int netxen_wait_rom_done(struct netxen_adapter *adapter)
3d396eb1
AK		 375{
376 long timeout = 0;
377 long done = 0;
378
27c915a4
DP		 379 cond_resched();
380
3d396eb1 381 while (done == 0) {
f98a9f69 382 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
3d396eb1 383 done &= 2;
c9517e58
DP		 384 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) {
385 dev_err(&adapter->pdev->dev,
386 "Timeout reached waiting for rom done");
3d396eb1
AK		 387 return -EIO;
388 }
c9517e58 389 udelay(1);
3d396eb1
AK		 390 }
391 return 0;
392}
393
993fb90c
AB		 394static int do_rom_fast_read(struct netxen_adapter *adapter,
395 int addr, int *valp)
3d396eb1 396{
f98a9f69
DP		 397 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
398 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
399 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
400 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
3d396eb1
AK		 401 if (netxen_wait_rom_done(adapter)) {
402 printk("Error waiting for rom done\n");
403 return -EIO;
404 }
405 /* reset abyte_cnt and dummy_byte_cnt */
f98a9f69 406 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
27c915a4 407 udelay(10);
f98a9f69 408 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
3d396eb1 409
f98a9f69 410 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
3d396eb1
AK		 411 return 0;
412}
413
993fb90c
AB		 414static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
415 u8 *bytes, size_t size)
27d2ab54
AK		 416{
417 int addridx;
418 int ret = 0;
419
420 for (addridx = addr; addridx < (addr + size); addridx += 4) {
f305f789
AV		 421 int v;
422 ret = do_rom_fast_read(adapter, addridx, &v);
27d2ab54
AK		 423 if (ret != 0)
424 break;
f305f789 425 *(__le32 *)bytes = cpu_to_le32(v);
27d2ab54
AK		 426 bytes += 4;
427 }
428
429 return ret;
430}
431
432int
4790654c 433netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
27d2ab54
AK		 434 u8 *bytes, size_t size)
435{
436 int ret;
437
c9517e58 438 ret = netxen_rom_lock(adapter);
27d2ab54
AK		 439 if (ret < 0)
440 return ret;
441
442 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
443
444 netxen_rom_unlock(adapter);
445 return ret;
446}
447
3d396eb1
AK		 448int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
449{
450 int ret;
451
c9517e58 452 if (netxen_rom_lock(adapter) != 0)
3d396eb1
AK		 453 return -EIO;
454
455 ret = do_rom_fast_read(adapter, addr, valp);
cb8011ad
AK		 456 netxen_rom_unlock(adapter);
457 return ret;
458}
459
3d396eb1
AK		 460#define NETXEN_BOARDTYPE 0x4008
461#define NETXEN_BOARDNUM 0x400c
462#define NETXEN_CHIPNUM 0x4010
3d396eb1
AK		 463
464int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
465{
dcd56fdb 466 int addr, val;
27c915a4 467 int i, n, init_delay = 0;
3d396eb1 468 struct crb_addr_pair *buf;
27c915a4 469 unsigned offset;
e0e20a1a 470 u32 off;
3d396eb1
AK		 471
472 /* resetall */
c9517e58 473 netxen_rom_lock(adapter);
f98a9f69 474 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
27c915a4 475 netxen_rom_unlock(adapter);
3d396eb1
AK		 476
477 if (verbose) {
3d396eb1
AK		 478 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
479 printk("P2 ROM board type: 0x%08x\n", val);
480 else
481 printk("Could not read board type\n");
482 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
483 printk("P2 ROM board num: 0x%08x\n", val);
484 else
485 printk("Could not read board number\n");
486 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
487 printk("P2 ROM chip num: 0x%08x\n", val);
488 else
489 printk("Could not read chip number\n");
490 }
491
2956640d
DP		 492 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
493 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
27c915a4 494 (n != 0xcafecafe) ||
2956640d
DP		 495 netxen_rom_fast_read(adapter, 4, &n) != 0) {
496 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
497 "n: %08x\n", netxen_nic_driver_name, n);
3d396eb1
AK		 498 return -EIO;
499 }
2956640d
DP		 500 offset = n & 0xffffU;
501 n = (n >> 16) & 0xffffU;
502 } else {
503 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
504 !(n & 0x80000000)) {
505 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
506 "n: %08x\n", netxen_nic_driver_name, n);
507 return -EIO;
3d396eb1 508 }
2956640d
DP		 509 offset = 1;
510 n &= ~0x80000000;
511 }
512
513 if (n < 1024) {
514 if (verbose)
515 printk(KERN_DEBUG "%s: %d CRB init values found"
516 " in ROM.\n", netxen_nic_driver_name, n);
517 } else {
518 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
519 " initialized.\n", __func__, n);
520 return -EIO;
521 }
3d396eb1 522
2956640d
DP		 523 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
524 if (buf == NULL) {
525 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
526 netxen_nic_driver_name);
527 return -ENOMEM;
528 }
529 for (i = 0; i < n; i++) {
530 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
584dbe94
DM		 531 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
532 kfree(buf);
2956640d 533 return -EIO;
584dbe94 534 }
2956640d
DP		 535
536 buf[i].addr = addr;
537 buf[i].data = val;
538
539 if (verbose)
540 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
541 netxen_nic_driver_name,
542 (u32)netxen_decode_crb_addr(addr), val);
543 }
544 for (i = 0; i < n; i++) {
545
546 off = netxen_decode_crb_addr(buf[i].addr);
547 if (off == NETXEN_ADDR_ERROR) {
548 printk(KERN_ERR"CRB init value out of range %x\n",
1fcca1a5 549 buf[i].addr);
2956640d
DP		 550 continue;
551 }
552 off += NETXEN_PCI_CRBSPACE;
553 /* skipping cold reboot MAGIC */
554 if (off == NETXEN_CAM_RAM(0x1fc))
555 continue;
556
557 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
558 /* do not reset PCI */
559 if (off == (ROMUSB_GLB + 0xbc))
1fcca1a5 560 continue;
27c915a4
DP		 561 if (off == (ROMUSB_GLB + 0xa8))
562 continue;
563 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
564 continue;
565 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
566 continue;
567 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
568 continue;
2956640d
DP		 569 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
570 buf[i].data = 0x1020;
571 /* skip the function enable register */
572 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
3d396eb1 573 continue;
2956640d
DP		 574 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
575 continue;
576 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
577 continue;
578 }
3d396eb1 579
2956640d
DP		 580 if (off == NETXEN_ADDR_ERROR) {
581 printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n",
582 netxen_nic_driver_name, buf[i].addr);
583 continue;
584 }
585
27c915a4 586 init_delay = 1;
2956640d
DP		 587 /* After writing this register, HW needs time for CRB */
588 /* to quiet down (else crb_window returns 0xffffffff) */
589 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
27c915a4 590 init_delay = 1000;
2956640d 591 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
3d396eb1 592 /* hold xdma in reset also */
cb8011ad 593 buf[i].data = NETXEN_NIC_XDMA_RESET;
27c915a4 594 buf[i].data = 0x8000ff;
3d396eb1 595 }
2956640d 596 }
3d396eb1 597
f98a9f69 598 NXWR32(adapter, off, buf[i].data);
3d396eb1 599
27c915a4 600 msleep(init_delay);
2956640d
DP		 601 }
602 kfree(buf);
3d396eb1 603
2956640d 604 /* disable_peg_cache_all */
3d396eb1 605
2956640d
DP		 606 /* unreset_net_cache */
607 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
f98a9f69
DP		 608 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
609 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
3d396eb1 610 }
2956640d
DP		 611
612 /* p2dn replyCount */
f98a9f69 613 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
2956640d 614 /* disable_peg_cache 0 */
f98a9f69 615 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
2956640d 616 /* disable_peg_cache 1 */
f98a9f69 617 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
2956640d
DP		 618
619 /* peg_clr_all */
620
621 /* peg_clr 0 */
f98a9f69
DP		 622 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
623 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
2956640d 624 /* peg_clr 1 */
f98a9f69
DP		 625 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
626 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
2956640d 627 /* peg_clr 2 */
f98a9f69
DP		 628 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
629 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
2956640d 630 /* peg_clr 3 */
f98a9f69
DP		 631 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
632 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
3d396eb1
AK		 633 return 0;
634}
635
67c38fc6
DP		 636int
637netxen_need_fw_reset(struct netxen_adapter *adapter)
638{
639 u32 count, old_count;
640 u32 val, version, major, minor, build;
641 int i, timeout;
642 u8 fw_type;
643
644 /* NX2031 firmware doesn't support heartbit */
645 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
646 return 1;
647
648 /* last attempt had failed */
649 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
650 return 1;
651
652 old_count = count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
653
654 for (i = 0; i < 10; i++) {
655
656 timeout = msleep_interruptible(200);
657 if (timeout) {
658 NXWR32(adapter, CRB_CMDPEG_STATE,
659 PHAN_INITIALIZE_FAILED);
660 return -EINTR;
661 }
662
663 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
664 if (count != old_count)
665 break;
666 }
667
668 /* firmware is dead */
669 if (count == old_count)
670 return 1;
671
672 /* check if we have got newer or different file firmware */
673 if (adapter->fw) {
674
675 const struct firmware *fw = adapter->fw;
676
677 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
678 version = NETXEN_DECODE_VERSION(val);
679
680 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
681 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
682 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
683
684 if (version > NETXEN_VERSION_CODE(major, minor, build))
685 return 1;
686
687 if (version == NETXEN_VERSION_CODE(major, minor, build)) {
688
689 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
690 fw_type = (val & 0x4) ?
691 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
692
693 if (adapter->fw_type != fw_type)
694 return 1;
695 }
696 }
697
698 return 0;
699}
700
701static char *fw_name[] = {
702 "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin", "flash",
703};
704
f7185c71
DP		 705int
706netxen_load_firmware(struct netxen_adapter *adapter)
707{
708 u64 *ptr64;
709 u32 i, flashaddr, size;
710 const struct firmware *fw = adapter->fw;
67c38fc6
DP		 711 struct pci_dev *pdev = adapter->pdev;
712
713 dev_info(&pdev->dev, "loading firmware from %s\n",
714 fw_name[adapter->fw_type]);
f7185c71
DP		 715
716 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
717 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
718
719 if (fw) {
720 __le64 data;
721
722 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
723
724 ptr64 = (u64 *)&fw->data[NETXEN_BOOTLD_START];
725 flashaddr = NETXEN_BOOTLD_START;
726
727 for (i = 0; i < size; i++) {
728 data = cpu_to_le64(ptr64[i]);
729 adapter->pci_mem_write(adapter, flashaddr, &data, 8);
730 flashaddr += 8;
731 }
732
733 size = *(u32 *)&fw->data[NX_FW_SIZE_OFFSET];
734 size = (__force u32)cpu_to_le32(size) / 8;
735
736 ptr64 = (u64 *)&fw->data[NETXEN_IMAGE_START];
737 flashaddr = NETXEN_IMAGE_START;
738
739 for (i = 0; i < size; i++) {
740 data = cpu_to_le64(ptr64[i]);
741
742 if (adapter->pci_mem_write(adapter,
743 flashaddr, &data, 8))
744 return -EIO;
745
746 flashaddr += 8;
747 }
748 } else {
749 u32 data;
750
751 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 4;
752 flashaddr = NETXEN_BOOTLD_START;
753
754 for (i = 0; i < size; i++) {
755 if (netxen_rom_fast_read(adapter,
756 flashaddr, (int *)&data) != 0)
757 return -EIO;
758
759 if (adapter->pci_mem_write(adapter,
760 flashaddr, &data, 4))
761 return -EIO;
762
763 flashaddr += 4;
764 }
765 }
766 msleep(1);
767
768 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
769 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
770 else {
771 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
772 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
773 }
774
775 return 0;
776}
777
778static int
779netxen_validate_firmware(struct netxen_adapter *adapter, const char *fwname)
780{
781 __le32 val;
98e31bb0 782 u32 ver, min_ver, bios;
f7185c71
DP		 783 struct pci_dev *pdev = adapter->pdev;
784 const struct firmware *fw = adapter->fw;
785
786 if (fw->size < NX_FW_MIN_SIZE)
787 return -EINVAL;
788
789 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
790 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
791 return -EINVAL;
792
793 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
f7185c71
DP		 794
795 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
796 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
797 else
798 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
799
98e31bb0 800 ver = NETXEN_DECODE_VERSION(val);
f7185c71 801
98e31bb0 802 if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
f7185c71
DP		 803 dev_err(&pdev->dev,
804 "%s: firmware version %d.%d.%d unsupported\n",
98e31bb0 805 fwname, _major(ver), _minor(ver), _build(ver));
f7185c71
DP		 806 return -EINVAL;
807 }
808
809 val = cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
810 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
811 if ((__force u32)val != bios) {
812 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
813 fwname);
814 return -EINVAL;
815 }
816
817 /* check if flashed firmware is newer */
818 if (netxen_rom_fast_read(adapter,
819 NX_FW_VERSION_OFFSET, (int *)&val))
820 return -EIO;
98e31bb0
DP		 821 val = NETXEN_DECODE_VERSION(val);
822 if (val > ver) {
823 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
824 fwname);
f7185c71 825 return -EINVAL;
98e31bb0 826 }
f7185c71
DP		 827
828 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
829 return 0;
830}
831
6598b169
DP		 832static int
833netxen_p3_has_mn(struct netxen_adapter *adapter)
f7185c71
DP		 834{
835 u32 capability, flashed_ver;
f7185c71
DP		 836 capability = 0;
837
838 netxen_rom_fast_read(adapter,
839 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
98e31bb0
DP		 840 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
841
f7185c71 842 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
6598b169 843
f7185c71 844 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
6598b169
DP		 845 if (capability & NX_PEG_TUNE_MN_PRESENT)
846 return 1;
847 }
848 return 0;
849}
850
851void netxen_request_firmware(struct netxen_adapter *adapter)
852{
853 u8 fw_type;
854 struct pci_dev *pdev = adapter->pdev;
855 int rc = 0;
856
857 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
858 fw_type = NX_P2_MN_ROMIMAGE;
859 goto request_fw;
f7185c71
DP		 860 }
861
6598b169
DP		 862 fw_type = netxen_p3_has_mn(adapter) ?
863 NX_P3_MN_ROMIMAGE : NX_P3_CT_ROMIMAGE;
98e31bb0 864
f7185c71
DP		 865request_fw:
866 rc = request_firmware(&adapter->fw, fw_name[fw_type], &pdev->dev);
867 if (rc != 0) {
6598b169 868 if (fw_type == NX_P3_MN_ROMIMAGE) {
f7185c71 869 msleep(1);
6598b169
DP		 870 fw_type = NX_P3_CT_ROMIMAGE;
871 goto request_fw;
f7185c71
DP		 872 }
873
67c38fc6 874 fw_type = NX_FLASH_ROMIMAGE;
f7185c71
DP		 875 adapter->fw = NULL;
876 goto done;
877 }
878
879 rc = netxen_validate_firmware(adapter, fw_name[fw_type]);
880 if (rc != 0) {
881 release_firmware(adapter->fw);
882
6598b169 883 if (fw_type == NX_P3_MN_ROMIMAGE) {
f7185c71 884 msleep(1);
6598b169
DP		 885 fw_type = NX_P3_CT_ROMIMAGE;
886 goto request_fw;
f7185c71
DP		 887 }
888
67c38fc6 889 fw_type = NX_FLASH_ROMIMAGE;
f7185c71
DP		 890 adapter->fw = NULL;
891 goto done;
892 }
893
894done:
67c38fc6 895 adapter->fw_type = fw_type;
f7185c71
DP		 896}
897
898
899void
900netxen_release_firmware(struct netxen_adapter *adapter)
901{
902 if (adapter->fw)
903 release_firmware(adapter->fw);
904}
905
83ac51fa 906int netxen_init_dummy_dma(struct netxen_adapter *adapter)
ed25ffa1 907{
83ac51fa
DP		 908 u64 addr;
909 u32 hi, lo;
ed25ffa1 910
83ac51fa
DP		 911 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
912 return 0;
913
914 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev,
ed25ffa1
AK		 915 NETXEN_HOST_DUMMY_DMA_SIZE,
916 &adapter->dummy_dma.phys_addr);
917 if (adapter->dummy_dma.addr == NULL) {
83ac51fa
DP		 918 dev_err(&adapter->pdev->dev,
919 "ERROR: Could not allocate dummy DMA memory\n");
ed25ffa1
AK		 920 return -ENOMEM;
921 }
922
923 addr = (uint64_t) adapter->dummy_dma.phys_addr;
924 hi = (addr >> 32) & 0xffffffff;
925 lo = addr & 0xffffffff;
926
f98a9f69
DP		 927 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
928 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
ed25ffa1
AK		 929
930 return 0;
931}
932
83ac51fa
DP		 933/*
934 * NetXen DMA watchdog control:
935 *
936 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive
937 * Bit 1 : disable_request => 1 req disable dma watchdog
938 * Bit 2 : enable_request => 1 req enable dma watchdog
939 * Bit 3-31 : unused
940 */
941void netxen_free_dummy_dma(struct netxen_adapter *adapter)
ed25ffa1 942{
15eef1e1 943 int i = 100;
83ac51fa
DP		 944 u32 ctrl;
945
946 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
947 return;
15eef1e1
DP		 948
949 if (!adapter->dummy_dma.addr)
950 return;
439b454e 951
83ac51fa
DP		 952 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
953 if ((ctrl & 0x1) != 0) {
954 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2));
955
956 while ((ctrl & 0x1) != 0) {
957
439b454e 958 msleep(50);
83ac51fa
DP		 959
960 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
961
962 if (--i == 0)
439b454e 963 break;
83ac51fa 964 };
15eef1e1 965 }
439b454e 966
15eef1e1
DP		 967 if (i) {
968 pci_free_consistent(adapter->pdev,
969 NETXEN_HOST_DUMMY_DMA_SIZE,
970 adapter->dummy_dma.addr,
971 adapter->dummy_dma.phys_addr);
972 adapter->dummy_dma.addr = NULL;
83ac51fa
DP		 973 } else
974 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n");
ed25ffa1
AK		 975}
976
96acb6eb 977int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
3d396eb1
AK		 978{
979 u32 val = 0;
2956640d 980 int retries = 60;
3d396eb1 981
96f2ebd2
DP		 982 if (pegtune_val)
983 return 0;
984
985 do {
986 val = NXRD32(adapter, CRB_CMDPEG_STATE);
96acb6eb 987
96f2ebd2
DP		 988 switch (val) {
989 case PHAN_INITIALIZE_COMPLETE:
990 case PHAN_INITIALIZE_ACK:
991 return 0;
992 case PHAN_INITIALIZE_FAILED:
993 goto out_err;
994 default:
995 break;
996 }
96acb6eb 997
96f2ebd2 998 msleep(500);
2956640d 999
96f2ebd2 1000 } while (--retries);
2956640d 1001
96f2ebd2 1002 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
96acb6eb 1003
96f2ebd2
DP		 1004out_err:
1005 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
1006 return -EIO;
3d396eb1
AK		 1007}
1008
56a00787
DP		 1009static int
1010netxen_receive_peg_ready(struct netxen_adapter *adapter)
2956640d
DP		 1011{
1012 u32 val = 0;
1013 int retries = 2000;
1014
1015 do {
f98a9f69 1016 val = NXRD32(adapter, CRB_RCVPEG_STATE);
2956640d
DP		 1017
1018 if (val == PHAN_PEG_RCV_INITIALIZED)
1019 return 0;
1020
1021 msleep(10);
1022
1023 } while (--retries);
1024
1025 if (!retries) {
1026 printk(KERN_ERR "Receive Peg initialization not "
1027 "complete, state: 0x%x.\n", val);
1028 return -EIO;
1029 }
1030
1031 return 0;
1032}
1033
56a00787
DP		 1034int netxen_init_firmware(struct netxen_adapter *adapter)
1035{
1036 int err;
1037
1038 err = netxen_receive_peg_ready(adapter);
1039 if (err)
1040 return err;
1041
f98a9f69
DP		 1042 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1043 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1044 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1045 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
56a00787
DP		 1046
1047 return err;
1048}
1049
3bf26ce3
DP		 1050static void
1051netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1052{
1053 u32 cable_OUI;
1054 u16 cable_len;
1055 u16 link_speed;
1056 u8 link_status, module, duplex, autoneg;
1057 struct net_device *netdev = adapter->netdev;
1058
1059 adapter->has_link_events = 1;
1060
1061 cable_OUI = msg->body[1] & 0xffffffff;
1062 cable_len = (msg->body[1] >> 32) & 0xffff;
1063 link_speed = (msg->body[1] >> 48) & 0xffff;
1064
1065 link_status = msg->body[2] & 0xff;
1066 duplex = (msg->body[2] >> 16) & 0xff;
1067 autoneg = (msg->body[2] >> 24) & 0xff;
1068
1069 module = (msg->body[2] >> 8) & 0xff;
1070 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1071 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1072 netdev->name, cable_OUI, cable_len);
1073 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1074 printk(KERN_INFO "%s: unsupported cable length %d\n",
1075 netdev->name, cable_len);
1076 }
1077
1078 netxen_advert_link_change(adapter, link_status);
1079
1080 /* update link parameters */
1081 if (duplex == LINKEVENT_FULL_DUPLEX)
1082 adapter->link_duplex = DUPLEX_FULL;
1083 else
1084 adapter->link_duplex = DUPLEX_HALF;
1085 adapter->module_type = module;
1086 adapter->link_autoneg = autoneg;
1087 adapter->link_speed = link_speed;
1088}
1089
1090static void
1091netxen_handle_fw_message(int desc_cnt, int index,
1092 struct nx_host_sds_ring *sds_ring)
1093{
1094 nx_fw_msg_t msg;
1095 struct status_desc *desc;
1096 int i = 0, opcode;
1097
1098 while (desc_cnt > 0 && i < 8) {
1099 desc = &sds_ring->desc_head[index];
1100 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1101 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1102
1103 index = get_next_index(index, sds_ring->num_desc);
1104 desc_cnt--;
1105 }
1106
1107 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1108 switch (opcode) {
1109 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1110 netxen_handle_linkevent(sds_ring->adapter, &msg);
1111 break;
1112 default:
1113 break;
1114 }
1115}
1116
d8b100c5
DP		 1117static int
1118netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1119 struct nx_host_rds_ring *rds_ring,
1120 struct netxen_rx_buffer *buffer)
1121{
1122 struct sk_buff *skb;
1123 dma_addr_t dma;
1124 struct pci_dev *pdev = adapter->pdev;
1125
1126 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1127 if (!buffer->skb)
1128 return 1;
1129
1130 skb = buffer->skb;
1131
1132 if (!adapter->ahw.cut_through)
1133 skb_reserve(skb, 2);
1134
1135 dma = pci_map_single(pdev, skb->data,
1136 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1137
1138 if (pci_dma_mapping_error(pdev, dma)) {
1139 dev_kfree_skb_any(skb);
1140 buffer->skb = NULL;
1141 return 1;
1142 }
1143
1144 buffer->skb = skb;
1145 buffer->dma = dma;
1146 buffer->state = NETXEN_BUFFER_BUSY;
1147
1148 return 0;
1149}
1150
d9e651bc
DP		 1151static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1152 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1153{
1154 struct netxen_rx_buffer *buffer;
1155 struct sk_buff *skb;
1156
1157 buffer = &rds_ring->rx_buf_arr[index];
1158
1159 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1160 PCI_DMA_FROMDEVICE);
1161
1162 skb = buffer->skb;
1163 if (!skb)
1164 goto no_skb;
1165
1166 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1167 adapter->stats.csummed++;
1168 skb->ip_summed = CHECKSUM_UNNECESSARY;
1169 } else
1170 skb->ip_summed = CHECKSUM_NONE;
1171
1172 skb->dev = adapter->netdev;
1173
1174 buffer->skb = NULL;
d9e651bc
DP		 1175no_skb:
1176 buffer->state = NETXEN_BUFFER_FREE;
d9e651bc
DP		 1177 return skb;
1178}
1179
d8b100c5 1180static struct netxen_rx_buffer *
9b3ef55c 1181netxen_process_rcv(struct netxen_adapter *adapter,
c1c00ab8
DP		 1182 struct nx_host_sds_ring *sds_ring,
1183 int ring, u64 sts_data0)
3d396eb1 1184{
3176ff3e 1185 struct net_device *netdev = adapter->netdev;
becf46a0 1186 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
3d396eb1
AK		 1187 struct netxen_rx_buffer *buffer;
1188 struct sk_buff *skb;
c1c00ab8
DP		 1189 struct nx_host_rds_ring *rds_ring;
1190 int index, length, cksum, pkt_offset;
3d396eb1 1191
c1c00ab8
DP		 1192 if (unlikely(ring >= adapter->max_rds_rings))
1193 return NULL;
1194
1195 rds_ring = &recv_ctx->rds_rings[ring];
1196
1197 index = netxen_get_sts_refhandle(sts_data0);
1198 if (unlikely(index >= rds_ring->num_desc))
d8b100c5 1199 return NULL;
438627c7 1200
48bfd1e0 1201 buffer = &rds_ring->rx_buf_arr[index];
3d396eb1 1202
c1c00ab8
DP		 1203 length = netxen_get_sts_totallength(sts_data0);
1204 cksum = netxen_get_sts_status(sts_data0);
1205 pkt_offset = netxen_get_sts_pkt_offset(sts_data0);
1206
d9e651bc
DP		 1207 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1208 if (!skb)
d8b100c5 1209 return buffer;
200eef20 1210
9b3ef55c
DP		 1211 if (length > rds_ring->skb_size)
1212 skb_put(skb, rds_ring->skb_size);
1213 else
1214 skb_put(skb, length);
d9e651bc 1215
9b3ef55c
DP		 1216
1217 if (pkt_offset)
1218 skb_pull(skb, pkt_offset);
ed25ffa1 1219
3d396eb1
AK		 1220 skb->protocol = eth_type_trans(skb, netdev);
1221
a92e9e65 1222 napi_gro_receive(&sds_ring->napi, skb);
d9e651bc 1223
1bb482f8 1224 adapter->stats.rx_pkts++;
0ddc110c 1225 adapter->stats.rxbytes += length;
d8b100c5
DP		 1226
1227 return buffer;
3d396eb1
AK		 1228}
1229
c1c00ab8
DP		 1230#define TCP_HDR_SIZE 20
1231#define TCP_TS_OPTION_SIZE 12
1232#define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE)
1233
1234static struct netxen_rx_buffer *
1235netxen_process_lro(struct netxen_adapter *adapter,
1236 struct nx_host_sds_ring *sds_ring,
1237 int ring, u64 sts_data0, u64 sts_data1)
1238{
1239 struct net_device *netdev = adapter->netdev;
1240 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1241 struct netxen_rx_buffer *buffer;
1242 struct sk_buff *skb;
1243 struct nx_host_rds_ring *rds_ring;
1244 struct iphdr *iph;
1245 struct tcphdr *th;
1246 bool push, timestamp;
1247 int l2_hdr_offset, l4_hdr_offset;
1248 int index;
1249 u16 lro_length, length, data_offset;
1250 u32 seq_number;
1251
1252 if (unlikely(ring > adapter->max_rds_rings))
1253 return NULL;
1254
1255 rds_ring = &recv_ctx->rds_rings[ring];
1256
1257 index = netxen_get_lro_sts_refhandle(sts_data0);
1258 if (unlikely(index > rds_ring->num_desc))
1259 return NULL;
1260
1261 buffer = &rds_ring->rx_buf_arr[index];
1262
1263 timestamp = netxen_get_lro_sts_timestamp(sts_data0);
1264 lro_length = netxen_get_lro_sts_length(sts_data0);
1265 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0);
1266 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0);
1267 push = netxen_get_lro_sts_push_flag(sts_data0);
1268 seq_number = netxen_get_lro_sts_seq_number(sts_data1);
1269
1270 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
1271 if (!skb)
1272 return buffer;
1273
1274 if (timestamp)
1275 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE;
1276 else
1277 data_offset = l4_hdr_offset + TCP_HDR_SIZE;
1278
1279 skb_put(skb, lro_length + data_offset);
1280
1281 skb->truesize = (skb->len + sizeof(struct sk_buff) +
1282 ((unsigned long)skb->data - (unsigned long)skb->head));
1283
1284 skb_pull(skb, l2_hdr_offset);
1285 skb->protocol = eth_type_trans(skb, netdev);
1286
1287 iph = (struct iphdr *)skb->data;
1288 th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
1289
1290 length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
1291 iph->tot_len = htons(length);
1292 iph->check = 0;
1293 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
1294 th->psh = push;
1295 th->seq = htonl(seq_number);
1296
1bb482f8
NK		 1297 length = skb->len;
1298
c1c00ab8
DP		 1299 netif_receive_skb(skb);
1300
1bb482f8
NK		 1301 adapter->stats.lro_pkts++;
1302 adapter->stats.rxbytes += length;
1303
c1c00ab8
DP		 1304 return buffer;
1305}
1306
d8b100c5
DP		 1307#define netxen_merge_rx_buffers(list, head) \
1308 do { list_splice_tail_init(list, head); } while (0);
1309
becf46a0 1310int
d8b100c5 1311netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
3d396eb1 1312{
d8b100c5
DP		 1313 struct netxen_adapter *adapter = sds_ring->adapter;
1314
1315 struct list_head *cur;
1316
0ddc110c 1317 struct status_desc *desc;
d8b100c5
DP		 1318 struct netxen_rx_buffer *rxbuf;
1319
1320 u32 consumer = sds_ring->consumer;
1321
9b3ef55c 1322 int count = 0;
c1c00ab8
DP		 1323 u64 sts_data0, sts_data1;
1324 int opcode, ring = 0, desc_cnt;
3d396eb1 1325
3d396eb1 1326 while (count < max) {
d8b100c5 1327 desc = &sds_ring->desc_head[consumer];
c1c00ab8 1328 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
0ddc110c 1329
c1c00ab8 1330 if (!(sts_data0 & STATUS_OWNER_HOST))
3d396eb1 1331 break;
d9e651bc 1332
c1c00ab8 1333 desc_cnt = netxen_get_sts_desc_cnt(sts_data0);
3bf26ce3 1334
c1c00ab8 1335 opcode = netxen_get_sts_opcode(sts_data0);
d9e651bc 1336
3bf26ce3
DP		 1337 switch (opcode) {
1338 case NETXEN_NIC_RXPKT_DESC:
1339 case NETXEN_OLD_RXPKT_DESC:
6598b169 1340 case NETXEN_NIC_SYN_OFFLOAD:
c1c00ab8
DP		 1341 ring = netxen_get_sts_type(sts_data0);
1342 rxbuf = netxen_process_rcv(adapter, sds_ring,
1343 ring, sts_data0);
1344 break;
1345 case NETXEN_NIC_LRO_DESC:
1346 ring = netxen_get_lro_sts_type(sts_data0);
1347 sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
1348 rxbuf = netxen_process_lro(adapter, sds_ring,
1349 ring, sts_data0, sts_data1);
3bf26ce3
DP		 1350 break;
1351 case NETXEN_NIC_RESPONSE_DESC:
1352 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1353 default:
1354 goto skip;
1355 }
1356
1357 WARN_ON(desc_cnt > 1);
1358
d8b100c5
DP		 1359 if (rxbuf)
1360 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1361
3bf26ce3
DP		 1362skip:
1363 for (; desc_cnt > 0; desc_cnt--) {
1364 desc = &sds_ring->desc_head[consumer];
1365 desc->status_desc_data[0] =
1366 cpu_to_le64(STATUS_OWNER_PHANTOM);
1367 consumer = get_next_index(consumer, sds_ring->num_desc);
1368 }
3d396eb1
AK		 1369 count++;
1370 }
0ddc110c 1371
d8b100c5
DP		 1372 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1373 struct nx_host_rds_ring *rds_ring =
1374 &adapter->recv_ctx.rds_rings[ring];
1375
1376 if (!list_empty(&sds_ring->free_list[ring])) {
1377 list_for_each(cur, &sds_ring->free_list[ring]) {
1378 rxbuf = list_entry(cur,
1379 struct netxen_rx_buffer, list);
1380 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1381 }
1382 spin_lock(&rds_ring->lock);
1383 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1384 &rds_ring->free_list);
1385 spin_unlock(&rds_ring->lock);
1386 }
1387
1388 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1389 }
3d396eb1 1390
3d396eb1 1391 if (count) {
d8b100c5 1392 sds_ring->consumer = consumer;
f98a9f69 1393 NXWR32(adapter, sds_ring->crb_sts_consumer, consumer);
3d396eb1
AK		 1394 }
1395
1396 return count;
1397}
1398
1399/* Process Command status ring */
05aaa02d 1400int netxen_process_cmd_ring(struct netxen_adapter *adapter)
3d396eb1 1401{
d877f1e3 1402 u32 sw_consumer, hw_consumer;
ba53e6b4 1403 int count = 0, i;
3d396eb1 1404 struct netxen_cmd_buffer *buffer;
ba53e6b4
DP		 1405 struct pci_dev *pdev = adapter->pdev;
1406 struct net_device *netdev = adapter->netdev;
3d396eb1 1407 struct netxen_skb_frag *frag;
ba53e6b4 1408 int done = 0;
4ea528a1 1409 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
3d396eb1 1410
d8b100c5
DP		 1411 if (!spin_trylock(&adapter->tx_clean_lock))
1412 return 1;
1413
d877f1e3 1414 sw_consumer = tx_ring->sw_consumer;
d877f1e3 1415 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
3d396eb1 1416
d877f1e3
DP		 1417 while (sw_consumer != hw_consumer) {
1418 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
53a01e00 1419 if (buffer->skb) {
1420 frag = &buffer->frag_array[0];
3d396eb1
AK		 1421 pci_unmap_single(pdev, frag->dma, frag->length,
1422 PCI_DMA_TODEVICE);
96acb6eb 1423 frag->dma = 0ULL;
3d396eb1 1424 for (i = 1; i < buffer->frag_count; i++) {
3d396eb1
AK		 1425 frag++; /* Get the next frag */
1426 pci_unmap_page(pdev, frag->dma, frag->length,
1427 PCI_DMA_TODEVICE);
96acb6eb 1428 frag->dma = 0ULL;
3d396eb1
AK		 1429 }
1430
ba53e6b4 1431 adapter->stats.xmitfinished++;
53a01e00 1432 dev_kfree_skb_any(buffer->skb);
1433 buffer->skb = NULL;
3d396eb1
AK		 1434 }
1435
d877f1e3 1436 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
ba53e6b4
DP		 1437 if (++count >= MAX_STATUS_HANDLE)
1438 break;
3d396eb1 1439 }
3d396eb1 1440
22527864 1441 if (count && netif_running(netdev)) {
cb2107be
DP		 1442 tx_ring->sw_consumer = sw_consumer;
1443
ba53e6b4 1444 smp_mb();
cb2107be 1445
22527864 1446 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) {
b2af9cb0 1447 __netif_tx_lock(tx_ring->txq, smp_processor_id());
cb2107be
DP		 1448 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH)
1449 netif_wake_queue(netdev);
b2af9cb0 1450 __netif_tx_unlock(tx_ring->txq);
3d396eb1
AK		 1451 }
1452 }
ed25ffa1
AK		 1453 /*
1454 * If everything is freed up to consumer then check if the ring is full
1455 * If the ring is full then check if more needs to be freed and
1456 * schedule the call back again.
1457 *
1458 * This happens when there are 2 CPUs. One could be freeing and the
1459 * other filling it. If the ring is full when we get out of here and
1460 * the card has already interrupted the host then the host can miss the
1461 * interrupt.
1462 *
1463 * There is still a possible race condition and the host could miss an
1464 * interrupt. The card has to take care of this.
1465 */
d877f1e3
DP		 1466 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1467 done = (sw_consumer == hw_consumer);
d8b100c5 1468 spin_unlock(&adapter->tx_clean_lock);
3d396eb1 1469
ed25ffa1 1470 return (done);
3d396eb1
AK		 1471}
1472
becf46a0 1473void
d8b100c5
DP		 1474netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1475 struct nx_host_rds_ring *rds_ring)
3d396eb1 1476{
3d396eb1
AK		 1477 struct rcv_desc *pdesc;
1478 struct netxen_rx_buffer *buffer;
d8b100c5 1479 int producer, count = 0;
ed25ffa1 1480 netxen_ctx_msg msg = 0;
d9e651bc 1481 struct list_head *head;
3d396eb1 1482
48bfd1e0 1483 producer = rds_ring->producer;
d9e651bc 1484
d8b100c5
DP		 1485 spin_lock(&rds_ring->lock);
1486 head = &rds_ring->free_list;
d9e651bc
DP		 1487 while (!list_empty(head)) {
1488
d8b100c5 1489 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
6f703406 1490
d8b100c5
DP		 1491 if (!buffer->skb) {
1492 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1493 break;
6f703406
DP		 1494 }
1495
1496 count++;
d9e651bc
DP		 1497 list_del(&buffer->list);
1498
ed25ffa1 1499 /* make a rcv descriptor */
6f703406 1500 pdesc = &rds_ring->desc_head[producer];
d8b100c5 1501 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
ed33ebe4 1502 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
48bfd1e0 1503 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
6f703406 1504
438627c7 1505 producer = get_next_index(producer, rds_ring->num_desc);
ed25ffa1 1506 }
d8b100c5 1507 spin_unlock(&rds_ring->lock);
9b3ef55c 1508
ed25ffa1 1509 if (count) {
48bfd1e0 1510 rds_ring->producer = producer;
f98a9f69 1511 NXWR32(adapter, rds_ring->crb_rcv_producer,
438627c7 1512 (producer-1) & (rds_ring->num_desc-1));
48bfd1e0 1513
4f96b988 1514 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
ed25ffa1
AK		 1515 /*
1516 * Write a doorbell msg to tell phanmon of change in
1517 * receive ring producer
48bfd1e0 1518 * Only for firmware version < 4.0.0
ed25ffa1
AK		 1519 */
1520 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1521 netxen_set_msg_privid(msg);
1522 netxen_set_msg_count(msg,
438627c7
DP		 1523 ((producer - 1) &
1524 (rds_ring->num_desc - 1)));
3176ff3e 1525 netxen_set_msg_ctxid(msg, adapter->portnum);
ed25ffa1
AK		 1526 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1527 writel(msg,
1528 DB_NORMALIZE(adapter,
1529 NETXEN_RCV_PRODUCER_OFFSET));
48bfd1e0 1530 }
ed25ffa1
AK		 1531 }
1532}
1533
becf46a0 1534static void
d8b100c5
DP		 1535netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1536 struct nx_host_rds_ring *rds_ring)
ed25ffa1 1537{
ed25ffa1
AK		 1538 struct rcv_desc *pdesc;
1539 struct netxen_rx_buffer *buffer;
d8b100c5 1540 int producer, count = 0;
d9e651bc 1541 struct list_head *head;
ed25ffa1 1542
48bfd1e0 1543 producer = rds_ring->producer;
d8b100c5
DP		 1544 if (!spin_trylock(&rds_ring->lock))
1545 return;
1546
d9e651bc 1547 head = &rds_ring->free_list;
d9e651bc
DP		 1548 while (!list_empty(head)) {
1549
d8b100c5 1550 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
6f703406 1551
d8b100c5
DP		 1552 if (!buffer->skb) {
1553 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1554 break;
6f703406
DP		 1555 }
1556
1557 count++;
d9e651bc
DP		 1558 list_del(&buffer->list);
1559
3d396eb1 1560 /* make a rcv descriptor */
6f703406 1561 pdesc = &rds_ring->desc_head[producer];
ed33ebe4 1562 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
48bfd1e0 1563 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
3d396eb1 1564 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
6f703406 1565
438627c7 1566 producer = get_next_index(producer, rds_ring->num_desc);
3d396eb1
AK		 1567 }
1568
3d396eb1 1569 if (count) {
48bfd1e0 1570 rds_ring->producer = producer;
f98a9f69 1571 NXWR32(adapter, rds_ring->crb_rcv_producer,
438627c7 1572 (producer - 1) & (rds_ring->num_desc - 1));
3d396eb1 1573 }
d8b100c5 1574 spin_unlock(&rds_ring->lock);
3d396eb1
AK		 1575}
1576
3d396eb1
AK		 1577void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1578{
3d396eb1 1579 memset(&adapter->stats, 0, sizeof(adapter->stats));
3176ff3e 1580 return;
3d396eb1
AK		 1581}
1582
Linux kernel - Deliverables
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