Commit | Line | Data |
---|---|---|
3d396eb1 | 1 | /* |
5d242f1c | 2 | * Copyright (C) 2003 - 2009 NetXen, Inc. |
3d396eb1 | 3 | * All rights reserved. |
80922fbc | 4 | * |
3d396eb1 AK |
5 | * This program is free software; you can redistribute it and/or |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
80922fbc | 9 | * |
3d396eb1 AK |
10 | * This program is distributed in the hope that it will be useful, but |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
80922fbc | 14 | * |
3d396eb1 AK |
15 | * You should have received a copy of the GNU General Public License |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, | |
18 | * MA 02111-1307, USA. | |
80922fbc | 19 | * |
3d396eb1 AK |
20 | * The full GNU General Public License is included in this distribution |
21 | * in the file called LICENSE. | |
80922fbc | 22 | * |
3d396eb1 AK |
23 | * Contact Information: |
24 | * info@netxen.com | |
5d242f1c DP |
25 | * NetXen Inc, |
26 | * 18922 Forge Drive | |
27 | * Cupertino, CA 95014-0701 | |
3d396eb1 AK |
28 | * |
29 | */ | |
30 | ||
cb8011ad | 31 | #include <linux/vmalloc.h> |
e98e3350 | 32 | #include <linux/interrupt.h> |
3d396eb1 AK |
33 | #include "netxen_nic_hw.h" |
34 | ||
35 | #include "netxen_nic.h" | |
3d396eb1 | 36 | #include "netxen_nic_phan_reg.h" |
3d396eb1 | 37 | |
1494a814 | 38 | #include <linux/dma-mapping.h> |
391587c3 | 39 | #include <linux/if_vlan.h> |
c9bdd4b5 | 40 | #include <net/ip.h> |
00977784 | 41 | #include <linux/ipv6.h> |
1494a814 | 42 | |
3d396eb1 AK |
43 | MODULE_DESCRIPTION("NetXen Multi port (1/10) Gigabit Network Driver"); |
44 | MODULE_LICENSE("GPL"); | |
45 | MODULE_VERSION(NETXEN_NIC_LINUX_VERSIONID); | |
46 | ||
ceded32f | 47 | char netxen_nic_driver_name[] = "netxen_nic"; |
3d396eb1 | 48 | static char netxen_nic_driver_string[] = "NetXen Network Driver version " |
cb8011ad | 49 | NETXEN_NIC_LINUX_VERSIONID; |
3d396eb1 | 50 | |
2956640d DP |
51 | static int port_mode = NETXEN_PORT_MODE_AUTO_NEG; |
52 | ||
53 | /* Default to restricted 1G auto-neg mode */ | |
54 | static int wol_port_mode = 5; | |
55 | ||
56 | static int use_msi = 1; | |
57 | ||
58 | static int use_msi_x = 1; | |
59 | ||
3d396eb1 AK |
60 | /* Local functions to NetXen NIC driver */ |
61 | static int __devinit netxen_nic_probe(struct pci_dev *pdev, | |
2956640d | 62 | const struct pci_device_id *ent); |
3d396eb1 AK |
63 | static void __devexit netxen_nic_remove(struct pci_dev *pdev); |
64 | static int netxen_nic_open(struct net_device *netdev); | |
65 | static int netxen_nic_close(struct net_device *netdev); | |
66 | static int netxen_nic_xmit_frame(struct sk_buff *, struct net_device *); | |
67 | static void netxen_tx_timeout(struct net_device *netdev); | |
6d5aefb8 | 68 | static void netxen_tx_timeout_task(struct work_struct *work); |
3d396eb1 | 69 | static void netxen_watchdog(unsigned long); |
bea3348e | 70 | static int netxen_nic_poll(struct napi_struct *napi, int budget); |
3d396eb1 AK |
71 | #ifdef CONFIG_NET_POLL_CONTROLLER |
72 | static void netxen_nic_poll_controller(struct net_device *netdev); | |
73 | #endif | |
1494a814 | 74 | static irqreturn_t netxen_intr(int irq, void *data); |
05aaa02d | 75 | static irqreturn_t netxen_msi_intr(int irq, void *data); |
b3df68f8 | 76 | static irqreturn_t netxen_msix_intr(int irq, void *data); |
3d396eb1 AK |
77 | |
78 | /* PCI Device ID Table */ | |
70081ac5 | 79 | #define ENTRY(device) \ |
040dec3b | 80 | {PCI_DEVICE(PCI_VENDOR_ID_NETXEN, (device)), \ |
70081ac5 AV |
81 | .class = PCI_CLASS_NETWORK_ETHERNET << 8, .class_mask = ~0} |
82 | ||
3d396eb1 | 83 | static struct pci_device_id netxen_pci_tbl[] __devinitdata = { |
040dec3b DP |
84 | ENTRY(PCI_DEVICE_ID_NX2031_10GXSR), |
85 | ENTRY(PCI_DEVICE_ID_NX2031_10GCX4), | |
86 | ENTRY(PCI_DEVICE_ID_NX2031_4GCU), | |
87 | ENTRY(PCI_DEVICE_ID_NX2031_IMEZ), | |
88 | ENTRY(PCI_DEVICE_ID_NX2031_HMEZ), | |
89 | ENTRY(PCI_DEVICE_ID_NX2031_XG_MGMT), | |
90 | ENTRY(PCI_DEVICE_ID_NX2031_XG_MGMT2), | |
91 | ENTRY(PCI_DEVICE_ID_NX3031), | |
3d396eb1 AK |
92 | {0,} |
93 | }; | |
94 | ||
95 | MODULE_DEVICE_TABLE(pci, netxen_pci_tbl); | |
96 | ||
b1555130 AB |
97 | static struct workqueue_struct *netxen_workq; |
98 | #define SCHEDULE_WORK(tp) queue_work(netxen_workq, tp) | |
99 | #define FLUSH_SCHEDULED_WORK() flush_workqueue(netxen_workq) | |
100 | ||
ed25ffa1 AK |
101 | static void netxen_watchdog(unsigned long); |
102 | ||
7830b22c DP |
103 | static uint32_t crb_cmd_producer[4] = { |
104 | CRB_CMD_PRODUCER_OFFSET, CRB_CMD_PRODUCER_OFFSET_1, | |
105 | CRB_CMD_PRODUCER_OFFSET_2, CRB_CMD_PRODUCER_OFFSET_3 | |
106 | }; | |
107 | ||
c9fc891f | 108 | void |
3ce06a32 | 109 | netxen_nic_update_cmd_producer(struct netxen_adapter *adapter, |
cb2107be | 110 | struct nx_host_tx_ring *tx_ring) |
3176ff3e | 111 | { |
cb2107be DP |
112 | NXWR32(adapter, tx_ring->crb_cmd_producer, tx_ring->producer); |
113 | ||
114 | if (netxen_tx_avail(tx_ring) <= TX_STOP_THRESH) { | |
115 | netif_stop_queue(adapter->netdev); | |
116 | smp_mb(); | |
117 | } | |
3176ff3e MT |
118 | } |
119 | ||
7830b22c DP |
120 | static uint32_t crb_cmd_consumer[4] = { |
121 | CRB_CMD_CONSUMER_OFFSET, CRB_CMD_CONSUMER_OFFSET_1, | |
122 | CRB_CMD_CONSUMER_OFFSET_2, CRB_CMD_CONSUMER_OFFSET_3 | |
123 | }; | |
124 | ||
3ce06a32 DP |
125 | static inline void |
126 | netxen_nic_update_cmd_consumer(struct netxen_adapter *adapter, | |
cb2107be | 127 | struct nx_host_tx_ring *tx_ring) |
3176ff3e | 128 | { |
cb2107be | 129 | NXWR32(adapter, tx_ring->crb_cmd_consumer, tx_ring->sw_consumer); |
3176ff3e MT |
130 | } |
131 | ||
2956640d | 132 | static uint32_t msi_tgt_status[8] = { |
443be796 | 133 | ISR_INT_TARGET_STATUS, ISR_INT_TARGET_STATUS_F1, |
2956640d DP |
134 | ISR_INT_TARGET_STATUS_F2, ISR_INT_TARGET_STATUS_F3, |
135 | ISR_INT_TARGET_STATUS_F4, ISR_INT_TARGET_STATUS_F5, | |
136 | ISR_INT_TARGET_STATUS_F6, ISR_INT_TARGET_STATUS_F7 | |
443be796 DP |
137 | }; |
138 | ||
2956640d DP |
139 | static struct netxen_legacy_intr_set legacy_intr[] = NX_LEGACY_INTR_CONFIG; |
140 | ||
d8b100c5 | 141 | static inline void netxen_nic_disable_int(struct nx_host_sds_ring *sds_ring) |
4638aef1 | 142 | { |
d8b100c5 DP |
143 | struct netxen_adapter *adapter = sds_ring->adapter; |
144 | ||
f98a9f69 | 145 | NXWR32(adapter, sds_ring->crb_intr_mask, 0); |
4638aef1 SH |
146 | } |
147 | ||
d8b100c5 | 148 | static inline void netxen_nic_enable_int(struct nx_host_sds_ring *sds_ring) |
4638aef1 | 149 | { |
d8b100c5 DP |
150 | struct netxen_adapter *adapter = sds_ring->adapter; |
151 | ||
f98a9f69 | 152 | NXWR32(adapter, sds_ring->crb_intr_mask, 0x1); |
4638aef1 | 153 | |
092bc571 DP |
154 | if (!NETXEN_IS_MSI_FAMILY(adapter)) |
155 | adapter->pci_write_immediate(adapter, | |
156 | adapter->legacy_intr.tgt_mask_reg, 0xfbff); | |
4638aef1 SH |
157 | } |
158 | ||
71dcddbd DP |
159 | static int |
160 | netxen_alloc_sds_rings(struct netxen_recv_context *recv_ctx, int count) | |
161 | { | |
162 | int size = sizeof(struct nx_host_sds_ring) * count; | |
163 | ||
164 | recv_ctx->sds_rings = kzalloc(size, GFP_KERNEL); | |
165 | ||
166 | return (recv_ctx->sds_rings == NULL); | |
167 | } | |
168 | ||
d8b100c5 | 169 | static void |
71dcddbd DP |
170 | netxen_free_sds_rings(struct netxen_recv_context *recv_ctx) |
171 | { | |
172 | if (recv_ctx->sds_rings != NULL) | |
173 | kfree(recv_ctx->sds_rings); | |
174 | } | |
175 | ||
176 | static int | |
d8b100c5 DP |
177 | netxen_napi_add(struct netxen_adapter *adapter, struct net_device *netdev) |
178 | { | |
179 | int ring; | |
180 | struct nx_host_sds_ring *sds_ring; | |
181 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
182 | ||
71dcddbd DP |
183 | if (netxen_alloc_sds_rings(recv_ctx, adapter->max_sds_rings)) |
184 | return 1; | |
185 | ||
d8b100c5 DP |
186 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { |
187 | sds_ring = &recv_ctx->sds_rings[ring]; | |
188 | netif_napi_add(netdev, &sds_ring->napi, | |
189 | netxen_nic_poll, NETXEN_NETDEV_WEIGHT); | |
190 | } | |
71dcddbd DP |
191 | |
192 | return 0; | |
d8b100c5 DP |
193 | } |
194 | ||
195 | static void | |
196 | netxen_napi_enable(struct netxen_adapter *adapter) | |
197 | { | |
198 | int ring; | |
199 | struct nx_host_sds_ring *sds_ring; | |
200 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
201 | ||
202 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { | |
203 | sds_ring = &recv_ctx->sds_rings[ring]; | |
204 | napi_enable(&sds_ring->napi); | |
205 | netxen_nic_enable_int(sds_ring); | |
206 | } | |
207 | } | |
208 | ||
209 | static void | |
210 | netxen_napi_disable(struct netxen_adapter *adapter) | |
211 | { | |
212 | int ring; | |
213 | struct nx_host_sds_ring *sds_ring; | |
214 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
215 | ||
216 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { | |
217 | sds_ring = &recv_ctx->sds_rings[ring]; | |
d8b100c5 | 218 | napi_disable(&sds_ring->napi); |
be339aee DP |
219 | netxen_nic_disable_int(sds_ring); |
220 | synchronize_irq(sds_ring->irq); | |
d8b100c5 DP |
221 | } |
222 | } | |
223 | ||
2956640d DP |
224 | static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id) |
225 | { | |
226 | struct pci_dev *pdev = adapter->pdev; | |
1f434f63 DP |
227 | uint64_t mask, cmask; |
228 | ||
229 | adapter->pci_using_dac = 0; | |
2956640d | 230 | |
6afd142f | 231 | mask = DMA_BIT_MASK(32); |
2956640d DP |
232 | /* |
233 | * Consistent DMA mask is set to 32 bit because it cannot be set to | |
234 | * 35 bits. For P3 also leave it at 32 bits for now. Only the rings | |
235 | * come off this pool. | |
236 | */ | |
6afd142f | 237 | cmask = DMA_BIT_MASK(32); |
1f434f63 DP |
238 | |
239 | #ifndef CONFIG_IA64 | |
240 | if (revision_id >= NX_P3_B0) | |
6afd142f | 241 | mask = DMA_BIT_MASK(39); |
1f434f63 | 242 | else if (revision_id == NX_P2_C1) |
6afd142f | 243 | mask = DMA_BIT_MASK(35); |
1f434f63 | 244 | #endif |
2956640d | 245 | if (pci_set_dma_mask(pdev, mask) == 0 && |
1f434f63 | 246 | pci_set_consistent_dma_mask(pdev, cmask) == 0) { |
2956640d DP |
247 | adapter->pci_using_dac = 1; |
248 | return 0; | |
249 | } | |
2956640d | 250 | |
1f434f63 DP |
251 | return -EIO; |
252 | } | |
253 | ||
254 | /* Update addressable range if firmware supports it */ | |
255 | static int | |
256 | nx_update_dma_mask(struct netxen_adapter *adapter) | |
257 | { | |
258 | int change, shift, err; | |
259 | uint64_t mask, old_mask; | |
260 | struct pci_dev *pdev = adapter->pdev; | |
261 | ||
262 | change = 0; | |
263 | ||
f98a9f69 | 264 | shift = NXRD32(adapter, CRB_DMA_SHIFT); |
1f434f63 DP |
265 | if (shift >= 32) |
266 | return 0; | |
267 | ||
268 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id) && (shift > 9)) | |
269 | change = 1; | |
270 | else if ((adapter->ahw.revision_id == NX_P2_C1) && (shift <= 4)) | |
271 | change = 1; | |
272 | ||
273 | if (change) { | |
274 | old_mask = pdev->dma_mask; | |
275 | mask = (1ULL<<(32+shift)) - 1; | |
276 | ||
277 | err = pci_set_dma_mask(pdev, mask); | |
278 | if (err) | |
279 | return pci_set_dma_mask(pdev, old_mask); | |
2956640d DP |
280 | } |
281 | ||
2956640d DP |
282 | return 0; |
283 | } | |
284 | ||
285 | static void netxen_check_options(struct netxen_adapter *adapter) | |
286 | { | |
438627c7 DP |
287 | if (adapter->ahw.port_type == NETXEN_NIC_XGBE) |
288 | adapter->num_rxd = MAX_RCV_DESCRIPTORS_10G; | |
289 | else if (adapter->ahw.port_type == NETXEN_NIC_GBE) | |
290 | adapter->num_rxd = MAX_RCV_DESCRIPTORS_1G; | |
2956640d | 291 | |
f6d21f44 DP |
292 | adapter->msix_supported = 0; |
293 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { | |
c7860a2a | 294 | adapter->msix_supported = !!use_msi_x; |
f6d21f44 DP |
295 | adapter->rss_supported = !!use_msi_x; |
296 | } else if (adapter->fw_version >= NETXEN_VERSION_CODE(3, 4, 336)) { | |
297 | switch (adapter->ahw.board_type) { | |
298 | case NETXEN_BRDTYPE_P2_SB31_10G: | |
299 | case NETXEN_BRDTYPE_P2_SB31_10G_CX4: | |
f6d21f44 DP |
300 | adapter->msix_supported = !!use_msi_x; |
301 | adapter->rss_supported = !!use_msi_x; | |
302 | break; | |
303 | default: | |
304 | break; | |
305 | } | |
306 | } | |
2956640d | 307 | |
438627c7 DP |
308 | adapter->num_txd = MAX_CMD_DESCRIPTORS_HOST; |
309 | adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS; | |
310 | adapter->num_lro_rxd = MAX_LRO_RCV_DESCRIPTORS; | |
2956640d | 311 | |
2956640d DP |
312 | return; |
313 | } | |
314 | ||
315 | static int | |
316 | netxen_check_hw_init(struct netxen_adapter *adapter, int first_boot) | |
317 | { | |
27c915a4 | 318 | u32 val, timeout; |
2956640d DP |
319 | |
320 | if (first_boot == 0x55555555) { | |
321 | /* This is the first boot after power up */ | |
f98a9f69 | 322 | NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC); |
27c915a4 DP |
323 | |
324 | if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) | |
325 | return 0; | |
2956640d DP |
326 | |
327 | /* PCI bus master workaround */ | |
f98a9f69 | 328 | first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4)); |
2956640d DP |
329 | if (!(first_boot & 0x4)) { |
330 | first_boot |= 0x4; | |
f98a9f69 DP |
331 | NXWR32(adapter, NETXEN_PCIE_REG(0x4), first_boot); |
332 | first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4)); | |
2956640d DP |
333 | } |
334 | ||
335 | /* This is the first boot after power up */ | |
f98a9f69 | 336 | first_boot = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET); |
2956640d DP |
337 | if (first_boot != 0x80000f) { |
338 | /* clear the register for future unloads/loads */ | |
f98a9f69 | 339 | NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), 0); |
27c915a4 | 340 | return -EIO; |
2956640d DP |
341 | } |
342 | ||
27c915a4 | 343 | /* Start P2 boot loader */ |
f98a9f69 DP |
344 | val = NXRD32(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE); |
345 | NXWR32(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE, val | 0x1); | |
27c915a4 DP |
346 | timeout = 0; |
347 | do { | |
348 | msleep(1); | |
f98a9f69 | 349 | val = NXRD32(adapter, NETXEN_CAM_RAM(0x1fc)); |
27c915a4 DP |
350 | |
351 | if (++timeout > 5000) | |
352 | return -EIO; | |
353 | ||
354 | } while (val == NETXEN_BDINFO_MAGIC); | |
2956640d | 355 | } |
27c915a4 | 356 | return 0; |
2956640d DP |
357 | } |
358 | ||
359 | static void netxen_set_port_mode(struct netxen_adapter *adapter) | |
360 | { | |
361 | u32 val, data; | |
362 | ||
1e2d0059 | 363 | val = adapter->ahw.board_type; |
2956640d DP |
364 | if ((val == NETXEN_BRDTYPE_P3_HMEZ) || |
365 | (val == NETXEN_BRDTYPE_P3_XG_LOM)) { | |
366 | if (port_mode == NETXEN_PORT_MODE_802_3_AP) { | |
367 | data = NETXEN_PORT_MODE_802_3_AP; | |
f98a9f69 | 368 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
369 | } else if (port_mode == NETXEN_PORT_MODE_XG) { |
370 | data = NETXEN_PORT_MODE_XG; | |
f98a9f69 | 371 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
372 | } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_1G) { |
373 | data = NETXEN_PORT_MODE_AUTO_NEG_1G; | |
f98a9f69 | 374 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
375 | } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_XG) { |
376 | data = NETXEN_PORT_MODE_AUTO_NEG_XG; | |
f98a9f69 | 377 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
378 | } else { |
379 | data = NETXEN_PORT_MODE_AUTO_NEG; | |
f98a9f69 | 380 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
381 | } |
382 | ||
383 | if ((wol_port_mode != NETXEN_PORT_MODE_802_3_AP) && | |
384 | (wol_port_mode != NETXEN_PORT_MODE_XG) && | |
385 | (wol_port_mode != NETXEN_PORT_MODE_AUTO_NEG_1G) && | |
386 | (wol_port_mode != NETXEN_PORT_MODE_AUTO_NEG_XG)) { | |
387 | wol_port_mode = NETXEN_PORT_MODE_AUTO_NEG; | |
388 | } | |
f98a9f69 | 389 | NXWR32(adapter, NETXEN_WOL_PORT_MODE, wol_port_mode); |
2956640d DP |
390 | } |
391 | } | |
392 | ||
2956640d DP |
393 | static void netxen_set_msix_bit(struct pci_dev *pdev, int enable) |
394 | { | |
395 | u32 control; | |
396 | int pos; | |
397 | ||
398 | pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX); | |
399 | if (pos) { | |
400 | pci_read_config_dword(pdev, pos, &control); | |
401 | if (enable) | |
402 | control |= PCI_MSIX_FLAGS_ENABLE; | |
403 | else | |
404 | control = 0; | |
405 | pci_write_config_dword(pdev, pos, control); | |
406 | } | |
407 | } | |
408 | ||
be339aee | 409 | static void netxen_init_msix_entries(struct netxen_adapter *adapter, int count) |
2956640d DP |
410 | { |
411 | int i; | |
412 | ||
be339aee | 413 | for (i = 0; i < count; i++) |
2956640d DP |
414 | adapter->msix_entries[i].entry = i; |
415 | } | |
416 | ||
9dc28efe DP |
417 | static int |
418 | netxen_read_mac_addr(struct netxen_adapter *adapter) | |
419 | { | |
420 | int i; | |
421 | unsigned char *p; | |
422 | __le64 mac_addr; | |
9dc28efe DP |
423 | struct net_device *netdev = adapter->netdev; |
424 | struct pci_dev *pdev = adapter->pdev; | |
425 | ||
9dc28efe DP |
426 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { |
427 | if (netxen_p3_get_mac_addr(adapter, &mac_addr) != 0) | |
428 | return -EIO; | |
429 | } else { | |
430 | if (netxen_get_flash_mac_addr(adapter, &mac_addr) != 0) | |
431 | return -EIO; | |
432 | } | |
433 | ||
434 | p = (unsigned char *)&mac_addr; | |
435 | for (i = 0; i < 6; i++) | |
436 | netdev->dev_addr[i] = *(p + 5 - i); | |
437 | ||
438 | memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len); | |
439 | ||
440 | /* set station address */ | |
441 | ||
e174961c JB |
442 | if (!is_valid_ether_addr(netdev->perm_addr)) |
443 | dev_warn(&pdev->dev, "Bad MAC address %pM.\n", netdev->dev_addr); | |
9dc28efe DP |
444 | |
445 | return 0; | |
446 | } | |
447 | ||
3d0a3cc9 DP |
448 | int netxen_nic_set_mac(struct net_device *netdev, void *p) |
449 | { | |
450 | struct netxen_adapter *adapter = netdev_priv(netdev); | |
451 | struct sockaddr *addr = p; | |
452 | ||
453 | if (!is_valid_ether_addr(addr->sa_data)) | |
454 | return -EINVAL; | |
455 | ||
456 | if (netif_running(netdev)) { | |
457 | netif_device_detach(netdev); | |
458 | netxen_napi_disable(adapter); | |
459 | } | |
460 | ||
461 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
462 | adapter->macaddr_set(adapter, addr->sa_data); | |
463 | ||
464 | if (netif_running(netdev)) { | |
465 | netif_device_attach(netdev); | |
466 | netxen_napi_enable(adapter); | |
467 | } | |
468 | return 0; | |
469 | } | |
470 | ||
1abd266f SH |
471 | static void netxen_set_multicast_list(struct net_device *dev) |
472 | { | |
473 | struct netxen_adapter *adapter = netdev_priv(dev); | |
474 | ||
3d0a3cc9 | 475 | adapter->set_multi(dev); |
1abd266f SH |
476 | } |
477 | ||
478 | static const struct net_device_ops netxen_netdev_ops = { | |
479 | .ndo_open = netxen_nic_open, | |
480 | .ndo_stop = netxen_nic_close, | |
481 | .ndo_start_xmit = netxen_nic_xmit_frame, | |
482 | .ndo_get_stats = netxen_nic_get_stats, | |
483 | .ndo_validate_addr = eth_validate_addr, | |
484 | .ndo_set_multicast_list = netxen_set_multicast_list, | |
485 | .ndo_set_mac_address = netxen_nic_set_mac, | |
486 | .ndo_change_mtu = netxen_nic_change_mtu, | |
487 | .ndo_tx_timeout = netxen_tx_timeout, | |
488 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
489 | .ndo_poll_controller = netxen_nic_poll_controller, | |
490 | #endif | |
491 | }; | |
492 | ||
97daee83 DP |
493 | static void |
494 | netxen_setup_intr(struct netxen_adapter *adapter) | |
495 | { | |
496 | struct netxen_legacy_intr_set *legacy_intrp; | |
497 | struct pci_dev *pdev = adapter->pdev; | |
be339aee DP |
498 | int err, num_msix; |
499 | ||
500 | if (adapter->rss_supported) { | |
501 | num_msix = (num_online_cpus() >= MSIX_ENTRIES_PER_ADAPTER) ? | |
502 | MSIX_ENTRIES_PER_ADAPTER : 2; | |
503 | } else | |
504 | num_msix = 1; | |
505 | ||
506 | adapter->max_sds_rings = 1; | |
97daee83 DP |
507 | |
508 | adapter->flags &= ~(NETXEN_NIC_MSI_ENABLED | NETXEN_NIC_MSIX_ENABLED); | |
97daee83 DP |
509 | |
510 | if (adapter->ahw.revision_id >= NX_P3_B0) | |
511 | legacy_intrp = &legacy_intr[adapter->ahw.pci_func]; | |
512 | else | |
513 | legacy_intrp = &legacy_intr[0]; | |
514 | adapter->legacy_intr.int_vec_bit = legacy_intrp->int_vec_bit; | |
515 | adapter->legacy_intr.tgt_status_reg = legacy_intrp->tgt_status_reg; | |
516 | adapter->legacy_intr.tgt_mask_reg = legacy_intrp->tgt_mask_reg; | |
517 | adapter->legacy_intr.pci_int_reg = legacy_intrp->pci_int_reg; | |
518 | ||
519 | netxen_set_msix_bit(pdev, 0); | |
520 | ||
521 | if (adapter->msix_supported) { | |
522 | ||
be339aee DP |
523 | netxen_init_msix_entries(adapter, num_msix); |
524 | err = pci_enable_msix(pdev, adapter->msix_entries, num_msix); | |
525 | if (err == 0) { | |
526 | adapter->flags |= NETXEN_NIC_MSIX_ENABLED; | |
527 | netxen_set_msix_bit(pdev, 1); | |
97daee83 | 528 | |
be339aee DP |
529 | if (adapter->rss_supported) |
530 | adapter->max_sds_rings = num_msix; | |
97daee83 | 531 | |
be339aee DP |
532 | dev_info(&pdev->dev, "using msi-x interrupts\n"); |
533 | return; | |
534 | } | |
535 | ||
536 | if (err > 0) | |
537 | pci_disable_msix(pdev); | |
538 | ||
539 | /* fall through for msi */ | |
97daee83 | 540 | } |
be339aee DP |
541 | |
542 | if (use_msi && !pci_enable_msi(pdev)) { | |
543 | adapter->flags |= NETXEN_NIC_MSI_ENABLED; | |
544 | adapter->msi_tgt_status = | |
545 | msi_tgt_status[adapter->ahw.pci_func]; | |
546 | dev_info(&pdev->dev, "using msi interrupts\n"); | |
f67f3408 | 547 | adapter->msix_entries[0].vector = pdev->irq; |
be339aee DP |
548 | return; |
549 | } | |
550 | ||
551 | dev_info(&pdev->dev, "using legacy interrupts\n"); | |
552 | adapter->msix_entries[0].vector = pdev->irq; | |
97daee83 DP |
553 | } |
554 | ||
555 | static void | |
556 | netxen_teardown_intr(struct netxen_adapter *adapter) | |
557 | { | |
558 | if (adapter->flags & NETXEN_NIC_MSIX_ENABLED) | |
559 | pci_disable_msix(adapter->pdev); | |
560 | if (adapter->flags & NETXEN_NIC_MSI_ENABLED) | |
561 | pci_disable_msi(adapter->pdev); | |
562 | } | |
563 | ||
564 | static void | |
565 | netxen_cleanup_pci_map(struct netxen_adapter *adapter) | |
566 | { | |
567 | if (adapter->ahw.db_base != NULL) | |
568 | iounmap(adapter->ahw.db_base); | |
569 | if (adapter->ahw.pci_base0 != NULL) | |
570 | iounmap(adapter->ahw.pci_base0); | |
571 | if (adapter->ahw.pci_base1 != NULL) | |
572 | iounmap(adapter->ahw.pci_base1); | |
573 | if (adapter->ahw.pci_base2 != NULL) | |
574 | iounmap(adapter->ahw.pci_base2); | |
575 | } | |
576 | ||
577 | static int | |
578 | netxen_setup_pci_map(struct netxen_adapter *adapter) | |
579 | { | |
580 | void __iomem *mem_ptr0 = NULL; | |
581 | void __iomem *mem_ptr1 = NULL; | |
582 | void __iomem *mem_ptr2 = NULL; | |
583 | void __iomem *db_ptr = NULL; | |
584 | ||
97daee83 DP |
585 | unsigned long mem_base, mem_len, db_base, db_len = 0, pci_len0 = 0; |
586 | ||
587 | struct pci_dev *pdev = adapter->pdev; | |
588 | int pci_func = adapter->ahw.pci_func; | |
589 | ||
590 | int err = 0; | |
591 | ||
592 | /* | |
593 | * Set the CRB window to invalid. If any register in window 0 is | |
594 | * accessed it should set the window to 0 and then reset it to 1. | |
595 | */ | |
596 | adapter->curr_window = 255; | |
597 | adapter->ahw.qdr_sn_window = -1; | |
598 | adapter->ahw.ddr_mn_window = -1; | |
599 | ||
600 | /* remap phys address */ | |
601 | mem_base = pci_resource_start(pdev, 0); /* 0 is for BAR 0 */ | |
602 | mem_len = pci_resource_len(pdev, 0); | |
603 | pci_len0 = 0; | |
604 | ||
605 | adapter->hw_write_wx = netxen_nic_hw_write_wx_128M; | |
606 | adapter->hw_read_wx = netxen_nic_hw_read_wx_128M; | |
607 | adapter->pci_read_immediate = netxen_nic_pci_read_immediate_128M; | |
608 | adapter->pci_write_immediate = netxen_nic_pci_write_immediate_128M; | |
97daee83 DP |
609 | adapter->pci_set_window = netxen_nic_pci_set_window_128M; |
610 | adapter->pci_mem_read = netxen_nic_pci_mem_read_128M; | |
611 | adapter->pci_mem_write = netxen_nic_pci_mem_write_128M; | |
612 | ||
613 | /* 128 Meg of memory */ | |
614 | if (mem_len == NETXEN_PCI_128MB_SIZE) { | |
615 | mem_ptr0 = ioremap(mem_base, FIRST_PAGE_GROUP_SIZE); | |
616 | mem_ptr1 = ioremap(mem_base + SECOND_PAGE_GROUP_START, | |
617 | SECOND_PAGE_GROUP_SIZE); | |
618 | mem_ptr2 = ioremap(mem_base + THIRD_PAGE_GROUP_START, | |
619 | THIRD_PAGE_GROUP_SIZE); | |
97daee83 DP |
620 | } else if (mem_len == NETXEN_PCI_32MB_SIZE) { |
621 | mem_ptr1 = ioremap(mem_base, SECOND_PAGE_GROUP_SIZE); | |
622 | mem_ptr2 = ioremap(mem_base + THIRD_PAGE_GROUP_START - | |
623 | SECOND_PAGE_GROUP_START, THIRD_PAGE_GROUP_SIZE); | |
97daee83 DP |
624 | } else if (mem_len == NETXEN_PCI_2MB_SIZE) { |
625 | adapter->hw_write_wx = netxen_nic_hw_write_wx_2M; | |
626 | adapter->hw_read_wx = netxen_nic_hw_read_wx_2M; | |
627 | adapter->pci_read_immediate = netxen_nic_pci_read_immediate_2M; | |
628 | adapter->pci_write_immediate = | |
629 | netxen_nic_pci_write_immediate_2M; | |
97daee83 DP |
630 | adapter->pci_set_window = netxen_nic_pci_set_window_2M; |
631 | adapter->pci_mem_read = netxen_nic_pci_mem_read_2M; | |
632 | adapter->pci_mem_write = netxen_nic_pci_mem_write_2M; | |
633 | ||
634 | mem_ptr0 = pci_ioremap_bar(pdev, 0); | |
635 | if (mem_ptr0 == NULL) { | |
636 | dev_err(&pdev->dev, "failed to map PCI bar 0\n"); | |
637 | return -EIO; | |
638 | } | |
639 | pci_len0 = mem_len; | |
97daee83 DP |
640 | |
641 | adapter->ahw.ddr_mn_window = 0; | |
642 | adapter->ahw.qdr_sn_window = 0; | |
643 | ||
644 | adapter->ahw.mn_win_crb = 0x100000 + PCIX_MN_WINDOW + | |
645 | (pci_func * 0x20); | |
646 | adapter->ahw.ms_win_crb = 0x100000 + PCIX_SN_WINDOW; | |
647 | if (pci_func < 4) | |
648 | adapter->ahw.ms_win_crb += (pci_func * 0x20); | |
649 | else | |
650 | adapter->ahw.ms_win_crb += | |
651 | 0xA0 + ((pci_func - 4) * 0x10); | |
652 | } else { | |
653 | return -EIO; | |
654 | } | |
655 | ||
656 | dev_info(&pdev->dev, "%dMB memory map\n", (int)(mem_len>>20)); | |
657 | ||
658 | adapter->ahw.pci_base0 = mem_ptr0; | |
659 | adapter->ahw.pci_len0 = pci_len0; | |
97daee83 DP |
660 | adapter->ahw.pci_base1 = mem_ptr1; |
661 | adapter->ahw.pci_base2 = mem_ptr2; | |
662 | ||
663 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) | |
664 | goto skip_doorbell; | |
665 | ||
666 | db_base = pci_resource_start(pdev, 4); /* doorbell is on bar 4 */ | |
667 | db_len = pci_resource_len(pdev, 4); | |
668 | ||
669 | if (db_len == 0) { | |
670 | printk(KERN_ERR "%s: doorbell is disabled\n", | |
671 | netxen_nic_driver_name); | |
672 | err = -EIO; | |
673 | goto err_out; | |
674 | } | |
675 | ||
676 | db_ptr = ioremap(db_base, NETXEN_DB_MAPSIZE_BYTES); | |
677 | if (!db_ptr) { | |
678 | printk(KERN_ERR "%s: Failed to allocate doorbell map.", | |
679 | netxen_nic_driver_name); | |
680 | err = -EIO; | |
681 | goto err_out; | |
682 | } | |
683 | ||
684 | skip_doorbell: | |
685 | adapter->ahw.db_base = db_ptr; | |
686 | adapter->ahw.db_len = db_len; | |
687 | return 0; | |
688 | ||
689 | err_out: | |
690 | netxen_cleanup_pci_map(adapter); | |
691 | return err; | |
692 | } | |
693 | ||
ba599d4f | 694 | static int |
f7185c71 | 695 | netxen_start_firmware(struct netxen_adapter *adapter, int request_fw) |
ba599d4f DP |
696 | { |
697 | int val, err, first_boot; | |
698 | struct pci_dev *pdev = adapter->pdev; | |
699 | ||
0b72e659 | 700 | int first_driver = 0; |
f7185c71 DP |
701 | |
702 | if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) | |
703 | first_driver = (adapter->portnum == 0); | |
704 | else | |
705 | first_driver = (adapter->ahw.pci_func == 0); | |
0b72e659 DP |
706 | |
707 | if (!first_driver) | |
96f2ebd2 | 708 | goto wait_init; |
0b72e659 | 709 | |
f98a9f69 | 710 | first_boot = NXRD32(adapter, NETXEN_CAM_RAM(0x1fc)); |
ba599d4f DP |
711 | |
712 | err = netxen_check_hw_init(adapter, first_boot); | |
713 | if (err) { | |
714 | dev_err(&pdev->dev, "error in init HW init sequence\n"); | |
715 | return err; | |
716 | } | |
717 | ||
f7185c71 DP |
718 | if (request_fw) |
719 | netxen_request_firmware(adapter); | |
720 | ||
67c38fc6 DP |
721 | err = netxen_need_fw_reset(adapter); |
722 | if (err <= 0) | |
723 | return err; | |
724 | ||
ba599d4f | 725 | if (first_boot != 0x55555555) { |
f98a9f69 | 726 | NXWR32(adapter, CRB_CMDPEG_STATE, 0); |
ba599d4f DP |
727 | netxen_pinit_from_rom(adapter, 0); |
728 | msleep(1); | |
729 | } | |
567c6c4e | 730 | |
f98a9f69 | 731 | NXWR32(adapter, CRB_DMA_SHIFT, 0x55555555); |
567c6c4e DP |
732 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) |
733 | netxen_set_port_mode(adapter); | |
734 | ||
ba599d4f DP |
735 | netxen_load_firmware(adapter); |
736 | ||
737 | if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { | |
738 | ||
739 | /* Initialize multicast addr pool owners */ | |
740 | val = 0x7654; | |
1e2d0059 | 741 | if (adapter->ahw.port_type == NETXEN_NIC_XGBE) |
ba599d4f | 742 | val |= 0x0f000000; |
f98a9f69 | 743 | NXWR32(adapter, NETXEN_MAC_ADDR_CNTL_REG, val); |
ba599d4f DP |
744 | |
745 | } | |
746 | ||
747 | err = netxen_initialize_adapter_offload(adapter); | |
748 | if (err) | |
749 | return err; | |
750 | ||
751 | /* | |
752 | * Tell the hardware our version number. | |
753 | */ | |
754 | val = (_NETXEN_NIC_LINUX_MAJOR << 16) | |
755 | | ((_NETXEN_NIC_LINUX_MINOR << 8)) | |
756 | | (_NETXEN_NIC_LINUX_SUBVERSION); | |
f98a9f69 | 757 | NXWR32(adapter, CRB_DRIVER_VERSION, val); |
ba599d4f | 758 | |
96f2ebd2 | 759 | wait_init: |
ba599d4f DP |
760 | /* Handshake with the card before we register the devices. */ |
761 | err = netxen_phantom_init(adapter, NETXEN_NIC_PEG_TUNE); | |
762 | if (err) { | |
763 | netxen_free_adapter_offload(adapter); | |
764 | return err; | |
765 | } | |
766 | ||
767 | return 0; | |
768 | } | |
769 | ||
9f5bc7f1 DP |
770 | static int |
771 | netxen_nic_request_irq(struct netxen_adapter *adapter) | |
772 | { | |
773 | irq_handler_t handler; | |
d8b100c5 DP |
774 | struct nx_host_sds_ring *sds_ring; |
775 | int err, ring; | |
776 | ||
9f5bc7f1 DP |
777 | unsigned long flags = IRQF_SAMPLE_RANDOM; |
778 | struct net_device *netdev = adapter->netdev; | |
d8b100c5 | 779 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; |
9f5bc7f1 | 780 | |
9f5bc7f1 DP |
781 | if (adapter->flags & NETXEN_NIC_MSIX_ENABLED) |
782 | handler = netxen_msix_intr; | |
783 | else if (adapter->flags & NETXEN_NIC_MSI_ENABLED) | |
784 | handler = netxen_msi_intr; | |
785 | else { | |
786 | flags |= IRQF_SHARED; | |
787 | handler = netxen_intr; | |
788 | } | |
789 | adapter->irq = netdev->irq; | |
790 | ||
d8b100c5 DP |
791 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { |
792 | sds_ring = &recv_ctx->sds_rings[ring]; | |
be339aee | 793 | sprintf(sds_ring->name, "%s[%d]", netdev->name, ring); |
d8b100c5 DP |
794 | err = request_irq(sds_ring->irq, handler, |
795 | flags, sds_ring->name, sds_ring); | |
796 | if (err) | |
797 | return err; | |
798 | } | |
799 | ||
800 | return 0; | |
801 | } | |
802 | ||
803 | static void | |
804 | netxen_nic_free_irq(struct netxen_adapter *adapter) | |
805 | { | |
806 | int ring; | |
807 | struct nx_host_sds_ring *sds_ring; | |
808 | ||
809 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
810 | ||
811 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { | |
812 | sds_ring = &recv_ctx->sds_rings[ring]; | |
813 | free_irq(sds_ring->irq, sds_ring); | |
814 | } | |
9f5bc7f1 DP |
815 | } |
816 | ||
817 | static int | |
818 | netxen_nic_up(struct netxen_adapter *adapter, struct net_device *netdev) | |
819 | { | |
820 | int err; | |
821 | ||
822 | err = adapter->init_port(adapter, adapter->physical_port); | |
823 | if (err) { | |
824 | printk(KERN_ERR "%s: Failed to initialize port %d\n", | |
825 | netxen_nic_driver_name, adapter->portnum); | |
826 | return err; | |
827 | } | |
3d0a3cc9 DP |
828 | if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) |
829 | adapter->macaddr_set(adapter, netdev->dev_addr); | |
9f5bc7f1 | 830 | |
3d0a3cc9 DP |
831 | adapter->set_multi(netdev); |
832 | adapter->set_mtu(adapter, netdev->mtu); | |
9f5bc7f1 DP |
833 | |
834 | adapter->ahw.linkup = 0; | |
9f5bc7f1 | 835 | |
d8b100c5 DP |
836 | netxen_napi_enable(adapter); |
837 | ||
838 | if (adapter->max_sds_rings > 1) | |
839 | netxen_config_rss(adapter, 1); | |
9f5bc7f1 | 840 | |
5103c9f7 | 841 | if (adapter->capabilities & NX_FW_CAPABILITY_LINK_NOTIFICATION) |
3bf26ce3 | 842 | netxen_linkevent_request(adapter, 1); |
3d0a3cc9 DP |
843 | else |
844 | netxen_nic_set_link_parameters(adapter); | |
845 | ||
846 | mod_timer(&adapter->watchdog_timer, jiffies); | |
3bf26ce3 | 847 | |
9f5bc7f1 DP |
848 | return 0; |
849 | } | |
850 | ||
851 | static void | |
852 | netxen_nic_down(struct netxen_adapter *adapter, struct net_device *netdev) | |
853 | { | |
854 | netif_carrier_off(netdev); | |
855 | netif_stop_queue(netdev); | |
9f5bc7f1 DP |
856 | |
857 | if (adapter->stop_port) | |
858 | adapter->stop_port(adapter); | |
859 | ||
5cf4d323 DP |
860 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) |
861 | netxen_p3_free_mac_list(adapter); | |
862 | ||
be339aee DP |
863 | netxen_napi_disable(adapter); |
864 | ||
9f5bc7f1 DP |
865 | netxen_release_tx_buffers(adapter); |
866 | ||
867 | FLUSH_SCHEDULED_WORK(); | |
868 | del_timer_sync(&adapter->watchdog_timer); | |
869 | } | |
870 | ||
871 | ||
872 | static int | |
873 | netxen_nic_attach(struct netxen_adapter *adapter) | |
874 | { | |
875 | struct net_device *netdev = adapter->netdev; | |
876 | struct pci_dev *pdev = adapter->pdev; | |
becf46a0 | 877 | int err, ring; |
d8b100c5 | 878 | struct nx_host_rds_ring *rds_ring; |
d877f1e3 | 879 | struct nx_host_tx_ring *tx_ring; |
9f5bc7f1 DP |
880 | |
881 | err = netxen_init_firmware(adapter); | |
882 | if (err != 0) { | |
883 | printk(KERN_ERR "Failed to init firmware\n"); | |
884 | return -EIO; | |
885 | } | |
886 | ||
887 | if (adapter->fw_major < 4) | |
888 | adapter->max_rds_rings = 3; | |
889 | else | |
890 | adapter->max_rds_rings = 2; | |
891 | ||
892 | err = netxen_alloc_sw_resources(adapter); | |
893 | if (err) { | |
894 | printk(KERN_ERR "%s: Error in setting sw resources\n", | |
895 | netdev->name); | |
896 | return err; | |
897 | } | |
898 | ||
899 | netxen_nic_clear_stats(adapter); | |
900 | ||
901 | err = netxen_alloc_hw_resources(adapter); | |
902 | if (err) { | |
903 | printk(KERN_ERR "%s: Error in setting hw resources\n", | |
904 | netdev->name); | |
905 | goto err_out_free_sw; | |
906 | } | |
907 | ||
908 | if (adapter->fw_major < 4) { | |
4ea528a1 | 909 | tx_ring = adapter->tx_ring; |
d877f1e3 DP |
910 | tx_ring->crb_cmd_producer = crb_cmd_producer[adapter->portnum]; |
911 | tx_ring->crb_cmd_consumer = crb_cmd_consumer[adapter->portnum]; | |
9f5bc7f1 | 912 | |
cb2107be DP |
913 | tx_ring->producer = 0; |
914 | tx_ring->sw_consumer = 0; | |
915 | ||
916 | netxen_nic_update_cmd_producer(adapter, tx_ring); | |
917 | netxen_nic_update_cmd_consumer(adapter, tx_ring); | |
9f5bc7f1 DP |
918 | } |
919 | ||
d8b100c5 DP |
920 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { |
921 | rds_ring = &adapter->recv_ctx.rds_rings[ring]; | |
922 | netxen_post_rx_buffers(adapter, ring, rds_ring); | |
923 | } | |
9f5bc7f1 DP |
924 | |
925 | err = netxen_nic_request_irq(adapter); | |
926 | if (err) { | |
927 | dev_err(&pdev->dev, "%s: failed to setup interrupt\n", | |
928 | netdev->name); | |
929 | goto err_out_free_rxbuf; | |
930 | } | |
931 | ||
932 | adapter->is_up = NETXEN_ADAPTER_UP_MAGIC; | |
933 | return 0; | |
934 | ||
935 | err_out_free_rxbuf: | |
936 | netxen_release_rx_buffers(adapter); | |
937 | netxen_free_hw_resources(adapter); | |
938 | err_out_free_sw: | |
939 | netxen_free_sw_resources(adapter); | |
940 | return err; | |
941 | } | |
942 | ||
943 | static void | |
944 | netxen_nic_detach(struct netxen_adapter *adapter) | |
945 | { | |
9f5bc7f1 DP |
946 | netxen_release_rx_buffers(adapter); |
947 | netxen_free_hw_resources(adapter); | |
be339aee | 948 | netxen_nic_free_irq(adapter); |
9f5bc7f1 DP |
949 | netxen_free_sw_resources(adapter); |
950 | ||
951 | adapter->is_up = 0; | |
952 | } | |
953 | ||
3d396eb1 AK |
954 | static int __devinit |
955 | netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
956 | { | |
957 | struct net_device *netdev = NULL; | |
958 | struct netxen_adapter *adapter = NULL; | |
2956640d | 959 | int i = 0, err; |
3176ff3e | 960 | int pci_func_id = PCI_FUNC(pdev->devfn); |
2956640d | 961 | uint8_t revision_id; |
3d396eb1 | 962 | |
3176ff3e | 963 | if (pdev->class != 0x020000) { |
dcd56fdb | 964 | printk(KERN_DEBUG "NetXen function %d, class %x will not " |
3176ff3e | 965 | "be enabled.\n",pci_func_id, pdev->class); |
ed25ffa1 AK |
966 | return -ENODEV; |
967 | } | |
2956640d | 968 | |
11d89d63 DP |
969 | if (pdev->revision >= NX_P3_A0 && pdev->revision < NX_P3_B1) { |
970 | printk(KERN_WARNING "NetXen chip revisions between 0x%x-0x%x" | |
971 | "will not be enabled.\n", | |
972 | NX_P3_A0, NX_P3_B1); | |
973 | return -ENODEV; | |
974 | } | |
975 | ||
3d396eb1 AK |
976 | if ((err = pci_enable_device(pdev))) |
977 | return err; | |
2956640d | 978 | |
3d396eb1 AK |
979 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
980 | err = -ENODEV; | |
981 | goto err_out_disable_pdev; | |
982 | } | |
983 | ||
984 | if ((err = pci_request_regions(pdev, netxen_nic_driver_name))) | |
985 | goto err_out_disable_pdev; | |
986 | ||
987 | pci_set_master(pdev); | |
3176ff3e MT |
988 | |
989 | netdev = alloc_etherdev(sizeof(struct netxen_adapter)); | |
990 | if(!netdev) { | |
991 | printk(KERN_ERR"%s: Failed to allocate memory for the " | |
992 | "device block.Check system memory resource" | |
993 | " usage.\n", netxen_nic_driver_name); | |
994 | goto err_out_free_res; | |
995 | } | |
996 | ||
3176ff3e MT |
997 | SET_NETDEV_DEV(netdev, &pdev->dev); |
998 | ||
4cf1653a | 999 | adapter = netdev_priv(netdev); |
2956640d DP |
1000 | adapter->netdev = netdev; |
1001 | adapter->pdev = pdev; | |
13ba9c77 | 1002 | adapter->ahw.pci_func = pci_func_id; |
2956640d DP |
1003 | |
1004 | revision_id = pdev->revision; | |
1005 | adapter->ahw.revision_id = revision_id; | |
1006 | ||
1007 | err = nx_set_dma_mask(adapter, revision_id); | |
1008 | if (err) | |
1009 | goto err_out_free_netdev; | |
1010 | ||
3ce06a32 | 1011 | rwlock_init(&adapter->adapter_lock); |
d8b100c5 | 1012 | spin_lock_init(&adapter->tx_clean_lock); |
5cf4d323 | 1013 | INIT_LIST_HEAD(&adapter->mac_list); |
3ce06a32 | 1014 | |
97daee83 DP |
1015 | err = netxen_setup_pci_map(adapter); |
1016 | if (err) | |
6c80b18d | 1017 | goto err_out_free_netdev; |
3d396eb1 | 1018 | |
2d1a3bbd | 1019 | /* This will be reset for mezz cards */ |
3176ff3e | 1020 | adapter->portnum = pci_func_id; |
200eef20 | 1021 | adapter->rx_csum = 1; |
623621b0 | 1022 | adapter->mc_enabled = 0; |
83821a07 | 1023 | if (NX_IS_REVISION_P3(revision_id)) |
2956640d | 1024 | adapter->max_mc_count = 38; |
83821a07 | 1025 | else |
2956640d | 1026 | adapter->max_mc_count = 16; |
3176ff3e | 1027 | |
1abd266f | 1028 | netdev->netdev_ops = &netxen_netdev_ops; |
05aaa02d | 1029 | netdev->watchdog_timeo = 2*HZ; |
3176ff3e MT |
1030 | |
1031 | netxen_nic_change_mtu(netdev, netdev->mtu); | |
1032 | ||
1033 | SET_ETHTOOL_OPS(netdev, &netxen_nic_ethtool_ops); | |
1abd266f | 1034 | |
cdff1036 | 1035 | netdev->features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO); |
a92e9e65 | 1036 | netdev->features |= (NETIF_F_GRO); |
cdff1036 DP |
1037 | netdev->vlan_features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO); |
1038 | ||
cd1f8160 | 1039 | if (NX_IS_REVISION_P3(revision_id)) { |
cdff1036 DP |
1040 | netdev->features |= (NETIF_F_IPV6_CSUM | NETIF_F_TSO6); |
1041 | netdev->vlan_features |= (NETIF_F_IPV6_CSUM | NETIF_F_TSO6); | |
cd1f8160 | 1042 | } |
3176ff3e | 1043 | |
cdff1036 | 1044 | if (adapter->pci_using_dac) { |
3176ff3e | 1045 | netdev->features |= NETIF_F_HIGHDMA; |
cdff1036 DP |
1046 | netdev->vlan_features |= NETIF_F_HIGHDMA; |
1047 | } | |
3176ff3e | 1048 | |
dcd56fdb DP |
1049 | if (netxen_nic_get_board_info(adapter) != 0) { |
1050 | printk("%s: Error getting board config info.\n", | |
2956640d | 1051 | netxen_nic_driver_name); |
dcd56fdb DP |
1052 | err = -EIO; |
1053 | goto err_out_iounmap; | |
1054 | } | |
6c80b18d | 1055 | |
6c80b18d MT |
1056 | netxen_initialize_adapter_ops(adapter); |
1057 | ||
13ba9c77 | 1058 | /* Mezz cards have PCI function 0,2,3 enabled */ |
1e2d0059 | 1059 | switch (adapter->ahw.board_type) { |
dc515f2e DP |
1060 | case NETXEN_BRDTYPE_P2_SB31_10G_IMEZ: |
1061 | case NETXEN_BRDTYPE_P2_SB31_10G_HMEZ: | |
1062 | if (pci_func_id >= 2) | |
13ba9c77 | 1063 | adapter->portnum = pci_func_id - 2; |
dc515f2e DP |
1064 | break; |
1065 | default: | |
1066 | break; | |
1067 | } | |
13ba9c77 | 1068 | |
f7185c71 | 1069 | err = netxen_start_firmware(adapter, 1); |
0b72e659 DP |
1070 | if (err) |
1071 | goto err_out_iounmap; | |
2956640d | 1072 | |
1f434f63 DP |
1073 | nx_update_dma_mask(adapter); |
1074 | ||
1e2d0059 | 1075 | netxen_nic_get_firmware_info(adapter); |
d9e651bc | 1076 | |
3d396eb1 | 1077 | /* |
6c80b18d | 1078 | * See if the firmware gave us a virtual-physical port mapping. |
3d396eb1 | 1079 | */ |
dcd56fdb | 1080 | adapter->physical_port = adapter->portnum; |
044fad0d | 1081 | if (adapter->fw_major < 4) { |
f98a9f69 | 1082 | i = NXRD32(adapter, CRB_V2P(adapter->portnum)); |
044fad0d DP |
1083 | if (i != 0x55555555) |
1084 | adapter->physical_port = i; | |
1085 | } | |
6c80b18d | 1086 | |
438627c7 | 1087 | netxen_check_options(adapter); |
2956640d | 1088 | |
97daee83 | 1089 | netxen_setup_intr(adapter); |
2956640d | 1090 | |
d8b100c5 DP |
1091 | netdev->irq = adapter->msix_entries[0].vector; |
1092 | ||
71dcddbd DP |
1093 | if (netxen_napi_add(adapter, netdev)) |
1094 | goto err_out_disable_msi; | |
2956640d | 1095 | |
2956640d | 1096 | init_timer(&adapter->watchdog_timer); |
2956640d DP |
1097 | adapter->watchdog_timer.function = &netxen_watchdog; |
1098 | adapter->watchdog_timer.data = (unsigned long)adapter; | |
1099 | INIT_WORK(&adapter->watchdog_task, netxen_watchdog_task); | |
1100 | INIT_WORK(&adapter->tx_timeout_task, netxen_tx_timeout_task); | |
1101 | ||
9dc28efe DP |
1102 | err = netxen_read_mac_addr(adapter); |
1103 | if (err) | |
1104 | dev_warn(&pdev->dev, "failed to read mac addr\n"); | |
2956640d | 1105 | |
3176ff3e MT |
1106 | netif_carrier_off(netdev); |
1107 | netif_stop_queue(netdev); | |
1108 | ||
6c80b18d MT |
1109 | if ((err = register_netdev(netdev))) { |
1110 | printk(KERN_ERR "%s: register_netdev failed port #%d" | |
1111 | " aborting\n", netxen_nic_driver_name, | |
1112 | adapter->portnum); | |
1113 | err = -EIO; | |
2956640d | 1114 | goto err_out_disable_msi; |
6c80b18d MT |
1115 | } |
1116 | ||
1117 | pci_set_drvdata(pdev, adapter); | |
3d396eb1 | 1118 | |
1e2d0059 | 1119 | switch (adapter->ahw.port_type) { |
2956640d DP |
1120 | case NETXEN_NIC_GBE: |
1121 | dev_info(&adapter->pdev->dev, "%s: GbE port initialized\n", | |
1122 | adapter->netdev->name); | |
1123 | break; | |
1124 | case NETXEN_NIC_XGBE: | |
1125 | dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n", | |
1126 | adapter->netdev->name); | |
1127 | break; | |
3d396eb1 | 1128 | } |
3d396eb1 | 1129 | |
2956640d DP |
1130 | return 0; |
1131 | ||
1132 | err_out_disable_msi: | |
97daee83 | 1133 | netxen_teardown_intr(adapter); |
6c80b18d | 1134 | |
0b72e659 | 1135 | netxen_free_adapter_offload(adapter); |
3d396eb1 | 1136 | |
2956640d | 1137 | err_out_iounmap: |
97daee83 | 1138 | netxen_cleanup_pci_map(adapter); |
cb8011ad | 1139 | |
6c80b18d MT |
1140 | err_out_free_netdev: |
1141 | free_netdev(netdev); | |
1142 | ||
1143 | err_out_free_res: | |
3d396eb1 | 1144 | pci_release_regions(pdev); |
6c80b18d MT |
1145 | |
1146 | err_out_disable_pdev: | |
2956640d | 1147 | pci_set_drvdata(pdev, NULL); |
3d396eb1 AK |
1148 | pci_disable_device(pdev); |
1149 | return err; | |
1150 | } | |
1151 | ||
1152 | static void __devexit netxen_nic_remove(struct pci_dev *pdev) | |
1153 | { | |
1154 | struct netxen_adapter *adapter; | |
3176ff3e | 1155 | struct net_device *netdev; |
3d396eb1 | 1156 | |
6c80b18d | 1157 | adapter = pci_get_drvdata(pdev); |
3d396eb1 AK |
1158 | if (adapter == NULL) |
1159 | return; | |
1160 | ||
6c80b18d MT |
1161 | netdev = adapter->netdev; |
1162 | ||
96acb6eb DP |
1163 | unregister_netdev(netdev); |
1164 | ||
96acb6eb | 1165 | if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC) { |
9f5bc7f1 | 1166 | netxen_nic_detach(adapter); |
96acb6eb | 1167 | } |
3d396eb1 | 1168 | |
439b454e DP |
1169 | if (adapter->portnum == 0) |
1170 | netxen_free_adapter_offload(adapter); | |
96acb6eb | 1171 | |
97daee83 | 1172 | netxen_teardown_intr(adapter); |
71dcddbd | 1173 | netxen_free_sds_rings(&adapter->recv_ctx); |
3052246c | 1174 | |
97daee83 | 1175 | netxen_cleanup_pci_map(adapter); |
595e3fb8 | 1176 | |
f7185c71 DP |
1177 | netxen_release_firmware(adapter); |
1178 | ||
595e3fb8 | 1179 | pci_release_regions(pdev); |
3052246c | 1180 | pci_disable_device(pdev); |
595e3fb8 MT |
1181 | pci_set_drvdata(pdev, NULL); |
1182 | ||
6c80b18d | 1183 | free_netdev(netdev); |
3d396eb1 AK |
1184 | } |
1185 | ||
01542cd1 | 1186 | #ifdef CONFIG_PM |
0b72e659 DP |
1187 | static int |
1188 | netxen_nic_suspend(struct pci_dev *pdev, pm_message_t state) | |
1189 | { | |
1190 | ||
1191 | struct netxen_adapter *adapter = pci_get_drvdata(pdev); | |
1192 | struct net_device *netdev = adapter->netdev; | |
1193 | ||
1194 | netif_device_detach(netdev); | |
1195 | ||
1196 | if (netif_running(netdev)) | |
1197 | netxen_nic_down(adapter, netdev); | |
1198 | ||
1199 | if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC) | |
1200 | netxen_nic_detach(adapter); | |
1201 | ||
1202 | pci_save_state(pdev); | |
1203 | ||
1204 | if (netxen_nic_wol_supported(adapter)) { | |
1205 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1206 | pci_enable_wake(pdev, PCI_D3hot, 1); | |
1207 | } | |
1208 | ||
1209 | pci_disable_device(pdev); | |
1210 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
1211 | ||
1212 | return 0; | |
1213 | } | |
1214 | ||
1215 | static int | |
1216 | netxen_nic_resume(struct pci_dev *pdev) | |
1217 | { | |
1218 | struct netxen_adapter *adapter = pci_get_drvdata(pdev); | |
1219 | struct net_device *netdev = adapter->netdev; | |
1220 | int err; | |
1221 | ||
1222 | pci_set_power_state(pdev, PCI_D0); | |
1223 | pci_restore_state(pdev); | |
1224 | ||
1225 | err = pci_enable_device(pdev); | |
1226 | if (err) | |
1227 | return err; | |
1228 | ||
1229 | adapter->curr_window = 255; | |
1230 | ||
f7185c71 | 1231 | err = netxen_start_firmware(adapter, 0); |
0b72e659 DP |
1232 | if (err) { |
1233 | dev_err(&pdev->dev, "failed to start firmware\n"); | |
1234 | return err; | |
1235 | } | |
1236 | ||
1237 | if (netif_running(netdev)) { | |
1238 | err = netxen_nic_attach(adapter); | |
1239 | if (err) | |
1240 | return err; | |
1241 | ||
1242 | err = netxen_nic_up(adapter, netdev); | |
1243 | if (err) | |
1244 | return err; | |
1245 | ||
1246 | netif_device_attach(netdev); | |
1247 | } | |
1248 | ||
1249 | return 0; | |
1250 | } | |
01542cd1 | 1251 | #endif |
0b72e659 | 1252 | |
3d396eb1 AK |
1253 | static int netxen_nic_open(struct net_device *netdev) |
1254 | { | |
4cf1653a | 1255 | struct netxen_adapter *adapter = netdev_priv(netdev); |
3d396eb1 | 1256 | int err = 0; |
3d396eb1 | 1257 | |
dcd56fdb DP |
1258 | if (adapter->driver_mismatch) |
1259 | return -EIO; | |
1260 | ||
3d396eb1 | 1261 | if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC) { |
9f5bc7f1 DP |
1262 | err = netxen_nic_attach(adapter); |
1263 | if (err) | |
3d396eb1 | 1264 | return err; |
ed25ffa1 | 1265 | } |
2956640d | 1266 | |
9f5bc7f1 DP |
1267 | err = netxen_nic_up(adapter, netdev); |
1268 | if (err) | |
1269 | goto err_out; | |
05aaa02d | 1270 | |
dcd56fdb | 1271 | netif_start_queue(netdev); |
3d396eb1 AK |
1272 | |
1273 | return 0; | |
2956640d | 1274 | |
9f5bc7f1 DP |
1275 | err_out: |
1276 | netxen_nic_detach(adapter); | |
2956640d | 1277 | return err; |
3d396eb1 AK |
1278 | } |
1279 | ||
1280 | /* | |
1281 | * netxen_nic_close - Disables a network interface entry point | |
1282 | */ | |
1283 | static int netxen_nic_close(struct net_device *netdev) | |
1284 | { | |
3176ff3e | 1285 | struct netxen_adapter *adapter = netdev_priv(netdev); |
3d396eb1 | 1286 | |
9f5bc7f1 | 1287 | netxen_nic_down(adapter, netdev); |
3d396eb1 AK |
1288 | return 0; |
1289 | } | |
1290 | ||
391587c3 | 1291 | static bool netxen_tso_check(struct net_device *netdev, |
cd1f8160 DP |
1292 | struct cmd_desc_type0 *desc, struct sk_buff *skb) |
1293 | { | |
391587c3 DP |
1294 | bool tso = false; |
1295 | u8 opcode = TX_ETHER_PKT; | |
cdff1036 DP |
1296 | __be16 protocol = skb->protocol; |
1297 | u16 flags = 0; | |
1298 | ||
09640e63 | 1299 | if (protocol == cpu_to_be16(ETH_P_8021Q)) { |
cdff1036 DP |
1300 | struct vlan_ethhdr *vh = (struct vlan_ethhdr *)skb->data; |
1301 | protocol = vh->h_vlan_encapsulated_proto; | |
1302 | flags = FLAGS_VLAN_TAGGED; | |
1303 | } | |
cd1f8160 | 1304 | |
391587c3 DP |
1305 | if ((netdev->features & (NETIF_F_TSO | NETIF_F_TSO6)) && |
1306 | skb_shinfo(skb)->gso_size > 0) { | |
1307 | ||
1308 | desc->mss = cpu_to_le16(skb_shinfo(skb)->gso_size); | |
1309 | desc->total_hdr_length = | |
1310 | skb_transport_offset(skb) + tcp_hdrlen(skb); | |
1311 | ||
09640e63 | 1312 | opcode = (protocol == cpu_to_be16(ETH_P_IPV6)) ? |
391587c3 DP |
1313 | TX_TCP_LSO6 : TX_TCP_LSO; |
1314 | tso = true; | |
cd1f8160 DP |
1315 | |
1316 | } else if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
391587c3 DP |
1317 | u8 l4proto; |
1318 | ||
09640e63 | 1319 | if (protocol == cpu_to_be16(ETH_P_IP)) { |
391587c3 DP |
1320 | l4proto = ip_hdr(skb)->protocol; |
1321 | ||
1322 | if (l4proto == IPPROTO_TCP) | |
1323 | opcode = TX_TCP_PKT; | |
1324 | else if(l4proto == IPPROTO_UDP) | |
1325 | opcode = TX_UDP_PKT; | |
09640e63 | 1326 | } else if (protocol == cpu_to_be16(ETH_P_IPV6)) { |
391587c3 DP |
1327 | l4proto = ipv6_hdr(skb)->nexthdr; |
1328 | ||
1329 | if (l4proto == IPPROTO_TCP) | |
1330 | opcode = TX_TCPV6_PKT; | |
1331 | else if(l4proto == IPPROTO_UDP) | |
1332 | opcode = TX_UDPV6_PKT; | |
1333 | } | |
cd1f8160 DP |
1334 | } |
1335 | desc->tcp_hdr_offset = skb_transport_offset(skb); | |
1336 | desc->ip_hdr_offset = skb_network_offset(skb); | |
cdff1036 | 1337 | netxen_set_tx_flags_opcode(desc, flags, opcode); |
391587c3 | 1338 | return tso; |
cd1f8160 DP |
1339 | } |
1340 | ||
6f703406 DP |
1341 | static void |
1342 | netxen_clean_tx_dma_mapping(struct pci_dev *pdev, | |
1343 | struct netxen_cmd_buffer *pbuf, int last) | |
1344 | { | |
1345 | int k; | |
1346 | struct netxen_skb_frag *buffrag; | |
1347 | ||
1348 | buffrag = &pbuf->frag_array[0]; | |
1349 | pci_unmap_single(pdev, buffrag->dma, | |
1350 | buffrag->length, PCI_DMA_TODEVICE); | |
1351 | ||
1352 | for (k = 1; k < last; k++) { | |
1353 | buffrag = &pbuf->frag_array[k]; | |
1354 | pci_unmap_page(pdev, buffrag->dma, | |
1355 | buffrag->length, PCI_DMA_TODEVICE); | |
1356 | } | |
1357 | } | |
1358 | ||
d32cc3d2 DP |
1359 | static inline void |
1360 | netxen_clear_cmddesc(u64 *desc) | |
1361 | { | |
1362 | int i; | |
1363 | for (i = 0; i < 8; i++) | |
1364 | desc[i] = 0ULL; | |
1365 | } | |
1366 | ||
1367 | static int | |
1368 | netxen_nic_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
3d396eb1 | 1369 | { |
3176ff3e | 1370 | struct netxen_adapter *adapter = netdev_priv(netdev); |
4ea528a1 | 1371 | struct nx_host_tx_ring *tx_ring = adapter->tx_ring; |
3d396eb1 | 1372 | unsigned int first_seg_len = skb->len - skb->data_len; |
391587c3 | 1373 | struct netxen_cmd_buffer *pbuf; |
3d396eb1 | 1374 | struct netxen_skb_frag *buffrag; |
391587c3 | 1375 | struct cmd_desc_type0 *hwdesc; |
6f703406 DP |
1376 | struct pci_dev *pdev = adapter->pdev; |
1377 | dma_addr_t temp_dma; | |
391587c3 | 1378 | int i, k; |
3d396eb1 | 1379 | |
cb2107be | 1380 | u32 producer; |
391587c3 | 1381 | int frag_count, no_of_desc; |
d877f1e3 | 1382 | u32 num_txd = tx_ring->num_desc; |
391587c3 | 1383 | bool is_tso = false; |
3d396eb1 | 1384 | |
3d396eb1 AK |
1385 | frag_count = skb_shinfo(skb)->nr_frags + 1; |
1386 | ||
d877f1e3 | 1387 | /* 4 fragments per cmd des */ |
3d396eb1 | 1388 | no_of_desc = (frag_count + 3) >> 2; |
53a01e00 | 1389 | |
cb2107be | 1390 | if (unlikely(no_of_desc + 2) > netxen_tx_avail(tx_ring)) { |
ba53e6b4 | 1391 | netif_stop_queue(netdev); |
ba53e6b4 | 1392 | return NETDEV_TX_BUSY; |
53a01e00 | 1393 | } |
3d396eb1 | 1394 | |
cb2107be DP |
1395 | producer = tx_ring->producer; |
1396 | ||
d877f1e3 | 1397 | hwdesc = &tx_ring->desc_head[producer]; |
d32cc3d2 | 1398 | netxen_clear_cmddesc((u64 *)hwdesc); |
d877f1e3 | 1399 | pbuf = &tx_ring->cmd_buf_arr[producer]; |
391587c3 DP |
1400 | |
1401 | is_tso = netxen_tso_check(netdev, hwdesc, skb); | |
1402 | ||
3d396eb1 | 1403 | pbuf->skb = skb; |
3d396eb1 | 1404 | pbuf->frag_count = frag_count; |
3d396eb1 | 1405 | buffrag = &pbuf->frag_array[0]; |
6f703406 | 1406 | temp_dma = pci_map_single(pdev, skb->data, first_seg_len, |
3d396eb1 | 1407 | PCI_DMA_TODEVICE); |
6f703406 DP |
1408 | if (pci_dma_mapping_error(pdev, temp_dma)) |
1409 | goto drop_packet; | |
1410 | ||
1411 | buffrag->dma = temp_dma; | |
3d396eb1 | 1412 | buffrag->length = first_seg_len; |
391587c3 DP |
1413 | netxen_set_tx_frags_len(hwdesc, frag_count, skb->len); |
1414 | netxen_set_tx_port(hwdesc, adapter->portnum); | |
3d396eb1 | 1415 | |
d32cc3d2 | 1416 | hwdesc->buffer_length[0] = cpu_to_le16(first_seg_len); |
3d396eb1 AK |
1417 | hwdesc->addr_buffer1 = cpu_to_le64(buffrag->dma); |
1418 | ||
1419 | for (i = 1, k = 1; i < frag_count; i++, k++) { | |
1420 | struct skb_frag_struct *frag; | |
1421 | int len, temp_len; | |
1422 | unsigned long offset; | |
3d396eb1 AK |
1423 | |
1424 | /* move to next desc. if there is a need */ | |
1425 | if ((i & 0x3) == 0) { | |
1426 | k = 0; | |
ba53e6b4 | 1427 | producer = get_next_index(producer, num_txd); |
d877f1e3 | 1428 | hwdesc = &tx_ring->desc_head[producer]; |
d32cc3d2 | 1429 | netxen_clear_cmddesc((u64 *)hwdesc); |
d877f1e3 | 1430 | pbuf = &tx_ring->cmd_buf_arr[producer]; |
53a01e00 | 1431 | pbuf->skb = NULL; |
3d396eb1 AK |
1432 | } |
1433 | frag = &skb_shinfo(skb)->frags[i - 1]; | |
1434 | len = frag->size; | |
1435 | offset = frag->page_offset; | |
1436 | ||
1437 | temp_len = len; | |
6f703406 | 1438 | temp_dma = pci_map_page(pdev, frag->page, offset, |
3d396eb1 | 1439 | len, PCI_DMA_TODEVICE); |
6f703406 DP |
1440 | if (pci_dma_mapping_error(pdev, temp_dma)) { |
1441 | netxen_clean_tx_dma_mapping(pdev, pbuf, i); | |
1442 | goto drop_packet; | |
1443 | } | |
3d396eb1 AK |
1444 | |
1445 | buffrag++; | |
1446 | buffrag->dma = temp_dma; | |
1447 | buffrag->length = temp_len; | |
1448 | ||
d32cc3d2 | 1449 | hwdesc->buffer_length[k] = cpu_to_le16(temp_len); |
3d396eb1 AK |
1450 | switch (k) { |
1451 | case 0: | |
3d396eb1 AK |
1452 | hwdesc->addr_buffer1 = cpu_to_le64(temp_dma); |
1453 | break; | |
1454 | case 1: | |
3d396eb1 AK |
1455 | hwdesc->addr_buffer2 = cpu_to_le64(temp_dma); |
1456 | break; | |
1457 | case 2: | |
3d396eb1 AK |
1458 | hwdesc->addr_buffer3 = cpu_to_le64(temp_dma); |
1459 | break; | |
1460 | case 3: | |
3d396eb1 AK |
1461 | hwdesc->addr_buffer4 = cpu_to_le64(temp_dma); |
1462 | break; | |
1463 | } | |
1464 | frag++; | |
1465 | } | |
ba53e6b4 | 1466 | producer = get_next_index(producer, num_txd); |
3d396eb1 | 1467 | |
3d396eb1 AK |
1468 | /* For LSO, we need to copy the MAC/IP/TCP headers into |
1469 | * the descriptor ring | |
1470 | */ | |
391587c3 | 1471 | if (is_tso) { |
3d396eb1 | 1472 | int hdr_len, first_hdr_len, more_hdr; |
391587c3 | 1473 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
ed25ffa1 AK |
1474 | if (hdr_len > (sizeof(struct cmd_desc_type0) - 2)) { |
1475 | first_hdr_len = sizeof(struct cmd_desc_type0) - 2; | |
3d396eb1 AK |
1476 | more_hdr = 1; |
1477 | } else { | |
1478 | first_hdr_len = hdr_len; | |
1479 | more_hdr = 0; | |
1480 | } | |
1481 | /* copy the MAC/IP/TCP headers to the cmd descriptor list */ | |
d877f1e3 DP |
1482 | hwdesc = &tx_ring->desc_head[producer]; |
1483 | pbuf = &tx_ring->cmd_buf_arr[producer]; | |
53a01e00 | 1484 | pbuf->skb = NULL; |
3d396eb1 AK |
1485 | |
1486 | /* copy the first 64 bytes */ | |
ed25ffa1 | 1487 | memcpy(((void *)hwdesc) + 2, |
3d396eb1 | 1488 | (void *)(skb->data), first_hdr_len); |
ba53e6b4 | 1489 | producer = get_next_index(producer, num_txd); |
3d396eb1 AK |
1490 | |
1491 | if (more_hdr) { | |
d877f1e3 DP |
1492 | hwdesc = &tx_ring->desc_head[producer]; |
1493 | pbuf = &tx_ring->cmd_buf_arr[producer]; | |
53a01e00 | 1494 | pbuf->skb = NULL; |
3d396eb1 AK |
1495 | /* copy the next 64 bytes - should be enough except |
1496 | * for pathological case | |
1497 | */ | |
d626f62b ACM |
1498 | skb_copy_from_linear_data_offset(skb, first_hdr_len, |
1499 | hwdesc, | |
1500 | (hdr_len - | |
1501 | first_hdr_len)); | |
ba53e6b4 | 1502 | producer = get_next_index(producer, num_txd); |
3d396eb1 AK |
1503 | } |
1504 | } | |
6c80b18d | 1505 | |
d877f1e3 | 1506 | tx_ring->producer = producer; |
5dc16268 | 1507 | adapter->stats.txbytes += skb->len; |
6c80b18d | 1508 | |
cb2107be | 1509 | netxen_nic_update_cmd_producer(adapter, tx_ring); |
3d396eb1 | 1510 | |
ba53e6b4 | 1511 | adapter->stats.xmitcalled++; |
3d396eb1 | 1512 | |
3d396eb1 | 1513 | return NETDEV_TX_OK; |
6f703406 DP |
1514 | |
1515 | drop_packet: | |
1516 | adapter->stats.txdropped++; | |
1517 | dev_kfree_skb_any(skb); | |
1518 | return NETDEV_TX_OK; | |
3d396eb1 AK |
1519 | } |
1520 | ||
a97342f9 DP |
1521 | static int netxen_nic_check_temp(struct netxen_adapter *adapter) |
1522 | { | |
1523 | struct net_device *netdev = adapter->netdev; | |
1524 | uint32_t temp, temp_state, temp_val; | |
1525 | int rv = 0; | |
1526 | ||
f98a9f69 | 1527 | temp = NXRD32(adapter, CRB_TEMP_STATE); |
a97342f9 DP |
1528 | |
1529 | temp_state = nx_get_temp_state(temp); | |
1530 | temp_val = nx_get_temp_val(temp); | |
1531 | ||
1532 | if (temp_state == NX_TEMP_PANIC) { | |
1533 | printk(KERN_ALERT | |
1534 | "%s: Device temperature %d degrees C exceeds" | |
1535 | " maximum allowed. Hardware has been shut down.\n", | |
1536 | netxen_nic_driver_name, temp_val); | |
1537 | ||
1538 | netif_carrier_off(netdev); | |
1539 | netif_stop_queue(netdev); | |
1540 | rv = 1; | |
1541 | } else if (temp_state == NX_TEMP_WARN) { | |
1542 | if (adapter->temp == NX_TEMP_NORMAL) { | |
1543 | printk(KERN_ALERT | |
1544 | "%s: Device temperature %d degrees C " | |
1545 | "exceeds operating range." | |
1546 | " Immediate action needed.\n", | |
1547 | netxen_nic_driver_name, temp_val); | |
1548 | } | |
1549 | } else { | |
1550 | if (adapter->temp == NX_TEMP_WARN) { | |
1551 | printk(KERN_INFO | |
1552 | "%s: Device temperature is now %d degrees C" | |
1553 | " in normal range.\n", netxen_nic_driver_name, | |
1554 | temp_val); | |
1555 | } | |
1556 | } | |
1557 | adapter->temp = temp_state; | |
1558 | return rv; | |
1559 | } | |
1560 | ||
3bf26ce3 | 1561 | void netxen_advert_link_change(struct netxen_adapter *adapter, int linkup) |
a97342f9 DP |
1562 | { |
1563 | struct net_device *netdev = adapter->netdev; | |
a97342f9 DP |
1564 | |
1565 | if (adapter->ahw.linkup && !linkup) { | |
1566 | printk(KERN_INFO "%s: %s NIC Link is down\n", | |
1567 | netxen_nic_driver_name, netdev->name); | |
1568 | adapter->ahw.linkup = 0; | |
1569 | if (netif_running(netdev)) { | |
1570 | netif_carrier_off(netdev); | |
1571 | netif_stop_queue(netdev); | |
1572 | } | |
c7860a2a | 1573 | |
3bf26ce3 DP |
1574 | if (!adapter->has_link_events) |
1575 | netxen_nic_set_link_parameters(adapter); | |
1576 | ||
a97342f9 DP |
1577 | } else if (!adapter->ahw.linkup && linkup) { |
1578 | printk(KERN_INFO "%s: %s NIC Link is up\n", | |
1579 | netxen_nic_driver_name, netdev->name); | |
1580 | adapter->ahw.linkup = 1; | |
1581 | if (netif_running(netdev)) { | |
1582 | netif_carrier_on(netdev); | |
1583 | netif_wake_queue(netdev); | |
1584 | } | |
c7860a2a | 1585 | |
3bf26ce3 DP |
1586 | if (!adapter->has_link_events) |
1587 | netxen_nic_set_link_parameters(adapter); | |
a97342f9 DP |
1588 | } |
1589 | } | |
1590 | ||
3bf26ce3 DP |
1591 | static void netxen_nic_handle_phy_intr(struct netxen_adapter *adapter) |
1592 | { | |
1593 | u32 val, port, linkup; | |
1594 | ||
1595 | port = adapter->physical_port; | |
1596 | ||
1597 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { | |
f98a9f69 | 1598 | val = NXRD32(adapter, CRB_XG_STATE_P3); |
3bf26ce3 DP |
1599 | val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val); |
1600 | linkup = (val == XG_LINK_UP_P3); | |
1601 | } else { | |
f98a9f69 | 1602 | val = NXRD32(adapter, CRB_XG_STATE); |
3bf26ce3 DP |
1603 | if (adapter->ahw.port_type == NETXEN_NIC_GBE) |
1604 | linkup = (val >> port) & 1; | |
1605 | else { | |
1606 | val = (val >> port*8) & 0xff; | |
1607 | linkup = (val == XG_LINK_UP); | |
1608 | } | |
1609 | } | |
1610 | ||
1611 | netxen_advert_link_change(adapter, linkup); | |
1612 | } | |
1613 | ||
3d396eb1 AK |
1614 | static void netxen_watchdog(unsigned long v) |
1615 | { | |
1616 | struct netxen_adapter *adapter = (struct netxen_adapter *)v; | |
ed25ffa1 AK |
1617 | |
1618 | SCHEDULE_WORK(&adapter->watchdog_task); | |
3d396eb1 AK |
1619 | } |
1620 | ||
a97342f9 DP |
1621 | void netxen_watchdog_task(struct work_struct *work) |
1622 | { | |
1623 | struct netxen_adapter *adapter = | |
1624 | container_of(work, struct netxen_adapter, watchdog_task); | |
1625 | ||
1626 | if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter)) | |
1627 | return; | |
1628 | ||
3bf26ce3 DP |
1629 | if (!adapter->has_link_events) |
1630 | netxen_nic_handle_phy_intr(adapter); | |
a97342f9 | 1631 | |
922c4f2c DP |
1632 | if (netif_running(adapter->netdev)) |
1633 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
a97342f9 DP |
1634 | } |
1635 | ||
3d396eb1 AK |
1636 | static void netxen_tx_timeout(struct net_device *netdev) |
1637 | { | |
3176ff3e MT |
1638 | struct netxen_adapter *adapter = (struct netxen_adapter *) |
1639 | netdev_priv(netdev); | |
1640 | SCHEDULE_WORK(&adapter->tx_timeout_task); | |
3d396eb1 AK |
1641 | } |
1642 | ||
6d5aefb8 | 1643 | static void netxen_tx_timeout_task(struct work_struct *work) |
3d396eb1 | 1644 | { |
4790654c | 1645 | struct netxen_adapter *adapter = |
3176ff3e | 1646 | container_of(work, struct netxen_adapter, tx_timeout_task); |
3d396eb1 AK |
1647 | |
1648 | printk(KERN_ERR "%s %s: transmit timeout, resetting.\n", | |
6c80b18d | 1649 | netxen_nic_driver_name, adapter->netdev->name); |
3d396eb1 | 1650 | |
d8b100c5 | 1651 | netxen_napi_disable(adapter); |
ba53e6b4 | 1652 | |
6c80b18d | 1653 | adapter->netdev->trans_start = jiffies; |
ba53e6b4 | 1654 | |
d8b100c5 | 1655 | netxen_napi_enable(adapter); |
6c80b18d | 1656 | netif_wake_queue(adapter->netdev); |
3d396eb1 AK |
1657 | } |
1658 | ||
a97342f9 DP |
1659 | struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev) |
1660 | { | |
1661 | struct netxen_adapter *adapter = netdev_priv(netdev); | |
1662 | struct net_device_stats *stats = &adapter->net_stats; | |
1663 | ||
1664 | memset(stats, 0, sizeof(*stats)); | |
1665 | ||
a97342f9 | 1666 | stats->rx_packets = adapter->stats.no_rcv; |
e98e3350 | 1667 | stats->tx_packets = adapter->stats.xmitfinished; |
a97342f9 | 1668 | stats->rx_bytes = adapter->stats.rxbytes; |
a97342f9 | 1669 | stats->tx_bytes = adapter->stats.txbytes; |
a97342f9 | 1670 | stats->rx_dropped = adapter->stats.rxdropped; |
a97342f9 DP |
1671 | stats->tx_dropped = adapter->stats.txdropped; |
1672 | ||
1673 | return stats; | |
1674 | } | |
1675 | ||
e4c93c81 | 1676 | static irqreturn_t netxen_intr(int irq, void *data) |
3d396eb1 | 1677 | { |
d8b100c5 DP |
1678 | struct nx_host_sds_ring *sds_ring = data; |
1679 | struct netxen_adapter *adapter = sds_ring->adapter; | |
d71e1be8 DP |
1680 | u32 status = 0; |
1681 | ||
1682 | status = adapter->pci_read_immediate(adapter, ISR_INT_VECTOR); | |
1683 | ||
1684 | if (!(status & adapter->legacy_intr.int_vec_bit)) | |
05aaa02d | 1685 | return IRQ_NONE; |
e01872af | 1686 | |
d71e1be8 DP |
1687 | if (adapter->ahw.revision_id >= NX_P3_B1) { |
1688 | /* check interrupt state machine, to be sure */ | |
1689 | status = adapter->pci_read_immediate(adapter, | |
1690 | ISR_INT_STATE_REG); | |
1691 | if (!ISR_LEGACY_INT_TRIGGERED(status)) | |
1692 | return IRQ_NONE; | |
1693 | ||
092bc571 DP |
1694 | } else { |
1695 | unsigned long our_int = 0; | |
d71e1be8 | 1696 | |
f98a9f69 | 1697 | our_int = NXRD32(adapter, CRB_INT_VECTOR); |
092bc571 | 1698 | |
d71e1be8 | 1699 | /* not our interrupt */ |
092bc571 | 1700 | if (!test_and_clear_bit((7 + adapter->portnum), &our_int)) |
d71e1be8 DP |
1701 | return IRQ_NONE; |
1702 | ||
092bc571 | 1703 | /* claim interrupt */ |
f98a9f69 | 1704 | NXWR32(adapter, CRB_INT_VECTOR, (our_int & 0xffffffff)); |
e01872af | 1705 | } |
1706 | ||
092bc571 DP |
1707 | /* clear interrupt */ |
1708 | if (adapter->fw_major < 4) | |
d8b100c5 | 1709 | netxen_nic_disable_int(sds_ring); |
092bc571 DP |
1710 | |
1711 | adapter->pci_write_immediate(adapter, | |
1712 | adapter->legacy_intr.tgt_status_reg, | |
1713 | 0xffffffff); | |
1714 | /* read twice to ensure write is flushed */ | |
1715 | adapter->pci_read_immediate(adapter, ISR_INT_VECTOR); | |
1716 | adapter->pci_read_immediate(adapter, ISR_INT_VECTOR); | |
1717 | ||
d8b100c5 | 1718 | napi_schedule(&sds_ring->napi); |
3d396eb1 AK |
1719 | |
1720 | return IRQ_HANDLED; | |
1721 | } | |
1722 | ||
e4c93c81 | 1723 | static irqreturn_t netxen_msi_intr(int irq, void *data) |
05aaa02d | 1724 | { |
d8b100c5 DP |
1725 | struct nx_host_sds_ring *sds_ring = data; |
1726 | struct netxen_adapter *adapter = sds_ring->adapter; | |
05aaa02d | 1727 | |
092bc571 DP |
1728 | /* clear interrupt */ |
1729 | adapter->pci_write_immediate(adapter, | |
7a2469ce | 1730 | adapter->msi_tgt_status, 0xffffffff); |
092bc571 | 1731 | |
d8b100c5 | 1732 | napi_schedule(&sds_ring->napi); |
05aaa02d DP |
1733 | return IRQ_HANDLED; |
1734 | } | |
1735 | ||
b3df68f8 DP |
1736 | static irqreturn_t netxen_msix_intr(int irq, void *data) |
1737 | { | |
d8b100c5 | 1738 | struct nx_host_sds_ring *sds_ring = data; |
b3df68f8 | 1739 | |
d8b100c5 | 1740 | napi_schedule(&sds_ring->napi); |
b3df68f8 DP |
1741 | return IRQ_HANDLED; |
1742 | } | |
1743 | ||
bea3348e | 1744 | static int netxen_nic_poll(struct napi_struct *napi, int budget) |
3d396eb1 | 1745 | { |
d8b100c5 DP |
1746 | struct nx_host_sds_ring *sds_ring = |
1747 | container_of(napi, struct nx_host_sds_ring, napi); | |
1748 | ||
1749 | struct netxen_adapter *adapter = sds_ring->adapter; | |
1750 | ||
05aaa02d | 1751 | int tx_complete; |
bea3348e | 1752 | int work_done; |
3d396eb1 | 1753 | |
05aaa02d | 1754 | tx_complete = netxen_process_cmd_ring(adapter); |
3d396eb1 | 1755 | |
d8b100c5 | 1756 | work_done = netxen_process_rcv_ring(sds_ring, budget); |
3d396eb1 | 1757 | |
05aaa02d | 1758 | if ((work_done < budget) && tx_complete) { |
d8b100c5 DP |
1759 | napi_complete(&sds_ring->napi); |
1760 | netxen_nic_enable_int(sds_ring); | |
3d396eb1 AK |
1761 | } |
1762 | ||
bea3348e | 1763 | return work_done; |
3d396eb1 AK |
1764 | } |
1765 | ||
1766 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1767 | static void netxen_nic_poll_controller(struct net_device *netdev) | |
1768 | { | |
3176ff3e | 1769 | struct netxen_adapter *adapter = netdev_priv(netdev); |
3d396eb1 | 1770 | disable_irq(adapter->irq); |
1494a814 | 1771 | netxen_intr(adapter->irq, adapter); |
3d396eb1 AK |
1772 | enable_irq(adapter->irq); |
1773 | } | |
1774 | #endif | |
3d396eb1 AK |
1775 | |
1776 | static struct pci_driver netxen_driver = { | |
1777 | .name = netxen_nic_driver_name, | |
1778 | .id_table = netxen_pci_tbl, | |
1779 | .probe = netxen_nic_probe, | |
0b72e659 | 1780 | .remove = __devexit_p(netxen_nic_remove), |
01542cd1 | 1781 | #ifdef CONFIG_PM |
0b72e659 DP |
1782 | .suspend = netxen_nic_suspend, |
1783 | .resume = netxen_nic_resume | |
01542cd1 | 1784 | #endif |
3d396eb1 AK |
1785 | }; |
1786 | ||
1787 | /* Driver Registration on NetXen card */ | |
1788 | ||
1789 | static int __init netxen_init_module(void) | |
1790 | { | |
ff4fbd43 DP |
1791 | printk(KERN_INFO "%s\n", netxen_nic_driver_string); |
1792 | ||
79ea13ce | 1793 | if ((netxen_workq = create_singlethread_workqueue("netxen")) == NULL) |
ed25ffa1 AK |
1794 | return -ENOMEM; |
1795 | ||
184231bd | 1796 | return pci_register_driver(&netxen_driver); |
3d396eb1 AK |
1797 | } |
1798 | ||
1799 | module_init(netxen_init_module); | |
1800 | ||
1801 | static void __exit netxen_exit_module(void) | |
1802 | { | |
3d396eb1 | 1803 | pci_unregister_driver(&netxen_driver); |
9de06610 | 1804 | destroy_workqueue(netxen_workq); |
3d396eb1 AK |
1805 | } |
1806 | ||
1807 | module_exit(netxen_exit_module); |