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pasemi_mac: Enable L2 caching of packet headers
[deliverable/linux.git] / drivers / net / pasemi_mac.c
CommitLineData
f5cd7872
OJ		 1/*
2 * Copyright (C) 2006-2007 PA Semi, Inc
3 *
4 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/init.h>
21#include <linux/module.h>
22#include <linux/pci.h>
23#include <linux/interrupt.h>
24#include <linux/dmaengine.h>
25#include <linux/delay.h>
26#include <linux/netdevice.h>
27#include <linux/etherdevice.h>
28#include <asm/dma-mapping.h>
29#include <linux/in.h>
30#include <linux/skbuff.h>
31
32#include <linux/ip.h>
33#include <linux/tcp.h>
34#include <net/checksum.h>
35
771f7404
OJ		 36#include <asm/irq.h>
37
f5cd7872
OJ		 38#include "pasemi_mac.h"
39
40
41/* TODO list
42 *
43 * - Get rid of pci_{read,write}_config(), map registers with ioremap
44 * for performance
45 * - PHY support
46 * - Multicast support
47 * - Large MTU support
48 * - Other performance improvements
49 */
50
51
52/* Must be a power of two */
53#define RX_RING_SIZE 512
54#define TX_RING_SIZE 512
55
ceb51361
OJ		 56#define DEFAULT_MSG_ENABLE \
57 (NETIF_MSG_DRV | \
58 NETIF_MSG_PROBE | \
59 NETIF_MSG_LINK | \
60 NETIF_MSG_TIMER | \
61 NETIF_MSG_IFDOWN | \
62 NETIF_MSG_IFUP | \
63 NETIF_MSG_RX_ERR | \
64 NETIF_MSG_TX_ERR)
65
f5cd7872
OJ		 66#define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
67#define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
68#define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
69#define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
70#define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
71
72#define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
73
ceb51361
OJ		 74MODULE_LICENSE("GPL");
75MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
76MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
77
78static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
79module_param(debug, int, 0);
80MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
f5cd7872
OJ		 81
82static struct pasdma_status *dma_status;
83
a85b9422
OJ		 84static unsigned int read_iob_reg(struct pasemi_mac *mac, unsigned int reg)
85{
b6e05a1b 86 return in_le32(mac->iob_regs+reg);
a85b9422
OJ		 87}
88
89static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
90 unsigned int val)
91{
b6e05a1b 92 out_le32(mac->iob_regs+reg, val);
a85b9422
OJ		 93}
94
95static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
96{
b6e05a1b 97 return in_le32(mac->regs+reg);
a85b9422
OJ		 98}
99
100static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
101 unsigned int val)
102{
b6e05a1b 103 out_le32(mac->regs+reg, val);
a85b9422
OJ		 104}
105
106static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
107{
b6e05a1b 108 return in_le32(mac->dma_regs+reg);
a85b9422
OJ		 109}
110
111static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
112 unsigned int val)
113{
b6e05a1b 114 out_le32(mac->dma_regs+reg, val);
a85b9422
OJ		 115}
116
f5cd7872
OJ		 117static int pasemi_get_mac_addr(struct pasemi_mac *mac)
118{
119 struct pci_dev *pdev = mac->pdev;
120 struct device_node *dn = pci_device_to_OF_node(pdev);
1af7f056 121 int len;
f5cd7872
OJ		 122 const u8 *maddr;
123 u8 addr[6];
124
125 if (!dn) {
126 dev_dbg(&pdev->dev,
127 "No device node for mac, not configuring\n");
128 return -ENOENT;
129 }
130
1af7f056 131 maddr = of_get_property(dn, "local-mac-address", &len);
132
133 if (maddr && len == 6) {
134 memcpy(mac->mac_addr, maddr, 6);
135 return 0;
136 }
137
138 /* Some old versions of firmware mistakenly uses mac-address
139 * (and as a string) instead of a byte array in local-mac-address.
140 */
a5fd22eb 141
a5fd22eb 142 if (maddr == NULL)
9028780a 143 maddr = of_get_property(dn, "mac-address", NULL);
a5fd22eb 144
f5cd7872
OJ		 145 if (maddr == NULL) {
146 dev_warn(&pdev->dev,
147 "no mac address in device tree, not configuring\n");
148 return -ENOENT;
149 }
150
1af7f056 151
f5cd7872
OJ		 152 if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
153 &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
154 dev_warn(&pdev->dev,
155 "can't parse mac address, not configuring\n");
156 return -EINVAL;
157 }
158
1af7f056 159 memcpy(mac->mac_addr, addr, 6);
160
f5cd7872
OJ		 161 return 0;
162}
163
164static int pasemi_mac_setup_rx_resources(struct net_device *dev)
165{
166 struct pasemi_mac_rxring *ring;
167 struct pasemi_mac *mac = netdev_priv(dev);
168 int chan_id = mac->dma_rxch;
169
170 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
171
172 if (!ring)
173 goto out_ring;
174
175 spin_lock_init(&ring->lock);
176
177 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
178 RX_RING_SIZE, GFP_KERNEL);
179
180 if (!ring->desc_info)
181 goto out_desc_info;
182
183 /* Allocate descriptors */
184 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
185 RX_RING_SIZE *
186 sizeof(struct pas_dma_xct_descr),
187 &ring->dma, GFP_KERNEL);
188
189 if (!ring->desc)
190 goto out_desc;
191
192 memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
193
194 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
195 RX_RING_SIZE * sizeof(u64),
196 &ring->buf_dma, GFP_KERNEL);
197 if (!ring->buffers)
198 goto out_buffers;
199
200 memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
201
a85b9422 202 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
f5cd7872 203
a85b9422
OJ		 204 write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
205 PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
206 PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
f5cd7872 207
a85b9422 208 write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
c0efd52b 209 PAS_DMA_RXCHAN_CFG_HBU(2));
f5cd7872 210
a85b9422
OJ		 211 write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
212 PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
f5cd7872 213
a85b9422
OJ		 214 write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
215 PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
216 PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
f5cd7872 217
c0efd52b
OJ		 218 write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
219 PAS_DMA_RXINT_CFG_DHL(2));
220
f5cd7872
OJ		 221 ring->next_to_fill = 0;
222 ring->next_to_clean = 0;
223
224 snprintf(ring->irq_name, sizeof(ring->irq_name),
225 "%s rx", dev->name);
226 mac->rx = ring;
227
228 return 0;
229
230out_buffers:
231 dma_free_coherent(&mac->dma_pdev->dev,
232 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
233 mac->rx->desc, mac->rx->dma);
234out_desc:
235 kfree(ring->desc_info);
236out_desc_info:
237 kfree(ring);
238out_ring:
239 return -ENOMEM;
240}
241
242
243static int pasemi_mac_setup_tx_resources(struct net_device *dev)
244{
245 struct pasemi_mac *mac = netdev_priv(dev);
246 u32 val;
247 int chan_id = mac->dma_txch;
248 struct pasemi_mac_txring *ring;
249
250 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
251 if (!ring)
252 goto out_ring;
253
254 spin_lock_init(&ring->lock);
255
256 ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
257 TX_RING_SIZE, GFP_KERNEL);
258 if (!ring->desc_info)
259 goto out_desc_info;
260
261 /* Allocate descriptors */
262 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
263 TX_RING_SIZE *
264 sizeof(struct pas_dma_xct_descr),
265 &ring->dma, GFP_KERNEL);
266 if (!ring->desc)
267 goto out_desc;
268
269 memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
270
a85b9422
OJ		 271 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
272 PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
f5cd7872
OJ		 273 val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
274 val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
275
a85b9422 276 write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
f5cd7872 277
a85b9422
OJ		 278 write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
279 PAS_DMA_TXCHAN_CFG_TY_IFACE |
280 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
281 PAS_DMA_TXCHAN_CFG_UP |
282 PAS_DMA_TXCHAN_CFG_WT(2));
f5cd7872
OJ		 283
284 ring->next_to_use = 0;
285 ring->next_to_clean = 0;
286
287 snprintf(ring->irq_name, sizeof(ring->irq_name),
288 "%s tx", dev->name);
289 mac->tx = ring;
290
291 return 0;
292
293out_desc:
294 kfree(ring->desc_info);
295out_desc_info:
296 kfree(ring);
297out_ring:
298 return -ENOMEM;
299}
300
301static void pasemi_mac_free_tx_resources(struct net_device *dev)
302{
303 struct pasemi_mac *mac = netdev_priv(dev);
304 unsigned int i;
305 struct pasemi_mac_buffer *info;
306 struct pas_dma_xct_descr *dp;
307
308 for (i = 0; i < TX_RING_SIZE; i++) {
309 info = &TX_DESC_INFO(mac, i);
310 dp = &TX_DESC(mac, i);
311 if (info->dma) {
312 if (info->skb) {
313 pci_unmap_single(mac->dma_pdev,
314 info->dma,
315 info->skb->len,
316 PCI_DMA_TODEVICE);
317 dev_kfree_skb_any(info->skb);
318 }
319 info->dma = 0;
320 info->skb = NULL;
321 dp->mactx = 0;
322 dp->ptr = 0;
323 }
324 }
325
326 dma_free_coherent(&mac->dma_pdev->dev,
327 TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
328 mac->tx->desc, mac->tx->dma);
329
330 kfree(mac->tx->desc_info);
331 kfree(mac->tx);
332 mac->tx = NULL;
333}
334
335static void pasemi_mac_free_rx_resources(struct net_device *dev)
336{
337 struct pasemi_mac *mac = netdev_priv(dev);
338 unsigned int i;
339 struct pasemi_mac_buffer *info;
340 struct pas_dma_xct_descr *dp;
341
342 for (i = 0; i < RX_RING_SIZE; i++) {
343 info = &RX_DESC_INFO(mac, i);
344 dp = &RX_DESC(mac, i);
9f05cfe2
OJ		 345 if (info->skb) {
346 if (info->dma) {
f5cd7872
OJ		 347 pci_unmap_single(mac->dma_pdev,
348 info->dma,
349 info->skb->len,
350 PCI_DMA_FROMDEVICE);
351 dev_kfree_skb_any(info->skb);
352 }
353 info->dma = 0;
354 info->skb = NULL;
355 dp->macrx = 0;
356 dp->ptr = 0;
357 }
358 }
359
360 dma_free_coherent(&mac->dma_pdev->dev,
361 RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
362 mac->rx->desc, mac->rx->dma);
363
364 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
365 mac->rx->buffers, mac->rx->buf_dma);
366
367 kfree(mac->rx->desc_info);
368 kfree(mac->rx);
369 mac->rx = NULL;
370}
371
372static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
373{
374 struct pasemi_mac *mac = netdev_priv(dev);
375 unsigned int i;
376 int start = mac->rx->next_to_fill;
cd4ceb24 377 unsigned int limit, count;
f5cd7872 378
cd4ceb24 379 limit = (mac->rx->next_to_clean + RX_RING_SIZE -
f5cd7872
OJ		 380 mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
381
382 /* Check to see if we're doing first-time setup */
383 if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
cd4ceb24 384 limit = RX_RING_SIZE;
f5cd7872 385
cd4ceb24 386 if (limit <= 0)
f5cd7872
OJ		 387 return;
388
cd4ceb24
OJ		 389 i = start;
390 for (count = limit; count; count--) {
f5cd7872
OJ		 391 struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
392 u64 *buff = &RX_BUFF(mac, i);
393 struct sk_buff *skb;
394 dma_addr_t dma;
395
9f05cfe2
OJ		 396 /* skb might still be in there for recycle on short receives */
397 if (info->skb)
398 skb = info->skb;
399 else
400 skb = dev_alloc_skb(BUF_SIZE);
f5cd7872 401
9f05cfe2 402 if (unlikely(!skb))
f5cd7872 403 break;
f5cd7872 404
f5cd7872
OJ		 405 dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
406 PCI_DMA_FROMDEVICE);
407
cd4ceb24 408 if (unlikely(dma_mapping_error(dma))) {
f5cd7872 409 dev_kfree_skb_irq(info->skb);
f5cd7872
OJ		 410 break;
411 }
412
413 info->skb = skb;
414 info->dma = dma;
415 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
cd4ceb24 416 i++;
f5cd7872
OJ		 417 }
418
419 wmb();
420
a85b9422
OJ		 421 write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), limit - count);
422 write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), limit - count);
f5cd7872 423
cd4ceb24 424 mac->rx->next_to_fill += limit - count;
f5cd7872
OJ		 425}
426
1b0335ea
OJ		 427static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
428{
52a94351 429 unsigned int reg, pcnt;
1b0335ea
OJ		 430 /* Re-enable packet count interrupts: finally
431 * ack the packet count interrupt we got in rx_intr.
432 */
433
52a94351 434 pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
1b0335ea 435
52a94351 436 reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
1b0335ea 437
a85b9422 438 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
1b0335ea
OJ		 439}
440
441static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
442{
52a94351 443 unsigned int reg, pcnt;
1b0335ea
OJ		 444
445 /* Re-enable packet count interrupts */
52a94351 446 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
1b0335ea 447
52a94351 448 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
1b0335ea 449
a85b9422 450 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
1b0335ea
OJ		 451}
452
453
f5cd7872
OJ		 454static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
455{
cd4ceb24
OJ		 456 unsigned int n;
457 int count;
458 struct pas_dma_xct_descr *dp;
459 struct pasemi_mac_buffer *info;
460 struct sk_buff *skb;
461 unsigned int i, len;
462 u64 macrx;
463 dma_addr_t dma;
f5cd7872
OJ		 464
465 spin_lock(&mac->rx->lock);
466
cd4ceb24 467 n = mac->rx->next_to_clean;
f5cd7872 468
cd4ceb24 469 for (count = limit; count; count--) {
f5cd7872
OJ		 470
471 rmb();
472
cd4ceb24
OJ		 473 dp = &RX_DESC(mac, n);
474 macrx = dp->macrx;
f5cd7872 475
cd4ceb24 476 if (!(macrx & XCT_MACRX_O))
f5cd7872
OJ		 477 break;
478
f5cd7872
OJ		 479
480 info = NULL;
481
482 /* We have to scan for our skb since there's no way
483 * to back-map them from the descriptor, and if we
484 * have several receive channels then they might not
485 * show up in the same order as they were put on the
486 * interface ring.
487 */
488
489 dma = (dp->ptr & XCT_PTR_ADDR_M);
cd4ceb24
OJ		 490 for (i = n; i < (n + RX_RING_SIZE); i++) {
491 info = &RX_DESC_INFO(mac, i);
f5cd7872
OJ		 492 if (info->dma == dma)
493 break;
494 }
495
9f05cfe2 496 skb = info->skb;
cd4ceb24 497 info->dma = 0;
f5cd7872 498
cd4ceb24 499 pci_unmap_single(mac->dma_pdev, dma, skb->len,
f5cd7872
OJ		 500 PCI_DMA_FROMDEVICE);
501
cd4ceb24 502 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
f5cd7872 503
9f05cfe2
OJ		 504 if (len < 256) {
505 struct sk_buff *new_skb =
506 netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
507 if (new_skb) {
508 skb_reserve(new_skb, NET_IP_ALIGN);
509 memcpy(new_skb->data - NET_IP_ALIGN,
510 skb->data - NET_IP_ALIGN,
511 len + NET_IP_ALIGN);
512 /* save the skb in buffer_info as good */
513 skb = new_skb;
514 }
515 /* else just continue with the old one */
516 } else
517 info->skb = NULL;
f5cd7872
OJ		 518
519 skb_put(skb, len);
520
521 skb->protocol = eth_type_trans(skb, mac->netdev);
522
cd4ceb24 523 if ((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK) {
f5cd7872 524 skb->ip_summed = CHECKSUM_COMPLETE;
cd4ceb24 525 skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
f5cd7872
OJ		 526 XCT_MACRX_CSUM_S;
527 } else
528 skb->ip_summed = CHECKSUM_NONE;
529
530 mac->stats.rx_bytes += len;
531 mac->stats.rx_packets++;
532
533 netif_receive_skb(skb);
534
f5cd7872
OJ		 535 dp->ptr = 0;
536 dp->macrx = 0;
cd4ceb24
OJ		 537
538 n++;
f5cd7872
OJ		 539 }
540
cd4ceb24 541 mac->rx->next_to_clean += limit - count;
f5cd7872
OJ		 542 pasemi_mac_replenish_rx_ring(mac->netdev);
543
544 spin_unlock(&mac->rx->lock);
545
546 return count;
547}
548
549static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
550{
551 int i;
552 struct pasemi_mac_buffer *info;
553 struct pas_dma_xct_descr *dp;
554 int start, count;
555 int flags;
556
557 spin_lock_irqsave(&mac->tx->lock, flags);
558
559 start = mac->tx->next_to_clean;
560 count = 0;
561
562 for (i = start; i < mac->tx->next_to_use; i++) {
563 dp = &TX_DESC(mac, i);
564 if (!dp || (dp->mactx & XCT_MACTX_O))
565 break;
566
567 count++;
568
569 info = &TX_DESC_INFO(mac, i);
570
571 pci_unmap_single(mac->dma_pdev, info->dma,
572 info->skb->len, PCI_DMA_TODEVICE);
573 dev_kfree_skb_irq(info->skb);
574
575 info->skb = NULL;
576 info->dma = 0;
577 dp->mactx = 0;
578 dp->ptr = 0;
579 }
580 mac->tx->next_to_clean += count;
581 spin_unlock_irqrestore(&mac->tx->lock, flags);
0ce68c74
OJ		 582 netif_wake_queue(mac->netdev);
583
f5cd7872
OJ		 584 return count;
585}
586
587
588static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
589{
590 struct net_device *dev = data;
591 struct pasemi_mac *mac = netdev_priv(dev);
592 unsigned int reg;
593
6dfa7522 594 if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
f5cd7872
OJ		 595 return IRQ_NONE;
596
6dfa7522
OJ		 597 if (*mac->rx_status & PAS_STATUS_ERROR)
598 printk("rx_status reported error\n");
599
600 /* Don't reset packet count so it won't fire again but clear
601 * all others.
602 */
603
6dfa7522
OJ		 604 reg = 0;
605 if (*mac->rx_status & PAS_STATUS_SOFT)
606 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
607 if (*mac->rx_status & PAS_STATUS_ERROR)
608 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
f5cd7872
OJ		 609 if (*mac->rx_status & PAS_STATUS_TIMER)
610 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
611
bea3348e 612 netif_rx_schedule(dev, &mac->napi);
6dfa7522 613
a85b9422 614 write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
f5cd7872
OJ		 615
616 return IRQ_HANDLED;
617}
618
619static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
620{
621 struct net_device *dev = data;
622 struct pasemi_mac *mac = netdev_priv(dev);
52a94351 623 unsigned int reg, pcnt;
f5cd7872 624
6dfa7522 625 if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
f5cd7872
OJ		 626 return IRQ_NONE;
627
628 pasemi_mac_clean_tx(mac);
629
52a94351
OJ		 630 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
631
632 reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
6dfa7522
OJ		 633
634 if (*mac->tx_status & PAS_STATUS_SOFT)
635 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
636 if (*mac->tx_status & PAS_STATUS_ERROR)
637 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
f5cd7872 638
a85b9422 639 write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
f5cd7872 640
f5cd7872
OJ		 641 return IRQ_HANDLED;
642}
643
bb6e9590
OJ		 644static void pasemi_adjust_link(struct net_device *dev)
645{
646 struct pasemi_mac *mac = netdev_priv(dev);
647 int msg;
648 unsigned int flags;
649 unsigned int new_flags;
650
651 if (!mac->phydev->link) {
652 /* If no link, MAC speed settings don't matter. Just report
653 * link down and return.
654 */
655 if (mac->link && netif_msg_link(mac))
656 printk(KERN_INFO "%s: Link is down.\n", dev->name);
657
658 netif_carrier_off(dev);
659 mac->link = 0;
660
661 return;
662 } else
663 netif_carrier_on(dev);
664
a85b9422 665 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
bb6e9590
OJ		 666 new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
667 PAS_MAC_CFG_PCFG_TSR_M);
668
669 if (!mac->phydev->duplex)
670 new_flags |= PAS_MAC_CFG_PCFG_HD;
671
672 switch (mac->phydev->speed) {
673 case 1000:
674 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
675 PAS_MAC_CFG_PCFG_TSR_1G;
676 break;
677 case 100:
678 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
679 PAS_MAC_CFG_PCFG_TSR_100M;
680 break;
681 case 10:
682 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
683 PAS_MAC_CFG_PCFG_TSR_10M;
684 break;
685 default:
686 printk("Unsupported speed %d\n", mac->phydev->speed);
687 }
688
689 /* Print on link or speed/duplex change */
690 msg = mac->link != mac->phydev->link || flags != new_flags;
691
692 mac->duplex = mac->phydev->duplex;
693 mac->speed = mac->phydev->speed;
694 mac->link = mac->phydev->link;
695
696 if (new_flags != flags)
a85b9422 697 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
bb6e9590
OJ		 698
699 if (msg && netif_msg_link(mac))
700 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
701 dev->name, mac->speed, mac->duplex ? "full" : "half");
702}
703
704static int pasemi_mac_phy_init(struct net_device *dev)
705{
706 struct pasemi_mac *mac = netdev_priv(dev);
707 struct device_node *dn, *phy_dn;
708 struct phy_device *phydev;
709 unsigned int phy_id;
710 const phandle *ph;
711 const unsigned int *prop;
712 struct resource r;
713 int ret;
714
715 dn = pci_device_to_OF_node(mac->pdev);
9028780a 716 ph = of_get_property(dn, "phy-handle", NULL);
bb6e9590
OJ		 717 if (!ph)
718 return -ENODEV;
719 phy_dn = of_find_node_by_phandle(*ph);
720
9028780a 721 prop = of_get_property(phy_dn, "reg", NULL);
bb6e9590
OJ		 722 ret = of_address_to_resource(phy_dn->parent, 0, &r);
723 if (ret)
724 goto err;
725
726 phy_id = *prop;
727 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
728
729 of_node_put(phy_dn);
730
731 mac->link = 0;
732 mac->speed = 0;
733 mac->duplex = -1;
734
735 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
736
737 if (IS_ERR(phydev)) {
738 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
739 return PTR_ERR(phydev);
740 }
741
742 mac->phydev = phydev;
743
744 return 0;
745
746err:
747 of_node_put(phy_dn);
748 return -ENODEV;
749}
750
751
f5cd7872
OJ		 752static int pasemi_mac_open(struct net_device *dev)
753{
754 struct pasemi_mac *mac = netdev_priv(dev);
771f7404 755 int base_irq;
f5cd7872
OJ		 756 unsigned int flags;
757 int ret;
758
759 /* enable rx section */
a85b9422 760 write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
f5cd7872
OJ		 761
762 /* enable tx section */
a85b9422 763 write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
f5cd7872
OJ		 764
765 flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
766 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
767 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
768
a85b9422 769 write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
f5cd7872
OJ		 770
771 flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
772 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
773
774 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
775
a85b9422
OJ		 776 write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
777 PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
f5cd7872 778
a85b9422
OJ		 779 write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
780 PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
f5cd7872 781
1b0335ea
OJ		 782 /* Clear out any residual packet count state from firmware */
783 pasemi_mac_restart_rx_intr(mac);
784 pasemi_mac_restart_tx_intr(mac);
785
6dfa7522 786 /* 0xffffff is max value, about 16ms */
a85b9422
OJ		 787 write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
788 PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
f5cd7872 789
a85b9422 790 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
f5cd7872
OJ		 791
792 ret = pasemi_mac_setup_rx_resources(dev);
793 if (ret)
794 goto out_rx_resources;
795
796 ret = pasemi_mac_setup_tx_resources(dev);
797 if (ret)
798 goto out_tx_resources;
799
a85b9422
OJ		 800 write_mac_reg(mac, PAS_MAC_IPC_CHNL,
801 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
802 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
f5cd7872
OJ		 803
804 /* enable rx if */
a85b9422
OJ		 805 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
806 PAS_DMA_RXINT_RCMDSTA_EN);
f5cd7872
OJ		 807
808 /* enable rx channel */
a85b9422
OJ		 809 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
810 PAS_DMA_RXCHAN_CCMDSTA_EN |
811 PAS_DMA_RXCHAN_CCMDSTA_DU);
f5cd7872
OJ		 812
813 /* enable tx channel */
a85b9422
OJ		 814 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
815 PAS_DMA_TXCHAN_TCMDSTA_EN);
f5cd7872
OJ		 816
817 pasemi_mac_replenish_rx_ring(dev);
818
bb6e9590
OJ		 819 ret = pasemi_mac_phy_init(dev);
820 /* Some configs don't have PHYs (XAUI etc), so don't complain about
821 * failed init due to -ENODEV.
822 */
823 if (ret && ret != -ENODEV)
824 dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
825
f5cd7872 826 netif_start_queue(dev);
bea3348e 827 napi_enable(&mac->napi);
f5cd7872 828
771f7404
OJ		 829 /* Interrupts are a bit different for our DMA controller: While
830 * it's got one a regular PCI device header, the interrupt there
831 * is really the base of the range it's using. Each tx and rx
832 * channel has it's own interrupt source.
833 */
834
835 base_irq = virq_to_hw(mac->dma_pdev->irq);
836
837 mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
838 mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
839
840 ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
f5cd7872
OJ		 841 mac->tx->irq_name, dev);
842 if (ret) {
843 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
771f7404 844 base_irq + mac->dma_txch, ret);
f5cd7872
OJ		 845 goto out_tx_int;
846 }
847
771f7404 848 ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
f5cd7872
OJ		 849 mac->rx->irq_name, dev);
850 if (ret) {
851 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
771f7404 852 base_irq + 20 + mac->dma_rxch, ret);
f5cd7872
OJ		 853 goto out_rx_int;
854 }
855
bb6e9590
OJ		 856 if (mac->phydev)
857 phy_start(mac->phydev);
858
f5cd7872
OJ		 859 return 0;
860
861out_rx_int:
771f7404 862 free_irq(mac->tx_irq, dev);
f5cd7872 863out_tx_int:
bea3348e 864 napi_disable(&mac->napi);
f5cd7872
OJ		 865 netif_stop_queue(dev);
866 pasemi_mac_free_tx_resources(dev);
867out_tx_resources:
868 pasemi_mac_free_rx_resources(dev);
869out_rx_resources:
870
871 return ret;
872}
873
874#define MAX_RETRIES 5000
875
876static int pasemi_mac_close(struct net_device *dev)
877{
878 struct pasemi_mac *mac = netdev_priv(dev);
879 unsigned int stat;
880 int retries;
881
bb6e9590
OJ		 882 if (mac->phydev) {
883 phy_stop(mac->phydev);
884 phy_disconnect(mac->phydev);
885 }
886
f5cd7872 887 netif_stop_queue(dev);
bea3348e 888 napi_disable(&mac->napi);
f5cd7872
OJ		 889
890 /* Clean out any pending buffers */
891 pasemi_mac_clean_tx(mac);
892 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
893
894 /* Disable interface */
a85b9422
OJ		 895 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
896 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
897 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
f5cd7872
OJ		 898
899 for (retries = 0; retries < MAX_RETRIES; retries++) {
a85b9422 900 stat = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
0ce68c74 901 if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
f5cd7872
OJ		 902 break;
903 cond_resched();
904 }
905
0ce68c74 906 if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
f5cd7872 907 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
f5cd7872
OJ		 908
909 for (retries = 0; retries < MAX_RETRIES; retries++) {
a85b9422 910 stat = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
0ce68c74 911 if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
f5cd7872
OJ		 912 break;
913 cond_resched();
914 }
915
0ce68c74 916 if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
f5cd7872 917 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
f5cd7872
OJ		 918
919 for (retries = 0; retries < MAX_RETRIES; retries++) {
a85b9422 920 stat = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
0ce68c74 921 if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
f5cd7872
OJ		 922 break;
923 cond_resched();
924 }
925
0ce68c74 926 if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
f5cd7872 927 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
f5cd7872
OJ		 928
929 /* Then, disable the channel. This must be done separately from
930 * stopping, since you can't disable when active.
931 */
932
a85b9422
OJ		 933 write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
934 write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
935 write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
f5cd7872 936
771f7404
OJ		 937 free_irq(mac->tx_irq, dev);
938 free_irq(mac->rx_irq, dev);
f5cd7872
OJ		 939
940 /* Free resources */
941 pasemi_mac_free_rx_resources(dev);
942 pasemi_mac_free_tx_resources(dev);
943
944 return 0;
945}
946
947static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
948{
949 struct pasemi_mac *mac = netdev_priv(dev);
950 struct pasemi_mac_txring *txring;
951 struct pasemi_mac_buffer *info;
952 struct pas_dma_xct_descr *dp;
953 u64 dflags;
954 dma_addr_t map;
955 int flags;
956
957 dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
958
959 if (skb->ip_summed == CHECKSUM_PARTIAL) {
d56f90a7
ACM		 960 const unsigned char *nh = skb_network_header(skb);
961
eddc9ec5 962 switch (ip_hdr(skb)->protocol) {
f5cd7872
OJ		 963 case IPPROTO_TCP:
964 dflags |= XCT_MACTX_CSUM_TCP;
cfe1fc77 965 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
d56f90a7 966 dflags |= XCT_MACTX_IPO(nh - skb->data);
f5cd7872
OJ		 967 break;
968 case IPPROTO_UDP:
969 dflags |= XCT_MACTX_CSUM_UDP;
cfe1fc77 970 dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
d56f90a7 971 dflags |= XCT_MACTX_IPO(nh - skb->data);
f5cd7872
OJ		 972 break;
973 }
974 }
975
976 map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
977
978 if (dma_mapping_error(map))
979 return NETDEV_TX_BUSY;
980
981 txring = mac->tx;
982
983 spin_lock_irqsave(&txring->lock, flags);
984
985 if (txring->next_to_clean - txring->next_to_use == TX_RING_SIZE) {
986 spin_unlock_irqrestore(&txring->lock, flags);
987 pasemi_mac_clean_tx(mac);
52a94351 988 pasemi_mac_restart_tx_intr(mac);
f5cd7872
OJ		 989 spin_lock_irqsave(&txring->lock, flags);
990
991 if (txring->next_to_clean - txring->next_to_use ==
992 TX_RING_SIZE) {
993 /* Still no room -- stop the queue and wait for tx
994 * intr when there's room.
995 */
996 netif_stop_queue(dev);
997 goto out_err;
998 }
999 }
1000
1001
1002 dp = &TX_DESC(mac, txring->next_to_use);
1003 info = &TX_DESC_INFO(mac, txring->next_to_use);
1004
1005 dp->mactx = dflags | XCT_MACTX_LLEN(skb->len);
1006 dp->ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
1007 info->dma = map;
1008 info->skb = skb;
1009
1010 txring->next_to_use++;
1011 mac->stats.tx_packets++;
1012 mac->stats.tx_bytes += skb->len;
1013
1014 spin_unlock_irqrestore(&txring->lock, flags);
1015
a85b9422 1016 write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
f5cd7872
OJ		 1017
1018 return NETDEV_TX_OK;
1019
1020out_err:
1021 spin_unlock_irqrestore(&txring->lock, flags);
1022 pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
1023 return NETDEV_TX_BUSY;
1024}
1025
1026static struct net_device_stats *pasemi_mac_get_stats(struct net_device *dev)
1027{
1028 struct pasemi_mac *mac = netdev_priv(dev);
1029
1030 return &mac->stats;
1031}
1032
ceb51361 1033
f5cd7872
OJ		 1034static void pasemi_mac_set_rx_mode(struct net_device *dev)
1035{
1036 struct pasemi_mac *mac = netdev_priv(dev);
1037 unsigned int flags;
1038
a85b9422 1039 flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
f5cd7872
OJ		 1040
1041 /* Set promiscuous */
1042 if (dev->flags & IFF_PROMISC)
1043 flags |= PAS_MAC_CFG_PCFG_PR;
1044 else
1045 flags &= ~PAS_MAC_CFG_PCFG_PR;
1046
a85b9422 1047 write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
f5cd7872
OJ		 1048}
1049
1050
bea3348e 1051static int pasemi_mac_poll(struct napi_struct *napi, int budget)
f5cd7872 1052{
bea3348e
SH		 1053 struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1054 struct net_device *dev = mac->netdev;
1055 int pkts;
f5cd7872 1056
bea3348e
SH		 1057 pkts = pasemi_mac_clean_rx(mac, budget);
1058 if (pkts < budget) {
f5cd7872 1059 /* all done, no more packets present */
bea3348e 1060 netif_rx_complete(dev, napi);
f5cd7872 1061
1b0335ea 1062 pasemi_mac_restart_rx_intr(mac);
f5cd7872 1063 }
bea3348e 1064 return pkts;
f5cd7872
OJ		 1065}
1066
b6e05a1b
OJ		 1067static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
1068{
1069 struct device_node *dn;
1070 void __iomem *ret;
1071
1072 dn = pci_device_to_OF_node(p);
1073 if (!dn)
1074 goto fallback;
1075
1076 ret = of_iomap(dn, index);
1077 if (!ret)
1078 goto fallback;
1079
1080 return ret;
1081fallback:
1082 /* This is hardcoded and ugly, but we have some firmware versions
1083 * that don't provide the register space in the device tree. Luckily
1084 * they are at well-known locations so we can just do the math here.
1085 */
1086 return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
1087}
1088
1089static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
1090{
1091 struct resource res;
1092 struct device_node *dn;
1093 int err;
1094
1095 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1096 if (!mac->dma_pdev) {
1097 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1098 return -ENODEV;
1099 }
1100
1101 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1102 if (!mac->iob_pdev) {
1103 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1104 return -ENODEV;
1105 }
1106
1107 mac->regs = map_onedev(mac->pdev, 0);
1108 mac->dma_regs = map_onedev(mac->dma_pdev, 0);
1109 mac->iob_regs = map_onedev(mac->iob_pdev, 0);
1110
1111 if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
1112 dev_err(&mac->pdev->dev, "Can't map registers\n");
1113 return -ENODEV;
1114 }
1115
1116 /* The dma status structure is located in the I/O bridge, and
1117 * is cache coherent.
1118 */
1119 if (!dma_status) {
1120 dn = pci_device_to_OF_node(mac->iob_pdev);
1121 if (dn)
1122 err = of_address_to_resource(dn, 1, &res);
1123 if (!dn || err) {
1124 /* Fallback for old firmware */
1125 res.start = 0xfd800000;
1126 res.end = res.start + 0x1000;
1127 }
1128 dma_status = __ioremap(res.start, res.end-res.start, 0);
1129 }
1130
1131 return 0;
1132}
1133
f5cd7872
OJ		 1134static int __devinit
1135pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1136{
1137 static int index = 0;
1138 struct net_device *dev;
1139 struct pasemi_mac *mac;
1140 int err;
1141
1142 err = pci_enable_device(pdev);
1143 if (err)
1144 return err;
1145
1146 dev = alloc_etherdev(sizeof(struct pasemi_mac));
1147 if (dev == NULL) {
1148 dev_err(&pdev->dev,
1149 "pasemi_mac: Could not allocate ethernet device.\n");
1150 err = -ENOMEM;
1151 goto out_disable_device;
1152 }
1153
1154 SET_MODULE_OWNER(dev);
1155 pci_set_drvdata(pdev, dev);
1156 SET_NETDEV_DEV(dev, &pdev->dev);
1157
1158 mac = netdev_priv(dev);
1159
1160 mac->pdev = pdev;
1161 mac->netdev = dev;
f5cd7872 1162
bea3348e
SH		 1163 netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1164
1165 dev->features = NETIF_F_HW_CSUM;
1166
f5cd7872
OJ		 1167 /* These should come out of the device tree eventually */
1168 mac->dma_txch = index;
1169 mac->dma_rxch = index;
1170
1171 /* We probe GMAC before XAUI, but the DMA interfaces are
1172 * in XAUI, GMAC order.
1173 */
1174 if (index < 4)
1175 mac->dma_if = index + 2;
1176 else
1177 mac->dma_if = index - 4;
1178 index++;
1179
1180 switch (pdev->device) {
1181 case 0xa005:
1182 mac->type = MAC_TYPE_GMAC;
1183 break;
1184 case 0xa006:
1185 mac->type = MAC_TYPE_XAUI;
1186 break;
1187 default:
1188 err = -ENODEV;
1189 goto out;
1190 }
1191
1192 /* get mac addr from device tree */
1193 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1194 err = -ENODEV;
1195 goto out;
1196 }
1197 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1198
1199 dev->open = pasemi_mac_open;
1200 dev->stop = pasemi_mac_close;
1201 dev->hard_start_xmit = pasemi_mac_start_tx;
1202 dev->get_stats = pasemi_mac_get_stats;
1203 dev->set_multicast_list = pasemi_mac_set_rx_mode;
f5cd7872 1204
b6e05a1b
OJ		 1205 err = pasemi_mac_map_regs(mac);
1206 if (err)
1207 goto out;
f5cd7872
OJ		 1208
1209 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1210 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1211
ceb51361
OJ		 1212 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1213
bb6e9590
OJ		 1214 /* Enable most messages by default */
1215 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1216
f5cd7872
OJ		 1217 err = register_netdev(dev);
1218
1219 if (err) {
1220 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1221 err);
1222 goto out;
1223 } else
1224 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
1225 "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
1226 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1227 mac->dma_if, mac->dma_txch, mac->dma_rxch,
1228 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1229 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1230
1231 return err;
1232
1233out:
b6e05a1b
OJ		 1234 if (mac->iob_pdev)
1235 pci_dev_put(mac->iob_pdev);
1236 if (mac->dma_pdev)
1237 pci_dev_put(mac->dma_pdev);
1238 if (mac->dma_regs)
1239 iounmap(mac->dma_regs);
1240 if (mac->iob_regs)
1241 iounmap(mac->iob_regs);
1242 if (mac->regs)
1243 iounmap(mac->regs);
1244
f5cd7872
OJ		 1245 free_netdev(dev);
1246out_disable_device:
1247 pci_disable_device(pdev);
1248 return err;
1249
1250}
1251
1252static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1253{
1254 struct net_device *netdev = pci_get_drvdata(pdev);
1255 struct pasemi_mac *mac;
1256
1257 if (!netdev)
1258 return;
1259
1260 mac = netdev_priv(netdev);
1261
1262 unregister_netdev(netdev);
1263
1264 pci_disable_device(pdev);
1265 pci_dev_put(mac->dma_pdev);
1266 pci_dev_put(mac->iob_pdev);
1267
b6e05a1b
OJ		 1268 iounmap(mac->regs);
1269 iounmap(mac->dma_regs);
1270 iounmap(mac->iob_regs);
1271
f5cd7872
OJ		 1272 pci_set_drvdata(pdev, NULL);
1273 free_netdev(netdev);
1274}
1275
1276static struct pci_device_id pasemi_mac_pci_tbl[] = {
1277 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1278 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
fd178254 1279 { },
f5cd7872
OJ		 1280};
1281
1282MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1283
1284static struct pci_driver pasemi_mac_driver = {
1285 .name = "pasemi_mac",
1286 .id_table = pasemi_mac_pci_tbl,
1287 .probe = pasemi_mac_probe,
1288 .remove = __devexit_p(pasemi_mac_remove),
1289};
1290
1291static void __exit pasemi_mac_cleanup_module(void)
1292{
1293 pci_unregister_driver(&pasemi_mac_driver);
1294 __iounmap(dma_status);
1295 dma_status = NULL;
1296}
1297
1298int pasemi_mac_init_module(void)
1299{
1300 return pci_register_driver(&pasemi_mac_driver);
1301}
1302
f5cd7872
OJ		 1303module_init(pasemi_mac_init_module);
1304module_exit(pasemi_mac_cleanup_module);
Linux kernel - Deliverables
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