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[VLAN] vlan_dev: Use skb_reset_network_header().
[deliverable/linux.git] / drivers / net / pcmcia / nmclan_cs.c
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1da177e4
LT		 1/* ----------------------------------------------------------------------------
2Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
4
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
8
9Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
12
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
15
16Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
18
19References
20
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
26
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
33
34 The Linux client driver is based on the 3c589_cs.c client driver by
35 David Hinds.
36
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
39 by Donald Becker.
40
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
43
44 Special thanks for testing and help in debugging this driver goes
45 to Ken Lesniak.
46
47-------------------------------------------------------------------------------
48Driver Notes and Issues
49-------------------------------------------------------------------------------
50
511. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
54
552. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
59
603. If hot extraction does not work for you, use 'ifconfig eth0 down'
61 before extraction.
62
634. There is a bad slow-down problem in this driver.
64
655. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
67
68-------------------------------------------------------------------------------
69History
70-------------------------------------------------------------------------------
71Log: nmclan_cs.c,v
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@redhat.com>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
75 *
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
78 *
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
81 *
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
86 *
87 * Revision 0.13 1995/05/18 05:56:34 rpao
88 * Statistics changes.
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
91 *
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
94 *
95
9695/05/13 rpao V0.10a
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
10095/05/11 rpao V0.10
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
10395/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
104 *Released
10595/05/10 rpao V0.08
106 Bug fix: Make all non-exported functions private by using
107 static keyword.
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
10995/05/10 rpao V0.07 Statistics.
11095/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
111
112---------------------------------------------------------------------------- */
113
114#define DRV_NAME "nmclan_cs"
115#define DRV_VERSION "0.16"
116
117
118/* ----------------------------------------------------------------------------
119Conditional Compilation Options
120---------------------------------------------------------------------------- */
121
122#define MULTI_TX 0
123#define RESET_ON_TIMEOUT 1
124#define TX_INTERRUPTABLE 1
125#define RESET_XILINX 0
126
127/* ----------------------------------------------------------------------------
128Include Files
129---------------------------------------------------------------------------- */
130
131#include <linux/module.h>
132#include <linux/kernel.h>
133#include <linux/init.h>
134#include <linux/ptrace.h>
135#include <linux/slab.h>
136#include <linux/string.h>
137#include <linux/timer.h>
138#include <linux/interrupt.h>
139#include <linux/in.h>
140#include <linux/delay.h>
141#include <linux/ethtool.h>
142#include <linux/netdevice.h>
143#include <linux/etherdevice.h>
144#include <linux/skbuff.h>
145#include <linux/if_arp.h>
146#include <linux/ioport.h>
147#include <linux/bitops.h>
148
1da177e4
LT		 149#include <pcmcia/cs_types.h>
150#include <pcmcia/cs.h>
151#include <pcmcia/cisreg.h>
152#include <pcmcia/cistpl.h>
153#include <pcmcia/ds.h>
154
155#include <asm/uaccess.h>
156#include <asm/io.h>
157#include <asm/system.h>
158
159/* ----------------------------------------------------------------------------
160Defines
161---------------------------------------------------------------------------- */
162
163#define ETHER_ADDR_LEN ETH_ALEN
164 /* 6 bytes in an Ethernet Address */
165#define MACE_LADRF_LEN 8
166 /* 8 bytes in Logical Address Filter */
167
168/* Loop Control Defines */
169#define MACE_MAX_IR_ITERATIONS 10
170#define MACE_MAX_RX_ITERATIONS 12
171 /*
172 TBD: Dean brought this up, and I assumed the hardware would
173 handle it:
174
175 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
176 non-zero when the isr exits. We may not get another interrupt
177 to process the remaining packets for some time.
178 */
179
180/*
181The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
182which manages the interface between the MACE and the PCMCIA bus. It
183also includes buffer management for the 32K x 8 SRAM to control up to
184four transmit and 12 receive frames at a time.
185*/
186#define AM2150_MAX_TX_FRAMES 4
187#define AM2150_MAX_RX_FRAMES 12
188
189/* Am2150 Ethernet Card I/O Mapping */
190#define AM2150_RCV 0x00
191#define AM2150_XMT 0x04
192#define AM2150_XMT_SKIP 0x09
193#define AM2150_RCV_NEXT 0x0A
194#define AM2150_RCV_FRAME_COUNT 0x0B
195#define AM2150_MACE_BANK 0x0C
196#define AM2150_MACE_BASE 0x10
197
198/* MACE Registers */
199#define MACE_RCVFIFO 0
200#define MACE_XMTFIFO 1
201#define MACE_XMTFC 2
202#define MACE_XMTFS 3
203#define MACE_XMTRC 4
204#define MACE_RCVFC 5
205#define MACE_RCVFS 6
206#define MACE_FIFOFC 7
207#define MACE_IR 8
208#define MACE_IMR 9
209#define MACE_PR 10
210#define MACE_BIUCC 11
211#define MACE_FIFOCC 12
212#define MACE_MACCC 13
213#define MACE_PLSCC 14
214#define MACE_PHYCC 15
215#define MACE_CHIPIDL 16
216#define MACE_CHIPIDH 17
217#define MACE_IAC 18
218/* Reserved */
219#define MACE_LADRF 20
220#define MACE_PADR 21
221/* Reserved */
222/* Reserved */
223#define MACE_MPC 24
224/* Reserved */
225#define MACE_RNTPC 26
226#define MACE_RCVCC 27
227/* Reserved */
228#define MACE_UTR 29
229#define MACE_RTR1 30
230#define MACE_RTR2 31
231
232/* MACE Bit Masks */
233#define MACE_XMTRC_EXDEF 0x80
234#define MACE_XMTRC_XMTRC 0x0F
235
236#define MACE_XMTFS_XMTSV 0x80
237#define MACE_XMTFS_UFLO 0x40
238#define MACE_XMTFS_LCOL 0x20
239#define MACE_XMTFS_MORE 0x10
240#define MACE_XMTFS_ONE 0x08
241#define MACE_XMTFS_DEFER 0x04
242#define MACE_XMTFS_LCAR 0x02
243#define MACE_XMTFS_RTRY 0x01
244
245#define MACE_RCVFS_RCVSTS 0xF000
246#define MACE_RCVFS_OFLO 0x8000
247#define MACE_RCVFS_CLSN 0x4000
248#define MACE_RCVFS_FRAM 0x2000
249#define MACE_RCVFS_FCS 0x1000
250
251#define MACE_FIFOFC_RCVFC 0xF0
252#define MACE_FIFOFC_XMTFC 0x0F
253
254#define MACE_IR_JAB 0x80
255#define MACE_IR_BABL 0x40
256#define MACE_IR_CERR 0x20
257#define MACE_IR_RCVCCO 0x10
258#define MACE_IR_RNTPCO 0x08
259#define MACE_IR_MPCO 0x04
260#define MACE_IR_RCVINT 0x02
261#define MACE_IR_XMTINT 0x01
262
263#define MACE_MACCC_PROM 0x80
264#define MACE_MACCC_DXMT2PD 0x40
265#define MACE_MACCC_EMBA 0x20
266#define MACE_MACCC_RESERVED 0x10
267#define MACE_MACCC_DRCVPA 0x08
268#define MACE_MACCC_DRCVBC 0x04
269#define MACE_MACCC_ENXMT 0x02
270#define MACE_MACCC_ENRCV 0x01
271
272#define MACE_PHYCC_LNKFL 0x80
273#define MACE_PHYCC_DLNKTST 0x40
274#define MACE_PHYCC_REVPOL 0x20
275#define MACE_PHYCC_DAPC 0x10
276#define MACE_PHYCC_LRT 0x08
277#define MACE_PHYCC_ASEL 0x04
278#define MACE_PHYCC_RWAKE 0x02
279#define MACE_PHYCC_AWAKE 0x01
280
281#define MACE_IAC_ADDRCHG 0x80
282#define MACE_IAC_PHYADDR 0x04
283#define MACE_IAC_LOGADDR 0x02
284
285#define MACE_UTR_RTRE 0x80
286#define MACE_UTR_RTRD 0x40
287#define MACE_UTR_RPA 0x20
288#define MACE_UTR_FCOLL 0x10
289#define MACE_UTR_RCVFCSE 0x08
290#define MACE_UTR_LOOP_INCL_MENDEC 0x06
291#define MACE_UTR_LOOP_NO_MENDEC 0x04
292#define MACE_UTR_LOOP_EXTERNAL 0x02
293#define MACE_UTR_LOOP_NONE 0x00
294#define MACE_UTR_RESERVED 0x01
295
296/* Switch MACE register bank (only 0 and 1 are valid) */
297#define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
298
299#define MACE_IMR_DEFAULT \
300 (0xFF - \
301 ( \
302 MACE_IR_CERR | \
303 MACE_IR_RCVCCO | \
304 MACE_IR_RNTPCO | \
305 MACE_IR_MPCO | \
306 MACE_IR_RCVINT | \
307 MACE_IR_XMTINT \
308 ) \
309 )
310#undef MACE_IMR_DEFAULT
311#define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
312
313#define TX_TIMEOUT ((400*HZ)/1000)
314
315/* ----------------------------------------------------------------------------
316Type Definitions
317---------------------------------------------------------------------------- */
318
319typedef struct _mace_statistics {
320 /* MACE_XMTFS */
321 int xmtsv;
322 int uflo;
323 int lcol;
324 int more;
325 int one;
326 int defer;
327 int lcar;
328 int rtry;
329
330 /* MACE_XMTRC */
331 int exdef;
332 int xmtrc;
333
334 /* RFS1--Receive Status (RCVSTS) */
335 int oflo;
336 int clsn;
337 int fram;
338 int fcs;
339
340 /* RFS2--Runt Packet Count (RNTPC) */
341 int rfs_rntpc;
342
343 /* RFS3--Receive Collision Count (RCVCC) */
344 int rfs_rcvcc;
345
346 /* MACE_IR */
347 int jab;
348 int babl;
349 int cerr;
350 int rcvcco;
351 int rntpco;
352 int mpco;
353
354 /* MACE_MPC */
355 int mpc;
356
357 /* MACE_RNTPC */
358 int rntpc;
359
360 /* MACE_RCVCC */
361 int rcvcc;
362} mace_statistics;
363
364typedef struct _mace_private {
fd238232 365 struct pcmcia_device *p_dev;
1da177e4
LT		 366 dev_node_t node;
367 struct net_device_stats linux_stats; /* Linux statistics counters */
368 mace_statistics mace_stats; /* MACE chip statistics counters */
369
370 /* restore_multicast_list() state variables */
371 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
372 int multicast_num_addrs;
373
374 char tx_free_frames; /* Number of free transmit frame buffers */
375 char tx_irq_disabled; /* MACE TX interrupt disabled */
376
377 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
378} mace_private;
379
380/* ----------------------------------------------------------------------------
381Private Global Variables
382---------------------------------------------------------------------------- */
383
384#ifdef PCMCIA_DEBUG
385static char rcsid[] =
386"nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao";
387static char *version =
388DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
389#endif
390
f71e1309 391static const char *if_names[]={
1da177e4
LT		 392 "Auto", "10baseT", "BNC",
393};
394
395/* ----------------------------------------------------------------------------
396Parameters
397 These are the parameters that can be set during loading with
398 'insmod'.
399---------------------------------------------------------------------------- */
400
401MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
402MODULE_LICENSE("GPL");
403
404#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
405
406/* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
407INT_MODULE_PARM(if_port, 0);
408
409#ifdef PCMCIA_DEBUG
410INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
411#define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
412#else
413#define DEBUG(n, args...)
414#endif
415
416/* ----------------------------------------------------------------------------
417Function Prototypes
418---------------------------------------------------------------------------- */
419
15b99ac1 420static int nmclan_config(struct pcmcia_device *link);
fba395ee 421static void nmclan_release(struct pcmcia_device *link);
1da177e4
LT		 422
423static void nmclan_reset(struct net_device *dev);
424static int mace_config(struct net_device *dev, struct ifmap *map);
425static int mace_open(struct net_device *dev);
426static int mace_close(struct net_device *dev);
427static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev);
428static void mace_tx_timeout(struct net_device *dev);
7d12e780 429static irqreturn_t mace_interrupt(int irq, void *dev_id);
1da177e4
LT		 430static struct net_device_stats *mace_get_stats(struct net_device *dev);
431static int mace_rx(struct net_device *dev, unsigned char RxCnt);
432static void restore_multicast_list(struct net_device *dev);
433static void set_multicast_list(struct net_device *dev);
7282d491 434static const struct ethtool_ops netdev_ethtool_ops;
1da177e4
LT		 435
436
cc3b4866 437static void nmclan_detach(struct pcmcia_device *p_dev);
1da177e4
LT		 438
439/* ----------------------------------------------------------------------------
440nmclan_attach
441 Creates an "instance" of the driver, allocating local data
442 structures for one device. The device is registered with Card
443 Services.
444---------------------------------------------------------------------------- */
445
15b99ac1 446static int nmclan_probe(struct pcmcia_device *link)
1da177e4
LT		 447{
448 mace_private *lp;
1da177e4 449 struct net_device *dev;
1da177e4
LT		 450
451 DEBUG(0, "nmclan_attach()\n");
452 DEBUG(1, "%s\n", rcsid);
453
454 /* Create new ethernet device */
455 dev = alloc_etherdev(sizeof(mace_private));
456 if (!dev)
f8cfa618 457 return -ENOMEM;
1da177e4 458 lp = netdev_priv(dev);
fba395ee 459 lp->p_dev = link;
1da177e4
LT		 460 link->priv = dev;
461
462 spin_lock_init(&lp->bank_lock);
463 link->io.NumPorts1 = 32;
464 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
465 link->io.IOAddrLines = 5;
466 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
467 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
468 link->irq.Handler = &mace_interrupt;
469 link->irq.Instance = dev;
470 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT		 471 link->conf.IntType = INT_MEMORY_AND_IO;
472 link->conf.ConfigIndex = 1;
473 link->conf.Present = PRESENT_OPTION;
474
475 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
476
477 SET_MODULE_OWNER(dev);
478 dev->hard_start_xmit = &mace_start_xmit;
479 dev->set_config = &mace_config;
480 dev->get_stats = &mace_get_stats;
481 dev->set_multicast_list = &set_multicast_list;
482 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
483 dev->open = &mace_open;
484 dev->stop = &mace_close;
485#ifdef HAVE_TX_TIMEOUT
486 dev->tx_timeout = mace_tx_timeout;
487 dev->watchdog_timeo = TX_TIMEOUT;
488#endif
489
15b99ac1 490 return nmclan_config(link);
1da177e4
LT		 491} /* nmclan_attach */
492
493/* ----------------------------------------------------------------------------
494nmclan_detach
495 This deletes a driver "instance". The device is de-registered
496 with Card Services. If it has been released, all local data
497 structures are freed. Otherwise, the structures will be freed
498 when the device is released.
499---------------------------------------------------------------------------- */
500
fba395ee 501static void nmclan_detach(struct pcmcia_device *link)
1da177e4
LT		 502{
503 struct net_device *dev = link->priv;
1da177e4
LT		 504
505 DEBUG(0, "nmclan_detach(0x%p)\n", link);
506
fd238232 507 if (link->dev_node)
1da177e4
LT		 508 unregister_netdev(dev);
509
e2d40963 510 nmclan_release(link);
1da177e4 511
1da177e4
LT		 512 free_netdev(dev);
513} /* nmclan_detach */
514
515/* ----------------------------------------------------------------------------
516mace_read
517 Reads a MACE register. This is bank independent; however, the
518 caller must ensure that this call is not interruptable. We are
519 assuming that during normal operation, the MACE is always in
520 bank 0.
521---------------------------------------------------------------------------- */
522static int mace_read(mace_private *lp, kio_addr_t ioaddr, int reg)
523{
524 int data = 0xFF;
525 unsigned long flags;
526
527 switch (reg >> 4) {
528 case 0: /* register 0-15 */
529 data = inb(ioaddr + AM2150_MACE_BASE + reg);
530 break;
531 case 1: /* register 16-31 */
532 spin_lock_irqsave(&lp->bank_lock, flags);
533 MACEBANK(1);
534 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
535 MACEBANK(0);
536 spin_unlock_irqrestore(&lp->bank_lock, flags);
537 break;
538 }
539 return (data & 0xFF);
540} /* mace_read */
541
542/* ----------------------------------------------------------------------------
543mace_write
544 Writes to a MACE register. This is bank independent; however,
545 the caller must ensure that this call is not interruptable. We
546 are assuming that during normal operation, the MACE is always in
547 bank 0.
548---------------------------------------------------------------------------- */
549static void mace_write(mace_private *lp, kio_addr_t ioaddr, int reg, int data)
550{
551 unsigned long flags;
552
553 switch (reg >> 4) {
554 case 0: /* register 0-15 */
555 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
556 break;
557 case 1: /* register 16-31 */
558 spin_lock_irqsave(&lp->bank_lock, flags);
559 MACEBANK(1);
560 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
561 MACEBANK(0);
562 spin_unlock_irqrestore(&lp->bank_lock, flags);
563 break;
564 }
565} /* mace_write */
566
567/* ----------------------------------------------------------------------------
568mace_init
569 Resets the MACE chip.
570---------------------------------------------------------------------------- */
571static int mace_init(mace_private *lp, kio_addr_t ioaddr, char *enet_addr)
572{
573 int i;
574 int ct = 0;
575
576 /* MACE Software reset */
577 mace_write(lp, ioaddr, MACE_BIUCC, 1);
578 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
579 /* Wait for reset bit to be cleared automatically after <= 200ns */;
580 if(++ct > 500)
581 {
582 printk(KERN_ERR "mace: reset failed, card removed ?\n");
583 return -1;
584 }
585 udelay(1);
586 }
587 mace_write(lp, ioaddr, MACE_BIUCC, 0);
588
589 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
590 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
591
592 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
593 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
594
595 /*
596 * Bit 2-1 PORTSEL[1-0] Port Select.
597 * 00 AUI/10Base-2
598 * 01 10Base-T
599 * 10 DAI Port (reserved in Am2150)
600 * 11 GPSI
601 * For this card, only the first two are valid.
602 * So, PLSCC should be set to
603 * 0x00 for 10Base-2
604 * 0x02 for 10Base-T
605 * Or just set ASEL in PHYCC below!
606 */
607 switch (if_port) {
608 case 1:
609 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
610 break;
611 case 2:
612 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
613 break;
614 default:
615 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
616 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
617 and the MACE device will automatically select the operating media
618 interface port. */
619 break;
620 }
621
622 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
623 /* Poll ADDRCHG bit */
624 ct = 0;
625 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
626 {
627 if(++ ct > 500)
628 {
629 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
630 return -1;
631 }
632 }
633 /* Set PADR register */
634 for (i = 0; i < ETHER_ADDR_LEN; i++)
635 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
636
637 /* MAC Configuration Control Register should be written last */
638 /* Let set_multicast_list set this. */
639 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
640 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
641 return 0;
642} /* mace_init */
643
644/* ----------------------------------------------------------------------------
645nmclan_config
646 This routine is scheduled to run after a CARD_INSERTION event
647 is received, to configure the PCMCIA socket, and to make the
648 ethernet device available to the system.
649---------------------------------------------------------------------------- */
650
651#define CS_CHECK(fn, ret) \
652 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
653
15b99ac1 654static int nmclan_config(struct pcmcia_device *link)
1da177e4 655{
1da177e4
LT		 656 struct net_device *dev = link->priv;
657 mace_private *lp = netdev_priv(dev);
658 tuple_t tuple;
1da177e4
LT		 659 u_char buf[64];
660 int i, last_ret, last_fn;
661 kio_addr_t ioaddr;
662
663 DEBUG(0, "nmclan_config(0x%p)\n", link);
664
fba395ee
DB		 665 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
666 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
667 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
1da177e4
LT		 668 dev->irq = link->irq.AssignedIRQ;
669 dev->base_addr = link->io.BasePort1;
670
671 ioaddr = dev->base_addr;
672
673 /* Read the ethernet address from the CIS. */
674 tuple.DesiredTuple = 0x80 /* CISTPL_CFTABLE_ENTRY_MISC */;
675 tuple.TupleData = buf;
676 tuple.TupleDataMax = 64;
677 tuple.TupleOffset = 0;
af2b3b50 678 tuple.Attributes = 0;
fba395ee
DB		 679 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
680 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
1da177e4
LT		 681 memcpy(dev->dev_addr, tuple.TupleData, ETHER_ADDR_LEN);
682
683 /* Verify configuration by reading the MACE ID. */
684 {
685 char sig[2];
686
687 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
688 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
689 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
690 DEBUG(0, "nmclan_cs configured: mace id=%x %x\n",
691 sig[0], sig[1]);
692 } else {
693 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
694 " be 0x40 0x?9\n", sig[0], sig[1]);
15b99ac1 695 return -ENODEV;
1da177e4
LT		 696 }
697 }
698
699 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
700 goto failed;
701
702 /* The if_port symbol can be set when the module is loaded */
703 if (if_port <= 2)
704 dev->if_port = if_port;
705 else
706 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
707
fd238232 708 link->dev_node = &lp->node;
fba395ee 709 SET_NETDEV_DEV(dev, &handle_to_dev(link));
1da177e4
LT		 710
711 i = register_netdev(dev);
712 if (i != 0) {
713 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
fd238232 714 link->dev_node = NULL;
1da177e4
LT		 715 goto failed;
716 }
717
718 strcpy(lp->node.dev_name, dev->name);
719
720 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port, hw_addr ",
721 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port]);
722 for (i = 0; i < 6; i++)
723 printk("%02X%s", dev->dev_addr[i], ((i<5) ? ":" : "\n"));
15b99ac1 724 return 0;
1da177e4
LT		 725
726cs_failed:
15b99ac1 727 cs_error(link, last_fn, last_ret);
1da177e4 728failed:
15b99ac1
DB		 729 nmclan_release(link);
730 return -ENODEV;
1da177e4
LT		 731} /* nmclan_config */
732
733/* ----------------------------------------------------------------------------
734nmclan_release
735 After a card is removed, nmclan_release() will unregister the
736 net device, and release the PCMCIA configuration. If the device
737 is still open, this will be postponed until it is closed.
738---------------------------------------------------------------------------- */
fba395ee 739static void nmclan_release(struct pcmcia_device *link)
1da177e4 740{
5f2a71fc 741 DEBUG(0, "nmclan_release(0x%p)\n", link);
fba395ee 742 pcmcia_disable_device(link);
1da177e4
LT		 743}
744
fba395ee 745static int nmclan_suspend(struct pcmcia_device *link)
98e4c28b 746{
98e4c28b
DB		 747 struct net_device *dev = link->priv;
748
e2d40963 749 if (link->open)
8661bb5b 750 netif_device_detach(dev);
98e4c28b
DB		 751
752 return 0;
753}
754
fba395ee 755static int nmclan_resume(struct pcmcia_device *link)
98e4c28b 756{
98e4c28b
DB		 757 struct net_device *dev = link->priv;
758
e2d40963 759 if (link->open) {
8661bb5b
DB		 760 nmclan_reset(dev);
761 netif_device_attach(dev);
98e4c28b
DB		 762 }
763
764 return 0;
765}
766
1da177e4
LT		 767
768/* ----------------------------------------------------------------------------
769nmclan_reset
770 Reset and restore all of the Xilinx and MACE registers.
771---------------------------------------------------------------------------- */
772static void nmclan_reset(struct net_device *dev)
773{
774 mace_private *lp = netdev_priv(dev);
775
776#if RESET_XILINX
fba395ee 777 struct pcmcia_device *link = &lp->link;
1da177e4
LT		 778 conf_reg_t reg;
779 u_long OrigCorValue;
780
781 /* Save original COR value */
782 reg.Function = 0;
783 reg.Action = CS_READ;
784 reg.Offset = CISREG_COR;
785 reg.Value = 0;
fba395ee 786 pcmcia_access_configuration_register(link, &reg);
1da177e4
LT		 787 OrigCorValue = reg.Value;
788
789 /* Reset Xilinx */
790 reg.Action = CS_WRITE;
791 reg.Offset = CISREG_COR;
792 DEBUG(1, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
793 OrigCorValue);
794 reg.Value = COR_SOFT_RESET;
fba395ee 795 pcmcia_access_configuration_register(link, &reg);
1da177e4
LT		 796 /* Need to wait for 20 ms for PCMCIA to finish reset. */
797
798 /* Restore original COR configuration index */
799 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
fba395ee 800 pcmcia_access_configuration_register(link, &reg);
1da177e4
LT		 801 /* Xilinx is now completely reset along with the MACE chip. */
802 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
803
804#endif /* #if RESET_XILINX */
805
806 /* Xilinx is now completely reset along with the MACE chip. */
807 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
808
809 /* Reinitialize the MACE chip for operation. */
810 mace_init(lp, dev->base_addr, dev->dev_addr);
811 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
812
813 /* Restore the multicast list and enable TX and RX. */
814 restore_multicast_list(dev);
815} /* nmclan_reset */
816
817/* ----------------------------------------------------------------------------
818mace_config
819 [Someone tell me what this is supposed to do? Is if_port a defined
820 standard? If so, there should be defines to indicate 1=10Base-T,
821 2=10Base-2, etc. including limited automatic detection.]
822---------------------------------------------------------------------------- */
823static int mace_config(struct net_device *dev, struct ifmap *map)
824{
825 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
826 if (map->port <= 2) {
827 dev->if_port = map->port;
828 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
829 if_names[dev->if_port]);
830 } else
831 return -EINVAL;
832 }
833 return 0;
834} /* mace_config */
835
836/* ----------------------------------------------------------------------------
837mace_open
838 Open device driver.
839---------------------------------------------------------------------------- */
840static int mace_open(struct net_device *dev)
841{
842 kio_addr_t ioaddr = dev->base_addr;
843 mace_private *lp = netdev_priv(dev);
fba395ee 844 struct pcmcia_device *link = lp->p_dev;
1da177e4 845
9940ec36 846 if (!pcmcia_dev_present(link))
1da177e4
LT		 847 return -ENODEV;
848
849 link->open++;
850
851 MACEBANK(0);
852
853 netif_start_queue(dev);
854 nmclan_reset(dev);
855
856 return 0; /* Always succeed */
857} /* mace_open */
858
859/* ----------------------------------------------------------------------------
860mace_close
861 Closes device driver.
862---------------------------------------------------------------------------- */
863static int mace_close(struct net_device *dev)
864{
865 kio_addr_t ioaddr = dev->base_addr;
866 mace_private *lp = netdev_priv(dev);
fba395ee 867 struct pcmcia_device *link = lp->p_dev;
1da177e4
LT		 868
869 DEBUG(2, "%s: shutting down ethercard.\n", dev->name);
870
871 /* Mask off all interrupts from the MACE chip. */
872 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
873
874 link->open--;
875 netif_stop_queue(dev);
876
877 return 0;
878} /* mace_close */
879
880static void netdev_get_drvinfo(struct net_device *dev,
881 struct ethtool_drvinfo *info)
882{
883 strcpy(info->driver, DRV_NAME);
884 strcpy(info->version, DRV_VERSION);
885 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
886}
887
888#ifdef PCMCIA_DEBUG
889static u32 netdev_get_msglevel(struct net_device *dev)
890{
891 return pc_debug;
892}
893
894static void netdev_set_msglevel(struct net_device *dev, u32 level)
895{
896 pc_debug = level;
897}
898#endif /* PCMCIA_DEBUG */
899
7282d491 900static const struct ethtool_ops netdev_ethtool_ops = {
1da177e4
LT		 901 .get_drvinfo = netdev_get_drvinfo,
902#ifdef PCMCIA_DEBUG
903 .get_msglevel = netdev_get_msglevel,
904 .set_msglevel = netdev_set_msglevel,
905#endif /* PCMCIA_DEBUG */
906};
907
908/* ----------------------------------------------------------------------------
909mace_start_xmit
910 This routine begins the packet transmit function. When completed,
911 it will generate a transmit interrupt.
912
913 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
914 returns 0, the "packet is now solely the responsibility of the
915 driver." If _start_xmit returns non-zero, the "transmission
916 failed, put skb back into a list."
917---------------------------------------------------------------------------- */
918
919static void mace_tx_timeout(struct net_device *dev)
920{
921 mace_private *lp = netdev_priv(dev);
fba395ee 922 struct pcmcia_device *link = lp->p_dev;
1da177e4
LT		 923
924 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
925#if RESET_ON_TIMEOUT
926 printk("resetting card\n");
fba395ee 927 pcmcia_reset_card(link, NULL);
1da177e4
LT		 928#else /* #if RESET_ON_TIMEOUT */
929 printk("NOT resetting card\n");
930#endif /* #if RESET_ON_TIMEOUT */
931 dev->trans_start = jiffies;
932 netif_wake_queue(dev);
933}
934
935static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
936{
937 mace_private *lp = netdev_priv(dev);
938 kio_addr_t ioaddr = dev->base_addr;
939
940 netif_stop_queue(dev);
941
942 DEBUG(3, "%s: mace_start_xmit(length = %ld) called.\n",
943 dev->name, (long)skb->len);
944
945#if (!TX_INTERRUPTABLE)
946 /* Disable MACE TX interrupts. */
947 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
948 ioaddr + AM2150_MACE_BASE + MACE_IMR);
949 lp->tx_irq_disabled=1;
950#endif /* #if (!TX_INTERRUPTABLE) */
951
952 {
953 /* This block must not be interrupted by another transmit request!
954 mace_tx_timeout will take care of timer-based retransmissions from
955 the upper layers. The interrupt handler is guaranteed never to
956 service a transmit interrupt while we are in here.
957 */
958
959 lp->linux_stats.tx_bytes += skb->len;
960 lp->tx_free_frames--;
961
962 /* WARNING: Write the _exact_ number of bytes written in the header! */
963 /* Put out the word header [must be an outw()] . . . */
964 outw(skb->len, ioaddr + AM2150_XMT);
965 /* . . . and the packet [may be any combination of outw() and outb()] */
966 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
967 if (skb->len & 1) {
968 /* Odd byte transfer */
969 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
970 }
971
972 dev->trans_start = jiffies;
973
974#if MULTI_TX
975 if (lp->tx_free_frames > 0)
976 netif_start_queue(dev);
977#endif /* #if MULTI_TX */
978 }
979
980#if (!TX_INTERRUPTABLE)
981 /* Re-enable MACE TX interrupts. */
982 lp->tx_irq_disabled=0;
983 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
984#endif /* #if (!TX_INTERRUPTABLE) */
985
986 dev_kfree_skb(skb);
987
988 return 0;
989} /* mace_start_xmit */
990
991/* ----------------------------------------------------------------------------
992mace_interrupt
993 The interrupt handler.
994---------------------------------------------------------------------------- */
7d12e780 995static irqreturn_t mace_interrupt(int irq, void *dev_id)
1da177e4
LT		 996{
997 struct net_device *dev = (struct net_device *) dev_id;
998 mace_private *lp = netdev_priv(dev);
999 kio_addr_t ioaddr = dev->base_addr;
1000 int status;
1001 int IntrCnt = MACE_MAX_IR_ITERATIONS;
1002
1003 if (dev == NULL) {
1004 DEBUG(2, "mace_interrupt(): irq 0x%X for unknown device.\n",
1005 irq);
1006 return IRQ_NONE;
1007 }
1008
1009 if (lp->tx_irq_disabled) {
1010 printk(
1011 (lp->tx_irq_disabled?
1012 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
1013 "[isr=%02X, imr=%02X]\n":
1014 KERN_NOTICE "%s: Re-entering the interrupt handler "
1015 "[isr=%02X, imr=%02X]\n"),
1016 dev->name,
1017 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
1018 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
1019 );
1020 /* WARNING: MACE_IR has been read! */
1021 return IRQ_NONE;
1022 }
1023
1024 if (!netif_device_present(dev)) {
1025 DEBUG(2, "%s: interrupt from dead card\n", dev->name);
1026 return IRQ_NONE;
1027 }
1028
1029 do {
1030 /* WARNING: MACE_IR is a READ/CLEAR port! */
1031 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1032
1033 DEBUG(3, "mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1034
1035 if (status & MACE_IR_RCVINT) {
1036 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1037 }
1038
1039 if (status & MACE_IR_XMTINT) {
1040 unsigned char fifofc;
1041 unsigned char xmtrc;
1042 unsigned char xmtfs;
1043
1044 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1045 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1046 lp->linux_stats.tx_errors++;
1047 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1048 }
1049
1050 /* Transmit Retry Count (XMTRC, reg 4) */
1051 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1052 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1053 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1054
1055 if (
1056 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1057 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1058 ) {
1059 lp->mace_stats.xmtsv++;
1060
1061 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1062 if (xmtfs & MACE_XMTFS_UFLO) {
1063 /* Underflow. Indicates that the Transmit FIFO emptied before
1064 the end of frame was reached. */
1065 lp->mace_stats.uflo++;
1066 }
1067 if (xmtfs & MACE_XMTFS_LCOL) {
1068 /* Late Collision */
1069 lp->mace_stats.lcol++;
1070 }
1071 if (xmtfs & MACE_XMTFS_MORE) {
1072 /* MORE than one retry was needed */
1073 lp->mace_stats.more++;
1074 }
1075 if (xmtfs & MACE_XMTFS_ONE) {
1076 /* Exactly ONE retry occurred */
1077 lp->mace_stats.one++;
1078 }
1079 if (xmtfs & MACE_XMTFS_DEFER) {
1080 /* Transmission was defered */
1081 lp->mace_stats.defer++;
1082 }
1083 if (xmtfs & MACE_XMTFS_LCAR) {
1084 /* Loss of carrier */
1085 lp->mace_stats.lcar++;
1086 }
1087 if (xmtfs & MACE_XMTFS_RTRY) {
1088 /* Retry error: transmit aborted after 16 attempts */
1089 lp->mace_stats.rtry++;
1090 }
1091 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1092
1093 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1094
1095 lp->linux_stats.tx_packets++;
1096 lp->tx_free_frames++;
1097 netif_wake_queue(dev);
1098 } /* if (status & MACE_IR_XMTINT) */
1099
1100 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1101 if (status & MACE_IR_JAB) {
1102 /* Jabber Error. Excessive transmit duration (20-150ms). */
1103 lp->mace_stats.jab++;
1104 }
1105 if (status & MACE_IR_BABL) {
1106 /* Babble Error. >1518 bytes transmitted. */
1107 lp->mace_stats.babl++;
1108 }
1109 if (status & MACE_IR_CERR) {
1110 /* Collision Error. CERR indicates the absence of the
1111 Signal Quality Error Test message after a packet
1112 transmission. */
1113 lp->mace_stats.cerr++;
1114 }
1115 if (status & MACE_IR_RCVCCO) {
1116 /* Receive Collision Count Overflow; */
1117 lp->mace_stats.rcvcco++;
1118 }
1119 if (status & MACE_IR_RNTPCO) {
1120 /* Runt Packet Count Overflow */
1121 lp->mace_stats.rntpco++;
1122 }
1123 if (status & MACE_IR_MPCO) {
1124 /* Missed Packet Count Overflow */
1125 lp->mace_stats.mpco++;
1126 }
1127 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1128
1129 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1130
1131 return IRQ_HANDLED;
1132} /* mace_interrupt */
1133
1134/* ----------------------------------------------------------------------------
1135mace_rx
1136 Receives packets.
1137---------------------------------------------------------------------------- */
1138static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1139{
1140 mace_private *lp = netdev_priv(dev);
1141 kio_addr_t ioaddr = dev->base_addr;
1142 unsigned char rx_framecnt;
1143 unsigned short rx_status;
1144
1145 while (
1146 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1147 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1148 (RxCnt--)
1149 ) {
1150 rx_status = inw(ioaddr + AM2150_RCV);
1151
1152 DEBUG(3, "%s: in mace_rx(), framecnt 0x%X, rx_status"
1153 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1154
1155 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1156 lp->linux_stats.rx_errors++;
1157 if (rx_status & MACE_RCVFS_OFLO) {
1158 lp->mace_stats.oflo++;
1159 }
1160 if (rx_status & MACE_RCVFS_CLSN) {
1161 lp->mace_stats.clsn++;
1162 }
1163 if (rx_status & MACE_RCVFS_FRAM) {
1164 lp->mace_stats.fram++;
1165 }
1166 if (rx_status & MACE_RCVFS_FCS) {
1167 lp->mace_stats.fcs++;
1168 }
1169 } else {
1170 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1171 /* Auto Strip is off, always subtract 4 */
1172 struct sk_buff *skb;
1173
1174 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1175 /* runt packet count */
1176 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1177 /* rcv collision count */
1178
1179 DEBUG(3, " receiving packet size 0x%X rx_status"
1180 " 0x%X.\n", pkt_len, rx_status);
1181
1182 skb = dev_alloc_skb(pkt_len+2);
1183
1184 if (skb != NULL) {
1da177e4
LT		 1185 skb_reserve(skb, 2);
1186 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1187 if (pkt_len & 1)
1188 *(skb->tail-1) = inb(ioaddr + AM2150_RCV);
1189 skb->protocol = eth_type_trans(skb, dev);
1190
1191 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1192
1193 dev->last_rx = jiffies;
1194 lp->linux_stats.rx_packets++;
6f258910 1195 lp->linux_stats.rx_bytes += pkt_len;
1da177e4
LT		 1196 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1197 continue;
1198 } else {
1199 DEBUG(1, "%s: couldn't allocate a sk_buff of size"
1200 " %d.\n", dev->name, pkt_len);
1201 lp->linux_stats.rx_dropped++;
1202 }
1203 }
1204 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1205 } /* while */
1206
1207 return 0;
1208} /* mace_rx */
1209
1210/* ----------------------------------------------------------------------------
1211pr_linux_stats
1212---------------------------------------------------------------------------- */
1213static void pr_linux_stats(struct net_device_stats *pstats)
1214{
1215 DEBUG(2, "pr_linux_stats\n");
1216 DEBUG(2, " rx_packets=%-7ld tx_packets=%ld\n",
1217 (long)pstats->rx_packets, (long)pstats->tx_packets);
1218 DEBUG(2, " rx_errors=%-7ld tx_errors=%ld\n",
1219 (long)pstats->rx_errors, (long)pstats->tx_errors);
1220 DEBUG(2, " rx_dropped=%-7ld tx_dropped=%ld\n",
1221 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1222 DEBUG(2, " multicast=%-7ld collisions=%ld\n",
1223 (long)pstats->multicast, (long)pstats->collisions);
1224
1225 DEBUG(2, " rx_length_errors=%-7ld rx_over_errors=%ld\n",
1226 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1227 DEBUG(2, " rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1228 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1229 DEBUG(2, " rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1230 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1231
1232 DEBUG(2, " tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1233 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1234 DEBUG(2, " tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1235 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1236 DEBUG(2, " tx_window_errors=%ld\n",
1237 (long)pstats->tx_window_errors);
1238} /* pr_linux_stats */
1239
1240/* ----------------------------------------------------------------------------
1241pr_mace_stats
1242---------------------------------------------------------------------------- */
1243static void pr_mace_stats(mace_statistics *pstats)
1244{
1245 DEBUG(2, "pr_mace_stats\n");
1246
1247 DEBUG(2, " xmtsv=%-7d uflo=%d\n",
1248 pstats->xmtsv, pstats->uflo);
1249 DEBUG(2, " lcol=%-7d more=%d\n",
1250 pstats->lcol, pstats->more);
1251 DEBUG(2, " one=%-7d defer=%d\n",
1252 pstats->one, pstats->defer);
1253 DEBUG(2, " lcar=%-7d rtry=%d\n",
1254 pstats->lcar, pstats->rtry);
1255
1256 /* MACE_XMTRC */
1257 DEBUG(2, " exdef=%-7d xmtrc=%d\n",
1258 pstats->exdef, pstats->xmtrc);
1259
1260 /* RFS1--Receive Status (RCVSTS) */
1261 DEBUG(2, " oflo=%-7d clsn=%d\n",
1262 pstats->oflo, pstats->clsn);
1263 DEBUG(2, " fram=%-7d fcs=%d\n",
1264 pstats->fram, pstats->fcs);
1265
1266 /* RFS2--Runt Packet Count (RNTPC) */
1267 /* RFS3--Receive Collision Count (RCVCC) */
1268 DEBUG(2, " rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1269 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1270
1271 /* MACE_IR */
1272 DEBUG(2, " jab=%-7d babl=%d\n",
1273 pstats->jab, pstats->babl);
1274 DEBUG(2, " cerr=%-7d rcvcco=%d\n",
1275 pstats->cerr, pstats->rcvcco);
1276 DEBUG(2, " rntpco=%-7d mpco=%d\n",
1277 pstats->rntpco, pstats->mpco);
1278
1279 /* MACE_MPC */
1280 DEBUG(2, " mpc=%d\n", pstats->mpc);
1281
1282 /* MACE_RNTPC */
1283 DEBUG(2, " rntpc=%d\n", pstats->rntpc);
1284
1285 /* MACE_RCVCC */
1286 DEBUG(2, " rcvcc=%d\n", pstats->rcvcc);
1287
1288} /* pr_mace_stats */
1289
1290/* ----------------------------------------------------------------------------
1291update_stats
1292 Update statistics. We change to register window 1, so this
1293 should be run single-threaded if the device is active. This is
1294 expected to be a rare operation, and it's simpler for the rest
1295 of the driver to assume that window 0 is always valid rather
1296 than use a special window-state variable.
1297
1298 oflo & uflo should _never_ occur since it would mean the Xilinx
1299 was not able to transfer data between the MACE FIFO and the
1300 card's SRAM fast enough. If this happens, something is
1301 seriously wrong with the hardware.
1302---------------------------------------------------------------------------- */
1303static void update_stats(kio_addr_t ioaddr, struct net_device *dev)
1304{
1305 mace_private *lp = netdev_priv(dev);
1306
1307 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1308 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1309 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1310 /* At this point, mace_stats is fully updated for this call.
1311 We may now update the linux_stats. */
1312
1313 /* The MACE has no equivalent for linux_stats field which are commented
1314 out. */
1315
1316 /* lp->linux_stats.multicast; */
1317 lp->linux_stats.collisions =
1318 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1319 /* Collision: The MACE may retry sending a packet 15 times
1320 before giving up. The retry count is in XMTRC.
1321 Does each retry constitute a collision?
1322 If so, why doesn't the RCVCC record these collisions? */
1323
1324 /* detailed rx_errors: */
1325 lp->linux_stats.rx_length_errors =
1326 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1327 /* lp->linux_stats.rx_over_errors */
1328 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1329 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1330 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1331 lp->linux_stats.rx_missed_errors =
1332 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1333
1334 /* detailed tx_errors */
1335 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1336 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1337 /* LCAR usually results from bad cabling. */
1338 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1339 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1340 /* lp->linux_stats.tx_window_errors; */
1341
1342 return;
1343} /* update_stats */
1344
1345/* ----------------------------------------------------------------------------
1346mace_get_stats
1347 Gathers ethernet statistics from the MACE chip.
1348---------------------------------------------------------------------------- */
1349static struct net_device_stats *mace_get_stats(struct net_device *dev)
1350{
1351 mace_private *lp = netdev_priv(dev);
1352
1353 update_stats(dev->base_addr, dev);
1354
1355 DEBUG(1, "%s: updating the statistics.\n", dev->name);
1356 pr_linux_stats(&lp->linux_stats);
1357 pr_mace_stats(&lp->mace_stats);
1358
1359 return &lp->linux_stats;
1360} /* net_device_stats */
1361
1362/* ----------------------------------------------------------------------------
1363updateCRC
1364 Modified from Am79C90 data sheet.
1365---------------------------------------------------------------------------- */
1366
1367#ifdef BROKEN_MULTICAST
1368
1369static void updateCRC(int *CRC, int bit)
1370{
1371 int poly[]={
1372 1,1,1,0, 1,1,0,1,
1373 1,0,1,1, 1,0,0,0,
1374 1,0,0,0, 0,0,1,1,
1375 0,0,1,0, 0,0,0,0
1376 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1377 CRC generator polynomial. */
1378
1379 int j;
1380
1381 /* shift CRC and control bit (CRC[32]) */
1382 for (j = 32; j > 0; j--)
1383 CRC[j] = CRC[j-1];
1384 CRC[0] = 0;
1385
1386 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1387 if (bit ^ CRC[32])
1388 for (j = 0; j < 32; j++)
1389 CRC[j] ^= poly[j];
1390} /* updateCRC */
1391
1392/* ----------------------------------------------------------------------------
1393BuildLAF
1394 Build logical address filter.
1395 Modified from Am79C90 data sheet.
1396
1397Input
1398 ladrf: logical address filter (contents initialized to 0)
1399 adr: ethernet address
1400---------------------------------------------------------------------------- */
1401static void BuildLAF(int *ladrf, int *adr)
1402{
1403 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1404
1405 int i, byte; /* temporary array indices */
1406 int hashcode; /* the output object */
1407
1408 CRC[32]=0;
1409
1410 for (byte = 0; byte < 6; byte++)
1411 for (i = 0; i < 8; i++)
1412 updateCRC(CRC, (adr[byte] >> i) & 1);
1413
1414 hashcode = 0;
1415 for (i = 0; i < 6; i++)
1416 hashcode = (hashcode << 1) + CRC[i];
1417
1418 byte = hashcode >> 3;
1419 ladrf[byte] |= (1 << (hashcode & 7));
1420
1421#ifdef PCMCIA_DEBUG
1422 if (pc_debug > 2) {
1423 printk(KERN_DEBUG " adr =");
1424 for (i = 0; i < 6; i++)
1425 printk(" %02X", adr[i]);
1426 printk("\n" KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63]"
1427 " =", hashcode);
1428 for (i = 0; i < 8; i++)
1429 printk(" %02X", ladrf[i]);
1430 printk("\n");
1431 }
1432#endif
1433} /* BuildLAF */
1434
1435/* ----------------------------------------------------------------------------
1436restore_multicast_list
1437 Restores the multicast filter for MACE chip to the last
1438 set_multicast_list() call.
1439
1440Input
1441 multicast_num_addrs
1442 multicast_ladrf[]
1443---------------------------------------------------------------------------- */
1444static void restore_multicast_list(struct net_device *dev)
1445{
1446 mace_private *lp = netdev_priv(dev);
1447 int num_addrs = lp->multicast_num_addrs;
1448 int *ladrf = lp->multicast_ladrf;
1449 kio_addr_t ioaddr = dev->base_addr;
1450 int i;
1451
1452 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
1453 dev->name, num_addrs);
1454
1455 if (num_addrs > 0) {
1456
1457 DEBUG(1, "Attempt to restore multicast list detected.\n");
1458
1459 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1460 /* Poll ADDRCHG bit */
1461 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1462 ;
1463 /* Set LADRF register */
1464 for (i = 0; i < MACE_LADRF_LEN; i++)
1465 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1466
1467 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1468 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1469
1470 } else if (num_addrs < 0) {
1471
1472 /* Promiscuous mode: receive all packets */
1473 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1474 mace_write(lp, ioaddr, MACE_MACCC,
1475 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1476 );
1477
1478 } else {
1479
1480 /* Normal mode */
1481 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1482 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1483
1484 }
1485} /* restore_multicast_list */
1486
1487/* ----------------------------------------------------------------------------
1488set_multicast_list
1489 Set or clear the multicast filter for this adaptor.
1490
1491Input
1492 num_addrs == -1 Promiscuous mode, receive all packets
1493 num_addrs == 0 Normal mode, clear multicast list
1494 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1495 best-effort filtering.
1496Output
1497 multicast_num_addrs
1498 multicast_ladrf[]
1499---------------------------------------------------------------------------- */
1500
1501static void set_multicast_list(struct net_device *dev)
1502{
1503 mace_private *lp = netdev_priv(dev);
1504 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1505 int i;
1506 struct dev_mc_list *dmi = dev->mc_list;
1507
1508#ifdef PCMCIA_DEBUG
1509 if (pc_debug > 1) {
1510 static int old;
1511 if (dev->mc_count != old) {
1512 old = dev->mc_count;
1513 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1514 dev->name, old);
1515 }
1516 }
1517#endif
1518
1519 /* Set multicast_num_addrs. */
1520 lp->multicast_num_addrs = dev->mc_count;
1521
1522 /* Set multicast_ladrf. */
1523 if (num_addrs > 0) {
1524 /* Calculate multicast logical address filter */
1525 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1526 for (i = 0; i < dev->mc_count; i++) {
1527 memcpy(adr, dmi->dmi_addr, ETHER_ADDR_LEN);
1528 dmi = dmi->next;
1529 BuildLAF(lp->multicast_ladrf, adr);
1530 }
1531 }
1532
1533 restore_multicast_list(dev);
1534
1535} /* set_multicast_list */
1536
1537#endif /* BROKEN_MULTICAST */
1538
1539static void restore_multicast_list(struct net_device *dev)
1540{
1541 kio_addr_t ioaddr = dev->base_addr;
1542 mace_private *lp = netdev_priv(dev);
1543
1544 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
1545 lp->multicast_num_addrs);
1546
1547 if (dev->flags & IFF_PROMISC) {
1548 /* Promiscuous mode: receive all packets */
1549 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1550 mace_write(lp, ioaddr, MACE_MACCC,
1551 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1552 );
1553 } else {
1554 /* Normal mode */
1555 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1556 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1557 }
1558} /* restore_multicast_list */
1559
1560static void set_multicast_list(struct net_device *dev)
1561{
1562 mace_private *lp = netdev_priv(dev);
1563
1564#ifdef PCMCIA_DEBUG
1565 if (pc_debug > 1) {
1566 static int old;
1567 if (dev->mc_count != old) {
1568 old = dev->mc_count;
1569 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1570 dev->name, old);
1571 }
1572 }
1573#endif
1574
1575 lp->multicast_num_addrs = dev->mc_count;
1576 restore_multicast_list(dev);
1577
1578} /* set_multicast_list */
1579
a58e26cb
DB		 1580static struct pcmcia_device_id nmclan_ids[] = {
1581 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
d277ad0e 1582 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
a58e26cb
DB		 1583 PCMCIA_DEVICE_NULL,
1584};
1585MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1586
1da177e4
LT		 1587static struct pcmcia_driver nmclan_cs_driver = {
1588 .owner = THIS_MODULE,
1589 .drv = {
1590 .name = "nmclan_cs",
1591 },
15b99ac1 1592 .probe = nmclan_probe,
cc3b4866 1593 .remove = nmclan_detach,
a58e26cb 1594 .id_table = nmclan_ids,
98e4c28b
DB		 1595 .suspend = nmclan_suspend,
1596 .resume = nmclan_resume,
1da177e4
LT		 1597};
1598
1599static int __init init_nmclan_cs(void)
1600{
1601 return pcmcia_register_driver(&nmclan_cs_driver);
1602}
1603
1604static void __exit exit_nmclan_cs(void)
1605{
1606 pcmcia_unregister_driver(&nmclan_cs_driver);
1da177e4
LT		 1607}
1608
1609module_init(init_nmclan_cs);
1610module_exit(exit_nmclan_cs);
Linux kernel - Deliverables
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