pcmcia: use struct resource for PCMCIA devices
[deliverable/linux.git] / drivers / net / pcmcia / smc91c92_cs.c
CommitLineData
1da177e4
LT
1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/crc32.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/if_arp.h>
41#include <linux/ioport.h>
42#include <linux/ethtool.h>
43#include <linux/mii.h>
4851d3aa 44#include <linux/jiffies.h>
75bf758f 45#include <linux/firmware.h>
1da177e4 46
1da177e4
LT
47#include <pcmcia/cs.h>
48#include <pcmcia/cistpl.h>
49#include <pcmcia/cisreg.h>
50#include <pcmcia/ciscode.h>
51#include <pcmcia/ds.h>
50db3fdb 52#include <pcmcia/ss.h>
1da177e4
LT
53
54#include <asm/io.h>
55#include <asm/system.h>
56#include <asm/uaccess.h>
57
1da177e4
LT
58/*====================================================================*/
59
f71e1309 60static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 61
75bf758f
JSR
62/* Firmware name */
63#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
64
1da177e4
LT
65/* Module parameters */
66
67MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
68MODULE_LICENSE("GPL");
75bf758f 69MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT
70
71#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
72
73/*
74 Transceiver/media type.
75 0 = auto
76 1 = 10baseT (and autoselect if #define AUTOSELECT),
77 2 = AUI/10base2,
78*/
79INT_MODULE_PARM(if_port, 0);
80
1da177e4
LT
81
82#define DRV_NAME "smc91c92_cs"
d5b20697 83#define DRV_VERSION "1.123"
1da177e4
LT
84
85/*====================================================================*/
86
87/* Operational parameter that usually are not changed. */
88
89/* Time in jiffies before concluding Tx hung */
90#define TX_TIMEOUT ((400*HZ)/1000)
91
92/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
93#define INTR_WORK 4
94
95/* Times to check the check the chip before concluding that it doesn't
96 currently have room for another Tx packet. */
97#define MEMORY_WAIT_TIME 8
98
1da177e4 99struct smc_private {
fd238232 100 struct pcmcia_device *p_dev;
1da177e4
LT
101 spinlock_t lock;
102 u_short manfid;
103 u_short cardid;
6fb7298c 104
1da177e4
LT
105 struct sk_buff *saved_skb;
106 int packets_waiting;
107 void __iomem *base;
108 u_short cfg;
109 struct timer_list media;
110 int watchdog, tx_err;
111 u_short media_status;
112 u_short fast_poll;
113 u_short link_status;
114 struct mii_if_info mii_if;
115 int duplex;
116 int rx_ovrn;
117};
118
119/* Special definitions for Megahertz multifunction cards */
120#define MEGAHERTZ_ISR 0x0380
121
122/* Special function registers for Motorola Mariner */
123#define MOT_LAN 0x0000
124#define MOT_UART 0x0020
125#define MOT_EEPROM 0x20
126
127#define MOT_NORMAL \
128(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
129
130/* Special function registers for Ositech cards */
131#define OSITECH_AUI_CTL 0x0c
132#define OSITECH_PWRDOWN 0x0d
133#define OSITECH_RESET 0x0e
134#define OSITECH_ISR 0x0f
135#define OSITECH_AUI_PWR 0x0c
136#define OSITECH_RESET_ISR 0x0e
137
138#define OSI_AUI_PWR 0x40
139#define OSI_LAN_PWRDOWN 0x02
140#define OSI_MODEM_PWRDOWN 0x01
141#define OSI_LAN_RESET 0x02
142#define OSI_MODEM_RESET 0x01
143
144/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
145#define BANK_SELECT 14 /* Window select register. */
146#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
147
148/* Bank 0 registers. */
149#define TCR 0 /* transmit control register */
150#define TCR_CLEAR 0 /* do NOTHING */
151#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
152#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
153#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
154#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
155#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
156
157#define EPH 2 /* Ethernet Protocol Handler report. */
158#define EPH_TX_SUC 0x0001
159#define EPH_SNGLCOL 0x0002
160#define EPH_MULCOL 0x0004
161#define EPH_LTX_MULT 0x0008
162#define EPH_16COL 0x0010
163#define EPH_SQET 0x0020
164#define EPH_LTX_BRD 0x0040
165#define EPH_TX_DEFR 0x0080
166#define EPH_LAT_COL 0x0200
167#define EPH_LOST_CAR 0x0400
168#define EPH_EXC_DEF 0x0800
169#define EPH_CTR_ROL 0x1000
170#define EPH_RX_OVRN 0x2000
171#define EPH_LINK_OK 0x4000
172#define EPH_TX_UNRN 0x8000
173#define MEMINFO 8 /* Memory Information Register */
174#define MEMCFG 10 /* Memory Configuration Register */
175
176/* Bank 1 registers. */
177#define CONFIG 0
178#define CFG_MII_SELECT 0x8000 /* 91C100 only */
179#define CFG_NO_WAIT 0x1000
180#define CFG_FULL_STEP 0x0400
181#define CFG_SET_SQLCH 0x0200
182#define CFG_AUI_SELECT 0x0100
183#define CFG_16BIT 0x0080
184#define CFG_DIS_LINK 0x0040
185#define CFG_STATIC 0x0030
186#define CFG_IRQ_SEL_1 0x0004
187#define CFG_IRQ_SEL_0 0x0002
188#define BASE_ADDR 2
189#define ADDR0 4
190#define GENERAL 10
191#define CONTROL 12
192#define CTL_STORE 0x0001
193#define CTL_RELOAD 0x0002
194#define CTL_EE_SELECT 0x0004
195#define CTL_TE_ENABLE 0x0020
196#define CTL_CR_ENABLE 0x0040
197#define CTL_LE_ENABLE 0x0080
198#define CTL_AUTO_RELEASE 0x0800
199#define CTL_POWERDOWN 0x2000
200
201/* Bank 2 registers. */
202#define MMU_CMD 0
203#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
204#define MC_RESET 0x40
205#define MC_RELEASE 0x80 /* remove and release the current rx packet */
206#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
207#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
208#define PNR_ARR 2
209#define FIFO_PORTS 4
210#define FP_RXEMPTY 0x8000
211#define POINTER 6
212#define PTR_AUTO_INC 0x0040
213#define PTR_READ 0x2000
214#define PTR_AUTOINC 0x4000
215#define PTR_RCV 0x8000
216#define DATA_1 8
217#define INTERRUPT 12
218#define IM_RCV_INT 0x1
219#define IM_TX_INT 0x2
220#define IM_TX_EMPTY_INT 0x4
221#define IM_ALLOC_INT 0x8
222#define IM_RX_OVRN_INT 0x10
223#define IM_EPH_INT 0x20
224
225#define RCR 4
226enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
227 RxEnable = 0x0100, RxStripCRC = 0x0200};
228#define RCR_SOFTRESET 0x8000 /* resets the chip */
229#define RCR_STRIP_CRC 0x200 /* strips CRC */
230#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
231#define RCR_ALMUL 0x4 /* receive all multicast packets */
232#define RCR_PROMISC 0x2 /* enable promiscuous mode */
233
234/* the normal settings for the RCR register : */
235#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
236#define RCR_CLEAR 0x0 /* set it to a base state */
237#define COUNTER 6
238
239/* BANK 3 -- not the same values as in smc9194! */
240#define MULTICAST0 0
241#define MULTICAST2 2
242#define MULTICAST4 4
243#define MULTICAST6 6
244#define MGMT 8
245#define REVISION 0x0a
246
247/* Transmit status bits. */
248#define TS_SUCCESS 0x0001
249#define TS_16COL 0x0010
250#define TS_LATCOL 0x0200
251#define TS_LOSTCAR 0x0400
252
253/* Receive status bits. */
254#define RS_ALGNERR 0x8000
255#define RS_BADCRC 0x2000
256#define RS_ODDFRAME 0x1000
257#define RS_TOOLONG 0x0800
258#define RS_TOOSHORT 0x0400
259#define RS_MULTICAST 0x0001
260#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
261
262#define set_bits(v, p) outw(inw(p)|(v), (p))
263#define mask_bits(v, p) outw(inw(p)&(v), (p))
264
265/*====================================================================*/
266
cc3b4866 267static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 268static int smc91c92_config(struct pcmcia_device *link);
fba395ee 269static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT
270
271static int smc_open(struct net_device *dev);
272static int smc_close(struct net_device *dev);
273static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
274static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH
275static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
276 struct net_device *dev);
7d12e780 277static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 278static void smc_rx(struct net_device *dev);
1da177e4
LT
279static void set_rx_mode(struct net_device *dev);
280static int s9k_config(struct net_device *dev, struct ifmap *map);
281static void smc_set_xcvr(struct net_device *dev, int if_port);
282static void smc_reset(struct net_device *dev);
283static void media_check(u_long arg);
906da809 284static void mdio_sync(unsigned int addr);
1da177e4
LT
285static int mdio_read(struct net_device *dev, int phy_id, int loc);
286static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
287static int smc_link_ok(struct net_device *dev);
7282d491 288static const struct ethtool_ops ethtool_ops;
1da177e4 289
9b31b697
SH
290static const struct net_device_ops smc_netdev_ops = {
291 .ndo_open = smc_open,
292 .ndo_stop = smc_close,
293 .ndo_start_xmit = smc_start_xmit,
294 .ndo_tx_timeout = smc_tx_timeout,
295 .ndo_set_config = s9k_config,
296 .ndo_set_multicast_list = set_rx_mode,
297 .ndo_do_ioctl = &smc_ioctl,
298 .ndo_change_mtu = eth_change_mtu,
299 .ndo_set_mac_address = eth_mac_addr,
300 .ndo_validate_addr = eth_validate_addr,
301};
302
1da177e4
LT
303/*======================================================================
304
305 smc91c92_attach() creates an "instance" of the driver, allocating
306 local data structures for one device. The device is registered
307 with Card Services.
308
309======================================================================*/
310
15b99ac1 311static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 312{
1da177e4 313 struct smc_private *smc;
1da177e4 314 struct net_device *dev;
1da177e4 315
dd0fab5b 316 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT
317
318 /* Create new ethernet device */
319 dev = alloc_etherdev(sizeof(struct smc_private));
320 if (!dev)
f8cfa618 321 return -ENOMEM;
1da177e4 322 smc = netdev_priv(dev);
fba395ee 323 smc->p_dev = link;
44b496f6 324 link->priv = dev;
1da177e4
LT
325
326 spin_lock_init(&smc->lock);
327 link->io.NumPorts1 = 16;
328 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
329 link->io.IOAddrLines = 4;
1da177e4 330 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT
331 link->conf.IntType = INT_MEMORY_AND_IO;
332
333 /* The SMC91c92-specific entries in the device structure. */
9b31b697 334 dev->netdev_ops = &smc_netdev_ops;
1da177e4 335 SET_ETHTOOL_OPS(dev, &ethtool_ops);
1da177e4 336 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT
337
338 smc->mii_if.dev = dev;
339 smc->mii_if.mdio_read = mdio_read;
340 smc->mii_if.mdio_write = mdio_write;
341 smc->mii_if.phy_id_mask = 0x1f;
342 smc->mii_if.reg_num_mask = 0x1f;
343
15b99ac1 344 return smc91c92_config(link);
1da177e4
LT
345} /* smc91c92_attach */
346
347/*======================================================================
348
349 This deletes a driver "instance". The device is de-registered
350 with Card Services. If it has been released, all local data
351 structures are freed. Otherwise, the structures will be freed
352 when the device is released.
353
354======================================================================*/
355
fba395ee 356static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT
357{
358 struct net_device *dev = link->priv;
1da177e4 359
dd0fab5b 360 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 361
c7c2fa07 362 unregister_netdev(dev);
1da177e4 363
e2d40963 364 smc91c92_release(link);
1da177e4 365
1da177e4
LT
366 free_netdev(dev);
367} /* smc91c92_detach */
368
369/*====================================================================*/
370
371static int cvt_ascii_address(struct net_device *dev, char *s)
372{
373 int i, j, da, c;
374
375 if (strlen(s) != 12)
376 return -1;
377 for (i = 0; i < 6; i++) {
378 da = 0;
379 for (j = 0; j < 2; j++) {
380 c = *s++;
381 da <<= 4;
382 da += ((c >= '0') && (c <= '9')) ?
383 (c - '0') : ((c & 0x0f) + 9);
384 }
385 dev->dev_addr[i] = da;
386 }
387 return 0;
388}
389
dddfbd82 390/*====================================================================
1da177e4
LT
391
392 Configuration stuff for Megahertz cards
393
394 mhz_3288_power() is used to power up a 3288's ethernet chip.
395 mhz_mfc_config() handles socket setup for multifunction (1144
396 and 3288) cards. mhz_setup() gets a card's hardware ethernet
397 address.
398
399======================================================================*/
400
fba395ee 401static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT
402{
403 struct net_device *dev = link->priv;
404 struct smc_private *smc = netdev_priv(dev);
405 u_char tmp;
406
407 /* Read the ISR twice... */
408 readb(smc->base+MEGAHERTZ_ISR);
409 udelay(5);
410 readb(smc->base+MEGAHERTZ_ISR);
411
412 /* Pause 200ms... */
413 mdelay(200);
414
415 /* Now read and write the COR... */
416 tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR);
417 udelay(5);
418 writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR);
419
420 return 0;
421}
422
b54bf94b
DB
423static int mhz_mfc_config_check(struct pcmcia_device *p_dev,
424 cistpl_cftable_entry_t *cf,
8e2fc39d 425 cistpl_cftable_entry_t *dflt,
ad913c11 426 unsigned int vcc,
b54bf94b
DB
427 void *priv_data)
428{
429 int k;
b54bf94b
DB
430 p_dev->io.BasePort2 = cf->io.win[0].base;
431 for (k = 0; k < 0x400; k += 0x10) {
432 if (k & 0x80)
433 continue;
434 p_dev->io.BasePort1 = k ^ 0x300;
435 if (!pcmcia_request_io(p_dev, &p_dev->io))
436 return 0;
437 }
438 return -ENODEV;
439}
440
fba395ee 441static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT
442{
443 struct net_device *dev = link->priv;
444 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT
445 win_req_t req;
446 memreq_t mem;
b54bf94b 447 int i;
1da177e4
LT
448
449 link->conf.Attributes |= CONF_ENABLE_SPKR;
450 link->conf.Status = CCSR_AUDIO_ENA;
1da177e4
LT
451 link->io.IOAddrLines = 16;
452 link->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
453 link->io.NumPorts2 = 8;
454
1da177e4
LT
455 /* The Megahertz combo cards have modem-like CIS entries, so
456 we have to explicitly try a bunch of port combinations. */
b54bf94b 457 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB
458 return -ENODEV;
459
1da177e4
LT
460 dev->base_addr = link->io.BasePort1;
461
462 /* Allocate a memory window, for accessing the ISR */
463 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
464 req.Base = req.Size = 0;
465 req.AccessSpeed = 0;
6838b03f 466 i = pcmcia_request_window(link, &req, &link->win);
4c89e88b 467 if (i != 0)
dddfbd82
DB
468 return -ENODEV;
469
1da177e4
LT
470 smc->base = ioremap(req.Base, req.Size);
471 mem.CardOffset = mem.Page = 0;
472 if (smc->manfid == MANFID_MOTOROLA)
473 mem.CardOffset = link->conf.ConfigBase;
868575d1 474 i = pcmcia_map_mem_page(link, link->win, &mem);
1da177e4 475
8e95a202
JP
476 if ((i == 0) &&
477 (smc->manfid == MANFID_MEGAHERTZ) &&
478 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
479 mhz_3288_power(link);
1da177e4 480
dddfbd82 481 return 0;
1da177e4
LT
482}
483
dddfbd82
DB
484static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
485 tuple_t *tuple,
486 void *priv)
1da177e4 487{
dddfbd82
DB
488 struct net_device *dev = priv;
489 cisparse_t parse;
fb9e2d88 490 u8 *buf;
4638aef4 491
dddfbd82
DB
492 if (pcmcia_parse_tuple(tuple, &parse))
493 return -EINVAL;
1da177e4 494
fb9e2d88
KK
495 buf = parse.version_1.str + parse.version_1.ofs[3];
496
497 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
dddfbd82 498 return 0;
4638aef4 499
dddfbd82
DB
500 return -EINVAL;
501};
502
fba395ee 503static int mhz_setup(struct pcmcia_device *link)
1da177e4 504{
1da177e4 505 struct net_device *dev = link->priv;
dddfbd82
DB
506 size_t len;
507 u8 *buf;
4638aef4 508 int rc;
1da177e4
LT
509
510 /* Read the station address from the CIS. It is stored as the last
511 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB
512 if ((link->prod_id[3]) &&
513 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
514 return 0;
515
516 /* Workarounds for broken cards start here. */
a1a98b72 517 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB
518 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
519 return 0;
1da177e4
LT
520
521 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 522 rc = -1;
dddfbd82
DB
523 len = pcmcia_get_tuple(link, 0x81, &buf);
524 if (buf && len >= 13) {
525 buf[12] = '\0';
fb9e2d88 526 if (cvt_ascii_address(dev, buf) == 0)
dddfbd82
DB
527 rc = 0;
528 }
529 kfree(buf);
530
531 return rc;
532};
1da177e4
LT
533
534/*======================================================================
535
536 Configuration stuff for the Motorola Mariner
537
538 mot_config() writes directly to the Mariner configuration
539 registers because the CIS is just bogus.
540
541======================================================================*/
542
fba395ee 543static void mot_config(struct pcmcia_device *link)
1da177e4
LT
544{
545 struct net_device *dev = link->priv;
546 struct smc_private *smc = netdev_priv(dev);
906da809
OJ
547 unsigned int ioaddr = dev->base_addr;
548 unsigned int iouart = link->io.BasePort2;
1da177e4
LT
549
550 /* Set UART base address and force map with COR bit 1 */
551 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
552 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
553 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
554
555 /* Set SMC base address and force map with COR bit 1 */
556 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
557 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
558 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
559
560 /* Wait for things to settle down */
561 mdelay(100);
562}
563
fba395ee 564static int mot_setup(struct pcmcia_device *link)
1da177e4
LT
565{
566 struct net_device *dev = link->priv;
906da809 567 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
568 int i, wait, loop;
569 u_int addr;
570
571 /* Read Ethernet address from Serial EEPROM */
572
573 for (i = 0; i < 3; i++) {
574 SMC_SELECT_BANK(2);
575 outw(MOT_EEPROM + i, ioaddr + POINTER);
576 SMC_SELECT_BANK(1);
577 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
578
579 for (loop = wait = 0; loop < 200; loop++) {
580 udelay(10);
581 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
582 if (wait == 0) break;
583 }
584
585 if (wait)
586 return -1;
587
588 addr = inw(ioaddr + GENERAL);
589 dev->dev_addr[2*i] = addr & 0xff;
590 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
591 }
592
593 return 0;
594}
595
596/*====================================================================*/
597
b54bf94b
DB
598static int smc_configcheck(struct pcmcia_device *p_dev,
599 cistpl_cftable_entry_t *cf,
8e2fc39d 600 cistpl_cftable_entry_t *dflt,
ad913c11 601 unsigned int vcc,
b54bf94b
DB
602 void *priv_data)
603{
b54bf94b
DB
604 p_dev->io.BasePort1 = cf->io.win[0].base;
605 p_dev->io.IOAddrLines = cf->io.flags & CISTPL_IO_LINES_MASK;
606 return pcmcia_request_io(p_dev, &p_dev->io);
607}
608
fba395ee 609static int smc_config(struct pcmcia_device *link)
1da177e4
LT
610{
611 struct net_device *dev = link->priv;
1da177e4
LT
612 int i;
613
1da177e4 614 link->io.NumPorts1 = 16;
b54bf94b
DB
615 i = pcmcia_loop_config(link, smc_configcheck, NULL);
616 if (!i)
617 dev->base_addr = link->io.BasePort1;
4638aef4 618
1da177e4
LT
619 return i;
620}
621
dddfbd82 622
fba395ee 623static int smc_setup(struct pcmcia_device *link)
1da177e4 624{
1da177e4 625 struct net_device *dev = link->priv;
1da177e4
LT
626
627 /* Check for a LAN function extension tuple */
dddfbd82
DB
628 if (!pcmcia_get_mac_from_cis(link, dev))
629 return 0;
630
1da177e4 631 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 632 if (link->prod_id[2]) {
dddfbd82
DB
633 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
634 return 0;
4638aef4 635 }
dddfbd82 636 return -1;
1da177e4
LT
637}
638
639/*====================================================================*/
640
fba395ee 641static int osi_config(struct pcmcia_device *link)
1da177e4
LT
642{
643 struct net_device *dev = link->priv;
906da809 644 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT
645 int i, j;
646
647 link->conf.Attributes |= CONF_ENABLE_SPKR;
648 link->conf.Status = CCSR_AUDIO_ENA;
1da177e4
LT
649 link->io.NumPorts1 = 64;
650 link->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
651 link->io.NumPorts2 = 8;
652 link->io.IOAddrLines = 16;
653
654 /* Enable Hard Decode, LAN, Modem */
655 link->conf.ConfigIndex = 0x23;
656
657 for (i = j = 0; j < 4; j++) {
658 link->io.BasePort2 = com[j];
fba395ee 659 i = pcmcia_request_io(link, &link->io);
4c89e88b
DB
660 if (i == 0)
661 break;
1da177e4 662 }
4c89e88b 663 if (i != 0) {
1da177e4
LT
664 /* Fallback: turn off hard decode */
665 link->conf.ConfigIndex = 0x03;
666 link->io.NumPorts2 = 0;
fba395ee 667 i = pcmcia_request_io(link, &link->io);
1da177e4
LT
668 }
669 dev->base_addr = link->io.BasePort1 + 0x10;
670 return i;
671}
672
75bf758f
JSR
673static int osi_load_firmware(struct pcmcia_device *link)
674{
675 const struct firmware *fw;
676 int i, err;
677
678 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
679 if (err) {
680 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
681 return err;
682 }
683
684 /* Download the Seven of Diamonds firmware */
685 for (i = 0; i < fw->size; i++) {
686 outb(fw->data[i], link->io.BasePort1 + 2);
687 udelay(50);
688 }
689 release_firmware(fw);
690 return err;
691}
692
dddfbd82
DB
693static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
694 tuple_t *tuple,
695 void *priv)
1da177e4 696{
dddfbd82
DB
697 struct net_device *dev = priv;
698 int i;
1da177e4 699
dddfbd82
DB
700 if (tuple->TupleDataLen < 8)
701 return -EINVAL;
702 if (tuple->TupleData[0] != 0x04)
703 return -EINVAL;
704 for (i = 0; i < 6; i++)
705 dev->dev_addr[i] = tuple->TupleData[i+2];
706 return 0;
707};
4638aef4 708
4638aef4 709
dddfbd82
DB
710static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
711{
712 struct net_device *dev = link->priv;
713 int rc;
1da177e4
LT
714
715 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB
716 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
717 return -1;
1da177e4
LT
718
719 if (((manfid == MANFID_OSITECH) &&
720 (cardid == PRODID_OSITECH_SEVEN)) ||
721 ((manfid == MANFID_PSION) &&
722 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR
723 rc = osi_load_firmware(link);
724 if (rc)
dddfbd82 725 return rc;
1da177e4
LT
726 } else if (manfid == MANFID_OSITECH) {
727 /* Make sure both functions are powered up */
728 set_bits(0x300, link->io.BasePort1 + OSITECH_AUI_PWR);
729 /* Now, turn on the interrupt for both card functions */
730 set_bits(0x300, link->io.BasePort1 + OSITECH_RESET_ISR);
dd0fab5b 731 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
1da177e4
LT
732 inw(link->io.BasePort1 + OSITECH_AUI_PWR),
733 inw(link->io.BasePort1 + OSITECH_RESET_ISR));
734 }
dddfbd82 735 return 0;
1da177e4
LT
736}
737
fba395ee 738static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 739{
98e4c28b
DB
740 struct net_device *dev = link->priv;
741
e2d40963 742 if (link->open)
4bbed523 743 netif_device_detach(dev);
98e4c28b
DB
744
745 return 0;
746}
747
fba395ee 748static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 749{
98e4c28b
DB
750 struct net_device *dev = link->priv;
751 struct smc_private *smc = netdev_priv(dev);
752 int i;
753
e2d40963
DB
754 if ((smc->manfid == MANFID_MEGAHERTZ) &&
755 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
756 mhz_3288_power(link);
757 if (smc->manfid == MANFID_MOTOROLA)
758 mot_config(link);
759 if ((smc->manfid == MANFID_OSITECH) &&
760 (smc->cardid != PRODID_OSITECH_SEVEN)) {
761 /* Power up the card and enable interrupts */
762 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
763 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
764 }
765 if (((smc->manfid == MANFID_OSITECH) &&
766 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
767 ((smc->manfid == MANFID_PSION) &&
768 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR
769 i = osi_load_firmware(link);
770 if (i) {
771 pr_err("smc91c92_cs: Failed to load firmware\n");
772 return i;
98e4c28b
DB
773 }
774 }
e2d40963
DB
775 if (link->open) {
776 smc_reset(dev);
777 netif_device_attach(dev);
778 }
98e4c28b
DB
779
780 return 0;
781}
782
783
1da177e4
LT
784/*======================================================================
785
786 This verifies that the chip is some SMC91cXX variant, and returns
787 the revision code if successful. Otherwise, it returns -ENODEV.
788
789======================================================================*/
790
fba395ee 791static int check_sig(struct pcmcia_device *link)
1da177e4
LT
792{
793 struct net_device *dev = link->priv;
906da809 794 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
795 int width;
796 u_short s;
797
798 SMC_SELECT_BANK(1);
799 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
800 /* Try powering up the chip */
801 outw(0, ioaddr + CONTROL);
802 mdelay(55);
803 }
804
805 /* Try setting bus width */
806 width = (link->io.Attributes1 == IO_DATA_PATH_WIDTH_AUTO);
807 s = inb(ioaddr + CONFIG);
808 if (width)
809 s |= CFG_16BIT;
810 else
811 s &= ~CFG_16BIT;
812 outb(s, ioaddr + CONFIG);
813
814 /* Check Base Address Register to make sure bus width is OK */
815 s = inw(ioaddr + BASE_ADDR);
816 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
817 ((s >> 8) != (s & 0xff))) {
818 SMC_SELECT_BANK(3);
819 s = inw(ioaddr + REVISION);
820 return (s & 0xff);
821 }
822
823 if (width) {
4bbed523
DB
824 modconf_t mod = {
825 .Attributes = CONF_IO_CHANGE_WIDTH,
826 };
827 printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n");
828
fba395ee
DB
829 smc91c92_suspend(link);
830 pcmcia_modify_configuration(link, &mod);
831 smc91c92_resume(link);
4bbed523 832 return check_sig(link);
1da177e4
LT
833 }
834 return -ENODEV;
835}
836
837/*======================================================================
838
839 smc91c92_config() is scheduled to run after a CARD_INSERTION event
840 is received, to configure the PCMCIA socket, and to make the
841 ethernet device available to the system.
842
843======================================================================*/
844
15b99ac1 845static int smc91c92_config(struct pcmcia_device *link)
1da177e4 846{
1da177e4
LT
847 struct net_device *dev = link->priv;
848 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT
849 char *name;
850 int i, j, rev;
906da809 851 unsigned int ioaddr;
1da177e4
LT
852 u_long mir;
853
dd0fab5b 854 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 855
efd50585
DB
856 smc->manfid = link->manf_id;
857 smc->cardid = link->card_id;
1da177e4 858
1da177e4
LT
859 if ((smc->manfid == MANFID_OSITECH) &&
860 (smc->cardid != PRODID_OSITECH_SEVEN)) {
861 i = osi_config(link);
862 } else if ((smc->manfid == MANFID_MOTOROLA) ||
863 ((smc->manfid == MANFID_MEGAHERTZ) &&
864 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
865 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
866 i = mhz_mfc_config(link);
867 } else {
868 i = smc_config(link);
869 }
dd0fab5b
DB
870 if (i)
871 goto config_failed;
1da177e4 872
eb14120f 873 i = pcmcia_request_irq(link, smc_interrupt);
dd0fab5b
DB
874 if (i)
875 goto config_failed;
fba395ee 876 i = pcmcia_request_configuration(link, &link->conf);
dd0fab5b
DB
877 if (i)
878 goto config_failed;
1da177e4
LT
879
880 if (smc->manfid == MANFID_MOTOROLA)
881 mot_config(link);
882
eb14120f 883 dev->irq = link->irq;
1da177e4
LT
884
885 if ((if_port >= 0) && (if_port <= 2))
886 dev->if_port = if_port;
887 else
888 printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n");
889
890 switch (smc->manfid) {
891 case MANFID_OSITECH:
892 case MANFID_PSION:
893 i = osi_setup(link, smc->manfid, smc->cardid); break;
894 case MANFID_SMC:
895 case MANFID_NEW_MEDIA:
896 i = smc_setup(link); break;
897 case 0x128: /* For broken Megahertz cards */
898 case MANFID_MEGAHERTZ:
899 i = mhz_setup(link); break;
900 case MANFID_MOTOROLA:
901 default: /* get the hw address from EEPROM */
902 i = mot_setup(link); break;
903 }
904
905 if (i != 0) {
906 printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n");
fb9e2d88 907 goto config_failed;
1da177e4
LT
908 }
909
910 smc->duplex = 0;
911 smc->rx_ovrn = 0;
912
913 rev = check_sig(link);
914 name = "???";
915 if (rev > 0)
916 switch (rev >> 4) {
917 case 3: name = "92"; break;
918 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
919 case 5: name = "95"; break;
920 case 7: name = "100"; break;
921 case 8: name = "100-FD"; break;
922 case 9: name = "110"; break;
923 }
924
925 ioaddr = dev->base_addr;
926 if (rev > 0) {
927 u_long mcr;
928 SMC_SELECT_BANK(0);
929 mir = inw(ioaddr + MEMINFO) & 0xff;
930 if (mir == 0xff) mir++;
931 /* Get scale factor for memory size */
932 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
933 mir *= 128 * (1<<((mcr >> 9) & 7));
934 SMC_SELECT_BANK(1);
935 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
936 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
937 if (smc->manfid == MANFID_OSITECH)
938 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
939 if ((rev >> 4) >= 7)
940 smc->cfg |= CFG_MII_SELECT;
941 } else
942 mir = 0;
943
944 if (smc->cfg & CFG_MII_SELECT) {
945 SMC_SELECT_BANK(3);
946
947 for (i = 0; i < 32; i++) {
948 j = mdio_read(dev, i, 1);
949 if ((j != 0) && (j != 0xffff)) break;
950 }
951 smc->mii_if.phy_id = (i < 32) ? i : -1;
952
953 SMC_SELECT_BANK(0);
954 }
955
dd2e5a15 956 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT
957
958 if (register_netdev(dev) != 0) {
959 printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n");
1da177e4
LT
960 goto config_undo;
961 }
962
1da177e4 963 printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, "
e174961c 964 "hw_addr %pM\n",
0795af57 965 dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq,
e174961c 966 dev->dev_addr);
1da177e4
LT
967
968 if (rev > 0) {
969 if (mir & 0x3ff)
970 printk(KERN_INFO " %lu byte", mir);
971 else
972 printk(KERN_INFO " %lu kb", mir>>10);
973 printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ?
974 "MII" : if_names[dev->if_port]);
975 }
976
977 if (smc->cfg & CFG_MII_SELECT) {
978 if (smc->mii_if.phy_id != -1) {
dd0fab5b 979 dev_dbg(&link->dev, " MII transceiver at index %d, status %x.\n",
1da177e4
LT
980 smc->mii_if.phy_id, j);
981 } else {
982 printk(KERN_NOTICE " No MII transceivers found!\n");
983 }
984 }
15b99ac1 985 return 0;
1da177e4
LT
986
987config_undo:
988 unregister_netdev(dev);
dd0fab5b 989config_failed:
1da177e4 990 smc91c92_release(link);
fb9e2d88 991 free_netdev(dev);
15b99ac1 992 return -ENODEV;
1da177e4
LT
993} /* smc91c92_config */
994
995/*======================================================================
996
997 After a card is removed, smc91c92_release() will unregister the net
998 device, and release the PCMCIA configuration. If the device is
999 still open, this will be postponed until it is closed.
1000
1001======================================================================*/
1002
fba395ee 1003static void smc91c92_release(struct pcmcia_device *link)
1da177e4 1004{
dd0fab5b 1005 dev_dbg(&link->dev, "smc91c92_release\n");
5f2a71fc
DB
1006 if (link->win) {
1007 struct net_device *dev = link->priv;
1008 struct smc_private *smc = netdev_priv(dev);
1009 iounmap(smc->base);
1010 }
fba395ee 1011 pcmcia_disable_device(link);
1da177e4
LT
1012}
1013
1da177e4
LT
1014/*======================================================================
1015
1016 MII interface support for SMC91cXX based cards
1017======================================================================*/
1018
1019#define MDIO_SHIFT_CLK 0x04
1020#define MDIO_DATA_OUT 0x01
1021#define MDIO_DIR_WRITE 0x08
1022#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
1023#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
1024#define MDIO_DATA_READ 0x02
1025
906da809 1026static void mdio_sync(unsigned int addr)
1da177e4
LT
1027{
1028 int bits;
1029 for (bits = 0; bits < 32; bits++) {
1030 outb(MDIO_DATA_WRITE1, addr);
1031 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
1032 }
1033}
1034
1035static int mdio_read(struct net_device *dev, int phy_id, int loc)
1036{
906da809 1037 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT
1038 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
1039 int i, retval = 0;
1040
1041 mdio_sync(addr);
1042 for (i = 13; i >= 0; i--) {
1043 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1044 outb(dat, addr);
1045 outb(dat | MDIO_SHIFT_CLK, addr);
1046 }
1047 for (i = 19; i > 0; i--) {
1048 outb(0, addr);
1049 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1050 outb(MDIO_SHIFT_CLK, addr);
1051 }
1052 return (retval>>1) & 0xffff;
1053}
1054
1055static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1056{
906da809 1057 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT
1058 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1059 int i;
1060
1061 mdio_sync(addr);
1062 for (i = 31; i >= 0; i--) {
1063 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1064 outb(dat, addr);
1065 outb(dat | MDIO_SHIFT_CLK, addr);
1066 }
1067 for (i = 1; i >= 0; i--) {
1068 outb(0, addr);
1069 outb(MDIO_SHIFT_CLK, addr);
1070 }
1071}
1072
1073/*======================================================================
1074
1075 The driver core code, most of which should be common with a
1076 non-PCMCIA implementation.
1077
1078======================================================================*/
1079
1080#ifdef PCMCIA_DEBUG
1081static void smc_dump(struct net_device *dev)
1082{
906da809 1083 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1084 u_short i, w, save;
1085 save = inw(ioaddr + BANK_SELECT);
1086 for (w = 0; w < 4; w++) {
1087 SMC_SELECT_BANK(w);
1088 printk(KERN_DEBUG "bank %d: ", w);
1089 for (i = 0; i < 14; i += 2)
1090 printk(" %04x", inw(ioaddr + i));
1091 printk("\n");
1092 }
1093 outw(save, ioaddr + BANK_SELECT);
1094}
1095#endif
1096
1097static int smc_open(struct net_device *dev)
1098{
1099 struct smc_private *smc = netdev_priv(dev);
fba395ee 1100 struct pcmcia_device *link = smc->p_dev;
1da177e4 1101
dd0fab5b 1102 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1103 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB
1104#ifdef PCMCIA_DEBUG
1105 smc_dump(dev);
1da177e4
LT
1106#endif
1107
1108 /* Check that the PCMCIA card is still here. */
9940ec36 1109 if (!pcmcia_dev_present(link))
1da177e4
LT
1110 return -ENODEV;
1111 /* Physical device present signature. */
1112 if (check_sig(link) < 0) {
1113 printk("smc91c92_cs: Yikes! Bad chip signature!\n");
1114 return -ENODEV;
1115 }
1116 link->open++;
1117
1118 netif_start_queue(dev);
1119 smc->saved_skb = NULL;
1120 smc->packets_waiting = 0;
1121
1122 smc_reset(dev);
1123 init_timer(&smc->media);
1124 smc->media.function = &media_check;
1125 smc->media.data = (u_long) dev;
1126 smc->media.expires = jiffies + HZ;
1127 add_timer(&smc->media);
1128
1129 return 0;
1130} /* smc_open */
1131
1132/*====================================================================*/
1133
1134static int smc_close(struct net_device *dev)
1135{
1136 struct smc_private *smc = netdev_priv(dev);
fba395ee 1137 struct pcmcia_device *link = smc->p_dev;
906da809 1138 unsigned int ioaddr = dev->base_addr;
1da177e4 1139
dd0fab5b 1140 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT
1141 dev->name, inw(ioaddr + BANK_SELECT));
1142
1143 netif_stop_queue(dev);
1144
1145 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1146 Don't bother to check for chip present. */
1147 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1148 outw(0, ioaddr + INTERRUPT);
1149 SMC_SELECT_BANK(0);
1150 mask_bits(0xff00, ioaddr + RCR);
1151 mask_bits(0xff00, ioaddr + TCR);
1152
1153 /* Put the chip into power-down mode. */
1154 SMC_SELECT_BANK(1);
1155 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1156
1157 link->open--;
1158 del_timer_sync(&smc->media);
1159
1160 return 0;
1161} /* smc_close */
1162
1163/*======================================================================
1164
1165 Transfer a packet to the hardware and trigger the packet send.
1166 This may be called at either from either the Tx queue code
1167 or the interrupt handler.
1168
1169======================================================================*/
1170
1171static void smc_hardware_send_packet(struct net_device * dev)
1172{
1173 struct smc_private *smc = netdev_priv(dev);
1174 struct sk_buff *skb = smc->saved_skb;
906da809 1175 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1176 u_char packet_no;
1177
1178 if (!skb) {
1179 printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name);
1180 return;
1181 }
1182
1183 /* There should be a packet slot waiting. */
1184 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1185 if (packet_no & 0x80) {
1186 /* If not, there is a hardware problem! Likely an ejected card. */
1187 printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation"
1188 " failed, status %#2.2x.\n", dev->name, packet_no);
1189 dev_kfree_skb_irq(skb);
1190 smc->saved_skb = NULL;
1191 netif_start_queue(dev);
1192 return;
1193 }
1194
6fb7298c 1195 dev->stats.tx_bytes += skb->len;
1da177e4
LT
1196 /* The card should use the just-allocated buffer. */
1197 outw(packet_no, ioaddr + PNR_ARR);
1198 /* point to the beginning of the packet */
1199 outw(PTR_AUTOINC , ioaddr + POINTER);
1200
1201 /* Send the packet length (+6 for status, length and ctl byte)
1202 and the status word (set to zeros). */
1203 {
1204 u_char *buf = skb->data;
1205 u_int length = skb->len; /* The chip will pad to ethernet min. */
1206
dd0fab5b 1207 pr_debug("%s: Trying to xmit packet of length %d.\n",
1da177e4
LT
1208 dev->name, length);
1209
1210 /* send the packet length: +6 for status word, length, and ctl */
1211 outw(0, ioaddr + DATA_1);
1212 outw(length + 6, ioaddr + DATA_1);
1213 outsw(ioaddr + DATA_1, buf, length >> 1);
1214
1215 /* The odd last byte, if there is one, goes in the control word. */
1216 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1217 }
1218
1219 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1220 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1221 (inw(ioaddr + INTERRUPT) & 0xff00),
1222 ioaddr + INTERRUPT);
1223
1224 /* The chip does the rest of the work. */
1225 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1226
1227 smc->saved_skb = NULL;
1228 dev_kfree_skb_irq(skb);
1229 dev->trans_start = jiffies;
1230 netif_start_queue(dev);
1da177e4
LT
1231}
1232
1233/*====================================================================*/
1234
1235static void smc_tx_timeout(struct net_device *dev)
1236{
1237 struct smc_private *smc = netdev_priv(dev);
906da809 1238 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1239
1240 printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
1241 "Tx_status %2.2x status %4.4x.\n",
1242 dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1243 dev->stats.tx_errors++;
1da177e4 1244 smc_reset(dev);
1ae5dc34 1245 dev->trans_start = jiffies; /* prevent tx timeout */
1da177e4
LT
1246 smc->saved_skb = NULL;
1247 netif_wake_queue(dev);
1248}
1249
dbf02fae
SH
1250static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1251 struct net_device *dev)
1da177e4
LT
1252{
1253 struct smc_private *smc = netdev_priv(dev);
906da809 1254 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1255 u_short num_pages;
1256 short time_out, ir;
85e27831 1257 unsigned long flags;
1da177e4
LT
1258
1259 netif_stop_queue(dev);
1260
dd0fab5b 1261 pr_debug("%s: smc_start_xmit(length = %d) called,"
1da177e4
LT
1262 " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2));
1263
1264 if (smc->saved_skb) {
1265 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1266 dev->stats.tx_aborted_errors++;
1da177e4
LT
1267 printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n",
1268 dev->name);
5b548140 1269 return NETDEV_TX_BUSY;
1da177e4
LT
1270 }
1271 smc->saved_skb = skb;
1272
1273 num_pages = skb->len >> 8;
1274
1275 if (num_pages > 7) {
1276 printk(KERN_ERR "%s: Far too big packet error.\n", dev->name);
1277 dev_kfree_skb (skb);
1278 smc->saved_skb = NULL;
6fb7298c 1279 dev->stats.tx_dropped++;
6ed10654 1280 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT
1281 }
1282 /* A packet is now waiting. */
1283 smc->packets_waiting++;
1284
85e27831 1285 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
1286 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1287
1288 /* need MC_RESET to keep the memory consistent. errata? */
1289 if (smc->rx_ovrn) {
1290 outw(MC_RESET, ioaddr + MMU_CMD);
1291 smc->rx_ovrn = 0;
1292 }
1293
1294 /* Allocate the memory; send the packet now if we win. */
1295 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1296 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1297 ir = inw(ioaddr+INTERRUPT);
1298 if (ir & IM_ALLOC_INT) {
1299 /* Acknowledge the interrupt, send the packet. */
1300 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1301 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1302 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1303 return NETDEV_TX_OK;
1da177e4
LT
1304 }
1305 }
1306
1307 /* Otherwise defer until the Tx-space-allocated interrupt. */
dd0fab5b 1308 pr_debug("%s: memory allocation deferred.\n", dev->name);
1da177e4 1309 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1310 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1311
6ed10654 1312 return NETDEV_TX_OK;
1da177e4
LT
1313}
1314
1315/*======================================================================
1316
1317 Handle a Tx anomolous event. Entered while in Window 2.
1318
1319======================================================================*/
1320
1321static void smc_tx_err(struct net_device * dev)
1322{
1323 struct smc_private *smc = netdev_priv(dev);
906da809 1324 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1325 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1326 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1327 int tx_status;
1328
1329 /* select this as the packet to read from */
1330 outw(packet_no, ioaddr + PNR_ARR);
1331
1332 /* read the first word from this packet */
1333 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1334
1335 tx_status = inw(ioaddr + DATA_1);
1336
6fb7298c
SH
1337 dev->stats.tx_errors++;
1338 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1339 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1340 if (tx_status & TS_16COL) {
6fb7298c 1341 dev->stats.tx_aborted_errors++;
1da177e4
LT
1342 smc->tx_err++;
1343 }
1344
1345 if (tx_status & TS_SUCCESS) {
1346 printk(KERN_NOTICE "%s: Successful packet caused error "
1347 "interrupt?\n", dev->name);
1348 }
1349 /* re-enable transmit */
1350 SMC_SELECT_BANK(0);
1351 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1352 SMC_SELECT_BANK(2);
1353
1354 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1355
1356 /* one less packet waiting for me */
1357 smc->packets_waiting--;
1358
1359 outw(saved_packet, ioaddr + PNR_ARR);
1da177e4
LT
1360}
1361
1362/*====================================================================*/
1363
1364static void smc_eph_irq(struct net_device *dev)
1365{
1366 struct smc_private *smc = netdev_priv(dev);
906da809 1367 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1368 u_short card_stats, ephs;
1369
1370 SMC_SELECT_BANK(0);
1371 ephs = inw(ioaddr + EPH);
dd0fab5b 1372 pr_debug("%s: Ethernet protocol handler interrupt, status"
1da177e4
LT
1373 " %4.4x.\n", dev->name, ephs);
1374 /* Could be a counter roll-over warning: update stats. */
1375 card_stats = inw(ioaddr + COUNTER);
1376 /* single collisions */
6fb7298c 1377 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT
1378 card_stats >>= 4;
1379 /* multiple collisions */
6fb7298c 1380 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT
1381#if 0 /* These are for when linux supports these statistics */
1382 card_stats >>= 4; /* deferred */
1383 card_stats >>= 4; /* excess deferred */
1384#endif
1385 /* If we had a transmit error we must re-enable the transmitter. */
1386 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1387
1388 /* Clear a link error interrupt. */
1389 SMC_SELECT_BANK(1);
1390 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1391 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1392 ioaddr + CONTROL);
1393 SMC_SELECT_BANK(2);
1394}
1395
1396/*====================================================================*/
1397
7d12e780 1398static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT
1399{
1400 struct net_device *dev = dev_id;
1401 struct smc_private *smc = netdev_priv(dev);
906da809 1402 unsigned int ioaddr;
1da177e4
LT
1403 u_short saved_bank, saved_pointer, mask, status;
1404 unsigned int handled = 1;
1405 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1406
1407 if (!netif_device_present(dev))
1408 return IRQ_NONE;
1409
1410 ioaddr = dev->base_addr;
1411
dd0fab5b 1412 pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1da177e4
LT
1413 irq, ioaddr);
1414
85e27831 1415 spin_lock(&smc->lock);
1da177e4
LT
1416 smc->watchdog = 0;
1417 saved_bank = inw(ioaddr + BANK_SELECT);
1418 if ((saved_bank & 0xff00) != 0x3300) {
1419 /* The device does not exist -- the card could be off-line, or
1420 maybe it has been ejected. */
dd0fab5b 1421 pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1da177e4
LT
1422 "/ejected device.\n", dev->name, irq);
1423 handled = 0;
1424 goto irq_done;
1425 }
1426
1427 SMC_SELECT_BANK(2);
1428 saved_pointer = inw(ioaddr + POINTER);
1429 mask = inw(ioaddr + INTERRUPT) >> 8;
1430 /* clear all interrupts */
1431 outw(0, ioaddr + INTERRUPT);
1432
1433 do { /* read the status flag, and mask it */
1434 status = inw(ioaddr + INTERRUPT) & 0xff;
dd0fab5b 1435 pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1da177e4
LT
1436 status, mask);
1437 if ((status & mask) == 0) {
1438 if (bogus_cnt == INTR_WORK)
1439 handled = 0;
1440 break;
1441 }
1442 if (status & IM_RCV_INT) {
1443 /* Got a packet(s). */
1444 smc_rx(dev);
1445 }
1446 if (status & IM_TX_INT) {
1447 smc_tx_err(dev);
1448 outw(IM_TX_INT, ioaddr + INTERRUPT);
1449 }
1450 status &= mask;
1451 if (status & IM_TX_EMPTY_INT) {
1452 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1453 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1454 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT
1455 smc->packets_waiting = 0;
1456 }
1457 if (status & IM_ALLOC_INT) {
1458 /* Clear this interrupt so it doesn't happen again */
1459 mask &= ~IM_ALLOC_INT;
1460
1461 smc_hardware_send_packet(dev);
1462
1463 /* enable xmit interrupts based on this */
1464 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1465
1466 /* and let the card send more packets to me */
1467 netif_wake_queue(dev);
1468 }
1469 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH
1470 dev->stats.rx_errors++;
1471 dev->stats.rx_fifo_errors++;
1da177e4
LT
1472 if (smc->duplex)
1473 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1474 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1475 }
1476 if (status & IM_EPH_INT)
1477 smc_eph_irq(dev);
1478 } while (--bogus_cnt);
1479
dd0fab5b 1480 pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1da177e4
LT
1481 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1482
1483 /* restore state register */
1484 outw((mask<<8), ioaddr + INTERRUPT);
1485 outw(saved_pointer, ioaddr + POINTER);
1486 SMC_SELECT_BANK(saved_bank);
1487
dd0fab5b 1488 pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1da177e4
LT
1489
1490irq_done:
1491
1492 if ((smc->manfid == MANFID_OSITECH) &&
1493 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1494 /* Retrigger interrupt if needed */
1495 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1496 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1497 }
1498 if (smc->manfid == MANFID_MOTOROLA) {
1499 u_char cor;
1500 cor = readb(smc->base + MOT_UART + CISREG_COR);
1501 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1502 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1503 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1504 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1505 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1506 }
9735b7ef
KK
1507
1508 if ((smc->base != NULL) && /* Megahertz MFC's */
1509 (smc->manfid == MANFID_MEGAHERTZ) &&
1510 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1511
1512 u_char tmp;
1513 tmp = readb(smc->base+MEGAHERTZ_ISR);
1514 tmp = readb(smc->base+MEGAHERTZ_ISR);
1515
1516 /* Retrigger interrupt if needed */
1517 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1518 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1da177e4 1519 }
9735b7ef 1520
85e27831 1521 spin_unlock(&smc->lock);
1da177e4
LT
1522 return IRQ_RETVAL(handled);
1523}
1524
1525/*====================================================================*/
1526
1527static void smc_rx(struct net_device *dev)
1528{
906da809 1529 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1530 int rx_status;
1531 int packet_length; /* Caution: not frame length, rather words
1532 to transfer from the chip. */
1533
1534 /* Assertion: we are in Window 2. */
1535
1536 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1537 printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n",
1538 dev->name);
1539 return;
1540 }
1541
1542 /* Reset the read pointer, and read the status and packet length. */
1543 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1544 rx_status = inw(ioaddr + DATA_1);
1545 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1546
dd0fab5b 1547 pr_debug("%s: Receive status %4.4x length %d.\n",
1da177e4
LT
1548 dev->name, rx_status, packet_length);
1549
1550 if (!(rx_status & RS_ERRORS)) {
1551 /* do stuff to make a new packet */
1552 struct sk_buff *skb;
1553
1554 /* Note: packet_length adds 5 or 6 extra bytes here! */
1555 skb = dev_alloc_skb(packet_length+2);
1556
1557 if (skb == NULL) {
dd0fab5b 1558 pr_debug("%s: Low memory, packet dropped.\n", dev->name);
6fb7298c 1559 dev->stats.rx_dropped++;
1da177e4
LT
1560 outw(MC_RELEASE, ioaddr + MMU_CMD);
1561 return;
1562 }
1563
1564 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1565 skb_reserve(skb, 2);
1566 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1567 (packet_length+1)>>1);
1568 skb->protocol = eth_type_trans(skb, dev);
1569
1da177e4
LT
1570 netif_rx(skb);
1571 dev->last_rx = jiffies;
6fb7298c
SH
1572 dev->stats.rx_packets++;
1573 dev->stats.rx_bytes += packet_length;
1da177e4 1574 if (rx_status & RS_MULTICAST)
6fb7298c 1575 dev->stats.multicast++;
1da177e4
LT
1576 } else {
1577 /* error ... */
6fb7298c 1578 dev->stats.rx_errors++;
1da177e4 1579
6fb7298c 1580 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1581 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH
1582 dev->stats.rx_length_errors++;
1583 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT
1584 }
1585 /* Let the MMU free the memory of this packet. */
1586 outw(MC_RELEASE, ioaddr + MMU_CMD);
1da177e4
LT
1587}
1588
1da177e4
LT
1589/*======================================================================
1590
1591 Set the receive mode.
1592
1593 This routine is used by both the protocol level to notify us of
1594 promiscuous/multicast mode changes, and by the open/reset code to
1595 initialize the Rx registers. We always set the multicast list and
1596 leave the receiver running.
1597
1598======================================================================*/
1599
1600static void set_rx_mode(struct net_device *dev)
1601{
906da809 1602 unsigned int ioaddr = dev->base_addr;
1da177e4 1603 struct smc_private *smc = netdev_priv(dev);
a6d37024 1604 unsigned char multicast_table[8];
1da177e4
LT
1605 unsigned long flags;
1606 u_short rx_cfg_setting;
a6d37024
KK
1607 int i;
1608
1609 memset(multicast_table, 0, sizeof(multicast_table));
1da177e4
LT
1610
1611 if (dev->flags & IFF_PROMISC) {
1da177e4
LT
1612 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1613 } else if (dev->flags & IFF_ALLMULTI)
1614 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1615 else {
4cd24eaf 1616 if (!netdev_mc_empty(dev)) {
22bedad3 1617 struct netdev_hw_addr *ha;
91fea585 1618
22bedad3
JP
1619 netdev_for_each_mc_addr(ha, dev) {
1620 u_int position = ether_crc(6, ha->addr);
91fea585
JP
1621 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1622 }
1da177e4
LT
1623 }
1624 rx_cfg_setting = RxStripCRC | RxEnable;
1625 }
1626
1627 /* Load MC table and Rx setting into the chip without interrupts. */
1628 spin_lock_irqsave(&smc->lock, flags);
1629 SMC_SELECT_BANK(3);
a6d37024
KK
1630 for (i = 0; i < 8; i++)
1631 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1da177e4
LT
1632 SMC_SELECT_BANK(0);
1633 outw(rx_cfg_setting, ioaddr + RCR);
1634 SMC_SELECT_BANK(2);
1635 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1636}
1637
1638/*======================================================================
1639
1640 Senses when a card's config changes. Here, it's coax or TP.
1641
1642======================================================================*/
1643
1644static int s9k_config(struct net_device *dev, struct ifmap *map)
1645{
1646 struct smc_private *smc = netdev_priv(dev);
1647 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1648 if (smc->cfg & CFG_MII_SELECT)
1649 return -EOPNOTSUPP;
1650 else if (map->port > 2)
1651 return -EINVAL;
1652 dev->if_port = map->port;
1653 printk(KERN_INFO "%s: switched to %s port\n",
1654 dev->name, if_names[dev->if_port]);
1655 smc_reset(dev);
1656 }
1657 return 0;
1658}
1659
1660/*======================================================================
1661
1662 Reset the chip, reloading every register that might be corrupted.
1663
1664======================================================================*/
1665
1666/*
1667 Set transceiver type, perhaps to something other than what the user
1668 specified in dev->if_port.
1669*/
1670static void smc_set_xcvr(struct net_device *dev, int if_port)
1671{
1672 struct smc_private *smc = netdev_priv(dev);
906da809 1673 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1674 u_short saved_bank;
1675
1676 saved_bank = inw(ioaddr + BANK_SELECT);
1677 SMC_SELECT_BANK(1);
1678 if (if_port == 2) {
1679 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1680 if ((smc->manfid == MANFID_OSITECH) &&
1681 (smc->cardid != PRODID_OSITECH_SEVEN))
1682 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1683 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1684 } else {
1685 outw(smc->cfg, ioaddr + CONFIG);
1686 if ((smc->manfid == MANFID_OSITECH) &&
1687 (smc->cardid != PRODID_OSITECH_SEVEN))
1688 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1689 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1690 }
1691 SMC_SELECT_BANK(saved_bank);
1692}
1693
1694static void smc_reset(struct net_device *dev)
1695{
906da809 1696 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1697 struct smc_private *smc = netdev_priv(dev);
1698 int i;
1699
dd0fab5b 1700 pr_debug("%s: smc91c92 reset called.\n", dev->name);
1da177e4
LT
1701
1702 /* The first interaction must be a write to bring the chip out
1703 of sleep mode. */
1704 SMC_SELECT_BANK(0);
1705 /* Reset the chip. */
1706 outw(RCR_SOFTRESET, ioaddr + RCR);
1707 udelay(10);
1708
1709 /* Clear the transmit and receive configuration registers. */
1710 outw(RCR_CLEAR, ioaddr + RCR);
1711 outw(TCR_CLEAR, ioaddr + TCR);
1712
1713 /* Set the Window 1 control, configuration and station addr registers.
1714 No point in writing the I/O base register ;-> */
1715 SMC_SELECT_BANK(1);
d6e05edc 1716 /* Automatically release successfully transmitted packets,
1da177e4
LT
1717 Accept link errors, counter and Tx error interrupts. */
1718 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1719 ioaddr + CONTROL);
1720 smc_set_xcvr(dev, dev->if_port);
1721 if ((smc->manfid == MANFID_OSITECH) &&
1722 (smc->cardid != PRODID_OSITECH_SEVEN))
1723 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1724 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1725 ioaddr - 0x10 + OSITECH_AUI_PWR);
1726
1727 /* Fill in the physical address. The databook is wrong about the order! */
1728 for (i = 0; i < 6; i += 2)
1729 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1730 ioaddr + ADDR0 + i);
1731
1732 /* Reset the MMU */
1733 SMC_SELECT_BANK(2);
1734 outw(MC_RESET, ioaddr + MMU_CMD);
1735 outw(0, ioaddr + INTERRUPT);
1736
1737 /* Re-enable the chip. */
1738 SMC_SELECT_BANK(0);
1739 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1740 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1741 set_rx_mode(dev);
1742
1743 if (smc->cfg & CFG_MII_SELECT) {
1744 SMC_SELECT_BANK(3);
1745
1746 /* Reset MII */
1747 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1748
1749 /* Advertise 100F, 100H, 10F, 10H */
1750 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1751
1752 /* Restart MII autonegotiation */
1753 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1754 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1755 }
1756
1757 /* Enable interrupts. */
1758 SMC_SELECT_BANK(2);
1759 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1760 ioaddr + INTERRUPT);
1761}
1762
1763/*======================================================================
1764
1765 Media selection timer routine
1766
1767======================================================================*/
1768
1769static void media_check(u_long arg)
1770{
1771 struct net_device *dev = (struct net_device *) arg;
1772 struct smc_private *smc = netdev_priv(dev);
906da809 1773 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1774 u_short i, media, saved_bank;
1775 u_short link;
85e27831
K
1776 unsigned long flags;
1777
1778 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
1779
1780 saved_bank = inw(ioaddr + BANK_SELECT);
1781
1782 if (!netif_device_present(dev))
1783 goto reschedule;
1784
1785 SMC_SELECT_BANK(2);
1786
1787 /* need MC_RESET to keep the memory consistent. errata? */
1788 if (smc->rx_ovrn) {
1789 outw(MC_RESET, ioaddr + MMU_CMD);
1790 smc->rx_ovrn = 0;
1791 }
1792 i = inw(ioaddr + INTERRUPT);
1793 SMC_SELECT_BANK(0);
1794 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1795 SMC_SELECT_BANK(1);
1796 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1797
2a915157
KK
1798 SMC_SELECT_BANK(saved_bank);
1799 spin_unlock_irqrestore(&smc->lock, flags);
1800
1da177e4
LT
1801 /* Check for pending interrupt with watchdog flag set: with
1802 this, we can limp along even if the interrupt is blocked */
1803 if (smc->watchdog++ && ((i>>8) & i)) {
1804 if (!smc->fast_poll)
1805 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
2a915157 1806 local_irq_save(flags);
e363d138 1807 smc_interrupt(dev->irq, dev);
2a915157 1808 local_irq_restore(flags);
1da177e4
LT
1809 smc->fast_poll = HZ;
1810 }
1811 if (smc->fast_poll) {
1812 smc->fast_poll--;
1813 smc->media.expires = jiffies + HZ/100;
1814 add_timer(&smc->media);
1da177e4
LT
1815 return;
1816 }
1817
2a915157
KK
1818 spin_lock_irqsave(&smc->lock, flags);
1819
1820 saved_bank = inw(ioaddr + BANK_SELECT);
1821
1da177e4
LT
1822 if (smc->cfg & CFG_MII_SELECT) {
1823 if (smc->mii_if.phy_id < 0)
1824 goto reschedule;
1825
1826 SMC_SELECT_BANK(3);
1827 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1828 if (!link || (link == 0xffff)) {
1829 printk(KERN_INFO "%s: MII is missing!\n", dev->name);
1830 smc->mii_if.phy_id = -1;
1831 goto reschedule;
1832 }
1833
1834 link &= 0x0004;
1835 if (link != smc->link_status) {
1836 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1837 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1838 (link) ? "found" : "lost");
1839 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1840 ? TCR_FDUPLX : 0);
1841 if (link) {
1842 printk(KERN_INFO "%s: autonegotiation complete: "
1843 "%sbaseT-%cD selected\n", dev->name,
1844 ((p & 0x0180) ? "100" : "10"),
1845 (smc->duplex ? 'F' : 'H'));
1846 }
1847 SMC_SELECT_BANK(0);
1848 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1849 smc->link_status = link;
1850 }
1851 goto reschedule;
1852 }
1853
1854 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1855 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT
1856 if (smc->tx_err || (smc->media_status & EPH_16COL))
1857 media |= EPH_16COL;
1858 }
1859 smc->tx_err = 0;
1860
1861 if (media != smc->media_status) {
1862 if ((media & smc->media_status & 1) &&
1863 ((smc->media_status ^ media) & EPH_LINK_OK))
1864 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1865 (smc->media_status & EPH_LINK_OK ? "lost" : "found"));
1866 else if ((media & smc->media_status & 2) &&
1867 ((smc->media_status ^ media) & EPH_16COL))
1868 printk(KERN_INFO "%s: coax cable %s\n", dev->name,
1869 (media & EPH_16COL ? "problem" : "ok"));
1870 if (dev->if_port == 0) {
1871 if (media & 1) {
1872 if (media & EPH_LINK_OK)
1873 printk(KERN_INFO "%s: flipped to 10baseT\n",
1874 dev->name);
1875 else
1876 smc_set_xcvr(dev, 2);
1877 } else {
1878 if (media & EPH_16COL)
1879 smc_set_xcvr(dev, 1);
1880 else
1881 printk(KERN_INFO "%s: flipped to 10base2\n",
1882 dev->name);
1883 }
1884 }
1885 smc->media_status = media;
1886 }
1887
1888reschedule:
1889 smc->media.expires = jiffies + HZ;
1890 add_timer(&smc->media);
1891 SMC_SELECT_BANK(saved_bank);
85e27831 1892 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1893}
1894
1895static int smc_link_ok(struct net_device *dev)
1896{
906da809 1897 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1898 struct smc_private *smc = netdev_priv(dev);
1899
1900 if (smc->cfg & CFG_MII_SELECT) {
1901 return mii_link_ok(&smc->mii_if);
1902 } else {
1903 SMC_SELECT_BANK(0);
1904 return inw(ioaddr + EPH) & EPH_LINK_OK;
1905 }
1906}
1907
1908static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1909{
1910 u16 tmp;
906da809 1911 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1912
1913 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1914 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1915
1916 SMC_SELECT_BANK(1);
1917 tmp = inw(ioaddr + CONFIG);
1918 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1919 ecmd->transceiver = XCVR_INTERNAL;
1920 ecmd->speed = SPEED_10;
1921 ecmd->phy_address = ioaddr + MGMT;
1922
1923 SMC_SELECT_BANK(0);
1924 tmp = inw(ioaddr + TCR);
1925 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1926
1927 return 0;
1928}
1929
1930static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1931{
1932 u16 tmp;
906da809 1933 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1934
1935 if (ecmd->speed != SPEED_10)
1936 return -EINVAL;
1937 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1938 return -EINVAL;
1939 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1940 return -EINVAL;
1941 if (ecmd->transceiver != XCVR_INTERNAL)
1942 return -EINVAL;
1943
1944 if (ecmd->port == PORT_AUI)
1945 smc_set_xcvr(dev, 1);
1946 else
1947 smc_set_xcvr(dev, 0);
1948
1949 SMC_SELECT_BANK(0);
1950 tmp = inw(ioaddr + TCR);
1951 if (ecmd->duplex == DUPLEX_FULL)
1952 tmp |= TCR_FDUPLX;
1953 else
1954 tmp &= ~TCR_FDUPLX;
1955 outw(tmp, ioaddr + TCR);
1956
1957 return 0;
1958}
1959
1960static int check_if_running(struct net_device *dev)
1961{
1962 if (!netif_running(dev))
1963 return -EINVAL;
1964 return 0;
1965}
1966
1967static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1968{
1969 strcpy(info->driver, DRV_NAME);
1970 strcpy(info->version, DRV_VERSION);
1971}
1972
1973static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1974{
1975 struct smc_private *smc = netdev_priv(dev);
906da809 1976 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1977 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1978 int ret;
2a915157 1979 unsigned long flags;
1da177e4 1980
2a915157 1981 spin_lock_irqsave(&smc->lock, flags);
85e27831 1982 SMC_SELECT_BANK(3);
1da177e4
LT
1983 if (smc->cfg & CFG_MII_SELECT)
1984 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1985 else
1986 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1987 SMC_SELECT_BANK(saved_bank);
2a915157 1988 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1989 return ret;
1990}
1991
1992static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1993{
1994 struct smc_private *smc = netdev_priv(dev);
906da809 1995 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1996 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1997 int ret;
2a915157 1998 unsigned long flags;
1da177e4 1999
2a915157 2000 spin_lock_irqsave(&smc->lock, flags);
85e27831 2001 SMC_SELECT_BANK(3);
1da177e4
LT
2002 if (smc->cfg & CFG_MII_SELECT)
2003 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
2004 else
2005 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 2006 SMC_SELECT_BANK(saved_bank);
2a915157 2007 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
2008 return ret;
2009}
2010
2011static u32 smc_get_link(struct net_device *dev)
2012{
2013 struct smc_private *smc = netdev_priv(dev);
906da809 2014 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
2015 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2016 u32 ret;
2a915157 2017 unsigned long flags;
1da177e4 2018
2a915157 2019 spin_lock_irqsave(&smc->lock, flags);
85e27831 2020 SMC_SELECT_BANK(3);
1da177e4 2021 ret = smc_link_ok(dev);
1da177e4 2022 SMC_SELECT_BANK(saved_bank);
2a915157 2023 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
2024 return ret;
2025}
2026
1da177e4
LT
2027static int smc_nway_reset(struct net_device *dev)
2028{
2029 struct smc_private *smc = netdev_priv(dev);
2030 if (smc->cfg & CFG_MII_SELECT) {
906da809 2031 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
2032 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2033 int res;
2034
2035 SMC_SELECT_BANK(3);
2036 res = mii_nway_restart(&smc->mii_if);
2037 SMC_SELECT_BANK(saved_bank);
2038
2039 return res;
2040 } else
2041 return -EOPNOTSUPP;
2042}
2043
7282d491 2044static const struct ethtool_ops ethtool_ops = {
1da177e4
LT
2045 .begin = check_if_running,
2046 .get_drvinfo = smc_get_drvinfo,
2047 .get_settings = smc_get_settings,
2048 .set_settings = smc_set_settings,
2049 .get_link = smc_get_link,
1da177e4
LT
2050 .nway_reset = smc_nway_reset,
2051};
2052
2053static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2054{
2055 struct smc_private *smc = netdev_priv(dev);
2056 struct mii_ioctl_data *mii = if_mii(rq);
2057 int rc = 0;
2058 u16 saved_bank;
906da809 2059 unsigned int ioaddr = dev->base_addr;
2a915157 2060 unsigned long flags;
1da177e4
LT
2061
2062 if (!netif_running(dev))
2063 return -EINVAL;
2064
2a915157 2065 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
2066 saved_bank = inw(ioaddr + BANK_SELECT);
2067 SMC_SELECT_BANK(3);
2068 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2069 SMC_SELECT_BANK(saved_bank);
2a915157 2070 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
2071 return rc;
2072}
2073
5c672220
DB
2074static struct pcmcia_device_id smc91c92_ids[] = {
2075 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2076 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2077 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2078 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2079 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2080 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2081 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2082 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K
2083 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2084 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB
2085 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2086 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2087 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2088 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2089 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2090 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2091 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2092 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2093 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K
2094 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2095 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB
2096 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2097 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2098 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2099 /* These conflict with other cards! */
2100 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2101 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2102 PCMCIA_DEVICE_NULL,
2103};
2104MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2105
1da177e4
LT
2106static struct pcmcia_driver smc91c92_cs_driver = {
2107 .owner = THIS_MODULE,
2108 .drv = {
2109 .name = "smc91c92_cs",
2110 },
15b99ac1 2111 .probe = smc91c92_probe,
cc3b4866 2112 .remove = smc91c92_detach,
5c672220 2113 .id_table = smc91c92_ids,
98e4c28b
DB
2114 .suspend = smc91c92_suspend,
2115 .resume = smc91c92_resume,
1da177e4
LT
2116};
2117
2118static int __init init_smc91c92_cs(void)
2119{
2120 return pcmcia_register_driver(&smc91c92_cs_driver);
2121}
2122
2123static void __exit exit_smc91c92_cs(void)
2124{
2125 pcmcia_unregister_driver(&smc91c92_cs_driver);
1da177e4
LT
2126}
2127
2128module_init(init_smc91c92_cs);
2129module_exit(exit_smc91c92_cs);
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