pcmcia: move config_{base,index,regs} to struct pcmcia_device
[deliverable/linux.git] / drivers / net / pcmcia / smc91c92_cs.c
CommitLineData
1da177e4
LT
1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/crc32.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/if_arp.h>
41#include <linux/ioport.h>
42#include <linux/ethtool.h>
43#include <linux/mii.h>
4851d3aa 44#include <linux/jiffies.h>
75bf758f 45#include <linux/firmware.h>
1da177e4 46
1da177e4
LT
47#include <pcmcia/cs.h>
48#include <pcmcia/cistpl.h>
49#include <pcmcia/cisreg.h>
50#include <pcmcia/ciscode.h>
51#include <pcmcia/ds.h>
50db3fdb 52#include <pcmcia/ss.h>
1da177e4
LT
53
54#include <asm/io.h>
55#include <asm/system.h>
56#include <asm/uaccess.h>
57
1da177e4
LT
58/*====================================================================*/
59
f71e1309 60static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 61
75bf758f
JSR
62/* Firmware name */
63#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
64
1da177e4
LT
65/* Module parameters */
66
67MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
68MODULE_LICENSE("GPL");
75bf758f 69MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT
70
71#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
72
73/*
74 Transceiver/media type.
75 0 = auto
76 1 = 10baseT (and autoselect if #define AUTOSELECT),
77 2 = AUI/10base2,
78*/
79INT_MODULE_PARM(if_port, 0);
80
1da177e4
LT
81
82#define DRV_NAME "smc91c92_cs"
d5b20697 83#define DRV_VERSION "1.123"
1da177e4
LT
84
85/*====================================================================*/
86
87/* Operational parameter that usually are not changed. */
88
89/* Time in jiffies before concluding Tx hung */
90#define TX_TIMEOUT ((400*HZ)/1000)
91
92/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
93#define INTR_WORK 4
94
95/* Times to check the check the chip before concluding that it doesn't
96 currently have room for another Tx packet. */
97#define MEMORY_WAIT_TIME 8
98
1da177e4 99struct smc_private {
fd238232 100 struct pcmcia_device *p_dev;
1da177e4
LT
101 spinlock_t lock;
102 u_short manfid;
103 u_short cardid;
6fb7298c 104
1da177e4
LT
105 struct sk_buff *saved_skb;
106 int packets_waiting;
107 void __iomem *base;
108 u_short cfg;
109 struct timer_list media;
110 int watchdog, tx_err;
111 u_short media_status;
112 u_short fast_poll;
113 u_short link_status;
114 struct mii_if_info mii_if;
115 int duplex;
116 int rx_ovrn;
117};
118
119/* Special definitions for Megahertz multifunction cards */
120#define MEGAHERTZ_ISR 0x0380
121
122/* Special function registers for Motorola Mariner */
123#define MOT_LAN 0x0000
124#define MOT_UART 0x0020
125#define MOT_EEPROM 0x20
126
127#define MOT_NORMAL \
128(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
129
130/* Special function registers for Ositech cards */
131#define OSITECH_AUI_CTL 0x0c
132#define OSITECH_PWRDOWN 0x0d
133#define OSITECH_RESET 0x0e
134#define OSITECH_ISR 0x0f
135#define OSITECH_AUI_PWR 0x0c
136#define OSITECH_RESET_ISR 0x0e
137
138#define OSI_AUI_PWR 0x40
139#define OSI_LAN_PWRDOWN 0x02
140#define OSI_MODEM_PWRDOWN 0x01
141#define OSI_LAN_RESET 0x02
142#define OSI_MODEM_RESET 0x01
143
144/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
145#define BANK_SELECT 14 /* Window select register. */
146#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
147
148/* Bank 0 registers. */
149#define TCR 0 /* transmit control register */
150#define TCR_CLEAR 0 /* do NOTHING */
151#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
152#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
153#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
154#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
155#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
156
157#define EPH 2 /* Ethernet Protocol Handler report. */
158#define EPH_TX_SUC 0x0001
159#define EPH_SNGLCOL 0x0002
160#define EPH_MULCOL 0x0004
161#define EPH_LTX_MULT 0x0008
162#define EPH_16COL 0x0010
163#define EPH_SQET 0x0020
164#define EPH_LTX_BRD 0x0040
165#define EPH_TX_DEFR 0x0080
166#define EPH_LAT_COL 0x0200
167#define EPH_LOST_CAR 0x0400
168#define EPH_EXC_DEF 0x0800
169#define EPH_CTR_ROL 0x1000
170#define EPH_RX_OVRN 0x2000
171#define EPH_LINK_OK 0x4000
172#define EPH_TX_UNRN 0x8000
173#define MEMINFO 8 /* Memory Information Register */
174#define MEMCFG 10 /* Memory Configuration Register */
175
176/* Bank 1 registers. */
177#define CONFIG 0
178#define CFG_MII_SELECT 0x8000 /* 91C100 only */
179#define CFG_NO_WAIT 0x1000
180#define CFG_FULL_STEP 0x0400
181#define CFG_SET_SQLCH 0x0200
182#define CFG_AUI_SELECT 0x0100
183#define CFG_16BIT 0x0080
184#define CFG_DIS_LINK 0x0040
185#define CFG_STATIC 0x0030
186#define CFG_IRQ_SEL_1 0x0004
187#define CFG_IRQ_SEL_0 0x0002
188#define BASE_ADDR 2
189#define ADDR0 4
190#define GENERAL 10
191#define CONTROL 12
192#define CTL_STORE 0x0001
193#define CTL_RELOAD 0x0002
194#define CTL_EE_SELECT 0x0004
195#define CTL_TE_ENABLE 0x0020
196#define CTL_CR_ENABLE 0x0040
197#define CTL_LE_ENABLE 0x0080
198#define CTL_AUTO_RELEASE 0x0800
199#define CTL_POWERDOWN 0x2000
200
201/* Bank 2 registers. */
202#define MMU_CMD 0
203#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
204#define MC_RESET 0x40
205#define MC_RELEASE 0x80 /* remove and release the current rx packet */
206#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
207#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
208#define PNR_ARR 2
209#define FIFO_PORTS 4
210#define FP_RXEMPTY 0x8000
211#define POINTER 6
212#define PTR_AUTO_INC 0x0040
213#define PTR_READ 0x2000
214#define PTR_AUTOINC 0x4000
215#define PTR_RCV 0x8000
216#define DATA_1 8
217#define INTERRUPT 12
218#define IM_RCV_INT 0x1
219#define IM_TX_INT 0x2
220#define IM_TX_EMPTY_INT 0x4
221#define IM_ALLOC_INT 0x8
222#define IM_RX_OVRN_INT 0x10
223#define IM_EPH_INT 0x20
224
225#define RCR 4
226enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
227 RxEnable = 0x0100, RxStripCRC = 0x0200};
228#define RCR_SOFTRESET 0x8000 /* resets the chip */
229#define RCR_STRIP_CRC 0x200 /* strips CRC */
230#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
231#define RCR_ALMUL 0x4 /* receive all multicast packets */
232#define RCR_PROMISC 0x2 /* enable promiscuous mode */
233
234/* the normal settings for the RCR register : */
235#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
236#define RCR_CLEAR 0x0 /* set it to a base state */
237#define COUNTER 6
238
239/* BANK 3 -- not the same values as in smc9194! */
240#define MULTICAST0 0
241#define MULTICAST2 2
242#define MULTICAST4 4
243#define MULTICAST6 6
244#define MGMT 8
245#define REVISION 0x0a
246
247/* Transmit status bits. */
248#define TS_SUCCESS 0x0001
249#define TS_16COL 0x0010
250#define TS_LATCOL 0x0200
251#define TS_LOSTCAR 0x0400
252
253/* Receive status bits. */
254#define RS_ALGNERR 0x8000
255#define RS_BADCRC 0x2000
256#define RS_ODDFRAME 0x1000
257#define RS_TOOLONG 0x0800
258#define RS_TOOSHORT 0x0400
259#define RS_MULTICAST 0x0001
260#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
261
262#define set_bits(v, p) outw(inw(p)|(v), (p))
263#define mask_bits(v, p) outw(inw(p)&(v), (p))
264
265/*====================================================================*/
266
cc3b4866 267static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 268static int smc91c92_config(struct pcmcia_device *link);
fba395ee 269static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT
270
271static int smc_open(struct net_device *dev);
272static int smc_close(struct net_device *dev);
273static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
274static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH
275static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
276 struct net_device *dev);
7d12e780 277static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 278static void smc_rx(struct net_device *dev);
1da177e4
LT
279static void set_rx_mode(struct net_device *dev);
280static int s9k_config(struct net_device *dev, struct ifmap *map);
281static void smc_set_xcvr(struct net_device *dev, int if_port);
282static void smc_reset(struct net_device *dev);
283static void media_check(u_long arg);
906da809 284static void mdio_sync(unsigned int addr);
1da177e4
LT
285static int mdio_read(struct net_device *dev, int phy_id, int loc);
286static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
287static int smc_link_ok(struct net_device *dev);
7282d491 288static const struct ethtool_ops ethtool_ops;
1da177e4 289
9b31b697
SH
290static const struct net_device_ops smc_netdev_ops = {
291 .ndo_open = smc_open,
292 .ndo_stop = smc_close,
293 .ndo_start_xmit = smc_start_xmit,
294 .ndo_tx_timeout = smc_tx_timeout,
295 .ndo_set_config = s9k_config,
296 .ndo_set_multicast_list = set_rx_mode,
297 .ndo_do_ioctl = &smc_ioctl,
298 .ndo_change_mtu = eth_change_mtu,
299 .ndo_set_mac_address = eth_mac_addr,
300 .ndo_validate_addr = eth_validate_addr,
301};
302
1da177e4
LT
303/*======================================================================
304
305 smc91c92_attach() creates an "instance" of the driver, allocating
306 local data structures for one device. The device is registered
307 with Card Services.
308
309======================================================================*/
310
15b99ac1 311static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 312{
1da177e4 313 struct smc_private *smc;
1da177e4 314 struct net_device *dev;
1da177e4 315
dd0fab5b 316 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT
317
318 /* Create new ethernet device */
319 dev = alloc_etherdev(sizeof(struct smc_private));
320 if (!dev)
f8cfa618 321 return -ENOMEM;
1da177e4 322 smc = netdev_priv(dev);
fba395ee 323 smc->p_dev = link;
44b496f6 324 link->priv = dev;
1da177e4
LT
325
326 spin_lock_init(&smc->lock);
90abdc3b
DB
327 link->resource[0]->end = 16;
328 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
1da177e4 329 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT
330
331 /* The SMC91c92-specific entries in the device structure. */
9b31b697 332 dev->netdev_ops = &smc_netdev_ops;
1da177e4 333 SET_ETHTOOL_OPS(dev, &ethtool_ops);
1da177e4 334 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT
335
336 smc->mii_if.dev = dev;
337 smc->mii_if.mdio_read = mdio_read;
338 smc->mii_if.mdio_write = mdio_write;
339 smc->mii_if.phy_id_mask = 0x1f;
340 smc->mii_if.reg_num_mask = 0x1f;
341
15b99ac1 342 return smc91c92_config(link);
1da177e4
LT
343} /* smc91c92_attach */
344
345/*======================================================================
346
347 This deletes a driver "instance". The device is de-registered
348 with Card Services. If it has been released, all local data
349 structures are freed. Otherwise, the structures will be freed
350 when the device is released.
351
352======================================================================*/
353
fba395ee 354static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT
355{
356 struct net_device *dev = link->priv;
1da177e4 357
dd0fab5b 358 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 359
c7c2fa07 360 unregister_netdev(dev);
1da177e4 361
e2d40963 362 smc91c92_release(link);
1da177e4 363
1da177e4
LT
364 free_netdev(dev);
365} /* smc91c92_detach */
366
367/*====================================================================*/
368
369static int cvt_ascii_address(struct net_device *dev, char *s)
370{
371 int i, j, da, c;
372
373 if (strlen(s) != 12)
374 return -1;
375 for (i = 0; i < 6; i++) {
376 da = 0;
377 for (j = 0; j < 2; j++) {
378 c = *s++;
379 da <<= 4;
380 da += ((c >= '0') && (c <= '9')) ?
381 (c - '0') : ((c & 0x0f) + 9);
382 }
383 dev->dev_addr[i] = da;
384 }
385 return 0;
386}
387
dddfbd82 388/*====================================================================
1da177e4
LT
389
390 Configuration stuff for Megahertz cards
391
392 mhz_3288_power() is used to power up a 3288's ethernet chip.
393 mhz_mfc_config() handles socket setup for multifunction (1144
394 and 3288) cards. mhz_setup() gets a card's hardware ethernet
395 address.
396
397======================================================================*/
398
fba395ee 399static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT
400{
401 struct net_device *dev = link->priv;
402 struct smc_private *smc = netdev_priv(dev);
403 u_char tmp;
404
405 /* Read the ISR twice... */
406 readb(smc->base+MEGAHERTZ_ISR);
407 udelay(5);
408 readb(smc->base+MEGAHERTZ_ISR);
409
410 /* Pause 200ms... */
411 mdelay(200);
412
413 /* Now read and write the COR... */
7feabb64 414 tmp = readb(smc->base + link->config_base + CISREG_COR);
1da177e4 415 udelay(5);
7feabb64 416 writeb(tmp, smc->base + link->config_base + CISREG_COR);
1da177e4
LT
417
418 return 0;
419}
420
b54bf94b
DB
421static int mhz_mfc_config_check(struct pcmcia_device *p_dev,
422 cistpl_cftable_entry_t *cf,
8e2fc39d 423 cistpl_cftable_entry_t *dflt,
ad913c11 424 unsigned int vcc,
b54bf94b
DB
425 void *priv_data)
426{
427 int k;
90abdc3b 428 p_dev->resource[1]->start = cf->io.win[0].base;
b54bf94b
DB
429 for (k = 0; k < 0x400; k += 0x10) {
430 if (k & 0x80)
431 continue;
90abdc3b
DB
432 p_dev->resource[0]->start = k ^ 0x300;
433 p_dev->io_lines = 16;
434 if (!pcmcia_request_io(p_dev))
b54bf94b
DB
435 return 0;
436 }
437 return -ENODEV;
438}
439
fba395ee 440static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT
441{
442 struct net_device *dev = link->priv;
443 struct smc_private *smc = netdev_priv(dev);
b5cb259e 444 unsigned int offset;
b54bf94b 445 int i;
1da177e4
LT
446
447 link->conf.Attributes |= CONF_ENABLE_SPKR;
90abdc3b
DB
448 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
449 link->resource[1]->end = 8;
1da177e4 450
1da177e4
LT
451 /* The Megahertz combo cards have modem-like CIS entries, so
452 we have to explicitly try a bunch of port combinations. */
b54bf94b 453 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB
454 return -ENODEV;
455
9a017a91 456 dev->base_addr = link->resource[0]->start;
1da177e4
LT
457
458 /* Allocate a memory window, for accessing the ISR */
cdb13808
DB
459 link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
460 link->resource[2]->start = link->resource[2]->end = 0;
461 i = pcmcia_request_window(link, link->resource[2], 0);
4c89e88b 462 if (i != 0)
dddfbd82
DB
463 return -ENODEV;
464
cdb13808
DB
465 smc->base = ioremap(link->resource[2]->start,
466 resource_size(link->resource[2]));
7feabb64 467 offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0;
cdb13808 468 i = pcmcia_map_mem_page(link, link->resource[2], offset);
8e95a202
JP
469 if ((i == 0) &&
470 (smc->manfid == MANFID_MEGAHERTZ) &&
471 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
472 mhz_3288_power(link);
1da177e4 473
dddfbd82 474 return 0;
1da177e4
LT
475}
476
dddfbd82
DB
477static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
478 tuple_t *tuple,
479 void *priv)
1da177e4 480{
dddfbd82
DB
481 struct net_device *dev = priv;
482 cisparse_t parse;
fb9e2d88 483 u8 *buf;
4638aef4 484
dddfbd82
DB
485 if (pcmcia_parse_tuple(tuple, &parse))
486 return -EINVAL;
1da177e4 487
fb9e2d88
KK
488 buf = parse.version_1.str + parse.version_1.ofs[3];
489
490 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
dddfbd82 491 return 0;
4638aef4 492
dddfbd82
DB
493 return -EINVAL;
494};
495
fba395ee 496static int mhz_setup(struct pcmcia_device *link)
1da177e4 497{
1da177e4 498 struct net_device *dev = link->priv;
dddfbd82
DB
499 size_t len;
500 u8 *buf;
4638aef4 501 int rc;
1da177e4
LT
502
503 /* Read the station address from the CIS. It is stored as the last
504 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB
505 if ((link->prod_id[3]) &&
506 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
507 return 0;
508
509 /* Workarounds for broken cards start here. */
a1a98b72 510 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB
511 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
512 return 0;
1da177e4
LT
513
514 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 515 rc = -1;
dddfbd82
DB
516 len = pcmcia_get_tuple(link, 0x81, &buf);
517 if (buf && len >= 13) {
518 buf[12] = '\0';
fb9e2d88 519 if (cvt_ascii_address(dev, buf) == 0)
dddfbd82
DB
520 rc = 0;
521 }
522 kfree(buf);
523
524 return rc;
525};
1da177e4
LT
526
527/*======================================================================
528
529 Configuration stuff for the Motorola Mariner
530
531 mot_config() writes directly to the Mariner configuration
532 registers because the CIS is just bogus.
533
534======================================================================*/
535
fba395ee 536static void mot_config(struct pcmcia_device *link)
1da177e4
LT
537{
538 struct net_device *dev = link->priv;
539 struct smc_private *smc = netdev_priv(dev);
906da809 540 unsigned int ioaddr = dev->base_addr;
9a017a91 541 unsigned int iouart = link->resource[1]->start;
1da177e4
LT
542
543 /* Set UART base address and force map with COR bit 1 */
544 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
545 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
546 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
547
548 /* Set SMC base address and force map with COR bit 1 */
549 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
550 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
551 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
552
553 /* Wait for things to settle down */
554 mdelay(100);
555}
556
fba395ee 557static int mot_setup(struct pcmcia_device *link)
1da177e4
LT
558{
559 struct net_device *dev = link->priv;
906da809 560 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
561 int i, wait, loop;
562 u_int addr;
563
564 /* Read Ethernet address from Serial EEPROM */
565
566 for (i = 0; i < 3; i++) {
567 SMC_SELECT_BANK(2);
568 outw(MOT_EEPROM + i, ioaddr + POINTER);
569 SMC_SELECT_BANK(1);
570 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
571
572 for (loop = wait = 0; loop < 200; loop++) {
573 udelay(10);
574 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
575 if (wait == 0) break;
576 }
577
578 if (wait)
579 return -1;
580
581 addr = inw(ioaddr + GENERAL);
582 dev->dev_addr[2*i] = addr & 0xff;
583 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
584 }
585
586 return 0;
587}
588
589/*====================================================================*/
590
b54bf94b
DB
591static int smc_configcheck(struct pcmcia_device *p_dev,
592 cistpl_cftable_entry_t *cf,
8e2fc39d 593 cistpl_cftable_entry_t *dflt,
ad913c11 594 unsigned int vcc,
b54bf94b
DB
595 void *priv_data)
596{
90abdc3b
DB
597 p_dev->resource[0]->start = cf->io.win[0].base;
598 p_dev->io_lines = cf->io.flags & CISTPL_IO_LINES_MASK;
599 return pcmcia_request_io(p_dev);
b54bf94b
DB
600}
601
fba395ee 602static int smc_config(struct pcmcia_device *link)
1da177e4
LT
603{
604 struct net_device *dev = link->priv;
1da177e4
LT
605 int i;
606
90abdc3b 607 link->resource[0]->end = 16;
b54bf94b
DB
608 i = pcmcia_loop_config(link, smc_configcheck, NULL);
609 if (!i)
9a017a91 610 dev->base_addr = link->resource[0]->start;
4638aef4 611
1da177e4
LT
612 return i;
613}
614
dddfbd82 615
fba395ee 616static int smc_setup(struct pcmcia_device *link)
1da177e4 617{
1da177e4 618 struct net_device *dev = link->priv;
1da177e4
LT
619
620 /* Check for a LAN function extension tuple */
dddfbd82
DB
621 if (!pcmcia_get_mac_from_cis(link, dev))
622 return 0;
623
1da177e4 624 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 625 if (link->prod_id[2]) {
dddfbd82
DB
626 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
627 return 0;
4638aef4 628 }
dddfbd82 629 return -1;
1da177e4
LT
630}
631
632/*====================================================================*/
633
fba395ee 634static int osi_config(struct pcmcia_device *link)
1da177e4
LT
635{
636 struct net_device *dev = link->priv;
906da809 637 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT
638 int i, j;
639
640 link->conf.Attributes |= CONF_ENABLE_SPKR;
90abdc3b
DB
641 link->resource[0]->end = 64;
642 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
643 link->resource[1]->end = 8;
1da177e4
LT
644
645 /* Enable Hard Decode, LAN, Modem */
90abdc3b 646 link->io_lines = 16;
7feabb64 647 link->config_index = 0x23;
1da177e4
LT
648
649 for (i = j = 0; j < 4; j++) {
90abdc3b
DB
650 link->resource[1]->start = com[j];
651 i = pcmcia_request_io(link);
4c89e88b
DB
652 if (i == 0)
653 break;
1da177e4 654 }
4c89e88b 655 if (i != 0) {
1da177e4 656 /* Fallback: turn off hard decode */
7feabb64 657 link->config_index = 0x03;
90abdc3b
DB
658 link->resource[1]->end = 0;
659 i = pcmcia_request_io(link);
1da177e4 660 }
9a017a91 661 dev->base_addr = link->resource[0]->start + 0x10;
1da177e4
LT
662 return i;
663}
664
75bf758f
JSR
665static int osi_load_firmware(struct pcmcia_device *link)
666{
667 const struct firmware *fw;
668 int i, err;
669
670 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
671 if (err) {
672 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
673 return err;
674 }
675
676 /* Download the Seven of Diamonds firmware */
677 for (i = 0; i < fw->size; i++) {
9a017a91 678 outb(fw->data[i], link->resource[0]->start + 2);
75bf758f
JSR
679 udelay(50);
680 }
681 release_firmware(fw);
682 return err;
683}
684
dddfbd82
DB
685static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
686 tuple_t *tuple,
687 void *priv)
1da177e4 688{
dddfbd82
DB
689 struct net_device *dev = priv;
690 int i;
1da177e4 691
dddfbd82
DB
692 if (tuple->TupleDataLen < 8)
693 return -EINVAL;
694 if (tuple->TupleData[0] != 0x04)
695 return -EINVAL;
696 for (i = 0; i < 6; i++)
697 dev->dev_addr[i] = tuple->TupleData[i+2];
698 return 0;
699};
4638aef4 700
4638aef4 701
dddfbd82
DB
702static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
703{
704 struct net_device *dev = link->priv;
705 int rc;
1da177e4
LT
706
707 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB
708 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
709 return -1;
1da177e4
LT
710
711 if (((manfid == MANFID_OSITECH) &&
712 (cardid == PRODID_OSITECH_SEVEN)) ||
713 ((manfid == MANFID_PSION) &&
714 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR
715 rc = osi_load_firmware(link);
716 if (rc)
dddfbd82 717 return rc;
1da177e4
LT
718 } else if (manfid == MANFID_OSITECH) {
719 /* Make sure both functions are powered up */
9a017a91 720 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
1da177e4 721 /* Now, turn on the interrupt for both card functions */
9a017a91 722 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
dd0fab5b 723 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
9a017a91
DB
724 inw(link->resource[0]->start + OSITECH_AUI_PWR),
725 inw(link->resource[0]->start + OSITECH_RESET_ISR));
1da177e4 726 }
dddfbd82 727 return 0;
1da177e4
LT
728}
729
fba395ee 730static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 731{
98e4c28b
DB
732 struct net_device *dev = link->priv;
733
e2d40963 734 if (link->open)
4bbed523 735 netif_device_detach(dev);
98e4c28b
DB
736
737 return 0;
738}
739
fba395ee 740static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 741{
98e4c28b
DB
742 struct net_device *dev = link->priv;
743 struct smc_private *smc = netdev_priv(dev);
744 int i;
745
e2d40963
DB
746 if ((smc->manfid == MANFID_MEGAHERTZ) &&
747 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
748 mhz_3288_power(link);
749 if (smc->manfid == MANFID_MOTOROLA)
750 mot_config(link);
751 if ((smc->manfid == MANFID_OSITECH) &&
752 (smc->cardid != PRODID_OSITECH_SEVEN)) {
753 /* Power up the card and enable interrupts */
754 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
755 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
756 }
757 if (((smc->manfid == MANFID_OSITECH) &&
758 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
759 ((smc->manfid == MANFID_PSION) &&
760 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR
761 i = osi_load_firmware(link);
762 if (i) {
763 pr_err("smc91c92_cs: Failed to load firmware\n");
764 return i;
98e4c28b
DB
765 }
766 }
e2d40963
DB
767 if (link->open) {
768 smc_reset(dev);
769 netif_device_attach(dev);
770 }
98e4c28b
DB
771
772 return 0;
773}
774
775
1da177e4
LT
776/*======================================================================
777
778 This verifies that the chip is some SMC91cXX variant, and returns
779 the revision code if successful. Otherwise, it returns -ENODEV.
780
781======================================================================*/
782
fba395ee 783static int check_sig(struct pcmcia_device *link)
1da177e4
LT
784{
785 struct net_device *dev = link->priv;
906da809 786 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
787 int width;
788 u_short s;
789
790 SMC_SELECT_BANK(1);
791 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
792 /* Try powering up the chip */
793 outw(0, ioaddr + CONTROL);
794 mdelay(55);
795 }
796
797 /* Try setting bus width */
90abdc3b 798 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
1da177e4
LT
799 s = inb(ioaddr + CONFIG);
800 if (width)
801 s |= CFG_16BIT;
802 else
803 s &= ~CFG_16BIT;
804 outb(s, ioaddr + CONFIG);
805
806 /* Check Base Address Register to make sure bus width is OK */
807 s = inw(ioaddr + BASE_ADDR);
808 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
809 ((s >> 8) != (s & 0xff))) {
810 SMC_SELECT_BANK(3);
811 s = inw(ioaddr + REVISION);
812 return (s & 0xff);
813 }
814
815 if (width) {
4bbed523
DB
816 printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n");
817
fba395ee 818 smc91c92_suspend(link);
fb49fa53 819 pcmcia_fixup_iowidth(link);
fba395ee 820 smc91c92_resume(link);
4bbed523 821 return check_sig(link);
1da177e4
LT
822 }
823 return -ENODEV;
824}
825
826/*======================================================================
827
828 smc91c92_config() is scheduled to run after a CARD_INSERTION event
829 is received, to configure the PCMCIA socket, and to make the
830 ethernet device available to the system.
831
832======================================================================*/
833
15b99ac1 834static int smc91c92_config(struct pcmcia_device *link)
1da177e4 835{
1da177e4
LT
836 struct net_device *dev = link->priv;
837 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT
838 char *name;
839 int i, j, rev;
906da809 840 unsigned int ioaddr;
1da177e4
LT
841 u_long mir;
842
dd0fab5b 843 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 844
efd50585
DB
845 smc->manfid = link->manf_id;
846 smc->cardid = link->card_id;
1da177e4 847
1da177e4
LT
848 if ((smc->manfid == MANFID_OSITECH) &&
849 (smc->cardid != PRODID_OSITECH_SEVEN)) {
850 i = osi_config(link);
851 } else if ((smc->manfid == MANFID_MOTOROLA) ||
852 ((smc->manfid == MANFID_MEGAHERTZ) &&
853 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
854 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
855 i = mhz_mfc_config(link);
856 } else {
857 i = smc_config(link);
858 }
dd0fab5b
DB
859 if (i)
860 goto config_failed;
1da177e4 861
eb14120f 862 i = pcmcia_request_irq(link, smc_interrupt);
dd0fab5b
DB
863 if (i)
864 goto config_failed;
fba395ee 865 i = pcmcia_request_configuration(link, &link->conf);
dd0fab5b
DB
866 if (i)
867 goto config_failed;
1da177e4
LT
868
869 if (smc->manfid == MANFID_MOTOROLA)
870 mot_config(link);
871
eb14120f 872 dev->irq = link->irq;
1da177e4
LT
873
874 if ((if_port >= 0) && (if_port <= 2))
875 dev->if_port = if_port;
876 else
877 printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n");
878
879 switch (smc->manfid) {
880 case MANFID_OSITECH:
881 case MANFID_PSION:
882 i = osi_setup(link, smc->manfid, smc->cardid); break;
883 case MANFID_SMC:
884 case MANFID_NEW_MEDIA:
885 i = smc_setup(link); break;
886 case 0x128: /* For broken Megahertz cards */
887 case MANFID_MEGAHERTZ:
888 i = mhz_setup(link); break;
889 case MANFID_MOTOROLA:
890 default: /* get the hw address from EEPROM */
891 i = mot_setup(link); break;
892 }
893
894 if (i != 0) {
895 printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n");
fb9e2d88 896 goto config_failed;
1da177e4
LT
897 }
898
899 smc->duplex = 0;
900 smc->rx_ovrn = 0;
901
902 rev = check_sig(link);
903 name = "???";
904 if (rev > 0)
905 switch (rev >> 4) {
906 case 3: name = "92"; break;
907 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
908 case 5: name = "95"; break;
909 case 7: name = "100"; break;
910 case 8: name = "100-FD"; break;
911 case 9: name = "110"; break;
912 }
913
914 ioaddr = dev->base_addr;
915 if (rev > 0) {
916 u_long mcr;
917 SMC_SELECT_BANK(0);
918 mir = inw(ioaddr + MEMINFO) & 0xff;
919 if (mir == 0xff) mir++;
920 /* Get scale factor for memory size */
921 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
922 mir *= 128 * (1<<((mcr >> 9) & 7));
923 SMC_SELECT_BANK(1);
924 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
925 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
926 if (smc->manfid == MANFID_OSITECH)
927 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
928 if ((rev >> 4) >= 7)
929 smc->cfg |= CFG_MII_SELECT;
930 } else
931 mir = 0;
932
933 if (smc->cfg & CFG_MII_SELECT) {
934 SMC_SELECT_BANK(3);
935
936 for (i = 0; i < 32; i++) {
937 j = mdio_read(dev, i, 1);
938 if ((j != 0) && (j != 0xffff)) break;
939 }
940 smc->mii_if.phy_id = (i < 32) ? i : -1;
941
942 SMC_SELECT_BANK(0);
943 }
944
dd2e5a15 945 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT
946
947 if (register_netdev(dev) != 0) {
948 printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n");
1da177e4
LT
949 goto config_undo;
950 }
951
1da177e4 952 printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, "
e174961c 953 "hw_addr %pM\n",
0795af57 954 dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq,
e174961c 955 dev->dev_addr);
1da177e4
LT
956
957 if (rev > 0) {
958 if (mir & 0x3ff)
959 printk(KERN_INFO " %lu byte", mir);
960 else
961 printk(KERN_INFO " %lu kb", mir>>10);
962 printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ?
963 "MII" : if_names[dev->if_port]);
964 }
965
966 if (smc->cfg & CFG_MII_SELECT) {
967 if (smc->mii_if.phy_id != -1) {
dd0fab5b 968 dev_dbg(&link->dev, " MII transceiver at index %d, status %x.\n",
1da177e4
LT
969 smc->mii_if.phy_id, j);
970 } else {
971 printk(KERN_NOTICE " No MII transceivers found!\n");
972 }
973 }
15b99ac1 974 return 0;
1da177e4
LT
975
976config_undo:
977 unregister_netdev(dev);
dd0fab5b 978config_failed:
1da177e4 979 smc91c92_release(link);
fb9e2d88 980 free_netdev(dev);
15b99ac1 981 return -ENODEV;
1da177e4
LT
982} /* smc91c92_config */
983
984/*======================================================================
985
986 After a card is removed, smc91c92_release() will unregister the net
987 device, and release the PCMCIA configuration. If the device is
988 still open, this will be postponed until it is closed.
989
990======================================================================*/
991
fba395ee 992static void smc91c92_release(struct pcmcia_device *link)
1da177e4 993{
dd0fab5b 994 dev_dbg(&link->dev, "smc91c92_release\n");
cdb13808 995 if (link->resource[2]->end) {
5f2a71fc
DB
996 struct net_device *dev = link->priv;
997 struct smc_private *smc = netdev_priv(dev);
998 iounmap(smc->base);
999 }
fba395ee 1000 pcmcia_disable_device(link);
1da177e4
LT
1001}
1002
1da177e4
LT
1003/*======================================================================
1004
1005 MII interface support for SMC91cXX based cards
1006======================================================================*/
1007
1008#define MDIO_SHIFT_CLK 0x04
1009#define MDIO_DATA_OUT 0x01
1010#define MDIO_DIR_WRITE 0x08
1011#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
1012#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
1013#define MDIO_DATA_READ 0x02
1014
906da809 1015static void mdio_sync(unsigned int addr)
1da177e4
LT
1016{
1017 int bits;
1018 for (bits = 0; bits < 32; bits++) {
1019 outb(MDIO_DATA_WRITE1, addr);
1020 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
1021 }
1022}
1023
1024static int mdio_read(struct net_device *dev, int phy_id, int loc)
1025{
906da809 1026 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT
1027 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
1028 int i, retval = 0;
1029
1030 mdio_sync(addr);
1031 for (i = 13; i >= 0; i--) {
1032 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1033 outb(dat, addr);
1034 outb(dat | MDIO_SHIFT_CLK, addr);
1035 }
1036 for (i = 19; i > 0; i--) {
1037 outb(0, addr);
1038 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1039 outb(MDIO_SHIFT_CLK, addr);
1040 }
1041 return (retval>>1) & 0xffff;
1042}
1043
1044static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1045{
906da809 1046 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT
1047 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1048 int i;
1049
1050 mdio_sync(addr);
1051 for (i = 31; i >= 0; i--) {
1052 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1053 outb(dat, addr);
1054 outb(dat | MDIO_SHIFT_CLK, addr);
1055 }
1056 for (i = 1; i >= 0; i--) {
1057 outb(0, addr);
1058 outb(MDIO_SHIFT_CLK, addr);
1059 }
1060}
1061
1062/*======================================================================
1063
1064 The driver core code, most of which should be common with a
1065 non-PCMCIA implementation.
1066
1067======================================================================*/
1068
1069#ifdef PCMCIA_DEBUG
1070static void smc_dump(struct net_device *dev)
1071{
906da809 1072 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1073 u_short i, w, save;
1074 save = inw(ioaddr + BANK_SELECT);
1075 for (w = 0; w < 4; w++) {
1076 SMC_SELECT_BANK(w);
1077 printk(KERN_DEBUG "bank %d: ", w);
1078 for (i = 0; i < 14; i += 2)
1079 printk(" %04x", inw(ioaddr + i));
1080 printk("\n");
1081 }
1082 outw(save, ioaddr + BANK_SELECT);
1083}
1084#endif
1085
1086static int smc_open(struct net_device *dev)
1087{
1088 struct smc_private *smc = netdev_priv(dev);
fba395ee 1089 struct pcmcia_device *link = smc->p_dev;
1da177e4 1090
dd0fab5b 1091 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1092 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB
1093#ifdef PCMCIA_DEBUG
1094 smc_dump(dev);
1da177e4
LT
1095#endif
1096
1097 /* Check that the PCMCIA card is still here. */
9940ec36 1098 if (!pcmcia_dev_present(link))
1da177e4
LT
1099 return -ENODEV;
1100 /* Physical device present signature. */
1101 if (check_sig(link) < 0) {
1102 printk("smc91c92_cs: Yikes! Bad chip signature!\n");
1103 return -ENODEV;
1104 }
1105 link->open++;
1106
1107 netif_start_queue(dev);
1108 smc->saved_skb = NULL;
1109 smc->packets_waiting = 0;
1110
1111 smc_reset(dev);
1112 init_timer(&smc->media);
1113 smc->media.function = &media_check;
1114 smc->media.data = (u_long) dev;
1115 smc->media.expires = jiffies + HZ;
1116 add_timer(&smc->media);
1117
1118 return 0;
1119} /* smc_open */
1120
1121/*====================================================================*/
1122
1123static int smc_close(struct net_device *dev)
1124{
1125 struct smc_private *smc = netdev_priv(dev);
fba395ee 1126 struct pcmcia_device *link = smc->p_dev;
906da809 1127 unsigned int ioaddr = dev->base_addr;
1da177e4 1128
dd0fab5b 1129 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT
1130 dev->name, inw(ioaddr + BANK_SELECT));
1131
1132 netif_stop_queue(dev);
1133
1134 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1135 Don't bother to check for chip present. */
1136 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1137 outw(0, ioaddr + INTERRUPT);
1138 SMC_SELECT_BANK(0);
1139 mask_bits(0xff00, ioaddr + RCR);
1140 mask_bits(0xff00, ioaddr + TCR);
1141
1142 /* Put the chip into power-down mode. */
1143 SMC_SELECT_BANK(1);
1144 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1145
1146 link->open--;
1147 del_timer_sync(&smc->media);
1148
1149 return 0;
1150} /* smc_close */
1151
1152/*======================================================================
1153
1154 Transfer a packet to the hardware and trigger the packet send.
1155 This may be called at either from either the Tx queue code
1156 or the interrupt handler.
1157
1158======================================================================*/
1159
1160static void smc_hardware_send_packet(struct net_device * dev)
1161{
1162 struct smc_private *smc = netdev_priv(dev);
1163 struct sk_buff *skb = smc->saved_skb;
906da809 1164 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1165 u_char packet_no;
1166
1167 if (!skb) {
1168 printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name);
1169 return;
1170 }
1171
1172 /* There should be a packet slot waiting. */
1173 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1174 if (packet_no & 0x80) {
1175 /* If not, there is a hardware problem! Likely an ejected card. */
1176 printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation"
1177 " failed, status %#2.2x.\n", dev->name, packet_no);
1178 dev_kfree_skb_irq(skb);
1179 smc->saved_skb = NULL;
1180 netif_start_queue(dev);
1181 return;
1182 }
1183
6fb7298c 1184 dev->stats.tx_bytes += skb->len;
1da177e4
LT
1185 /* The card should use the just-allocated buffer. */
1186 outw(packet_no, ioaddr + PNR_ARR);
1187 /* point to the beginning of the packet */
1188 outw(PTR_AUTOINC , ioaddr + POINTER);
1189
1190 /* Send the packet length (+6 for status, length and ctl byte)
1191 and the status word (set to zeros). */
1192 {
1193 u_char *buf = skb->data;
1194 u_int length = skb->len; /* The chip will pad to ethernet min. */
1195
dd0fab5b 1196 pr_debug("%s: Trying to xmit packet of length %d.\n",
1da177e4
LT
1197 dev->name, length);
1198
1199 /* send the packet length: +6 for status word, length, and ctl */
1200 outw(0, ioaddr + DATA_1);
1201 outw(length + 6, ioaddr + DATA_1);
1202 outsw(ioaddr + DATA_1, buf, length >> 1);
1203
1204 /* The odd last byte, if there is one, goes in the control word. */
1205 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1206 }
1207
1208 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1209 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1210 (inw(ioaddr + INTERRUPT) & 0xff00),
1211 ioaddr + INTERRUPT);
1212
1213 /* The chip does the rest of the work. */
1214 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1215
1216 smc->saved_skb = NULL;
1217 dev_kfree_skb_irq(skb);
1218 dev->trans_start = jiffies;
1219 netif_start_queue(dev);
1da177e4
LT
1220}
1221
1222/*====================================================================*/
1223
1224static void smc_tx_timeout(struct net_device *dev)
1225{
1226 struct smc_private *smc = netdev_priv(dev);
906da809 1227 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1228
1229 printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
1230 "Tx_status %2.2x status %4.4x.\n",
1231 dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1232 dev->stats.tx_errors++;
1da177e4 1233 smc_reset(dev);
1ae5dc34 1234 dev->trans_start = jiffies; /* prevent tx timeout */
1da177e4
LT
1235 smc->saved_skb = NULL;
1236 netif_wake_queue(dev);
1237}
1238
dbf02fae
SH
1239static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1240 struct net_device *dev)
1da177e4
LT
1241{
1242 struct smc_private *smc = netdev_priv(dev);
906da809 1243 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1244 u_short num_pages;
1245 short time_out, ir;
85e27831 1246 unsigned long flags;
1da177e4
LT
1247
1248 netif_stop_queue(dev);
1249
dd0fab5b 1250 pr_debug("%s: smc_start_xmit(length = %d) called,"
1da177e4
LT
1251 " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2));
1252
1253 if (smc->saved_skb) {
1254 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1255 dev->stats.tx_aborted_errors++;
1da177e4
LT
1256 printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n",
1257 dev->name);
5b548140 1258 return NETDEV_TX_BUSY;
1da177e4
LT
1259 }
1260 smc->saved_skb = skb;
1261
1262 num_pages = skb->len >> 8;
1263
1264 if (num_pages > 7) {
1265 printk(KERN_ERR "%s: Far too big packet error.\n", dev->name);
1266 dev_kfree_skb (skb);
1267 smc->saved_skb = NULL;
6fb7298c 1268 dev->stats.tx_dropped++;
6ed10654 1269 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT
1270 }
1271 /* A packet is now waiting. */
1272 smc->packets_waiting++;
1273
85e27831 1274 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
1275 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1276
1277 /* need MC_RESET to keep the memory consistent. errata? */
1278 if (smc->rx_ovrn) {
1279 outw(MC_RESET, ioaddr + MMU_CMD);
1280 smc->rx_ovrn = 0;
1281 }
1282
1283 /* Allocate the memory; send the packet now if we win. */
1284 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1285 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1286 ir = inw(ioaddr+INTERRUPT);
1287 if (ir & IM_ALLOC_INT) {
1288 /* Acknowledge the interrupt, send the packet. */
1289 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1290 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1291 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1292 return NETDEV_TX_OK;
1da177e4
LT
1293 }
1294 }
1295
1296 /* Otherwise defer until the Tx-space-allocated interrupt. */
dd0fab5b 1297 pr_debug("%s: memory allocation deferred.\n", dev->name);
1da177e4 1298 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1299 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1300
6ed10654 1301 return NETDEV_TX_OK;
1da177e4
LT
1302}
1303
1304/*======================================================================
1305
1306 Handle a Tx anomolous event. Entered while in Window 2.
1307
1308======================================================================*/
1309
1310static void smc_tx_err(struct net_device * dev)
1311{
1312 struct smc_private *smc = netdev_priv(dev);
906da809 1313 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1314 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1315 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1316 int tx_status;
1317
1318 /* select this as the packet to read from */
1319 outw(packet_no, ioaddr + PNR_ARR);
1320
1321 /* read the first word from this packet */
1322 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1323
1324 tx_status = inw(ioaddr + DATA_1);
1325
6fb7298c
SH
1326 dev->stats.tx_errors++;
1327 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1328 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1329 if (tx_status & TS_16COL) {
6fb7298c 1330 dev->stats.tx_aborted_errors++;
1da177e4
LT
1331 smc->tx_err++;
1332 }
1333
1334 if (tx_status & TS_SUCCESS) {
1335 printk(KERN_NOTICE "%s: Successful packet caused error "
1336 "interrupt?\n", dev->name);
1337 }
1338 /* re-enable transmit */
1339 SMC_SELECT_BANK(0);
1340 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1341 SMC_SELECT_BANK(2);
1342
1343 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1344
1345 /* one less packet waiting for me */
1346 smc->packets_waiting--;
1347
1348 outw(saved_packet, ioaddr + PNR_ARR);
1da177e4
LT
1349}
1350
1351/*====================================================================*/
1352
1353static void smc_eph_irq(struct net_device *dev)
1354{
1355 struct smc_private *smc = netdev_priv(dev);
906da809 1356 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1357 u_short card_stats, ephs;
1358
1359 SMC_SELECT_BANK(0);
1360 ephs = inw(ioaddr + EPH);
dd0fab5b 1361 pr_debug("%s: Ethernet protocol handler interrupt, status"
1da177e4
LT
1362 " %4.4x.\n", dev->name, ephs);
1363 /* Could be a counter roll-over warning: update stats. */
1364 card_stats = inw(ioaddr + COUNTER);
1365 /* single collisions */
6fb7298c 1366 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT
1367 card_stats >>= 4;
1368 /* multiple collisions */
6fb7298c 1369 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT
1370#if 0 /* These are for when linux supports these statistics */
1371 card_stats >>= 4; /* deferred */
1372 card_stats >>= 4; /* excess deferred */
1373#endif
1374 /* If we had a transmit error we must re-enable the transmitter. */
1375 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1376
1377 /* Clear a link error interrupt. */
1378 SMC_SELECT_BANK(1);
1379 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1380 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1381 ioaddr + CONTROL);
1382 SMC_SELECT_BANK(2);
1383}
1384
1385/*====================================================================*/
1386
7d12e780 1387static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT
1388{
1389 struct net_device *dev = dev_id;
1390 struct smc_private *smc = netdev_priv(dev);
906da809 1391 unsigned int ioaddr;
1da177e4
LT
1392 u_short saved_bank, saved_pointer, mask, status;
1393 unsigned int handled = 1;
1394 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1395
1396 if (!netif_device_present(dev))
1397 return IRQ_NONE;
1398
1399 ioaddr = dev->base_addr;
1400
dd0fab5b 1401 pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1da177e4
LT
1402 irq, ioaddr);
1403
85e27831 1404 spin_lock(&smc->lock);
1da177e4
LT
1405 smc->watchdog = 0;
1406 saved_bank = inw(ioaddr + BANK_SELECT);
1407 if ((saved_bank & 0xff00) != 0x3300) {
1408 /* The device does not exist -- the card could be off-line, or
1409 maybe it has been ejected. */
dd0fab5b 1410 pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1da177e4
LT
1411 "/ejected device.\n", dev->name, irq);
1412 handled = 0;
1413 goto irq_done;
1414 }
1415
1416 SMC_SELECT_BANK(2);
1417 saved_pointer = inw(ioaddr + POINTER);
1418 mask = inw(ioaddr + INTERRUPT) >> 8;
1419 /* clear all interrupts */
1420 outw(0, ioaddr + INTERRUPT);
1421
1422 do { /* read the status flag, and mask it */
1423 status = inw(ioaddr + INTERRUPT) & 0xff;
dd0fab5b 1424 pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1da177e4
LT
1425 status, mask);
1426 if ((status & mask) == 0) {
1427 if (bogus_cnt == INTR_WORK)
1428 handled = 0;
1429 break;
1430 }
1431 if (status & IM_RCV_INT) {
1432 /* Got a packet(s). */
1433 smc_rx(dev);
1434 }
1435 if (status & IM_TX_INT) {
1436 smc_tx_err(dev);
1437 outw(IM_TX_INT, ioaddr + INTERRUPT);
1438 }
1439 status &= mask;
1440 if (status & IM_TX_EMPTY_INT) {
1441 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1442 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1443 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT
1444 smc->packets_waiting = 0;
1445 }
1446 if (status & IM_ALLOC_INT) {
1447 /* Clear this interrupt so it doesn't happen again */
1448 mask &= ~IM_ALLOC_INT;
1449
1450 smc_hardware_send_packet(dev);
1451
1452 /* enable xmit interrupts based on this */
1453 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1454
1455 /* and let the card send more packets to me */
1456 netif_wake_queue(dev);
1457 }
1458 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH
1459 dev->stats.rx_errors++;
1460 dev->stats.rx_fifo_errors++;
1da177e4
LT
1461 if (smc->duplex)
1462 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1463 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1464 }
1465 if (status & IM_EPH_INT)
1466 smc_eph_irq(dev);
1467 } while (--bogus_cnt);
1468
dd0fab5b 1469 pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1da177e4
LT
1470 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1471
1472 /* restore state register */
1473 outw((mask<<8), ioaddr + INTERRUPT);
1474 outw(saved_pointer, ioaddr + POINTER);
1475 SMC_SELECT_BANK(saved_bank);
1476
dd0fab5b 1477 pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1da177e4
LT
1478
1479irq_done:
1480
1481 if ((smc->manfid == MANFID_OSITECH) &&
1482 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1483 /* Retrigger interrupt if needed */
1484 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1485 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1486 }
1487 if (smc->manfid == MANFID_MOTOROLA) {
1488 u_char cor;
1489 cor = readb(smc->base + MOT_UART + CISREG_COR);
1490 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1491 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1492 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1493 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1494 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1495 }
9735b7ef
KK
1496
1497 if ((smc->base != NULL) && /* Megahertz MFC's */
1498 (smc->manfid == MANFID_MEGAHERTZ) &&
1499 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1500
1501 u_char tmp;
1502 tmp = readb(smc->base+MEGAHERTZ_ISR);
1503 tmp = readb(smc->base+MEGAHERTZ_ISR);
1504
1505 /* Retrigger interrupt if needed */
1506 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1507 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1da177e4 1508 }
9735b7ef 1509
85e27831 1510 spin_unlock(&smc->lock);
1da177e4
LT
1511 return IRQ_RETVAL(handled);
1512}
1513
1514/*====================================================================*/
1515
1516static void smc_rx(struct net_device *dev)
1517{
906da809 1518 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1519 int rx_status;
1520 int packet_length; /* Caution: not frame length, rather words
1521 to transfer from the chip. */
1522
1523 /* Assertion: we are in Window 2. */
1524
1525 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1526 printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n",
1527 dev->name);
1528 return;
1529 }
1530
1531 /* Reset the read pointer, and read the status and packet length. */
1532 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1533 rx_status = inw(ioaddr + DATA_1);
1534 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1535
dd0fab5b 1536 pr_debug("%s: Receive status %4.4x length %d.\n",
1da177e4
LT
1537 dev->name, rx_status, packet_length);
1538
1539 if (!(rx_status & RS_ERRORS)) {
1540 /* do stuff to make a new packet */
1541 struct sk_buff *skb;
1542
1543 /* Note: packet_length adds 5 or 6 extra bytes here! */
1544 skb = dev_alloc_skb(packet_length+2);
1545
1546 if (skb == NULL) {
dd0fab5b 1547 pr_debug("%s: Low memory, packet dropped.\n", dev->name);
6fb7298c 1548 dev->stats.rx_dropped++;
1da177e4
LT
1549 outw(MC_RELEASE, ioaddr + MMU_CMD);
1550 return;
1551 }
1552
1553 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1554 skb_reserve(skb, 2);
1555 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1556 (packet_length+1)>>1);
1557 skb->protocol = eth_type_trans(skb, dev);
1558
1da177e4
LT
1559 netif_rx(skb);
1560 dev->last_rx = jiffies;
6fb7298c
SH
1561 dev->stats.rx_packets++;
1562 dev->stats.rx_bytes += packet_length;
1da177e4 1563 if (rx_status & RS_MULTICAST)
6fb7298c 1564 dev->stats.multicast++;
1da177e4
LT
1565 } else {
1566 /* error ... */
6fb7298c 1567 dev->stats.rx_errors++;
1da177e4 1568
6fb7298c 1569 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1570 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH
1571 dev->stats.rx_length_errors++;
1572 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT
1573 }
1574 /* Let the MMU free the memory of this packet. */
1575 outw(MC_RELEASE, ioaddr + MMU_CMD);
1da177e4
LT
1576}
1577
1da177e4
LT
1578/*======================================================================
1579
1580 Set the receive mode.
1581
1582 This routine is used by both the protocol level to notify us of
1583 promiscuous/multicast mode changes, and by the open/reset code to
1584 initialize the Rx registers. We always set the multicast list and
1585 leave the receiver running.
1586
1587======================================================================*/
1588
1589static void set_rx_mode(struct net_device *dev)
1590{
906da809 1591 unsigned int ioaddr = dev->base_addr;
1da177e4 1592 struct smc_private *smc = netdev_priv(dev);
a6d37024 1593 unsigned char multicast_table[8];
1da177e4
LT
1594 unsigned long flags;
1595 u_short rx_cfg_setting;
a6d37024
KK
1596 int i;
1597
1598 memset(multicast_table, 0, sizeof(multicast_table));
1da177e4
LT
1599
1600 if (dev->flags & IFF_PROMISC) {
1da177e4
LT
1601 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1602 } else if (dev->flags & IFF_ALLMULTI)
1603 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1604 else {
4cd24eaf 1605 if (!netdev_mc_empty(dev)) {
22bedad3 1606 struct netdev_hw_addr *ha;
91fea585 1607
22bedad3
JP
1608 netdev_for_each_mc_addr(ha, dev) {
1609 u_int position = ether_crc(6, ha->addr);
91fea585
JP
1610 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1611 }
1da177e4
LT
1612 }
1613 rx_cfg_setting = RxStripCRC | RxEnable;
1614 }
1615
1616 /* Load MC table and Rx setting into the chip without interrupts. */
1617 spin_lock_irqsave(&smc->lock, flags);
1618 SMC_SELECT_BANK(3);
a6d37024
KK
1619 for (i = 0; i < 8; i++)
1620 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1da177e4
LT
1621 SMC_SELECT_BANK(0);
1622 outw(rx_cfg_setting, ioaddr + RCR);
1623 SMC_SELECT_BANK(2);
1624 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1625}
1626
1627/*======================================================================
1628
1629 Senses when a card's config changes. Here, it's coax or TP.
1630
1631======================================================================*/
1632
1633static int s9k_config(struct net_device *dev, struct ifmap *map)
1634{
1635 struct smc_private *smc = netdev_priv(dev);
1636 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1637 if (smc->cfg & CFG_MII_SELECT)
1638 return -EOPNOTSUPP;
1639 else if (map->port > 2)
1640 return -EINVAL;
1641 dev->if_port = map->port;
1642 printk(KERN_INFO "%s: switched to %s port\n",
1643 dev->name, if_names[dev->if_port]);
1644 smc_reset(dev);
1645 }
1646 return 0;
1647}
1648
1649/*======================================================================
1650
1651 Reset the chip, reloading every register that might be corrupted.
1652
1653======================================================================*/
1654
1655/*
1656 Set transceiver type, perhaps to something other than what the user
1657 specified in dev->if_port.
1658*/
1659static void smc_set_xcvr(struct net_device *dev, int if_port)
1660{
1661 struct smc_private *smc = netdev_priv(dev);
906da809 1662 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1663 u_short saved_bank;
1664
1665 saved_bank = inw(ioaddr + BANK_SELECT);
1666 SMC_SELECT_BANK(1);
1667 if (if_port == 2) {
1668 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1669 if ((smc->manfid == MANFID_OSITECH) &&
1670 (smc->cardid != PRODID_OSITECH_SEVEN))
1671 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1672 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1673 } else {
1674 outw(smc->cfg, ioaddr + CONFIG);
1675 if ((smc->manfid == MANFID_OSITECH) &&
1676 (smc->cardid != PRODID_OSITECH_SEVEN))
1677 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1678 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1679 }
1680 SMC_SELECT_BANK(saved_bank);
1681}
1682
1683static void smc_reset(struct net_device *dev)
1684{
906da809 1685 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1686 struct smc_private *smc = netdev_priv(dev);
1687 int i;
1688
dd0fab5b 1689 pr_debug("%s: smc91c92 reset called.\n", dev->name);
1da177e4
LT
1690
1691 /* The first interaction must be a write to bring the chip out
1692 of sleep mode. */
1693 SMC_SELECT_BANK(0);
1694 /* Reset the chip. */
1695 outw(RCR_SOFTRESET, ioaddr + RCR);
1696 udelay(10);
1697
1698 /* Clear the transmit and receive configuration registers. */
1699 outw(RCR_CLEAR, ioaddr + RCR);
1700 outw(TCR_CLEAR, ioaddr + TCR);
1701
1702 /* Set the Window 1 control, configuration and station addr registers.
1703 No point in writing the I/O base register ;-> */
1704 SMC_SELECT_BANK(1);
d6e05edc 1705 /* Automatically release successfully transmitted packets,
1da177e4
LT
1706 Accept link errors, counter and Tx error interrupts. */
1707 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1708 ioaddr + CONTROL);
1709 smc_set_xcvr(dev, dev->if_port);
1710 if ((smc->manfid == MANFID_OSITECH) &&
1711 (smc->cardid != PRODID_OSITECH_SEVEN))
1712 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1713 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1714 ioaddr - 0x10 + OSITECH_AUI_PWR);
1715
1716 /* Fill in the physical address. The databook is wrong about the order! */
1717 for (i = 0; i < 6; i += 2)
1718 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1719 ioaddr + ADDR0 + i);
1720
1721 /* Reset the MMU */
1722 SMC_SELECT_BANK(2);
1723 outw(MC_RESET, ioaddr + MMU_CMD);
1724 outw(0, ioaddr + INTERRUPT);
1725
1726 /* Re-enable the chip. */
1727 SMC_SELECT_BANK(0);
1728 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1729 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1730 set_rx_mode(dev);
1731
1732 if (smc->cfg & CFG_MII_SELECT) {
1733 SMC_SELECT_BANK(3);
1734
1735 /* Reset MII */
1736 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1737
1738 /* Advertise 100F, 100H, 10F, 10H */
1739 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1740
1741 /* Restart MII autonegotiation */
1742 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1743 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1744 }
1745
1746 /* Enable interrupts. */
1747 SMC_SELECT_BANK(2);
1748 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1749 ioaddr + INTERRUPT);
1750}
1751
1752/*======================================================================
1753
1754 Media selection timer routine
1755
1756======================================================================*/
1757
1758static void media_check(u_long arg)
1759{
1760 struct net_device *dev = (struct net_device *) arg;
1761 struct smc_private *smc = netdev_priv(dev);
906da809 1762 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1763 u_short i, media, saved_bank;
1764 u_short link;
85e27831
K
1765 unsigned long flags;
1766
1767 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
1768
1769 saved_bank = inw(ioaddr + BANK_SELECT);
1770
1771 if (!netif_device_present(dev))
1772 goto reschedule;
1773
1774 SMC_SELECT_BANK(2);
1775
1776 /* need MC_RESET to keep the memory consistent. errata? */
1777 if (smc->rx_ovrn) {
1778 outw(MC_RESET, ioaddr + MMU_CMD);
1779 smc->rx_ovrn = 0;
1780 }
1781 i = inw(ioaddr + INTERRUPT);
1782 SMC_SELECT_BANK(0);
1783 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1784 SMC_SELECT_BANK(1);
1785 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1786
2a915157
KK
1787 SMC_SELECT_BANK(saved_bank);
1788 spin_unlock_irqrestore(&smc->lock, flags);
1789
1da177e4
LT
1790 /* Check for pending interrupt with watchdog flag set: with
1791 this, we can limp along even if the interrupt is blocked */
1792 if (smc->watchdog++ && ((i>>8) & i)) {
1793 if (!smc->fast_poll)
1794 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
2a915157 1795 local_irq_save(flags);
e363d138 1796 smc_interrupt(dev->irq, dev);
2a915157 1797 local_irq_restore(flags);
1da177e4
LT
1798 smc->fast_poll = HZ;
1799 }
1800 if (smc->fast_poll) {
1801 smc->fast_poll--;
1802 smc->media.expires = jiffies + HZ/100;
1803 add_timer(&smc->media);
1da177e4
LT
1804 return;
1805 }
1806
2a915157
KK
1807 spin_lock_irqsave(&smc->lock, flags);
1808
1809 saved_bank = inw(ioaddr + BANK_SELECT);
1810
1da177e4
LT
1811 if (smc->cfg & CFG_MII_SELECT) {
1812 if (smc->mii_if.phy_id < 0)
1813 goto reschedule;
1814
1815 SMC_SELECT_BANK(3);
1816 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1817 if (!link || (link == 0xffff)) {
1818 printk(KERN_INFO "%s: MII is missing!\n", dev->name);
1819 smc->mii_if.phy_id = -1;
1820 goto reschedule;
1821 }
1822
1823 link &= 0x0004;
1824 if (link != smc->link_status) {
1825 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1826 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1827 (link) ? "found" : "lost");
1828 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1829 ? TCR_FDUPLX : 0);
1830 if (link) {
1831 printk(KERN_INFO "%s: autonegotiation complete: "
1832 "%sbaseT-%cD selected\n", dev->name,
1833 ((p & 0x0180) ? "100" : "10"),
1834 (smc->duplex ? 'F' : 'H'));
1835 }
1836 SMC_SELECT_BANK(0);
1837 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1838 smc->link_status = link;
1839 }
1840 goto reschedule;
1841 }
1842
1843 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1844 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT
1845 if (smc->tx_err || (smc->media_status & EPH_16COL))
1846 media |= EPH_16COL;
1847 }
1848 smc->tx_err = 0;
1849
1850 if (media != smc->media_status) {
1851 if ((media & smc->media_status & 1) &&
1852 ((smc->media_status ^ media) & EPH_LINK_OK))
1853 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1854 (smc->media_status & EPH_LINK_OK ? "lost" : "found"));
1855 else if ((media & smc->media_status & 2) &&
1856 ((smc->media_status ^ media) & EPH_16COL))
1857 printk(KERN_INFO "%s: coax cable %s\n", dev->name,
1858 (media & EPH_16COL ? "problem" : "ok"));
1859 if (dev->if_port == 0) {
1860 if (media & 1) {
1861 if (media & EPH_LINK_OK)
1862 printk(KERN_INFO "%s: flipped to 10baseT\n",
1863 dev->name);
1864 else
1865 smc_set_xcvr(dev, 2);
1866 } else {
1867 if (media & EPH_16COL)
1868 smc_set_xcvr(dev, 1);
1869 else
1870 printk(KERN_INFO "%s: flipped to 10base2\n",
1871 dev->name);
1872 }
1873 }
1874 smc->media_status = media;
1875 }
1876
1877reschedule:
1878 smc->media.expires = jiffies + HZ;
1879 add_timer(&smc->media);
1880 SMC_SELECT_BANK(saved_bank);
85e27831 1881 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1882}
1883
1884static int smc_link_ok(struct net_device *dev)
1885{
906da809 1886 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1887 struct smc_private *smc = netdev_priv(dev);
1888
1889 if (smc->cfg & CFG_MII_SELECT) {
1890 return mii_link_ok(&smc->mii_if);
1891 } else {
1892 SMC_SELECT_BANK(0);
1893 return inw(ioaddr + EPH) & EPH_LINK_OK;
1894 }
1895}
1896
1897static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1898{
1899 u16 tmp;
906da809 1900 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1901
1902 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1903 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1904
1905 SMC_SELECT_BANK(1);
1906 tmp = inw(ioaddr + CONFIG);
1907 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1908 ecmd->transceiver = XCVR_INTERNAL;
1909 ecmd->speed = SPEED_10;
1910 ecmd->phy_address = ioaddr + MGMT;
1911
1912 SMC_SELECT_BANK(0);
1913 tmp = inw(ioaddr + TCR);
1914 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1915
1916 return 0;
1917}
1918
1919static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1920{
1921 u16 tmp;
906da809 1922 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1923
1924 if (ecmd->speed != SPEED_10)
1925 return -EINVAL;
1926 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1927 return -EINVAL;
1928 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1929 return -EINVAL;
1930 if (ecmd->transceiver != XCVR_INTERNAL)
1931 return -EINVAL;
1932
1933 if (ecmd->port == PORT_AUI)
1934 smc_set_xcvr(dev, 1);
1935 else
1936 smc_set_xcvr(dev, 0);
1937
1938 SMC_SELECT_BANK(0);
1939 tmp = inw(ioaddr + TCR);
1940 if (ecmd->duplex == DUPLEX_FULL)
1941 tmp |= TCR_FDUPLX;
1942 else
1943 tmp &= ~TCR_FDUPLX;
1944 outw(tmp, ioaddr + TCR);
1945
1946 return 0;
1947}
1948
1949static int check_if_running(struct net_device *dev)
1950{
1951 if (!netif_running(dev))
1952 return -EINVAL;
1953 return 0;
1954}
1955
1956static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1957{
1958 strcpy(info->driver, DRV_NAME);
1959 strcpy(info->version, DRV_VERSION);
1960}
1961
1962static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1963{
1964 struct smc_private *smc = netdev_priv(dev);
906da809 1965 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1966 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1967 int ret;
2a915157 1968 unsigned long flags;
1da177e4 1969
2a915157 1970 spin_lock_irqsave(&smc->lock, flags);
85e27831 1971 SMC_SELECT_BANK(3);
1da177e4
LT
1972 if (smc->cfg & CFG_MII_SELECT)
1973 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1974 else
1975 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1976 SMC_SELECT_BANK(saved_bank);
2a915157 1977 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1978 return ret;
1979}
1980
1981static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1982{
1983 struct smc_private *smc = netdev_priv(dev);
906da809 1984 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1985 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1986 int ret;
2a915157 1987 unsigned long flags;
1da177e4 1988
2a915157 1989 spin_lock_irqsave(&smc->lock, flags);
85e27831 1990 SMC_SELECT_BANK(3);
1da177e4
LT
1991 if (smc->cfg & CFG_MII_SELECT)
1992 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
1993 else
1994 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 1995 SMC_SELECT_BANK(saved_bank);
2a915157 1996 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1997 return ret;
1998}
1999
2000static u32 smc_get_link(struct net_device *dev)
2001{
2002 struct smc_private *smc = netdev_priv(dev);
906da809 2003 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
2004 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2005 u32 ret;
2a915157 2006 unsigned long flags;
1da177e4 2007
2a915157 2008 spin_lock_irqsave(&smc->lock, flags);
85e27831 2009 SMC_SELECT_BANK(3);
1da177e4 2010 ret = smc_link_ok(dev);
1da177e4 2011 SMC_SELECT_BANK(saved_bank);
2a915157 2012 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
2013 return ret;
2014}
2015
1da177e4
LT
2016static int smc_nway_reset(struct net_device *dev)
2017{
2018 struct smc_private *smc = netdev_priv(dev);
2019 if (smc->cfg & CFG_MII_SELECT) {
906da809 2020 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
2021 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2022 int res;
2023
2024 SMC_SELECT_BANK(3);
2025 res = mii_nway_restart(&smc->mii_if);
2026 SMC_SELECT_BANK(saved_bank);
2027
2028 return res;
2029 } else
2030 return -EOPNOTSUPP;
2031}
2032
7282d491 2033static const struct ethtool_ops ethtool_ops = {
1da177e4
LT
2034 .begin = check_if_running,
2035 .get_drvinfo = smc_get_drvinfo,
2036 .get_settings = smc_get_settings,
2037 .set_settings = smc_set_settings,
2038 .get_link = smc_get_link,
1da177e4
LT
2039 .nway_reset = smc_nway_reset,
2040};
2041
2042static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2043{
2044 struct smc_private *smc = netdev_priv(dev);
2045 struct mii_ioctl_data *mii = if_mii(rq);
2046 int rc = 0;
2047 u16 saved_bank;
906da809 2048 unsigned int ioaddr = dev->base_addr;
2a915157 2049 unsigned long flags;
1da177e4
LT
2050
2051 if (!netif_running(dev))
2052 return -EINVAL;
2053
2a915157 2054 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
2055 saved_bank = inw(ioaddr + BANK_SELECT);
2056 SMC_SELECT_BANK(3);
2057 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2058 SMC_SELECT_BANK(saved_bank);
2a915157 2059 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
2060 return rc;
2061}
2062
5c672220
DB
2063static struct pcmcia_device_id smc91c92_ids[] = {
2064 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2065 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2066 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2067 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2068 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2069 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2070 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2071 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K
2072 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2073 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB
2074 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2075 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2076 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2077 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2078 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2079 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2080 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2081 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2082 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K
2083 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2084 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB
2085 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2086 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2087 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2088 /* These conflict with other cards! */
2089 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2090 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2091 PCMCIA_DEVICE_NULL,
2092};
2093MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2094
1da177e4
LT
2095static struct pcmcia_driver smc91c92_cs_driver = {
2096 .owner = THIS_MODULE,
2097 .drv = {
2098 .name = "smc91c92_cs",
2099 },
15b99ac1 2100 .probe = smc91c92_probe,
cc3b4866 2101 .remove = smc91c92_detach,
5c672220 2102 .id_table = smc91c92_ids,
98e4c28b
DB
2103 .suspend = smc91c92_suspend,
2104 .resume = smc91c92_resume,
1da177e4
LT
2105};
2106
2107static int __init init_smc91c92_cs(void)
2108{
2109 return pcmcia_register_driver(&smc91c92_cs_driver);
2110}
2111
2112static void __exit exit_smc91c92_cs(void)
2113{
2114 pcmcia_unregister_driver(&smc91c92_cs_driver);
1da177e4
LT
2115}
2116
2117module_init(init_smc91c92_cs);
2118module_exit(exit_smc91c92_cs);
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