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net/pcmcia: convert to use netdev_for_each_mc_addr
[deliverable/linux.git] / drivers / net / pcmcia / smc91c92_cs.c
CommitLineData
1da177e4
LT		 1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/crc32.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/if_arp.h>
41#include <linux/ioport.h>
42#include <linux/ethtool.h>
43#include <linux/mii.h>
4851d3aa 44#include <linux/jiffies.h>
75bf758f 45#include <linux/firmware.h>
1da177e4 46
1da177e4
LT		 47#include <pcmcia/cs_types.h>
48#include <pcmcia/cs.h>
49#include <pcmcia/cistpl.h>
50#include <pcmcia/cisreg.h>
51#include <pcmcia/ciscode.h>
52#include <pcmcia/ds.h>
50db3fdb 53#include <pcmcia/ss.h>
1da177e4
LT		 54
55#include <asm/io.h>
56#include <asm/system.h>
57#include <asm/uaccess.h>
58
1da177e4
LT		 59/*====================================================================*/
60
f71e1309 61static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 62
75bf758f
JSR		 63/* Firmware name */
64#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
65
1da177e4
LT		 66/* Module parameters */
67
68MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
69MODULE_LICENSE("GPL");
75bf758f 70MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT		 71
72#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
73
74/*
75 Transceiver/media type.
76 0 = auto
77 1 = 10baseT (and autoselect if #define AUTOSELECT),
78 2 = AUI/10base2,
79*/
80INT_MODULE_PARM(if_port, 0);
81
1da177e4
LT		 82
83#define DRV_NAME "smc91c92_cs"
d5b20697 84#define DRV_VERSION "1.123"
1da177e4
LT		 85
86/*====================================================================*/
87
88/* Operational parameter that usually are not changed. */
89
90/* Time in jiffies before concluding Tx hung */
91#define TX_TIMEOUT ((400*HZ)/1000)
92
93/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
94#define INTR_WORK 4
95
96/* Times to check the check the chip before concluding that it doesn't
97 currently have room for another Tx packet. */
98#define MEMORY_WAIT_TIME 8
99
1da177e4 100struct smc_private {
fd238232 101 struct pcmcia_device *p_dev;
1da177e4
LT		 102 spinlock_t lock;
103 u_short manfid;
104 u_short cardid;
6fb7298c 105
1da177e4
LT		 106 dev_node_t node;
107 struct sk_buff *saved_skb;
108 int packets_waiting;
109 void __iomem *base;
110 u_short cfg;
111 struct timer_list media;
112 int watchdog, tx_err;
113 u_short media_status;
114 u_short fast_poll;
115 u_short link_status;
116 struct mii_if_info mii_if;
117 int duplex;
118 int rx_ovrn;
119};
120
121/* Special definitions for Megahertz multifunction cards */
122#define MEGAHERTZ_ISR 0x0380
123
124/* Special function registers for Motorola Mariner */
125#define MOT_LAN 0x0000
126#define MOT_UART 0x0020
127#define MOT_EEPROM 0x20
128
129#define MOT_NORMAL \
130(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
131
132/* Special function registers for Ositech cards */
133#define OSITECH_AUI_CTL 0x0c
134#define OSITECH_PWRDOWN 0x0d
135#define OSITECH_RESET 0x0e
136#define OSITECH_ISR 0x0f
137#define OSITECH_AUI_PWR 0x0c
138#define OSITECH_RESET_ISR 0x0e
139
140#define OSI_AUI_PWR 0x40
141#define OSI_LAN_PWRDOWN 0x02
142#define OSI_MODEM_PWRDOWN 0x01
143#define OSI_LAN_RESET 0x02
144#define OSI_MODEM_RESET 0x01
145
146/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
147#define BANK_SELECT 14 /* Window select register. */
148#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
149
150/* Bank 0 registers. */
151#define TCR 0 /* transmit control register */
152#define TCR_CLEAR 0 /* do NOTHING */
153#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
154#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
155#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
156#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
157#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
158
159#define EPH 2 /* Ethernet Protocol Handler report. */
160#define EPH_TX_SUC 0x0001
161#define EPH_SNGLCOL 0x0002
162#define EPH_MULCOL 0x0004
163#define EPH_LTX_MULT 0x0008
164#define EPH_16COL 0x0010
165#define EPH_SQET 0x0020
166#define EPH_LTX_BRD 0x0040
167#define EPH_TX_DEFR 0x0080
168#define EPH_LAT_COL 0x0200
169#define EPH_LOST_CAR 0x0400
170#define EPH_EXC_DEF 0x0800
171#define EPH_CTR_ROL 0x1000
172#define EPH_RX_OVRN 0x2000
173#define EPH_LINK_OK 0x4000
174#define EPH_TX_UNRN 0x8000
175#define MEMINFO 8 /* Memory Information Register */
176#define MEMCFG 10 /* Memory Configuration Register */
177
178/* Bank 1 registers. */
179#define CONFIG 0
180#define CFG_MII_SELECT 0x8000 /* 91C100 only */
181#define CFG_NO_WAIT 0x1000
182#define CFG_FULL_STEP 0x0400
183#define CFG_SET_SQLCH 0x0200
184#define CFG_AUI_SELECT 0x0100
185#define CFG_16BIT 0x0080
186#define CFG_DIS_LINK 0x0040
187#define CFG_STATIC 0x0030
188#define CFG_IRQ_SEL_1 0x0004
189#define CFG_IRQ_SEL_0 0x0002
190#define BASE_ADDR 2
191#define ADDR0 4
192#define GENERAL 10
193#define CONTROL 12
194#define CTL_STORE 0x0001
195#define CTL_RELOAD 0x0002
196#define CTL_EE_SELECT 0x0004
197#define CTL_TE_ENABLE 0x0020
198#define CTL_CR_ENABLE 0x0040
199#define CTL_LE_ENABLE 0x0080
200#define CTL_AUTO_RELEASE 0x0800
201#define CTL_POWERDOWN 0x2000
202
203/* Bank 2 registers. */
204#define MMU_CMD 0
205#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
206#define MC_RESET 0x40
207#define MC_RELEASE 0x80 /* remove and release the current rx packet */
208#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
209#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
210#define PNR_ARR 2
211#define FIFO_PORTS 4
212#define FP_RXEMPTY 0x8000
213#define POINTER 6
214#define PTR_AUTO_INC 0x0040
215#define PTR_READ 0x2000
216#define PTR_AUTOINC 0x4000
217#define PTR_RCV 0x8000
218#define DATA_1 8
219#define INTERRUPT 12
220#define IM_RCV_INT 0x1
221#define IM_TX_INT 0x2
222#define IM_TX_EMPTY_INT 0x4
223#define IM_ALLOC_INT 0x8
224#define IM_RX_OVRN_INT 0x10
225#define IM_EPH_INT 0x20
226
227#define RCR 4
228enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
229 RxEnable = 0x0100, RxStripCRC = 0x0200};
230#define RCR_SOFTRESET 0x8000 /* resets the chip */
231#define RCR_STRIP_CRC 0x200 /* strips CRC */
232#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
233#define RCR_ALMUL 0x4 /* receive all multicast packets */
234#define RCR_PROMISC 0x2 /* enable promiscuous mode */
235
236/* the normal settings for the RCR register : */
237#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
238#define RCR_CLEAR 0x0 /* set it to a base state */
239#define COUNTER 6
240
241/* BANK 3 -- not the same values as in smc9194! */
242#define MULTICAST0 0
243#define MULTICAST2 2
244#define MULTICAST4 4
245#define MULTICAST6 6
246#define MGMT 8
247#define REVISION 0x0a
248
249/* Transmit status bits. */
250#define TS_SUCCESS 0x0001
251#define TS_16COL 0x0010
252#define TS_LATCOL 0x0200
253#define TS_LOSTCAR 0x0400
254
255/* Receive status bits. */
256#define RS_ALGNERR 0x8000
257#define RS_BADCRC 0x2000
258#define RS_ODDFRAME 0x1000
259#define RS_TOOLONG 0x0800
260#define RS_TOOSHORT 0x0400
261#define RS_MULTICAST 0x0001
262#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
263
264#define set_bits(v, p) outw(inw(p)|(v), (p))
265#define mask_bits(v, p) outw(inw(p)&(v), (p))
266
267/*====================================================================*/
268
cc3b4866 269static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 270static int smc91c92_config(struct pcmcia_device *link);
fba395ee 271static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT		 272
273static int smc_open(struct net_device *dev);
274static int smc_close(struct net_device *dev);
275static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
276static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH		 277static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
278 struct net_device *dev);
7d12e780 279static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 280static void smc_rx(struct net_device *dev);
1da177e4
LT		 281static void set_rx_mode(struct net_device *dev);
282static int s9k_config(struct net_device *dev, struct ifmap *map);
283static void smc_set_xcvr(struct net_device *dev, int if_port);
284static void smc_reset(struct net_device *dev);
285static void media_check(u_long arg);
906da809 286static void mdio_sync(unsigned int addr);
1da177e4
LT		 287static int mdio_read(struct net_device *dev, int phy_id, int loc);
288static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
289static int smc_link_ok(struct net_device *dev);
7282d491 290static const struct ethtool_ops ethtool_ops;
1da177e4 291
9b31b697
SH		 292static const struct net_device_ops smc_netdev_ops = {
293 .ndo_open = smc_open,
294 .ndo_stop = smc_close,
295 .ndo_start_xmit = smc_start_xmit,
296 .ndo_tx_timeout = smc_tx_timeout,
297 .ndo_set_config = s9k_config,
298 .ndo_set_multicast_list = set_rx_mode,
299 .ndo_do_ioctl = &smc_ioctl,
300 .ndo_change_mtu = eth_change_mtu,
301 .ndo_set_mac_address = eth_mac_addr,
302 .ndo_validate_addr = eth_validate_addr,
303};
304
1da177e4
LT		 305/*======================================================================
306
307 smc91c92_attach() creates an "instance" of the driver, allocating
308 local data structures for one device. The device is registered
309 with Card Services.
310
311======================================================================*/
312
15b99ac1 313static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 314{
1da177e4 315 struct smc_private *smc;
1da177e4 316 struct net_device *dev;
1da177e4 317
dd0fab5b 318 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT		 319
320 /* Create new ethernet device */
321 dev = alloc_etherdev(sizeof(struct smc_private));
322 if (!dev)
f8cfa618 323 return -ENOMEM;
1da177e4 324 smc = netdev_priv(dev);
fba395ee 325 smc->p_dev = link;
1da177e4
LT		 326 link->priv = dev;
327
328 spin_lock_init(&smc->lock);
329 link->io.NumPorts1 = 16;
330 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
331 link->io.IOAddrLines = 4;
5fa9167a 332 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
1da177e4 333 link->irq.Handler = &smc_interrupt;
1da177e4 334 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT		 335 link->conf.IntType = INT_MEMORY_AND_IO;
336
337 /* The SMC91c92-specific entries in the device structure. */
9b31b697 338 dev->netdev_ops = &smc_netdev_ops;
1da177e4 339 SET_ETHTOOL_OPS(dev, &ethtool_ops);
1da177e4 340 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT		 341
342 smc->mii_if.dev = dev;
343 smc->mii_if.mdio_read = mdio_read;
344 smc->mii_if.mdio_write = mdio_write;
345 smc->mii_if.phy_id_mask = 0x1f;
346 smc->mii_if.reg_num_mask = 0x1f;
347
15b99ac1 348 return smc91c92_config(link);
1da177e4
LT		 349} /* smc91c92_attach */
350
351/*======================================================================
352
353 This deletes a driver "instance". The device is de-registered
354 with Card Services. If it has been released, all local data
355 structures are freed. Otherwise, the structures will be freed
356 when the device is released.
357
358======================================================================*/
359
fba395ee 360static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT		 361{
362 struct net_device *dev = link->priv;
1da177e4 363
dd0fab5b 364 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 365
fd238232 366 if (link->dev_node)
1da177e4
LT		 367 unregister_netdev(dev);
368
e2d40963 369 smc91c92_release(link);
1da177e4 370
1da177e4
LT		 371 free_netdev(dev);
372} /* smc91c92_detach */
373
374/*====================================================================*/
375
376static int cvt_ascii_address(struct net_device *dev, char *s)
377{
378 int i, j, da, c;
379
380 if (strlen(s) != 12)
381 return -1;
382 for (i = 0; i < 6; i++) {
383 da = 0;
384 for (j = 0; j < 2; j++) {
385 c = *s++;
386 da <<= 4;
387 da += ((c >= '0') && (c <= '9')) ?
388 (c - '0') : ((c & 0x0f) + 9);
389 }
390 dev->dev_addr[i] = da;
391 }
392 return 0;
393}
394
dddfbd82 395/*====================================================================
1da177e4
LT		 396
397 Configuration stuff for Megahertz cards
398
399 mhz_3288_power() is used to power up a 3288's ethernet chip.
400 mhz_mfc_config() handles socket setup for multifunction (1144
401 and 3288) cards. mhz_setup() gets a card's hardware ethernet
402 address.
403
404======================================================================*/
405
fba395ee 406static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT		 407{
408 struct net_device *dev = link->priv;
409 struct smc_private *smc = netdev_priv(dev);
410 u_char tmp;
411
412 /* Read the ISR twice... */
413 readb(smc->base+MEGAHERTZ_ISR);
414 udelay(5);
415 readb(smc->base+MEGAHERTZ_ISR);
416
417 /* Pause 200ms... */
418 mdelay(200);
419
420 /* Now read and write the COR... */
421 tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR);
422 udelay(5);
423 writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR);
424
425 return 0;
426}
427
b54bf94b
DB		 428static int mhz_mfc_config_check(struct pcmcia_device *p_dev,
429 cistpl_cftable_entry_t *cf,
8e2fc39d 430 cistpl_cftable_entry_t *dflt,
ad913c11 431 unsigned int vcc,
b54bf94b
DB		 432 void *priv_data)
433{
434 int k;
b54bf94b
DB		 435 p_dev->io.BasePort2 = cf->io.win[0].base;
436 for (k = 0; k < 0x400; k += 0x10) {
437 if (k & 0x80)
438 continue;
439 p_dev->io.BasePort1 = k ^ 0x300;
440 if (!pcmcia_request_io(p_dev, &p_dev->io))
441 return 0;
442 }
443 return -ENODEV;
444}
445
fba395ee 446static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT		 447{
448 struct net_device *dev = link->priv;
449 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT		 450 win_req_t req;
451 memreq_t mem;
b54bf94b 452 int i;
1da177e4
LT		 453
454 link->conf.Attributes |= CONF_ENABLE_SPKR;
455 link->conf.Status = CCSR_AUDIO_ENA;
456 link->irq.Attributes =
e15c1c1f 457 IRQ_TYPE_DYNAMIC_SHARING;
1da177e4
LT		 458 link->io.IOAddrLines = 16;
459 link->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
460 link->io.NumPorts2 = 8;
461
1da177e4
LT		 462 /* The Megahertz combo cards have modem-like CIS entries, so
463 we have to explicitly try a bunch of port combinations. */
b54bf94b 464 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB		 465 return -ENODEV;
466
1da177e4
LT		 467 dev->base_addr = link->io.BasePort1;
468
469 /* Allocate a memory window, for accessing the ISR */
470 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
471 req.Base = req.Size = 0;
472 req.AccessSpeed = 0;
6838b03f 473 i = pcmcia_request_window(link, &req, &link->win);
4c89e88b 474 if (i != 0)
dddfbd82
DB		 475 return -ENODEV;
476
1da177e4
LT		 477 smc->base = ioremap(req.Base, req.Size);
478 mem.CardOffset = mem.Page = 0;
479 if (smc->manfid == MANFID_MOTOROLA)
480 mem.CardOffset = link->conf.ConfigBase;
868575d1 481 i = pcmcia_map_mem_page(link, link->win, &mem);
1da177e4 482
8e95a202
JP		 483 if ((i == 0) &&
484 (smc->manfid == MANFID_MEGAHERTZ) &&
485 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
486 mhz_3288_power(link);
1da177e4 487
dddfbd82 488 return 0;
1da177e4
LT		 489}
490
dddfbd82
DB		 491static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
492 tuple_t *tuple,
493 void *priv)
1da177e4 494{
dddfbd82
DB		 495 struct net_device *dev = priv;
496 cisparse_t parse;
4638aef4 497
dddfbd82
DB		 498 if (pcmcia_parse_tuple(tuple, &parse))
499 return -EINVAL;
1da177e4 500
dddfbd82
DB		 501 if ((parse.version_1.ns > 3) &&
502 (cvt_ascii_address(dev,
503 (parse.version_1.str + parse.version_1.ofs[3]))))
504 return 0;
4638aef4 505
dddfbd82
DB		 506 return -EINVAL;
507};
508
fba395ee 509static int mhz_setup(struct pcmcia_device *link)
1da177e4 510{
1da177e4 511 struct net_device *dev = link->priv;
dddfbd82
DB		 512 size_t len;
513 u8 *buf;
4638aef4 514 int rc;
1da177e4
LT		 515
516 /* Read the station address from the CIS. It is stored as the last
517 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB		 518 if ((link->prod_id[3]) &&
519 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
520 return 0;
521
522 /* Workarounds for broken cards start here. */
a1a98b72 523 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB		 524 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
525 return 0;
1da177e4
LT		 526
527 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 528 rc = -1;
dddfbd82
DB		 529 len = pcmcia_get_tuple(link, 0x81, &buf);
530 if (buf && len >= 13) {
531 buf[12] = '\0';
532 if (cvt_ascii_address(dev, buf))
533 rc = 0;
534 }
535 kfree(buf);
536
537 return rc;
538};
1da177e4
LT		 539
540/*======================================================================
541
542 Configuration stuff for the Motorola Mariner
543
544 mot_config() writes directly to the Mariner configuration
545 registers because the CIS is just bogus.
546
547======================================================================*/
548
fba395ee 549static void mot_config(struct pcmcia_device *link)
1da177e4
LT		 550{
551 struct net_device *dev = link->priv;
552 struct smc_private *smc = netdev_priv(dev);
906da809
OJ		 553 unsigned int ioaddr = dev->base_addr;
554 unsigned int iouart = link->io.BasePort2;
1da177e4
LT		 555
556 /* Set UART base address and force map with COR bit 1 */
557 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
558 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
559 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
560
561 /* Set SMC base address and force map with COR bit 1 */
562 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
563 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
564 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
565
566 /* Wait for things to settle down */
567 mdelay(100);
568}
569
fba395ee 570static int mot_setup(struct pcmcia_device *link)
1da177e4
LT		 571{
572 struct net_device *dev = link->priv;
906da809 573 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 574 int i, wait, loop;
575 u_int addr;
576
577 /* Read Ethernet address from Serial EEPROM */
578
579 for (i = 0; i < 3; i++) {
580 SMC_SELECT_BANK(2);
581 outw(MOT_EEPROM + i, ioaddr + POINTER);
582 SMC_SELECT_BANK(1);
583 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
584
585 for (loop = wait = 0; loop < 200; loop++) {
586 udelay(10);
587 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
588 if (wait == 0) break;
589 }
590
591 if (wait)
592 return -1;
593
594 addr = inw(ioaddr + GENERAL);
595 dev->dev_addr[2*i] = addr & 0xff;
596 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
597 }
598
599 return 0;
600}
601
602/*====================================================================*/
603
b54bf94b
DB		 604static int smc_configcheck(struct pcmcia_device *p_dev,
605 cistpl_cftable_entry_t *cf,
8e2fc39d 606 cistpl_cftable_entry_t *dflt,
ad913c11 607 unsigned int vcc,
b54bf94b
DB		 608 void *priv_data)
609{
b54bf94b
DB		 610 p_dev->io.BasePort1 = cf->io.win[0].base;
611 p_dev->io.IOAddrLines = cf->io.flags & CISTPL_IO_LINES_MASK;
612 return pcmcia_request_io(p_dev, &p_dev->io);
613}
614
fba395ee 615static int smc_config(struct pcmcia_device *link)
1da177e4
LT		 616{
617 struct net_device *dev = link->priv;
1da177e4
LT		 618 int i;
619
1da177e4 620 link->io.NumPorts1 = 16;
b54bf94b
DB		 621 i = pcmcia_loop_config(link, smc_configcheck, NULL);
622 if (!i)
623 dev->base_addr = link->io.BasePort1;
4638aef4 624
1da177e4
LT		 625 return i;
626}
627
dddfbd82 628
fba395ee 629static int smc_setup(struct pcmcia_device *link)
1da177e4 630{
1da177e4 631 struct net_device *dev = link->priv;
1da177e4
LT		 632
633 /* Check for a LAN function extension tuple */
dddfbd82
DB		 634 if (!pcmcia_get_mac_from_cis(link, dev))
635 return 0;
636
1da177e4 637 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 638 if (link->prod_id[2]) {
dddfbd82
DB		 639 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
640 return 0;
4638aef4 641 }
dddfbd82 642 return -1;
1da177e4
LT		 643}
644
645/*====================================================================*/
646
fba395ee 647static int osi_config(struct pcmcia_device *link)
1da177e4
LT		 648{
649 struct net_device *dev = link->priv;
906da809 650 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT		 651 int i, j;
652
653 link->conf.Attributes |= CONF_ENABLE_SPKR;
654 link->conf.Status = CCSR_AUDIO_ENA;
655 link->irq.Attributes =
5fa9167a 656 IRQ_TYPE_DYNAMIC_SHARING|IRQ_FIRST_SHARED;
1da177e4
LT		 657 link->io.NumPorts1 = 64;
658 link->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
659 link->io.NumPorts2 = 8;
660 link->io.IOAddrLines = 16;
661
662 /* Enable Hard Decode, LAN, Modem */
663 link->conf.ConfigIndex = 0x23;
664
665 for (i = j = 0; j < 4; j++) {
666 link->io.BasePort2 = com[j];
fba395ee 667 i = pcmcia_request_io(link, &link->io);
4c89e88b
DB		 668 if (i == 0)
669 break;
1da177e4 670 }
4c89e88b 671 if (i != 0) {
1da177e4
LT		 672 /* Fallback: turn off hard decode */
673 link->conf.ConfigIndex = 0x03;
674 link->io.NumPorts2 = 0;
fba395ee 675 i = pcmcia_request_io(link, &link->io);
1da177e4
LT		 676 }
677 dev->base_addr = link->io.BasePort1 + 0x10;
678 return i;
679}
680
75bf758f
JSR		 681static int osi_load_firmware(struct pcmcia_device *link)
682{
683 const struct firmware *fw;
684 int i, err;
685
686 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
687 if (err) {
688 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
689 return err;
690 }
691
692 /* Download the Seven of Diamonds firmware */
693 for (i = 0; i < fw->size; i++) {
694 outb(fw->data[i], link->io.BasePort1 + 2);
695 udelay(50);
696 }
697 release_firmware(fw);
698 return err;
699}
700
dddfbd82
DB		 701static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
702 tuple_t *tuple,
703 void *priv)
1da177e4 704{
dddfbd82
DB		 705 struct net_device *dev = priv;
706 int i;
1da177e4 707
dddfbd82
DB		 708 if (tuple->TupleDataLen < 8)
709 return -EINVAL;
710 if (tuple->TupleData[0] != 0x04)
711 return -EINVAL;
712 for (i = 0; i < 6; i++)
713 dev->dev_addr[i] = tuple->TupleData[i+2];
714 return 0;
715};
4638aef4 716
4638aef4 717
dddfbd82
DB		 718static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
719{
720 struct net_device *dev = link->priv;
721 int rc;
1da177e4
LT		 722
723 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB		 724 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
725 return -1;
1da177e4
LT		 726
727 if (((manfid == MANFID_OSITECH) &&
728 (cardid == PRODID_OSITECH_SEVEN)) ||
729 ((manfid == MANFID_PSION) &&
730 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 731 rc = osi_load_firmware(link);
732 if (rc)
dddfbd82 733 return rc;
1da177e4
LT		 734 } else if (manfid == MANFID_OSITECH) {
735 /* Make sure both functions are powered up */
736 set_bits(0x300, link->io.BasePort1 + OSITECH_AUI_PWR);
737 /* Now, turn on the interrupt for both card functions */
738 set_bits(0x300, link->io.BasePort1 + OSITECH_RESET_ISR);
dd0fab5b 739 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
1da177e4
LT		 740 inw(link->io.BasePort1 + OSITECH_AUI_PWR),
741 inw(link->io.BasePort1 + OSITECH_RESET_ISR));
742 }
dddfbd82 743 return 0;
1da177e4
LT		 744}
745
fba395ee 746static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 747{
98e4c28b
DB		 748 struct net_device *dev = link->priv;
749
e2d40963 750 if (link->open)
4bbed523 751 netif_device_detach(dev);
98e4c28b
DB		 752
753 return 0;
754}
755
fba395ee 756static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 757{
98e4c28b
DB		 758 struct net_device *dev = link->priv;
759 struct smc_private *smc = netdev_priv(dev);
760 int i;
761
e2d40963
DB		 762 if ((smc->manfid == MANFID_MEGAHERTZ) &&
763 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
764 mhz_3288_power(link);
765 if (smc->manfid == MANFID_MOTOROLA)
766 mot_config(link);
767 if ((smc->manfid == MANFID_OSITECH) &&
768 (smc->cardid != PRODID_OSITECH_SEVEN)) {
769 /* Power up the card and enable interrupts */
770 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
771 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
772 }
773 if (((smc->manfid == MANFID_OSITECH) &&
774 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
775 ((smc->manfid == MANFID_PSION) &&
776 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 777 i = osi_load_firmware(link);
778 if (i) {
779 pr_err("smc91c92_cs: Failed to load firmware\n");
780 return i;
98e4c28b
DB		 781 }
782 }
e2d40963
DB		 783 if (link->open) {
784 smc_reset(dev);
785 netif_device_attach(dev);
786 }
98e4c28b
DB		 787
788 return 0;
789}
790
791
1da177e4
LT		 792/*======================================================================
793
794 This verifies that the chip is some SMC91cXX variant, and returns
795 the revision code if successful. Otherwise, it returns -ENODEV.
796
797======================================================================*/
798
fba395ee 799static int check_sig(struct pcmcia_device *link)
1da177e4
LT		 800{
801 struct net_device *dev = link->priv;
906da809 802 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 803 int width;
804 u_short s;
805
806 SMC_SELECT_BANK(1);
807 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
808 /* Try powering up the chip */
809 outw(0, ioaddr + CONTROL);
810 mdelay(55);
811 }
812
813 /* Try setting bus width */
814 width = (link->io.Attributes1 == IO_DATA_PATH_WIDTH_AUTO);
815 s = inb(ioaddr + CONFIG);
816 if (width)
817 s |= CFG_16BIT;
818 else
819 s &= ~CFG_16BIT;
820 outb(s, ioaddr + CONFIG);
821
822 /* Check Base Address Register to make sure bus width is OK */
823 s = inw(ioaddr + BASE_ADDR);
824 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
825 ((s >> 8) != (s & 0xff))) {
826 SMC_SELECT_BANK(3);
827 s = inw(ioaddr + REVISION);
828 return (s & 0xff);
829 }
830
831 if (width) {
4bbed523
DB		 832 modconf_t mod = {
833 .Attributes = CONF_IO_CHANGE_WIDTH,
834 };
835 printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n");
836
fba395ee
DB		 837 smc91c92_suspend(link);
838 pcmcia_modify_configuration(link, &mod);
839 smc91c92_resume(link);
4bbed523 840 return check_sig(link);
1da177e4
LT		 841 }
842 return -ENODEV;
843}
844
845/*======================================================================
846
847 smc91c92_config() is scheduled to run after a CARD_INSERTION event
848 is received, to configure the PCMCIA socket, and to make the
849 ethernet device available to the system.
850
851======================================================================*/
852
15b99ac1 853static int smc91c92_config(struct pcmcia_device *link)
1da177e4 854{
1da177e4
LT		 855 struct net_device *dev = link->priv;
856 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT		 857 char *name;
858 int i, j, rev;
906da809 859 unsigned int ioaddr;
1da177e4
LT		 860 u_long mir;
861
dd0fab5b 862 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 863
efd50585
DB		 864 smc->manfid = link->manf_id;
865 smc->cardid = link->card_id;
1da177e4 866
1da177e4
LT		 867 if ((smc->manfid == MANFID_OSITECH) &&
868 (smc->cardid != PRODID_OSITECH_SEVEN)) {
869 i = osi_config(link);
870 } else if ((smc->manfid == MANFID_MOTOROLA) ||
871 ((smc->manfid == MANFID_MEGAHERTZ) &&
872 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
873 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
874 i = mhz_mfc_config(link);
875 } else {
876 i = smc_config(link);
877 }
dd0fab5b
DB		 878 if (i)
879 goto config_failed;
1da177e4 880
fba395ee 881 i = pcmcia_request_irq(link, &link->irq);
dd0fab5b
DB		 882 if (i)
883 goto config_failed;
fba395ee 884 i = pcmcia_request_configuration(link, &link->conf);
dd0fab5b
DB		 885 if (i)
886 goto config_failed;
1da177e4
LT		 887
888 if (smc->manfid == MANFID_MOTOROLA)
889 mot_config(link);
890
891 dev->irq = link->irq.AssignedIRQ;
892
893 if ((if_port >= 0) && (if_port <= 2))
894 dev->if_port = if_port;
895 else
896 printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n");
897
898 switch (smc->manfid) {
899 case MANFID_OSITECH:
900 case MANFID_PSION:
901 i = osi_setup(link, smc->manfid, smc->cardid); break;
902 case MANFID_SMC:
903 case MANFID_NEW_MEDIA:
904 i = smc_setup(link); break;
905 case 0x128: /* For broken Megahertz cards */
906 case MANFID_MEGAHERTZ:
907 i = mhz_setup(link); break;
908 case MANFID_MOTOROLA:
909 default: /* get the hw address from EEPROM */
910 i = mot_setup(link); break;
911 }
912
913 if (i != 0) {
914 printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n");
915 goto config_undo;
916 }
917
918 smc->duplex = 0;
919 smc->rx_ovrn = 0;
920
921 rev = check_sig(link);
922 name = "???";
923 if (rev > 0)
924 switch (rev >> 4) {
925 case 3: name = "92"; break;
926 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
927 case 5: name = "95"; break;
928 case 7: name = "100"; break;
929 case 8: name = "100-FD"; break;
930 case 9: name = "110"; break;
931 }
932
933 ioaddr = dev->base_addr;
934 if (rev > 0) {
935 u_long mcr;
936 SMC_SELECT_BANK(0);
937 mir = inw(ioaddr + MEMINFO) & 0xff;
938 if (mir == 0xff) mir++;
939 /* Get scale factor for memory size */
940 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
941 mir *= 128 * (1<<((mcr >> 9) & 7));
942 SMC_SELECT_BANK(1);
943 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
944 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
945 if (smc->manfid == MANFID_OSITECH)
946 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
947 if ((rev >> 4) >= 7)
948 smc->cfg |= CFG_MII_SELECT;
949 } else
950 mir = 0;
951
952 if (smc->cfg & CFG_MII_SELECT) {
953 SMC_SELECT_BANK(3);
954
955 for (i = 0; i < 32; i++) {
956 j = mdio_read(dev, i, 1);
957 if ((j != 0) && (j != 0xffff)) break;
958 }
959 smc->mii_if.phy_id = (i < 32) ? i : -1;
960
961 SMC_SELECT_BANK(0);
962 }
963
fd238232 964 link->dev_node = &smc->node;
dd2e5a15 965 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT		 966
967 if (register_netdev(dev) != 0) {
968 printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n");
fd238232 969 link->dev_node = NULL;
1da177e4
LT		 970 goto config_undo;
971 }
972
973 strcpy(smc->node.dev_name, dev->name);
974
975 printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, "
e174961c 976 "hw_addr %pM\n",
0795af57 977 dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq,
e174961c 978 dev->dev_addr);
1da177e4
LT		 979
980 if (rev > 0) {
981 if (mir & 0x3ff)
982 printk(KERN_INFO " %lu byte", mir);
983 else
984 printk(KERN_INFO " %lu kb", mir>>10);
985 printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ?
986 "MII" : if_names[dev->if_port]);
987 }
988
989 if (smc->cfg & CFG_MII_SELECT) {
990 if (smc->mii_if.phy_id != -1) {
dd0fab5b 991 dev_dbg(&link->dev, " MII transceiver at index %d, status %x.\n",
1da177e4
LT		 992 smc->mii_if.phy_id, j);
993 } else {
994 printk(KERN_NOTICE " No MII transceivers found!\n");
995 }
996 }
15b99ac1 997 return 0;
1da177e4
LT		 998
999config_undo:
1000 unregister_netdev(dev);
dd0fab5b 1001config_failed:
1da177e4 1002 smc91c92_release(link);
15b99ac1 1003 return -ENODEV;
1da177e4
LT		 1004} /* smc91c92_config */
1005
1006/*======================================================================
1007
1008 After a card is removed, smc91c92_release() will unregister the net
1009 device, and release the PCMCIA configuration. If the device is
1010 still open, this will be postponed until it is closed.
1011
1012======================================================================*/
1013
fba395ee 1014static void smc91c92_release(struct pcmcia_device *link)
1da177e4 1015{
dd0fab5b 1016 dev_dbg(&link->dev, "smc91c92_release\n");
5f2a71fc
DB		 1017 if (link->win) {
1018 struct net_device *dev = link->priv;
1019 struct smc_private *smc = netdev_priv(dev);
1020 iounmap(smc->base);
1021 }
fba395ee 1022 pcmcia_disable_device(link);
1da177e4
LT		 1023}
1024
1da177e4
LT		 1025/*======================================================================
1026
1027 MII interface support for SMC91cXX based cards
1028======================================================================*/
1029
1030#define MDIO_SHIFT_CLK 0x04
1031#define MDIO_DATA_OUT 0x01
1032#define MDIO_DIR_WRITE 0x08
1033#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
1034#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
1035#define MDIO_DATA_READ 0x02
1036
906da809 1037static void mdio_sync(unsigned int addr)
1da177e4
LT		 1038{
1039 int bits;
1040 for (bits = 0; bits < 32; bits++) {
1041 outb(MDIO_DATA_WRITE1, addr);
1042 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
1043 }
1044}
1045
1046static int mdio_read(struct net_device *dev, int phy_id, int loc)
1047{
906da809 1048 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1049 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
1050 int i, retval = 0;
1051
1052 mdio_sync(addr);
1053 for (i = 13; i >= 0; i--) {
1054 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1055 outb(dat, addr);
1056 outb(dat | MDIO_SHIFT_CLK, addr);
1057 }
1058 for (i = 19; i > 0; i--) {
1059 outb(0, addr);
1060 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1061 outb(MDIO_SHIFT_CLK, addr);
1062 }
1063 return (retval>>1) & 0xffff;
1064}
1065
1066static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1067{
906da809 1068 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1069 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1070 int i;
1071
1072 mdio_sync(addr);
1073 for (i = 31; i >= 0; i--) {
1074 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1075 outb(dat, addr);
1076 outb(dat | MDIO_SHIFT_CLK, addr);
1077 }
1078 for (i = 1; i >= 0; i--) {
1079 outb(0, addr);
1080 outb(MDIO_SHIFT_CLK, addr);
1081 }
1082}
1083
1084/*======================================================================
1085
1086 The driver core code, most of which should be common with a
1087 non-PCMCIA implementation.
1088
1089======================================================================*/
1090
1091#ifdef PCMCIA_DEBUG
1092static void smc_dump(struct net_device *dev)
1093{
906da809 1094 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1095 u_short i, w, save;
1096 save = inw(ioaddr + BANK_SELECT);
1097 for (w = 0; w < 4; w++) {
1098 SMC_SELECT_BANK(w);
1099 printk(KERN_DEBUG "bank %d: ", w);
1100 for (i = 0; i < 14; i += 2)
1101 printk(" %04x", inw(ioaddr + i));
1102 printk("\n");
1103 }
1104 outw(save, ioaddr + BANK_SELECT);
1105}
1106#endif
1107
1108static int smc_open(struct net_device *dev)
1109{
1110 struct smc_private *smc = netdev_priv(dev);
fba395ee 1111 struct pcmcia_device *link = smc->p_dev;
1da177e4 1112
dd0fab5b 1113 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1114 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB		 1115#ifdef PCMCIA_DEBUG
1116 smc_dump(dev);
1da177e4
LT		 1117#endif
1118
1119 /* Check that the PCMCIA card is still here. */
9940ec36 1120 if (!pcmcia_dev_present(link))
1da177e4
LT		 1121 return -ENODEV;
1122 /* Physical device present signature. */
1123 if (check_sig(link) < 0) {
1124 printk("smc91c92_cs: Yikes! Bad chip signature!\n");
1125 return -ENODEV;
1126 }
1127 link->open++;
1128
1129 netif_start_queue(dev);
1130 smc->saved_skb = NULL;
1131 smc->packets_waiting = 0;
1132
1133 smc_reset(dev);
1134 init_timer(&smc->media);
1135 smc->media.function = &media_check;
1136 smc->media.data = (u_long) dev;
1137 smc->media.expires = jiffies + HZ;
1138 add_timer(&smc->media);
1139
1140 return 0;
1141} /* smc_open */
1142
1143/*====================================================================*/
1144
1145static int smc_close(struct net_device *dev)
1146{
1147 struct smc_private *smc = netdev_priv(dev);
fba395ee 1148 struct pcmcia_device *link = smc->p_dev;
906da809 1149 unsigned int ioaddr = dev->base_addr;
1da177e4 1150
dd0fab5b 1151 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT		 1152 dev->name, inw(ioaddr + BANK_SELECT));
1153
1154 netif_stop_queue(dev);
1155
1156 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1157 Don't bother to check for chip present. */
1158 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1159 outw(0, ioaddr + INTERRUPT);
1160 SMC_SELECT_BANK(0);
1161 mask_bits(0xff00, ioaddr + RCR);
1162 mask_bits(0xff00, ioaddr + TCR);
1163
1164 /* Put the chip into power-down mode. */
1165 SMC_SELECT_BANK(1);
1166 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1167
1168 link->open--;
1169 del_timer_sync(&smc->media);
1170
1171 return 0;
1172} /* smc_close */
1173
1174/*======================================================================
1175
1176 Transfer a packet to the hardware and trigger the packet send.
1177 This may be called at either from either the Tx queue code
1178 or the interrupt handler.
1179
1180======================================================================*/
1181
1182static void smc_hardware_send_packet(struct net_device * dev)
1183{
1184 struct smc_private *smc = netdev_priv(dev);
1185 struct sk_buff *skb = smc->saved_skb;
906da809 1186 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1187 u_char packet_no;
1188
1189 if (!skb) {
1190 printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name);
1191 return;
1192 }
1193
1194 /* There should be a packet slot waiting. */
1195 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1196 if (packet_no & 0x80) {
1197 /* If not, there is a hardware problem! Likely an ejected card. */
1198 printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation"
1199 " failed, status %#2.2x.\n", dev->name, packet_no);
1200 dev_kfree_skb_irq(skb);
1201 smc->saved_skb = NULL;
1202 netif_start_queue(dev);
1203 return;
1204 }
1205
6fb7298c 1206 dev->stats.tx_bytes += skb->len;
1da177e4
LT		 1207 /* The card should use the just-allocated buffer. */
1208 outw(packet_no, ioaddr + PNR_ARR);
1209 /* point to the beginning of the packet */
1210 outw(PTR_AUTOINC , ioaddr + POINTER);
1211
1212 /* Send the packet length (+6 for status, length and ctl byte)
1213 and the status word (set to zeros). */
1214 {
1215 u_char *buf = skb->data;
1216 u_int length = skb->len; /* The chip will pad to ethernet min. */
1217
dd0fab5b 1218 pr_debug("%s: Trying to xmit packet of length %d.\n",
1da177e4
LT		 1219 dev->name, length);
1220
1221 /* send the packet length: +6 for status word, length, and ctl */
1222 outw(0, ioaddr + DATA_1);
1223 outw(length + 6, ioaddr + DATA_1);
1224 outsw(ioaddr + DATA_1, buf, length >> 1);
1225
1226 /* The odd last byte, if there is one, goes in the control word. */
1227 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1228 }
1229
1230 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1231 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1232 (inw(ioaddr + INTERRUPT) & 0xff00),
1233 ioaddr + INTERRUPT);
1234
1235 /* The chip does the rest of the work. */
1236 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1237
1238 smc->saved_skb = NULL;
1239 dev_kfree_skb_irq(skb);
1240 dev->trans_start = jiffies;
1241 netif_start_queue(dev);
1242 return;
1243}
1244
1245/*====================================================================*/
1246
1247static void smc_tx_timeout(struct net_device *dev)
1248{
1249 struct smc_private *smc = netdev_priv(dev);
906da809 1250 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1251
1252 printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
1253 "Tx_status %2.2x status %4.4x.\n",
1254 dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1255 dev->stats.tx_errors++;
1da177e4
LT		 1256 smc_reset(dev);
1257 dev->trans_start = jiffies;
1258 smc->saved_skb = NULL;
1259 netif_wake_queue(dev);
1260}
1261
dbf02fae
SH		 1262static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1263 struct net_device *dev)
1da177e4
LT		 1264{
1265 struct smc_private *smc = netdev_priv(dev);
906da809 1266 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1267 u_short num_pages;
1268 short time_out, ir;
85e27831 1269 unsigned long flags;
1da177e4
LT		 1270
1271 netif_stop_queue(dev);
1272
dd0fab5b 1273 pr_debug("%s: smc_start_xmit(length = %d) called,"
1da177e4
LT		 1274 " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2));
1275
1276 if (smc->saved_skb) {
1277 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1278 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1279 printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n",
1280 dev->name);
5b548140 1281 return NETDEV_TX_BUSY;
1da177e4
LT		 1282 }
1283 smc->saved_skb = skb;
1284
1285 num_pages = skb->len >> 8;
1286
1287 if (num_pages > 7) {
1288 printk(KERN_ERR "%s: Far too big packet error.\n", dev->name);
1289 dev_kfree_skb (skb);
1290 smc->saved_skb = NULL;
6fb7298c 1291 dev->stats.tx_dropped++;
6ed10654 1292 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT		 1293 }
1294 /* A packet is now waiting. */
1295 smc->packets_waiting++;
1296
85e27831 1297 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1298 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1299
1300 /* need MC_RESET to keep the memory consistent. errata? */
1301 if (smc->rx_ovrn) {
1302 outw(MC_RESET, ioaddr + MMU_CMD);
1303 smc->rx_ovrn = 0;
1304 }
1305
1306 /* Allocate the memory; send the packet now if we win. */
1307 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1308 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1309 ir = inw(ioaddr+INTERRUPT);
1310 if (ir & IM_ALLOC_INT) {
1311 /* Acknowledge the interrupt, send the packet. */
1312 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1313 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1314 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1315 return NETDEV_TX_OK;
1da177e4
LT		 1316 }
1317 }
1318
1319 /* Otherwise defer until the Tx-space-allocated interrupt. */
dd0fab5b 1320 pr_debug("%s: memory allocation deferred.\n", dev->name);
1da177e4 1321 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1322 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1323
6ed10654 1324 return NETDEV_TX_OK;
1da177e4
LT		 1325}
1326
1327/*======================================================================
1328
1329 Handle a Tx anomolous event. Entered while in Window 2.
1330
1331======================================================================*/
1332
1333static void smc_tx_err(struct net_device * dev)
1334{
1335 struct smc_private *smc = netdev_priv(dev);
906da809 1336 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1337 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1338 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1339 int tx_status;
1340
1341 /* select this as the packet to read from */
1342 outw(packet_no, ioaddr + PNR_ARR);
1343
1344 /* read the first word from this packet */
1345 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1346
1347 tx_status = inw(ioaddr + DATA_1);
1348
6fb7298c
SH		 1349 dev->stats.tx_errors++;
1350 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1351 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1352 if (tx_status & TS_16COL) {
6fb7298c 1353 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1354 smc->tx_err++;
1355 }
1356
1357 if (tx_status & TS_SUCCESS) {
1358 printk(KERN_NOTICE "%s: Successful packet caused error "
1359 "interrupt?\n", dev->name);
1360 }
1361 /* re-enable transmit */
1362 SMC_SELECT_BANK(0);
1363 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1364 SMC_SELECT_BANK(2);
1365
1366 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1367
1368 /* one less packet waiting for me */
1369 smc->packets_waiting--;
1370
1371 outw(saved_packet, ioaddr + PNR_ARR);
1372 return;
1373}
1374
1375/*====================================================================*/
1376
1377static void smc_eph_irq(struct net_device *dev)
1378{
1379 struct smc_private *smc = netdev_priv(dev);
906da809 1380 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1381 u_short card_stats, ephs;
1382
1383 SMC_SELECT_BANK(0);
1384 ephs = inw(ioaddr + EPH);
dd0fab5b 1385 pr_debug("%s: Ethernet protocol handler interrupt, status"
1da177e4
LT		 1386 " %4.4x.\n", dev->name, ephs);
1387 /* Could be a counter roll-over warning: update stats. */
1388 card_stats = inw(ioaddr + COUNTER);
1389 /* single collisions */
6fb7298c 1390 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1391 card_stats >>= 4;
1392 /* multiple collisions */
6fb7298c 1393 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1394#if 0 /* These are for when linux supports these statistics */
1395 card_stats >>= 4; /* deferred */
1396 card_stats >>= 4; /* excess deferred */
1397#endif
1398 /* If we had a transmit error we must re-enable the transmitter. */
1399 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1400
1401 /* Clear a link error interrupt. */
1402 SMC_SELECT_BANK(1);
1403 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1404 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1405 ioaddr + CONTROL);
1406 SMC_SELECT_BANK(2);
1407}
1408
1409/*====================================================================*/
1410
7d12e780 1411static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT		 1412{
1413 struct net_device *dev = dev_id;
1414 struct smc_private *smc = netdev_priv(dev);
906da809 1415 unsigned int ioaddr;
1da177e4
LT		 1416 u_short saved_bank, saved_pointer, mask, status;
1417 unsigned int handled = 1;
1418 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1419
1420 if (!netif_device_present(dev))
1421 return IRQ_NONE;
1422
1423 ioaddr = dev->base_addr;
1424
dd0fab5b 1425 pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1da177e4
LT		 1426 irq, ioaddr);
1427
85e27831 1428 spin_lock(&smc->lock);
1da177e4
LT		 1429 smc->watchdog = 0;
1430 saved_bank = inw(ioaddr + BANK_SELECT);
1431 if ((saved_bank & 0xff00) != 0x3300) {
1432 /* The device does not exist -- the card could be off-line, or
1433 maybe it has been ejected. */
dd0fab5b 1434 pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1da177e4
LT		 1435 "/ejected device.\n", dev->name, irq);
1436 handled = 0;
1437 goto irq_done;
1438 }
1439
1440 SMC_SELECT_BANK(2);
1441 saved_pointer = inw(ioaddr + POINTER);
1442 mask = inw(ioaddr + INTERRUPT) >> 8;
1443 /* clear all interrupts */
1444 outw(0, ioaddr + INTERRUPT);
1445
1446 do { /* read the status flag, and mask it */
1447 status = inw(ioaddr + INTERRUPT) & 0xff;
dd0fab5b 1448 pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1da177e4
LT		 1449 status, mask);
1450 if ((status & mask) == 0) {
1451 if (bogus_cnt == INTR_WORK)
1452 handled = 0;
1453 break;
1454 }
1455 if (status & IM_RCV_INT) {
1456 /* Got a packet(s). */
1457 smc_rx(dev);
1458 }
1459 if (status & IM_TX_INT) {
1460 smc_tx_err(dev);
1461 outw(IM_TX_INT, ioaddr + INTERRUPT);
1462 }
1463 status &= mask;
1464 if (status & IM_TX_EMPTY_INT) {
1465 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1466 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1467 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT		 1468 smc->packets_waiting = 0;
1469 }
1470 if (status & IM_ALLOC_INT) {
1471 /* Clear this interrupt so it doesn't happen again */
1472 mask &= ~IM_ALLOC_INT;
1473
1474 smc_hardware_send_packet(dev);
1475
1476 /* enable xmit interrupts based on this */
1477 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1478
1479 /* and let the card send more packets to me */
1480 netif_wake_queue(dev);
1481 }
1482 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH		 1483 dev->stats.rx_errors++;
1484 dev->stats.rx_fifo_errors++;
1da177e4
LT		 1485 if (smc->duplex)
1486 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1487 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1488 }
1489 if (status & IM_EPH_INT)
1490 smc_eph_irq(dev);
1491 } while (--bogus_cnt);
1492
dd0fab5b 1493 pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1da177e4
LT		 1494 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1495
1496 /* restore state register */
1497 outw((mask<<8), ioaddr + INTERRUPT);
1498 outw(saved_pointer, ioaddr + POINTER);
1499 SMC_SELECT_BANK(saved_bank);
1500
dd0fab5b 1501 pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1da177e4
LT		 1502
1503irq_done:
1504
1505 if ((smc->manfid == MANFID_OSITECH) &&
1506 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1507 /* Retrigger interrupt if needed */
1508 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1509 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1510 }
1511 if (smc->manfid == MANFID_MOTOROLA) {
1512 u_char cor;
1513 cor = readb(smc->base + MOT_UART + CISREG_COR);
1514 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1515 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1516 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1517 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1518 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1519 }
1520#ifdef DOES_NOT_WORK
1521 if (smc->base != NULL) { /* Megahertz MFC's */
1522 readb(smc->base+MEGAHERTZ_ISR);
1523 readb(smc->base+MEGAHERTZ_ISR);
1524 }
1525#endif
85e27831 1526 spin_unlock(&smc->lock);
1da177e4
LT		 1527 return IRQ_RETVAL(handled);
1528}
1529
1530/*====================================================================*/
1531
1532static void smc_rx(struct net_device *dev)
1533{
906da809 1534 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1535 int rx_status;
1536 int packet_length; /* Caution: not frame length, rather words
1537 to transfer from the chip. */
1538
1539 /* Assertion: we are in Window 2. */
1540
1541 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1542 printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n",
1543 dev->name);
1544 return;
1545 }
1546
1547 /* Reset the read pointer, and read the status and packet length. */
1548 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1549 rx_status = inw(ioaddr + DATA_1);
1550 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1551
dd0fab5b 1552 pr_debug("%s: Receive status %4.4x length %d.\n",
1da177e4
LT		 1553 dev->name, rx_status, packet_length);
1554
1555 if (!(rx_status & RS_ERRORS)) {
1556 /* do stuff to make a new packet */
1557 struct sk_buff *skb;
1558
1559 /* Note: packet_length adds 5 or 6 extra bytes here! */
1560 skb = dev_alloc_skb(packet_length+2);
1561
1562 if (skb == NULL) {
dd0fab5b 1563 pr_debug("%s: Low memory, packet dropped.\n", dev->name);
6fb7298c 1564 dev->stats.rx_dropped++;
1da177e4
LT		 1565 outw(MC_RELEASE, ioaddr + MMU_CMD);
1566 return;
1567 }
1568
1569 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1570 skb_reserve(skb, 2);
1571 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1572 (packet_length+1)>>1);
1573 skb->protocol = eth_type_trans(skb, dev);
1574
1da177e4
LT		 1575 netif_rx(skb);
1576 dev->last_rx = jiffies;
6fb7298c
SH		 1577 dev->stats.rx_packets++;
1578 dev->stats.rx_bytes += packet_length;
1da177e4 1579 if (rx_status & RS_MULTICAST)
6fb7298c 1580 dev->stats.multicast++;
1da177e4
LT		 1581 } else {
1582 /* error ... */
6fb7298c 1583 dev->stats.rx_errors++;
1da177e4 1584
6fb7298c 1585 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1586 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH		 1587 dev->stats.rx_length_errors++;
1588 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT		 1589 }
1590 /* Let the MMU free the memory of this packet. */
1591 outw(MC_RELEASE, ioaddr + MMU_CMD);
1592
1593 return;
1594}
1595
1da177e4
LT		 1596/*======================================================================
1597
1598 Set the receive mode.
1599
1600 This routine is used by both the protocol level to notify us of
1601 promiscuous/multicast mode changes, and by the open/reset code to
1602 initialize the Rx registers. We always set the multicast list and
1603 leave the receiver running.
1604
1605======================================================================*/
1606
1607static void set_rx_mode(struct net_device *dev)
1608{
906da809 1609 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1610 struct smc_private *smc = netdev_priv(dev);
1611 u_int multicast_table[ 2 ] = { 0, };
1612 unsigned long flags;
1613 u_short rx_cfg_setting;
1614
1615 if (dev->flags & IFF_PROMISC) {
1da177e4
LT		 1616 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1617 } else if (dev->flags & IFF_ALLMULTI)
1618 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1619 else {
4cd24eaf 1620 if (!netdev_mc_empty(dev)) {
91fea585
JP		 1621 struct dev_mc_list *mc_addr;
1622
1623 netdev_for_each_mc_addr(mc_addr, dev) {
1624 u_int position = ether_crc(6, mc_addr->dmi_addr);
1625#ifndef final_version /* Verify multicast address. */
1626 if ((mc_addr->dmi_addr[0] & 1) == 0)
1627 continue;
1628#endif
1629 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1630 }
1da177e4
LT		 1631 }
1632 rx_cfg_setting = RxStripCRC | RxEnable;
1633 }
1634
1635 /* Load MC table and Rx setting into the chip without interrupts. */
1636 spin_lock_irqsave(&smc->lock, flags);
1637 SMC_SELECT_BANK(3);
1638 outl(multicast_table[0], ioaddr + MULTICAST0);
1639 outl(multicast_table[1], ioaddr + MULTICAST4);
1640 SMC_SELECT_BANK(0);
1641 outw(rx_cfg_setting, ioaddr + RCR);
1642 SMC_SELECT_BANK(2);
1643 spin_unlock_irqrestore(&smc->lock, flags);
1644
1645 return;
1646}
1647
1648/*======================================================================
1649
1650 Senses when a card's config changes. Here, it's coax or TP.
1651
1652======================================================================*/
1653
1654static int s9k_config(struct net_device *dev, struct ifmap *map)
1655{
1656 struct smc_private *smc = netdev_priv(dev);
1657 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1658 if (smc->cfg & CFG_MII_SELECT)
1659 return -EOPNOTSUPP;
1660 else if (map->port > 2)
1661 return -EINVAL;
1662 dev->if_port = map->port;
1663 printk(KERN_INFO "%s: switched to %s port\n",
1664 dev->name, if_names[dev->if_port]);
1665 smc_reset(dev);
1666 }
1667 return 0;
1668}
1669
1670/*======================================================================
1671
1672 Reset the chip, reloading every register that might be corrupted.
1673
1674======================================================================*/
1675
1676/*
1677 Set transceiver type, perhaps to something other than what the user
1678 specified in dev->if_port.
1679*/
1680static void smc_set_xcvr(struct net_device *dev, int if_port)
1681{
1682 struct smc_private *smc = netdev_priv(dev);
906da809 1683 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1684 u_short saved_bank;
1685
1686 saved_bank = inw(ioaddr + BANK_SELECT);
1687 SMC_SELECT_BANK(1);
1688 if (if_port == 2) {
1689 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1690 if ((smc->manfid == MANFID_OSITECH) &&
1691 (smc->cardid != PRODID_OSITECH_SEVEN))
1692 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1693 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1694 } else {
1695 outw(smc->cfg, ioaddr + CONFIG);
1696 if ((smc->manfid == MANFID_OSITECH) &&
1697 (smc->cardid != PRODID_OSITECH_SEVEN))
1698 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1699 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1700 }
1701 SMC_SELECT_BANK(saved_bank);
1702}
1703
1704static void smc_reset(struct net_device *dev)
1705{
906da809 1706 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1707 struct smc_private *smc = netdev_priv(dev);
1708 int i;
1709
dd0fab5b 1710 pr_debug("%s: smc91c92 reset called.\n", dev->name);
1da177e4
LT		 1711
1712 /* The first interaction must be a write to bring the chip out
1713 of sleep mode. */
1714 SMC_SELECT_BANK(0);
1715 /* Reset the chip. */
1716 outw(RCR_SOFTRESET, ioaddr + RCR);
1717 udelay(10);
1718
1719 /* Clear the transmit and receive configuration registers. */
1720 outw(RCR_CLEAR, ioaddr + RCR);
1721 outw(TCR_CLEAR, ioaddr + TCR);
1722
1723 /* Set the Window 1 control, configuration and station addr registers.
1724 No point in writing the I/O base register ;-> */
1725 SMC_SELECT_BANK(1);
d6e05edc 1726 /* Automatically release successfully transmitted packets,
1da177e4
LT		 1727 Accept link errors, counter and Tx error interrupts. */
1728 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1729 ioaddr + CONTROL);
1730 smc_set_xcvr(dev, dev->if_port);
1731 if ((smc->manfid == MANFID_OSITECH) &&
1732 (smc->cardid != PRODID_OSITECH_SEVEN))
1733 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1734 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1735 ioaddr - 0x10 + OSITECH_AUI_PWR);
1736
1737 /* Fill in the physical address. The databook is wrong about the order! */
1738 for (i = 0; i < 6; i += 2)
1739 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1740 ioaddr + ADDR0 + i);
1741
1742 /* Reset the MMU */
1743 SMC_SELECT_BANK(2);
1744 outw(MC_RESET, ioaddr + MMU_CMD);
1745 outw(0, ioaddr + INTERRUPT);
1746
1747 /* Re-enable the chip. */
1748 SMC_SELECT_BANK(0);
1749 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1750 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1751 set_rx_mode(dev);
1752
1753 if (smc->cfg & CFG_MII_SELECT) {
1754 SMC_SELECT_BANK(3);
1755
1756 /* Reset MII */
1757 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1758
1759 /* Advertise 100F, 100H, 10F, 10H */
1760 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1761
1762 /* Restart MII autonegotiation */
1763 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1764 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1765 }
1766
1767 /* Enable interrupts. */
1768 SMC_SELECT_BANK(2);
1769 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1770 ioaddr + INTERRUPT);
1771}
1772
1773/*======================================================================
1774
1775 Media selection timer routine
1776
1777======================================================================*/
1778
1779static void media_check(u_long arg)
1780{
1781 struct net_device *dev = (struct net_device *) arg;
1782 struct smc_private *smc = netdev_priv(dev);
906da809 1783 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1784 u_short i, media, saved_bank;
1785 u_short link;
85e27831
K		 1786 unsigned long flags;
1787
1788 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1789
1790 saved_bank = inw(ioaddr + BANK_SELECT);
1791
1792 if (!netif_device_present(dev))
1793 goto reschedule;
1794
1795 SMC_SELECT_BANK(2);
1796
1797 /* need MC_RESET to keep the memory consistent. errata? */
1798 if (smc->rx_ovrn) {
1799 outw(MC_RESET, ioaddr + MMU_CMD);
1800 smc->rx_ovrn = 0;
1801 }
1802 i = inw(ioaddr + INTERRUPT);
1803 SMC_SELECT_BANK(0);
1804 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1805 SMC_SELECT_BANK(1);
1806 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1807
1808 /* Check for pending interrupt with watchdog flag set: with
1809 this, we can limp along even if the interrupt is blocked */
1810 if (smc->watchdog++ && ((i>>8) & i)) {
1811 if (!smc->fast_poll)
1812 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
e363d138 1813 smc_interrupt(dev->irq, dev);
1da177e4
LT		 1814 smc->fast_poll = HZ;
1815 }
1816 if (smc->fast_poll) {
1817 smc->fast_poll--;
1818 smc->media.expires = jiffies + HZ/100;
1819 add_timer(&smc->media);
1820 SMC_SELECT_BANK(saved_bank);
85e27831 1821 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1822 return;
1823 }
1824
1825 if (smc->cfg & CFG_MII_SELECT) {
1826 if (smc->mii_if.phy_id < 0)
1827 goto reschedule;
1828
1829 SMC_SELECT_BANK(3);
1830 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1831 if (!link || (link == 0xffff)) {
1832 printk(KERN_INFO "%s: MII is missing!\n", dev->name);
1833 smc->mii_if.phy_id = -1;
1834 goto reschedule;
1835 }
1836
1837 link &= 0x0004;
1838 if (link != smc->link_status) {
1839 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1840 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1841 (link) ? "found" : "lost");
1842 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1843 ? TCR_FDUPLX : 0);
1844 if (link) {
1845 printk(KERN_INFO "%s: autonegotiation complete: "
1846 "%sbaseT-%cD selected\n", dev->name,
1847 ((p & 0x0180) ? "100" : "10"),
1848 (smc->duplex ? 'F' : 'H'));
1849 }
1850 SMC_SELECT_BANK(0);
1851 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1852 smc->link_status = link;
1853 }
1854 goto reschedule;
1855 }
1856
1857 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1858 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT		 1859 if (smc->tx_err || (smc->media_status & EPH_16COL))
1860 media |= EPH_16COL;
1861 }
1862 smc->tx_err = 0;
1863
1864 if (media != smc->media_status) {
1865 if ((media & smc->media_status & 1) &&
1866 ((smc->media_status ^ media) & EPH_LINK_OK))
1867 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1868 (smc->media_status & EPH_LINK_OK ? "lost" : "found"));
1869 else if ((media & smc->media_status & 2) &&
1870 ((smc->media_status ^ media) & EPH_16COL))
1871 printk(KERN_INFO "%s: coax cable %s\n", dev->name,
1872 (media & EPH_16COL ? "problem" : "ok"));
1873 if (dev->if_port == 0) {
1874 if (media & 1) {
1875 if (media & EPH_LINK_OK)
1876 printk(KERN_INFO "%s: flipped to 10baseT\n",
1877 dev->name);
1878 else
1879 smc_set_xcvr(dev, 2);
1880 } else {
1881 if (media & EPH_16COL)
1882 smc_set_xcvr(dev, 1);
1883 else
1884 printk(KERN_INFO "%s: flipped to 10base2\n",
1885 dev->name);
1886 }
1887 }
1888 smc->media_status = media;
1889 }
1890
1891reschedule:
1892 smc->media.expires = jiffies + HZ;
1893 add_timer(&smc->media);
1894 SMC_SELECT_BANK(saved_bank);
85e27831 1895 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1896}
1897
1898static int smc_link_ok(struct net_device *dev)
1899{
906da809 1900 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1901 struct smc_private *smc = netdev_priv(dev);
1902
1903 if (smc->cfg & CFG_MII_SELECT) {
1904 return mii_link_ok(&smc->mii_if);
1905 } else {
1906 SMC_SELECT_BANK(0);
1907 return inw(ioaddr + EPH) & EPH_LINK_OK;
1908 }
1909}
1910
1911static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1912{
1913 u16 tmp;
906da809 1914 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1915
1916 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1917 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1918
1919 SMC_SELECT_BANK(1);
1920 tmp = inw(ioaddr + CONFIG);
1921 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1922 ecmd->transceiver = XCVR_INTERNAL;
1923 ecmd->speed = SPEED_10;
1924 ecmd->phy_address = ioaddr + MGMT;
1925
1926 SMC_SELECT_BANK(0);
1927 tmp = inw(ioaddr + TCR);
1928 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1929
1930 return 0;
1931}
1932
1933static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1934{
1935 u16 tmp;
906da809 1936 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1937
1938 if (ecmd->speed != SPEED_10)
1939 return -EINVAL;
1940 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1941 return -EINVAL;
1942 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1943 return -EINVAL;
1944 if (ecmd->transceiver != XCVR_INTERNAL)
1945 return -EINVAL;
1946
1947 if (ecmd->port == PORT_AUI)
1948 smc_set_xcvr(dev, 1);
1949 else
1950 smc_set_xcvr(dev, 0);
1951
1952 SMC_SELECT_BANK(0);
1953 tmp = inw(ioaddr + TCR);
1954 if (ecmd->duplex == DUPLEX_FULL)
1955 tmp |= TCR_FDUPLX;
1956 else
1957 tmp &= ~TCR_FDUPLX;
1958 outw(tmp, ioaddr + TCR);
1959
1960 return 0;
1961}
1962
1963static int check_if_running(struct net_device *dev)
1964{
1965 if (!netif_running(dev))
1966 return -EINVAL;
1967 return 0;
1968}
1969
1970static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1971{
1972 strcpy(info->driver, DRV_NAME);
1973 strcpy(info->version, DRV_VERSION);
1974}
1975
1976static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1977{
1978 struct smc_private *smc = netdev_priv(dev);
906da809 1979 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1980 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1981 int ret;
1982
1da177e4 1983 spin_lock_irq(&smc->lock);
85e27831 1984 SMC_SELECT_BANK(3);
1da177e4
LT		 1985 if (smc->cfg & CFG_MII_SELECT)
1986 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1987 else
1988 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1989 SMC_SELECT_BANK(saved_bank);
85e27831 1990 spin_unlock_irq(&smc->lock);
1da177e4
LT		 1991 return ret;
1992}
1993
1994static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1995{
1996 struct smc_private *smc = netdev_priv(dev);
906da809 1997 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1998 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1999 int ret;
2000
1da177e4 2001 spin_lock_irq(&smc->lock);
85e27831 2002 SMC_SELECT_BANK(3);
1da177e4
LT		 2003 if (smc->cfg & CFG_MII_SELECT)
2004 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
2005 else
2006 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 2007 SMC_SELECT_BANK(saved_bank);
85e27831 2008 spin_unlock_irq(&smc->lock);
1da177e4
LT		 2009 return ret;
2010}
2011
2012static u32 smc_get_link(struct net_device *dev)
2013{
2014 struct smc_private *smc = netdev_priv(dev);
906da809 2015 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2016 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2017 u32 ret;
2018
1da177e4 2019 spin_lock_irq(&smc->lock);
85e27831 2020 SMC_SELECT_BANK(3);
1da177e4 2021 ret = smc_link_ok(dev);
1da177e4 2022 SMC_SELECT_BANK(saved_bank);
85e27831 2023 spin_unlock_irq(&smc->lock);
1da177e4
LT		 2024 return ret;
2025}
2026
1da177e4
LT		 2027static int smc_nway_reset(struct net_device *dev)
2028{
2029 struct smc_private *smc = netdev_priv(dev);
2030 if (smc->cfg & CFG_MII_SELECT) {
906da809 2031 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2032 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2033 int res;
2034
2035 SMC_SELECT_BANK(3);
2036 res = mii_nway_restart(&smc->mii_if);
2037 SMC_SELECT_BANK(saved_bank);
2038
2039 return res;
2040 } else
2041 return -EOPNOTSUPP;
2042}
2043
7282d491 2044static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 2045 .begin = check_if_running,
2046 .get_drvinfo = smc_get_drvinfo,
2047 .get_settings = smc_get_settings,
2048 .set_settings = smc_set_settings,
2049 .get_link = smc_get_link,
1da177e4
LT		 2050 .nway_reset = smc_nway_reset,
2051};
2052
2053static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2054{
2055 struct smc_private *smc = netdev_priv(dev);
2056 struct mii_ioctl_data *mii = if_mii(rq);
2057 int rc = 0;
2058 u16 saved_bank;
906da809 2059 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2060
2061 if (!netif_running(dev))
2062 return -EINVAL;
2063
2064 spin_lock_irq(&smc->lock);
2065 saved_bank = inw(ioaddr + BANK_SELECT);
2066 SMC_SELECT_BANK(3);
2067 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2068 SMC_SELECT_BANK(saved_bank);
2069 spin_unlock_irq(&smc->lock);
2070 return rc;
2071}
2072
5c672220
DB		 2073static struct pcmcia_device_id smc91c92_ids[] = {
2074 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2075 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2076 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2077 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2078 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2079 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2080 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2081 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K		 2082 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2083 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB		 2084 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2085 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2086 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2087 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2088 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2089 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2090 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2091 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2092 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K		 2093 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2094 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB		 2095 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2096 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2097 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2098 /* These conflict with other cards! */
2099 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2100 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2101 PCMCIA_DEVICE_NULL,
2102};
2103MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2104
1da177e4
LT		 2105static struct pcmcia_driver smc91c92_cs_driver = {
2106 .owner = THIS_MODULE,
2107 .drv = {
2108 .name = "smc91c92_cs",
2109 },
15b99ac1 2110 .probe = smc91c92_probe,
cc3b4866 2111 .remove = smc91c92_detach,
5c672220 2112 .id_table = smc91c92_ids,
98e4c28b
DB		 2113 .suspend = smc91c92_suspend,
2114 .resume = smc91c92_resume,
1da177e4
LT		 2115};
2116
2117static int __init init_smc91c92_cs(void)
2118{
2119 return pcmcia_register_driver(&smc91c92_cs_driver);
2120}
2121
2122static void __exit exit_smc91c92_cs(void)
2123{
2124 pcmcia_unregister_driver(&smc91c92_cs_driver);
1da177e4
LT		 2125}
2126
2127module_init(init_smc91c92_cs);
2128module_exit(exit_smc91c92_cs);
Linux kernel - Deliverables
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