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d0507009 DC |
1 | /* |
2 | * drivers/net/phy/micrel.c | |
3 | * | |
4 | * Driver for Micrel PHYs | |
5 | * | |
6 | * Author: David J. Choi | |
7 | * | |
8 | * Copyright (c) 2010 Micrel, Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | * | |
51f932c4 CD |
15 | * Support : ksz9021 1000/100/10 phy from Micrel |
16 | * ks8001, ks8737, ks8721, ks8041, ks8051 100/10 phy | |
d0507009 DC |
17 | */ |
18 | ||
19 | #include <linux/kernel.h> | |
20 | #include <linux/module.h> | |
21 | #include <linux/phy.h> | |
d606ef3f | 22 | #include <linux/micrel_phy.h> |
d0507009 | 23 | |
51f932c4 CD |
24 | /* general Interrupt control/status reg in vendor specific block. */ |
25 | #define MII_KSZPHY_INTCS 0x1B | |
26 | #define KSZPHY_INTCS_JABBER (1 << 15) | |
27 | #define KSZPHY_INTCS_RECEIVE_ERR (1 << 14) | |
28 | #define KSZPHY_INTCS_PAGE_RECEIVE (1 << 13) | |
29 | #define KSZPHY_INTCS_PARELLEL (1 << 12) | |
30 | #define KSZPHY_INTCS_LINK_PARTNER_ACK (1 << 11) | |
31 | #define KSZPHY_INTCS_LINK_DOWN (1 << 10) | |
32 | #define KSZPHY_INTCS_REMOTE_FAULT (1 << 9) | |
33 | #define KSZPHY_INTCS_LINK_UP (1 << 8) | |
34 | #define KSZPHY_INTCS_ALL (KSZPHY_INTCS_LINK_UP |\ | |
35 | KSZPHY_INTCS_LINK_DOWN) | |
36 | ||
37 | /* general PHY control reg in vendor specific block. */ | |
38 | #define MII_KSZPHY_CTRL 0x1F | |
39 | /* bitmap of PHY register to set interrupt mode */ | |
40 | #define KSZPHY_CTRL_INT_ACTIVE_HIGH (1 << 9) | |
41 | #define KSZ9021_CTRL_INT_ACTIVE_HIGH (1 << 14) | |
42 | #define KS8737_CTRL_INT_ACTIVE_HIGH (1 << 14) | |
d606ef3f | 43 | #define KSZ8051_RMII_50MHZ_CLK (1 << 7) |
51f932c4 CD |
44 | |
45 | static int kszphy_ack_interrupt(struct phy_device *phydev) | |
46 | { | |
47 | /* bit[7..0] int status, which is a read and clear register. */ | |
48 | int rc; | |
49 | ||
50 | rc = phy_read(phydev, MII_KSZPHY_INTCS); | |
51 | ||
52 | return (rc < 0) ? rc : 0; | |
53 | } | |
54 | ||
55 | static int kszphy_set_interrupt(struct phy_device *phydev) | |
56 | { | |
57 | int temp; | |
58 | temp = (PHY_INTERRUPT_ENABLED == phydev->interrupts) ? | |
59 | KSZPHY_INTCS_ALL : 0; | |
60 | return phy_write(phydev, MII_KSZPHY_INTCS, temp); | |
61 | } | |
62 | ||
63 | static int kszphy_config_intr(struct phy_device *phydev) | |
64 | { | |
65 | int temp, rc; | |
66 | ||
67 | /* set the interrupt pin active low */ | |
68 | temp = phy_read(phydev, MII_KSZPHY_CTRL); | |
69 | temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH; | |
70 | phy_write(phydev, MII_KSZPHY_CTRL, temp); | |
71 | rc = kszphy_set_interrupt(phydev); | |
72 | return rc < 0 ? rc : 0; | |
73 | } | |
74 | ||
75 | static int ksz9021_config_intr(struct phy_device *phydev) | |
76 | { | |
77 | int temp, rc; | |
78 | ||
79 | /* set the interrupt pin active low */ | |
80 | temp = phy_read(phydev, MII_KSZPHY_CTRL); | |
81 | temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH; | |
82 | phy_write(phydev, MII_KSZPHY_CTRL, temp); | |
83 | rc = kszphy_set_interrupt(phydev); | |
84 | return rc < 0 ? rc : 0; | |
85 | } | |
86 | ||
87 | static int ks8737_config_intr(struct phy_device *phydev) | |
88 | { | |
89 | int temp, rc; | |
90 | ||
91 | /* set the interrupt pin active low */ | |
92 | temp = phy_read(phydev, MII_KSZPHY_CTRL); | |
93 | temp &= ~KS8737_CTRL_INT_ACTIVE_HIGH; | |
94 | phy_write(phydev, MII_KSZPHY_CTRL, temp); | |
95 | rc = kszphy_set_interrupt(phydev); | |
96 | return rc < 0 ? rc : 0; | |
97 | } | |
d0507009 DC |
98 | |
99 | static int kszphy_config_init(struct phy_device *phydev) | |
100 | { | |
101 | return 0; | |
102 | } | |
103 | ||
d606ef3f BS |
104 | static int ks8051_config_init(struct phy_device *phydev) |
105 | { | |
106 | int regval; | |
107 | ||
108 | if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) { | |
109 | regval = phy_read(phydev, MII_KSZPHY_CTRL); | |
110 | regval |= KSZ8051_RMII_50MHZ_CLK; | |
111 | phy_write(phydev, MII_KSZPHY_CTRL, regval); | |
112 | } | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
51f932c4 CD |
117 | static struct phy_driver ks8737_driver = { |
118 | .phy_id = PHY_ID_KS8737, | |
119 | .phy_id_mask = 0x00fffff0, | |
120 | .name = "Micrel KS8737", | |
121 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), | |
122 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, | |
123 | .config_init = kszphy_config_init, | |
124 | .config_aneg = genphy_config_aneg, | |
125 | .read_status = genphy_read_status, | |
126 | .ack_interrupt = kszphy_ack_interrupt, | |
127 | .config_intr = ks8737_config_intr, | |
128 | .driver = { .owner = THIS_MODULE,}, | |
129 | }; | |
130 | ||
131 | static struct phy_driver ks8041_driver = { | |
132 | .phy_id = PHY_ID_KS8041, | |
133 | .phy_id_mask = 0x00fffff0, | |
134 | .name = "Micrel KS8041", | |
135 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause | |
136 | | SUPPORTED_Asym_Pause), | |
137 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, | |
138 | .config_init = kszphy_config_init, | |
139 | .config_aneg = genphy_config_aneg, | |
140 | .read_status = genphy_read_status, | |
141 | .ack_interrupt = kszphy_ack_interrupt, | |
142 | .config_intr = kszphy_config_intr, | |
143 | .driver = { .owner = THIS_MODULE,}, | |
144 | }; | |
d0507009 | 145 | |
51f932c4 CD |
146 | static struct phy_driver ks8051_driver = { |
147 | .phy_id = PHY_ID_KS8051, | |
d0507009 | 148 | .phy_id_mask = 0x00fffff0, |
51f932c4 CD |
149 | .name = "Micrel KS8051", |
150 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause | |
151 | | SUPPORTED_Asym_Pause), | |
152 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, | |
d606ef3f | 153 | .config_init = ks8051_config_init, |
d0507009 DC |
154 | .config_aneg = genphy_config_aneg, |
155 | .read_status = genphy_read_status, | |
51f932c4 CD |
156 | .ack_interrupt = kszphy_ack_interrupt, |
157 | .config_intr = kszphy_config_intr, | |
d0507009 DC |
158 | .driver = { .owner = THIS_MODULE,}, |
159 | }; | |
160 | ||
51f932c4 CD |
161 | static struct phy_driver ks8001_driver = { |
162 | .phy_id = PHY_ID_KS8001, | |
163 | .name = "Micrel KS8001 or KS8721", | |
d0507009 | 164 | .phy_id_mask = 0x00fffff0, |
51f932c4 CD |
165 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), |
166 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, | |
d0507009 DC |
167 | .config_init = kszphy_config_init, |
168 | .config_aneg = genphy_config_aneg, | |
169 | .read_status = genphy_read_status, | |
51f932c4 CD |
170 | .ack_interrupt = kszphy_ack_interrupt, |
171 | .config_intr = kszphy_config_intr, | |
d0507009 DC |
172 | .driver = { .owner = THIS_MODULE,}, |
173 | }; | |
174 | ||
175 | static struct phy_driver ksz9021_driver = { | |
176 | .phy_id = PHY_ID_KSZ9021, | |
177 | .phy_id_mask = 0x000fff10, | |
178 | .name = "Micrel KSZ9021 Gigabit PHY", | |
51f932c4 CD |
179 | .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause |
180 | | SUPPORTED_Asym_Pause), | |
181 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, | |
d0507009 DC |
182 | .config_init = kszphy_config_init, |
183 | .config_aneg = genphy_config_aneg, | |
184 | .read_status = genphy_read_status, | |
51f932c4 CD |
185 | .ack_interrupt = kszphy_ack_interrupt, |
186 | .config_intr = ksz9021_config_intr, | |
d0507009 DC |
187 | .driver = { .owner = THIS_MODULE, }, |
188 | }; | |
189 | ||
190 | static int __init ksphy_init(void) | |
191 | { | |
192 | int ret; | |
193 | ||
194 | ret = phy_driver_register(&ks8001_driver); | |
195 | if (ret) | |
196 | goto err1; | |
51f932c4 CD |
197 | |
198 | ret = phy_driver_register(&ksz9021_driver); | |
d0507009 DC |
199 | if (ret) |
200 | goto err2; | |
201 | ||
51f932c4 | 202 | ret = phy_driver_register(&ks8737_driver); |
d0507009 DC |
203 | if (ret) |
204 | goto err3; | |
51f932c4 CD |
205 | ret = phy_driver_register(&ks8041_driver); |
206 | if (ret) | |
207 | goto err4; | |
208 | ret = phy_driver_register(&ks8051_driver); | |
209 | if (ret) | |
210 | goto err5; | |
211 | ||
d0507009 DC |
212 | return 0; |
213 | ||
51f932c4 CD |
214 | err5: |
215 | phy_driver_unregister(&ks8041_driver); | |
216 | err4: | |
217 | phy_driver_unregister(&ks8737_driver); | |
d0507009 | 218 | err3: |
51f932c4 | 219 | phy_driver_unregister(&ksz9021_driver); |
d0507009 DC |
220 | err2: |
221 | phy_driver_unregister(&ks8001_driver); | |
222 | err1: | |
223 | return ret; | |
224 | } | |
225 | ||
226 | static void __exit ksphy_exit(void) | |
227 | { | |
228 | phy_driver_unregister(&ks8001_driver); | |
51f932c4 | 229 | phy_driver_unregister(&ks8737_driver); |
d0507009 | 230 | phy_driver_unregister(&ksz9021_driver); |
51f932c4 CD |
231 | phy_driver_unregister(&ks8041_driver); |
232 | phy_driver_unregister(&ks8051_driver); | |
d0507009 DC |
233 | } |
234 | ||
235 | module_init(ksphy_init); | |
236 | module_exit(ksphy_exit); | |
237 | ||
238 | MODULE_DESCRIPTION("Micrel PHY driver"); | |
239 | MODULE_AUTHOR("David J. Choi"); | |
240 | MODULE_LICENSE("GPL"); | |
52a60ed2 | 241 | |
cf93c945 | 242 | static struct mdio_device_id __maybe_unused micrel_tbl[] = { |
52a60ed2 | 243 | { PHY_ID_KSZ9021, 0x000fff10 }, |
52a60ed2 | 244 | { PHY_ID_KS8001, 0x00fffff0 }, |
51f932c4 CD |
245 | { PHY_ID_KS8737, 0x00fffff0 }, |
246 | { PHY_ID_KS8041, 0x00fffff0 }, | |
247 | { PHY_ID_KS8051, 0x00fffff0 }, | |
52a60ed2 DM |
248 | { } |
249 | }; | |
250 | ||
251 | MODULE_DEVICE_TABLE(mdio, micrel_tbl); |