brcmfmac: remove unnecessary EXPORT_SYMBOL() usage
[deliverable/linux.git] / drivers / net / phy / phy.c
CommitLineData
00db8189
AF
1/*
2 * drivers/net/phy/phy.c
3 *
4 * Framework for configuring and reading PHY devices
5 * Based on code in sungem_phy.c and gianfar_phy.c
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 10 * Copyright (c) 2006, 2007 Maciej W. Rozycki
00db8189
AF
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
8d242488
JP
18
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
00db8189 21#include <linux/kernel.h>
00db8189
AF
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/unistd.h>
00db8189
AF
25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/skbuff.h>
00db8189
AF
31#include <linux/mm.h>
32#include <linux/module.h>
00db8189
AF
33#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
3c3070d7
MR
36#include <linux/timer.h>
37#include <linux/workqueue.h>
a59a4d19 38#include <linux/mdio.h>
00db8189 39
60063497 40#include <linux/atomic.h>
00db8189
AF
41#include <asm/io.h>
42#include <asm/irq.h>
43#include <asm/uaccess.h>
44
b3df0da8
RD
45/**
46 * phy_print_status - Convenience function to print out the current phy status
47 * @phydev: the phy_device struct
e1393456
AF
48 */
49void phy_print_status(struct phy_device *phydev)
50{
e1393456 51 if (phydev->link)
8d242488
JP
52 pr_info("%s - Link is Up - %d/%s\n",
53 dev_name(&phydev->dev),
54 phydev->speed,
55 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
56 else
57 pr_info("%s - Link is Down\n", dev_name(&phydev->dev));
e1393456
AF
58}
59EXPORT_SYMBOL(phy_print_status);
00db8189 60
b3df0da8
RD
61/**
62 * phy_clear_interrupt - Ack the phy device's interrupt
63 * @phydev: the phy_device struct
64 *
65 * If the @phydev driver has an ack_interrupt function, call it to
66 * ack and clear the phy device's interrupt.
67 *
68 * Returns 0 on success on < 0 on error.
69 */
89ff05ec 70static int phy_clear_interrupt(struct phy_device *phydev)
00db8189
AF
71{
72 int err = 0;
73
74 if (phydev->drv->ack_interrupt)
75 err = phydev->drv->ack_interrupt(phydev);
76
77 return err;
78}
79
b3df0da8
RD
80/**
81 * phy_config_interrupt - configure the PHY device for the requested interrupts
82 * @phydev: the phy_device struct
83 * @interrupts: interrupt flags to configure for this @phydev
84 *
85 * Returns 0 on success on < 0 on error.
86 */
89ff05ec 87static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189
AF
88{
89 int err = 0;
90
91 phydev->interrupts = interrupts;
92 if (phydev->drv->config_intr)
93 err = phydev->drv->config_intr(phydev);
94
95 return err;
96}
97
98
b3df0da8
RD
99/**
100 * phy_aneg_done - return auto-negotiation status
101 * @phydev: target phy_device struct
00db8189 102 *
b3df0da8 103 * Description: Reads the status register and returns 0 either if
00db8189
AF
104 * auto-negotiation is incomplete, or if there was an error.
105 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
106 */
107static inline int phy_aneg_done(struct phy_device *phydev)
108{
109 int retval;
110
111 retval = phy_read(phydev, MII_BMSR);
112
113 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
114}
115
00db8189
AF
116/* A structure for mapping a particular speed and duplex
117 * combination to a particular SUPPORTED and ADVERTISED value */
118struct phy_setting {
119 int speed;
120 int duplex;
121 u32 setting;
122};
123
124/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 125static const struct phy_setting settings[] = {
00db8189
AF
126 {
127 .speed = 10000,
128 .duplex = DUPLEX_FULL,
129 .setting = SUPPORTED_10000baseT_Full,
130 },
131 {
132 .speed = SPEED_1000,
133 .duplex = DUPLEX_FULL,
134 .setting = SUPPORTED_1000baseT_Full,
135 },
136 {
137 .speed = SPEED_1000,
138 .duplex = DUPLEX_HALF,
139 .setting = SUPPORTED_1000baseT_Half,
140 },
141 {
142 .speed = SPEED_100,
143 .duplex = DUPLEX_FULL,
144 .setting = SUPPORTED_100baseT_Full,
145 },
146 {
147 .speed = SPEED_100,
148 .duplex = DUPLEX_HALF,
149 .setting = SUPPORTED_100baseT_Half,
150 },
151 {
152 .speed = SPEED_10,
153 .duplex = DUPLEX_FULL,
154 .setting = SUPPORTED_10baseT_Full,
155 },
156 {
157 .speed = SPEED_10,
158 .duplex = DUPLEX_HALF,
159 .setting = SUPPORTED_10baseT_Half,
160 },
161};
162
ff8ac609 163#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 164
b3df0da8
RD
165/**
166 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
167 * @speed: speed to match
168 * @duplex: duplex to match
00db8189 169 *
b3df0da8 170 * Description: Searches the settings array for the setting which
00db8189
AF
171 * matches the desired speed and duplex, and returns the index
172 * of that setting. Returns the index of the last setting if
173 * none of the others match.
174 */
175static inline int phy_find_setting(int speed, int duplex)
176{
177 int idx = 0;
178
179 while (idx < ARRAY_SIZE(settings) &&
180 (settings[idx].speed != speed ||
181 settings[idx].duplex != duplex))
182 idx++;
183
184 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
185}
186
b3df0da8
RD
187/**
188 * phy_find_valid - find a PHY setting that matches the requested features mask
189 * @idx: The first index in settings[] to search
190 * @features: A mask of the valid settings
00db8189 191 *
b3df0da8 192 * Description: Returns the index of the first valid setting less
00db8189
AF
193 * than or equal to the one pointed to by idx, as determined by
194 * the mask in features. Returns the index of the last setting
195 * if nothing else matches.
196 */
197static inline int phy_find_valid(int idx, u32 features)
198{
199 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
200 idx++;
201
202 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
203}
204
b3df0da8
RD
205/**
206 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
207 * @phydev: the target phy_device struct
00db8189 208 *
b3df0da8 209 * Description: Make sure the PHY is set to supported speeds and
00db8189 210 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 211 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 212 */
89ff05ec 213static void phy_sanitize_settings(struct phy_device *phydev)
00db8189
AF
214{
215 u32 features = phydev->supported;
216 int idx;
217
218 /* Sanitize settings based on PHY capabilities */
219 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 220 phydev->autoneg = AUTONEG_DISABLE;
00db8189
AF
221
222 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
223 features);
224
225 phydev->speed = settings[idx].speed;
226 phydev->duplex = settings[idx].duplex;
227}
00db8189 228
b3df0da8
RD
229/**
230 * phy_ethtool_sset - generic ethtool sset function, handles all the details
231 * @phydev: target phy_device struct
232 * @cmd: ethtool_cmd
00db8189
AF
233 *
234 * A few notes about parameter checking:
235 * - We don't set port or transceiver, so we don't care what they
236 * were set to.
237 * - phy_start_aneg() will make sure forced settings are sane, and
238 * choose the next best ones from the ones selected, so we don't
b3df0da8 239 * care if ethtool tries to give us bad values.
00db8189
AF
240 */
241int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
242{
25db0338
DD
243 u32 speed = ethtool_cmd_speed(cmd);
244
00db8189
AF
245 if (cmd->phy_address != phydev->addr)
246 return -EINVAL;
247
248 /* We make sure that we don't pass unsupported
249 * values in to the PHY */
250 cmd->advertising &= phydev->supported;
251
252 /* Verify the settings we care about. */
253 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
254 return -EINVAL;
255
256 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
257 return -EINVAL;
258
8e95a202 259 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
260 ((speed != SPEED_1000 &&
261 speed != SPEED_100 &&
262 speed != SPEED_10) ||
8e95a202
JP
263 (cmd->duplex != DUPLEX_HALF &&
264 cmd->duplex != DUPLEX_FULL)))
00db8189
AF
265 return -EINVAL;
266
267 phydev->autoneg = cmd->autoneg;
268
25db0338 269 phydev->speed = speed;
00db8189
AF
270
271 phydev->advertising = cmd->advertising;
272
273 if (AUTONEG_ENABLE == cmd->autoneg)
274 phydev->advertising |= ADVERTISED_Autoneg;
275 else
276 phydev->advertising &= ~ADVERTISED_Autoneg;
277
278 phydev->duplex = cmd->duplex;
279
280 /* Restart the PHY */
281 phy_start_aneg(phydev);
282
283 return 0;
284}
9f6d55d0 285EXPORT_SYMBOL(phy_ethtool_sset);
00db8189
AF
286
287int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
288{
289 cmd->supported = phydev->supported;
290
291 cmd->advertising = phydev->advertising;
292
70739497 293 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189
AF
294 cmd->duplex = phydev->duplex;
295 cmd->port = PORT_MII;
296 cmd->phy_address = phydev->addr;
4284b6a5
FF
297 cmd->transceiver = phy_is_internal(phydev) ?
298 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189
AF
299 cmd->autoneg = phydev->autoneg;
300
301 return 0;
302}
9f6d55d0 303EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 304
b3df0da8
RD
305/**
306 * phy_mii_ioctl - generic PHY MII ioctl interface
307 * @phydev: the phy_device struct
00c7d920 308 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
309 * @cmd: ioctl cmd to execute
310 *
311 * Note that this function is currently incompatible with the
00db8189 312 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 313 * current state. Use at own risk.
00db8189
AF
314 */
315int phy_mii_ioctl(struct phy_device *phydev,
28b04113 316 struct ifreq *ifr, int cmd)
00db8189 317{
28b04113 318 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189
AF
319 u16 val = mii_data->val_in;
320
321 switch (cmd) {
322 case SIOCGMIIPHY:
323 mii_data->phy_id = phydev->addr;
c6d6a511
LB
324 /* fall through */
325
00db8189 326 case SIOCGMIIREG:
af1dc13e
PK
327 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
328 mii_data->reg_num);
00db8189
AF
329 break;
330
331 case SIOCSMIIREG:
00db8189
AF
332 if (mii_data->phy_id == phydev->addr) {
333 switch(mii_data->reg_num) {
334 case MII_BMCR:
163642a2 335 if ((val & (BMCR_RESET|BMCR_ANENABLE)) == 0)
00db8189
AF
336 phydev->autoneg = AUTONEG_DISABLE;
337 else
338 phydev->autoneg = AUTONEG_ENABLE;
339 if ((!phydev->autoneg) && (val & BMCR_FULLDPLX))
340 phydev->duplex = DUPLEX_FULL;
341 else
342 phydev->duplex = DUPLEX_HALF;
024a0a3c
SL
343 if ((!phydev->autoneg) &&
344 (val & BMCR_SPEED1000))
345 phydev->speed = SPEED_1000;
346 else if ((!phydev->autoneg) &&
347 (val & BMCR_SPEED100))
348 phydev->speed = SPEED_100;
00db8189
AF
349 break;
350 case MII_ADVERTISE:
351 phydev->advertising = val;
352 break;
353 default:
354 /* do nothing */
355 break;
356 }
357 }
358
af1dc13e
PK
359 mdiobus_write(phydev->bus, mii_data->phy_id,
360 mii_data->reg_num, val);
361
8e95a202
JP
362 if (mii_data->reg_num == MII_BMCR &&
363 val & BMCR_RESET &&
364 phydev->drv->config_init) {
f62220d3 365 phy_scan_fixups(phydev);
00db8189 366 phydev->drv->config_init(phydev);
f62220d3 367 }
00db8189 368 break;
dda93b48 369
c1f19b51
RC
370 case SIOCSHWTSTAMP:
371 if (phydev->drv->hwtstamp)
372 return phydev->drv->hwtstamp(phydev, ifr);
373 /* fall through */
374
dda93b48 375 default:
c6d6a511 376 return -EOPNOTSUPP;
00db8189
AF
377 }
378
379 return 0;
380}
680e9fe9 381EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 382
b3df0da8
RD
383/**
384 * phy_start_aneg - start auto-negotiation for this PHY device
385 * @phydev: the phy_device struct
e1393456 386 *
b3df0da8
RD
387 * Description: Sanitizes the settings (if we're not autonegotiating
388 * them), and then calls the driver's config_aneg function.
389 * If the PHYCONTROL Layer is operating, we change the state to
390 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
391 */
392int phy_start_aneg(struct phy_device *phydev)
393{
394 int err;
395
35b5f6b1 396 mutex_lock(&phydev->lock);
e1393456
AF
397
398 if (AUTONEG_DISABLE == phydev->autoneg)
399 phy_sanitize_settings(phydev);
400
401 err = phydev->drv->config_aneg(phydev);
402
e1393456
AF
403 if (err < 0)
404 goto out_unlock;
405
406 if (phydev->state != PHY_HALTED) {
407 if (AUTONEG_ENABLE == phydev->autoneg) {
408 phydev->state = PHY_AN;
409 phydev->link_timeout = PHY_AN_TIMEOUT;
410 } else {
411 phydev->state = PHY_FORCING;
412 phydev->link_timeout = PHY_FORCE_TIMEOUT;
413 }
414 }
415
416out_unlock:
35b5f6b1 417 mutex_unlock(&phydev->lock);
e1393456
AF
418 return err;
419}
420EXPORT_SYMBOL(phy_start_aneg);
421
422
b3df0da8
RD
423/**
424 * phy_start_machine - start PHY state machine tracking
425 * @phydev: the phy_device struct
426 * @handler: callback function for state change notifications
00db8189 427 *
b3df0da8 428 * Description: The PHY infrastructure can run a state machine
00db8189
AF
429 * which tracks whether the PHY is starting up, negotiating,
430 * etc. This function starts the timer which tracks the state
b3df0da8
RD
431 * of the PHY. If you want to be notified when the state changes,
432 * pass in the callback @handler, otherwise, pass NULL. If you
00db8189 433 * want to maintain your own state machine, do not call this
b3df0da8
RD
434 * function.
435 */
00db8189
AF
436void phy_start_machine(struct phy_device *phydev,
437 void (*handler)(struct net_device *))
438{
439 phydev->adjust_state = handler;
440
bbb47bde 441 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
442}
443
b3df0da8
RD
444/**
445 * phy_stop_machine - stop the PHY state machine tracking
446 * @phydev: target phy_device struct
00db8189 447 *
b3df0da8 448 * Description: Stops the state machine timer, sets the state to UP
817acf5e 449 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
450 * phy_detach.
451 */
452void phy_stop_machine(struct phy_device *phydev)
453{
a390d1f3 454 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 455
35b5f6b1 456 mutex_lock(&phydev->lock);
00db8189
AF
457 if (phydev->state > PHY_UP)
458 phydev->state = PHY_UP;
35b5f6b1 459 mutex_unlock(&phydev->lock);
00db8189 460
00db8189
AF
461 phydev->adjust_state = NULL;
462}
463
b3df0da8
RD
464/**
465 * phy_error - enter HALTED state for this PHY device
466 * @phydev: target phy_device struct
00db8189
AF
467 *
468 * Moves the PHY to the HALTED state in response to a read
469 * or write error, and tells the controller the link is down.
470 * Must not be called from interrupt context, or while the
471 * phydev->lock is held.
472 */
9b9a8bfc 473static void phy_error(struct phy_device *phydev)
00db8189 474{
35b5f6b1 475 mutex_lock(&phydev->lock);
00db8189 476 phydev->state = PHY_HALTED;
35b5f6b1 477 mutex_unlock(&phydev->lock);
00db8189
AF
478}
479
b3df0da8
RD
480/**
481 * phy_interrupt - PHY interrupt handler
482 * @irq: interrupt line
483 * @phy_dat: phy_device pointer
e1393456 484 *
b3df0da8 485 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
486 * interrupts, and schedules a work task to clear the interrupt.
487 */
7d12e780 488static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
489{
490 struct phy_device *phydev = phy_dat;
491
3c3070d7
MR
492 if (PHY_HALTED == phydev->state)
493 return IRQ_NONE; /* It can't be ours. */
494
e1393456
AF
495 /* The MDIO bus is not allowed to be written in interrupt
496 * context, so we need to disable the irq here. A work
497 * queue will write the PHY to disable and clear the
498 * interrupt, and then reenable the irq line. */
499 disable_irq_nosync(irq);
0ac49527 500 atomic_inc(&phydev->irq_disable);
e1393456 501
bbb47bde 502 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
503
504 return IRQ_HANDLED;
505}
506
b3df0da8
RD
507/**
508 * phy_enable_interrupts - Enable the interrupts from the PHY side
509 * @phydev: target phy_device struct
510 */
89ff05ec 511static int phy_enable_interrupts(struct phy_device *phydev)
00db8189
AF
512{
513 int err;
514
e1393456 515 err = phy_clear_interrupt(phydev);
00db8189 516
e1393456
AF
517 if (err < 0)
518 return err;
00db8189 519
e1393456 520 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189
AF
521
522 return err;
523}
00db8189 524
b3df0da8
RD
525/**
526 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
527 * @phydev: target phy_device struct
528 */
89ff05ec 529static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
530{
531 int err;
532
533 /* Disable PHY interrupts */
534 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
535
536 if (err)
537 goto phy_err;
538
539 /* Clear the interrupt */
540 err = phy_clear_interrupt(phydev);
541
542 if (err)
543 goto phy_err;
544
545 return 0;
546
547phy_err:
548 phy_error(phydev);
549
550 return err;
551}
e1393456 552
b3df0da8
RD
553/**
554 * phy_start_interrupts - request and enable interrupts for a PHY device
555 * @phydev: target phy_device struct
e1393456 556 *
b3df0da8
RD
557 * Description: Request the interrupt for the given PHY.
558 * If this fails, then we set irq to PHY_POLL.
e1393456 559 * Otherwise, we enable the interrupts in the PHY.
e1393456 560 * This should only be called with a valid IRQ number.
b3df0da8 561 * Returns 0 on success or < 0 on error.
e1393456
AF
562 */
563int phy_start_interrupts(struct phy_device *phydev)
564{
565 int err = 0;
566
0ac49527 567 atomic_set(&phydev->irq_disable, 0);
e1393456 568 if (request_irq(phydev->irq, phy_interrupt,
1fb9df5d 569 IRQF_SHARED,
e1393456
AF
570 "phy_interrupt",
571 phydev) < 0) {
8d242488
JP
572 pr_warn("%s: Can't get IRQ %d (PHY)\n",
573 phydev->bus->name, phydev->irq);
e1393456
AF
574 phydev->irq = PHY_POLL;
575 return 0;
576 }
577
578 err = phy_enable_interrupts(phydev);
579
580 return err;
581}
582EXPORT_SYMBOL(phy_start_interrupts);
583
b3df0da8
RD
584/**
585 * phy_stop_interrupts - disable interrupts from a PHY device
586 * @phydev: target phy_device struct
587 */
e1393456
AF
588int phy_stop_interrupts(struct phy_device *phydev)
589{
590 int err;
591
592 err = phy_disable_interrupts(phydev);
593
594 if (err)
595 phy_error(phydev);
596
0ac49527
MR
597 free_irq(phydev->irq, phydev);
598
3c3070d7 599 /*
0ac49527
MR
600 * Cannot call flush_scheduled_work() here as desired because
601 * of rtnl_lock(), but we do not really care about what would
602 * be done, except from enable_irq(), so cancel any work
603 * possibly pending and take care of the matter below.
3c3070d7 604 */
28e53bdd 605 cancel_work_sync(&phydev->phy_queue);
0ac49527
MR
606 /*
607 * If work indeed has been cancelled, disable_irq() will have
608 * been left unbalanced from phy_interrupt() and enable_irq()
609 * has to be called so that other devices on the line work.
610 */
611 while (atomic_dec_return(&phydev->irq_disable) >= 0)
612 enable_irq(phydev->irq);
e1393456
AF
613
614 return err;
615}
616EXPORT_SYMBOL(phy_stop_interrupts);
617
618
b3df0da8
RD
619/**
620 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
621 * @work: work_struct that describes the work to be done
622 */
5ea94e76 623void phy_change(struct work_struct *work)
e1393456
AF
624{
625 int err;
c4028958
DH
626 struct phy_device *phydev =
627 container_of(work, struct phy_device, phy_queue);
e1393456 628
a8729eb3
AG
629 if (phydev->drv->did_interrupt &&
630 !phydev->drv->did_interrupt(phydev))
631 goto ignore;
632
e1393456
AF
633 err = phy_disable_interrupts(phydev);
634
635 if (err)
636 goto phy_err;
637
35b5f6b1 638 mutex_lock(&phydev->lock);
e1393456
AF
639 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
640 phydev->state = PHY_CHANGELINK;
35b5f6b1 641 mutex_unlock(&phydev->lock);
e1393456 642
0ac49527 643 atomic_dec(&phydev->irq_disable);
e1393456
AF
644 enable_irq(phydev->irq);
645
646 /* Reenable interrupts */
3c3070d7
MR
647 if (PHY_HALTED != phydev->state)
648 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e1393456
AF
649
650 if (err)
651 goto irq_enable_err;
652
a390d1f3
MS
653 /* reschedule state queue work to run as soon as possible */
654 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 655 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
0acb2839 656
e1393456
AF
657 return;
658
a8729eb3
AG
659ignore:
660 atomic_dec(&phydev->irq_disable);
661 enable_irq(phydev->irq);
662 return;
663
e1393456
AF
664irq_enable_err:
665 disable_irq(phydev->irq);
0ac49527 666 atomic_inc(&phydev->irq_disable);
e1393456
AF
667phy_err:
668 phy_error(phydev);
669}
670
b3df0da8
RD
671/**
672 * phy_stop - Bring down the PHY link, and stop checking the status
673 * @phydev: target phy_device struct
674 */
e1393456
AF
675void phy_stop(struct phy_device *phydev)
676{
35b5f6b1 677 mutex_lock(&phydev->lock);
e1393456
AF
678
679 if (PHY_HALTED == phydev->state)
680 goto out_unlock;
681
2c7b4921 682 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
683 /* Disable PHY Interrupts */
684 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 685
3c3070d7
MR
686 /* Clear any pending interrupts */
687 phy_clear_interrupt(phydev);
688 }
e1393456 689
6daf6531
MR
690 phydev->state = PHY_HALTED;
691
e1393456 692out_unlock:
35b5f6b1 693 mutex_unlock(&phydev->lock);
3c3070d7
MR
694
695 /*
696 * Cannot call flush_scheduled_work() here as desired because
697 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
698 * will not reenable interrupts.
699 */
e1393456
AF
700}
701
702
b3df0da8
RD
703/**
704 * phy_start - start or restart a PHY device
705 * @phydev: target phy_device struct
e1393456 706 *
b3df0da8 707 * Description: Indicates the attached device's readiness to
e1393456
AF
708 * handle PHY-related work. Used during startup to start the
709 * PHY, and after a call to phy_stop() to resume operation.
710 * Also used to indicate the MDIO bus has cleared an error
711 * condition.
712 */
713void phy_start(struct phy_device *phydev)
714{
35b5f6b1 715 mutex_lock(&phydev->lock);
e1393456
AF
716
717 switch (phydev->state) {
718 case PHY_STARTING:
719 phydev->state = PHY_PENDING;
720 break;
721 case PHY_READY:
722 phydev->state = PHY_UP;
723 break;
724 case PHY_HALTED:
725 phydev->state = PHY_RESUMING;
726 default:
727 break;
728 }
35b5f6b1 729 mutex_unlock(&phydev->lock);
e1393456
AF
730}
731EXPORT_SYMBOL(phy_stop);
732EXPORT_SYMBOL(phy_start);
67c4f3fa 733
35b5f6b1
NC
734/**
735 * phy_state_machine - Handle the state machine
736 * @work: work_struct that describes the work to be done
35b5f6b1 737 */
4f9c85a1 738void phy_state_machine(struct work_struct *work)
00db8189 739{
bf6aede7 740 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 741 struct phy_device *phydev =
a390d1f3 742 container_of(dwork, struct phy_device, state_queue);
00db8189
AF
743 int needs_aneg = 0;
744 int err = 0;
745
35b5f6b1 746 mutex_lock(&phydev->lock);
00db8189
AF
747
748 if (phydev->adjust_state)
749 phydev->adjust_state(phydev->attached_dev);
750
751 switch(phydev->state) {
752 case PHY_DOWN:
753 case PHY_STARTING:
754 case PHY_READY:
755 case PHY_PENDING:
756 break;
757 case PHY_UP:
758 needs_aneg = 1;
759
760 phydev->link_timeout = PHY_AN_TIMEOUT;
761
762 break;
763 case PHY_AN:
6b655529
AF
764 err = phy_read_status(phydev);
765
766 if (err < 0)
767 break;
768
769 /* If the link is down, give up on
770 * negotiation for now */
771 if (!phydev->link) {
772 phydev->state = PHY_NOLINK;
773 netif_carrier_off(phydev->attached_dev);
774 phydev->adjust_link(phydev->attached_dev);
775 break;
776 }
777
00db8189
AF
778 /* Check if negotiation is done. Break
779 * if there's an error */
780 err = phy_aneg_done(phydev);
781 if (err < 0)
782 break;
783
6b655529 784 /* If AN is done, we're running */
00db8189 785 if (err > 0) {
6b655529
AF
786 phydev->state = PHY_RUNNING;
787 netif_carrier_on(phydev->attached_dev);
788 phydev->adjust_link(phydev->attached_dev);
00db8189 789
6b655529 790 } else if (0 == phydev->link_timeout--) {
6b655529
AF
791 needs_aneg = 1;
792 /* If we have the magic_aneg bit,
793 * we try again */
794 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
00db8189 795 break;
00db8189
AF
796 }
797 break;
798 case PHY_NOLINK:
799 err = phy_read_status(phydev);
800
801 if (err)
802 break;
803
804 if (phydev->link) {
805 phydev->state = PHY_RUNNING;
806 netif_carrier_on(phydev->attached_dev);
807 phydev->adjust_link(phydev->attached_dev);
808 }
809 break;
810 case PHY_FORCING:
6b655529 811 err = genphy_update_link(phydev);
00db8189
AF
812
813 if (err)
814 break;
815
816 if (phydev->link) {
817 phydev->state = PHY_RUNNING;
818 netif_carrier_on(phydev->attached_dev);
819 } else {
a33e6112 820 if (0 == phydev->link_timeout--)
00db8189 821 needs_aneg = 1;
00db8189
AF
822 }
823
824 phydev->adjust_link(phydev->attached_dev);
825 break;
826 case PHY_RUNNING:
827 /* Only register a CHANGE if we are
2c7b4921
FF
828 * polling or ignoring interrupts
829 */
830 if (!phy_interrupt_is_valid(phydev))
00db8189
AF
831 phydev->state = PHY_CHANGELINK;
832 break;
833 case PHY_CHANGELINK:
834 err = phy_read_status(phydev);
835
836 if (err)
837 break;
838
839 if (phydev->link) {
840 phydev->state = PHY_RUNNING;
841 netif_carrier_on(phydev->attached_dev);
842 } else {
843 phydev->state = PHY_NOLINK;
844 netif_carrier_off(phydev->attached_dev);
845 }
846
847 phydev->adjust_link(phydev->attached_dev);
848
2c7b4921 849 if (phy_interrupt_is_valid(phydev))
00db8189
AF
850 err = phy_config_interrupt(phydev,
851 PHY_INTERRUPT_ENABLED);
852 break;
853 case PHY_HALTED:
854 if (phydev->link) {
855 phydev->link = 0;
856 netif_carrier_off(phydev->attached_dev);
857 phydev->adjust_link(phydev->attached_dev);
858 }
859 break;
860 case PHY_RESUMING:
861
862 err = phy_clear_interrupt(phydev);
863
864 if (err)
865 break;
866
867 err = phy_config_interrupt(phydev,
868 PHY_INTERRUPT_ENABLED);
869
870 if (err)
871 break;
872
873 if (AUTONEG_ENABLE == phydev->autoneg) {
874 err = phy_aneg_done(phydev);
875 if (err < 0)
876 break;
877
878 /* err > 0 if AN is done.
879 * Otherwise, it's 0, and we're
880 * still waiting for AN */
881 if (err > 0) {
42caa074
WF
882 err = phy_read_status(phydev);
883 if (err)
884 break;
885
886 if (phydev->link) {
887 phydev->state = PHY_RUNNING;
888 netif_carrier_on(phydev->attached_dev);
889 } else
890 phydev->state = PHY_NOLINK;
891 phydev->adjust_link(phydev->attached_dev);
00db8189
AF
892 } else {
893 phydev->state = PHY_AN;
894 phydev->link_timeout = PHY_AN_TIMEOUT;
895 }
42caa074
WF
896 } else {
897 err = phy_read_status(phydev);
898 if (err)
899 break;
900
901 if (phydev->link) {
902 phydev->state = PHY_RUNNING;
903 netif_carrier_on(phydev->attached_dev);
904 } else
905 phydev->state = PHY_NOLINK;
906 phydev->adjust_link(phydev->attached_dev);
907 }
00db8189
AF
908 break;
909 }
910
35b5f6b1 911 mutex_unlock(&phydev->lock);
00db8189
AF
912
913 if (needs_aneg)
914 err = phy_start_aneg(phydev);
915
916 if (err < 0)
917 phy_error(phydev);
918
bbb47bde
VK
919 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
920 PHY_STATE_TIME * HZ);
35b5f6b1 921}
a59a4d19 922
5ea94e76
FF
923void phy_mac_interrupt(struct phy_device *phydev, int new_link)
924{
925 cancel_work_sync(&phydev->phy_queue);
926 phydev->link = new_link;
927 schedule_work(&phydev->phy_queue);
928}
929EXPORT_SYMBOL(phy_mac_interrupt);
930
a59a4d19
GC
931static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
932 int addr)
933{
934 /* Write the desired MMD Devad */
935 bus->write(bus, addr, MII_MMD_CTRL, devad);
936
937 /* Write the desired MMD register address */
938 bus->write(bus, addr, MII_MMD_DATA, prtad);
939
940 /* Select the Function : DATA with no post increment */
941 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
942}
943
944/**
945 * phy_read_mmd_indirect - reads data from the MMD registers
946 * @bus: the target MII bus
947 * @prtad: MMD Address
948 * @devad: MMD DEVAD
949 * @addr: PHY address on the MII bus
950 *
951 * Description: it reads data from the MMD registers (clause 22 to access to
952 * clause 45) of the specified phy address.
953 * To read these register we have:
954 * 1) Write reg 13 // DEVAD
955 * 2) Write reg 14 // MMD Address
956 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
957 * 3) Read reg 14 // Read MMD data
958 */
959static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
960 int addr)
961{
962 u32 ret;
963
964 mmd_phy_indirect(bus, prtad, devad, addr);
965
966 /* Read the content of the MMD's selected register */
967 ret = bus->read(bus, addr, MII_MMD_DATA);
968
969 return ret;
970}
971
972/**
973 * phy_write_mmd_indirect - writes data to the MMD registers
974 * @bus: the target MII bus
975 * @prtad: MMD Address
976 * @devad: MMD DEVAD
977 * @addr: PHY address on the MII bus
978 * @data: data to write in the MMD register
979 *
980 * Description: Write data from the MMD registers of the specified
981 * phy address.
982 * To write these register we have:
983 * 1) Write reg 13 // DEVAD
984 * 2) Write reg 14 // MMD Address
985 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
986 * 3) Write reg 14 // Write MMD data
987 */
988static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
989 int addr, u32 data)
990{
991 mmd_phy_indirect(bus, prtad, devad, addr);
992
993 /* Write the data into MMD's selected register */
994 bus->write(bus, addr, MII_MMD_DATA, data);
995}
996
a59a4d19
GC
997/**
998 * phy_init_eee - init and check the EEE feature
999 * @phydev: target phy_device struct
1000 * @clk_stop_enable: PHY may stop the clock during LPI
1001 *
1002 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1003 * is supported by looking at the MMD registers 3.20 and 7.60/61
1004 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1005 * bit if required.
1006 */
1007int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1008{
1009 int ret = -EPROTONOSUPPORT;
1010
1011 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1012 * Also EEE feature is active when core is operating with MII, GMII
1013 * or RGMII.
1014 */
1015 if ((phydev->duplex == DUPLEX_FULL) &&
1016 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1017 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
1018 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
1019 int eee_lp, eee_cap, eee_adv;
1020 u32 lp, cap, adv;
1021 int idx, status;
1022
1023 /* Read phy status to properly get the right settings */
1024 status = phy_read_status(phydev);
1025 if (status)
1026 return status;
1027
1028 /* First check if the EEE ability is supported */
1029 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1030 MDIO_MMD_PCS, phydev->addr);
1031 if (eee_cap < 0)
1032 return eee_cap;
1033
b32607dd 1034 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19
GC
1035 if (!cap)
1036 goto eee_exit;
1037
1038 /* Check which link settings negotiated and verify it in
1039 * the EEE advertising registers.
1040 */
1041 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1042 MDIO_MMD_AN, phydev->addr);
1043 if (eee_lp < 0)
1044 return eee_lp;
1045
1046 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1047 MDIO_MMD_AN, phydev->addr);
1048 if (eee_adv < 0)
1049 return eee_adv;
1050
b32607dd
AB
1051 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1052 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19 1053 idx = phy_find_setting(phydev->speed, phydev->duplex);
9a9c56cb 1054 if (!(lp & adv & settings[idx].setting))
a59a4d19
GC
1055 goto eee_exit;
1056
1057 if (clk_stop_enable) {
1058 /* Configure the PHY to stop receiving xMII
1059 * clock while it is signaling LPI.
1060 */
1061 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
1062 MDIO_MMD_PCS,
1063 phydev->addr);
1064 if (val < 0)
1065 return val;
1066
1067 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1068 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1069 MDIO_MMD_PCS, phydev->addr, val);
1070 }
1071
1072 ret = 0; /* EEE supported */
1073 }
1074
1075eee_exit:
1076 return ret;
1077}
1078EXPORT_SYMBOL(phy_init_eee);
1079
1080/**
1081 * phy_get_eee_err - report the EEE wake error count
1082 * @phydev: target phy_device struct
1083 *
1084 * Description: it is to report the number of time where the PHY
1085 * failed to complete its normal wake sequence.
1086 */
1087int phy_get_eee_err(struct phy_device *phydev)
1088{
1089 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1090 MDIO_MMD_PCS, phydev->addr);
1091
1092}
1093EXPORT_SYMBOL(phy_get_eee_err);
1094
1095/**
1096 * phy_ethtool_get_eee - get EEE supported and status
1097 * @phydev: target phy_device struct
1098 * @data: ethtool_eee data
1099 *
1100 * Description: it reportes the Supported/Advertisement/LP Advertisement
1101 * capabilities.
1102 */
1103int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1104{
1105 int val;
1106
1107 /* Get Supported EEE */
1108 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1109 MDIO_MMD_PCS, phydev->addr);
1110 if (val < 0)
1111 return val;
b32607dd 1112 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1113
1114 /* Get advertisement EEE */
1115 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1116 MDIO_MMD_AN, phydev->addr);
1117 if (val < 0)
1118 return val;
b32607dd 1119 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1120
1121 /* Get LP advertisement EEE */
1122 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1123 MDIO_MMD_AN, phydev->addr);
1124 if (val < 0)
1125 return val;
b32607dd 1126 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1127
1128 return 0;
1129}
1130EXPORT_SYMBOL(phy_ethtool_get_eee);
1131
1132/**
1133 * phy_ethtool_set_eee - set EEE supported and status
1134 * @phydev: target phy_device struct
1135 * @data: ethtool_eee data
1136 *
1137 * Description: it is to program the Advertisement EEE register.
1138 */
1139int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1140{
1141 int val;
1142
b32607dd 1143 val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19
GC
1144 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1145 phydev->addr, val);
1146
1147 return 0;
1148}
1149EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1150
1151int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1152{
1153 if (phydev->drv->set_wol)
1154 return phydev->drv->set_wol(phydev, wol);
1155
1156 return -EOPNOTSUPP;
1157}
1158EXPORT_SYMBOL(phy_ethtool_set_wol);
1159
1160void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1161{
1162 if (phydev->drv->get_wol)
1163 phydev->drv->get_wol(phydev, wol);
1164}
1165EXPORT_SYMBOL(phy_ethtool_get_wol);
This page took 0.916765 seconds and 5 git commands to generate.