Merge branch 'for-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq
[deliverable/linux.git] / drivers / net / phy / phy.c
CommitLineData
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1/*
2 * drivers/net/phy/phy.c
3 *
4 * Framework for configuring and reading PHY devices
5 * Based on code in sungem_phy.c and gianfar_phy.c
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 10 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
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18
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
00db8189 21#include <linux/kernel.h>
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22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/unistd.h>
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25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/skbuff.h>
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31#include <linux/mm.h>
32#include <linux/module.h>
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33#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
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36#include <linux/timer.h>
37#include <linux/workqueue.h>
a59a4d19 38#include <linux/mdio.h>
00db8189 39
60063497 40#include <linux/atomic.h>
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41#include <asm/io.h>
42#include <asm/irq.h>
43#include <asm/uaccess.h>
44
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45/**
46 * phy_print_status - Convenience function to print out the current phy status
47 * @phydev: the phy_device struct
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48 */
49void phy_print_status(struct phy_device *phydev)
50{
e1393456 51 if (phydev->link)
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JP
52 pr_info("%s - Link is Up - %d/%s\n",
53 dev_name(&phydev->dev),
54 phydev->speed,
55 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
56 else
57 pr_info("%s - Link is Down\n", dev_name(&phydev->dev));
e1393456
AF
58}
59EXPORT_SYMBOL(phy_print_status);
00db8189 60
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61/**
62 * phy_clear_interrupt - Ack the phy device's interrupt
63 * @phydev: the phy_device struct
64 *
65 * If the @phydev driver has an ack_interrupt function, call it to
66 * ack and clear the phy device's interrupt.
67 *
68 * Returns 0 on success on < 0 on error.
69 */
89ff05ec 70static int phy_clear_interrupt(struct phy_device *phydev)
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71{
72 int err = 0;
73
74 if (phydev->drv->ack_interrupt)
75 err = phydev->drv->ack_interrupt(phydev);
76
77 return err;
78}
79
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80/**
81 * phy_config_interrupt - configure the PHY device for the requested interrupts
82 * @phydev: the phy_device struct
83 * @interrupts: interrupt flags to configure for this @phydev
84 *
85 * Returns 0 on success on < 0 on error.
86 */
89ff05ec 87static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
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AF
88{
89 int err = 0;
90
91 phydev->interrupts = interrupts;
92 if (phydev->drv->config_intr)
93 err = phydev->drv->config_intr(phydev);
94
95 return err;
96}
97
98
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99/**
100 * phy_aneg_done - return auto-negotiation status
101 * @phydev: target phy_device struct
00db8189 102 *
b3df0da8 103 * Description: Reads the status register and returns 0 either if
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104 * auto-negotiation is incomplete, or if there was an error.
105 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
106 */
107static inline int phy_aneg_done(struct phy_device *phydev)
108{
109 int retval;
110
111 retval = phy_read(phydev, MII_BMSR);
112
113 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
114}
115
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116/* A structure for mapping a particular speed and duplex
117 * combination to a particular SUPPORTED and ADVERTISED value */
118struct phy_setting {
119 int speed;
120 int duplex;
121 u32 setting;
122};
123
124/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 125static const struct phy_setting settings[] = {
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126 {
127 .speed = 10000,
128 .duplex = DUPLEX_FULL,
129 .setting = SUPPORTED_10000baseT_Full,
130 },
131 {
132 .speed = SPEED_1000,
133 .duplex = DUPLEX_FULL,
134 .setting = SUPPORTED_1000baseT_Full,
135 },
136 {
137 .speed = SPEED_1000,
138 .duplex = DUPLEX_HALF,
139 .setting = SUPPORTED_1000baseT_Half,
140 },
141 {
142 .speed = SPEED_100,
143 .duplex = DUPLEX_FULL,
144 .setting = SUPPORTED_100baseT_Full,
145 },
146 {
147 .speed = SPEED_100,
148 .duplex = DUPLEX_HALF,
149 .setting = SUPPORTED_100baseT_Half,
150 },
151 {
152 .speed = SPEED_10,
153 .duplex = DUPLEX_FULL,
154 .setting = SUPPORTED_10baseT_Full,
155 },
156 {
157 .speed = SPEED_10,
158 .duplex = DUPLEX_HALF,
159 .setting = SUPPORTED_10baseT_Half,
160 },
161};
162
ff8ac609 163#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 164
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165/**
166 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
167 * @speed: speed to match
168 * @duplex: duplex to match
00db8189 169 *
b3df0da8 170 * Description: Searches the settings array for the setting which
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AF
171 * matches the desired speed and duplex, and returns the index
172 * of that setting. Returns the index of the last setting if
173 * none of the others match.
174 */
175static inline int phy_find_setting(int speed, int duplex)
176{
177 int idx = 0;
178
179 while (idx < ARRAY_SIZE(settings) &&
180 (settings[idx].speed != speed ||
181 settings[idx].duplex != duplex))
182 idx++;
183
184 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
185}
186
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187/**
188 * phy_find_valid - find a PHY setting that matches the requested features mask
189 * @idx: The first index in settings[] to search
190 * @features: A mask of the valid settings
00db8189 191 *
b3df0da8 192 * Description: Returns the index of the first valid setting less
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AF
193 * than or equal to the one pointed to by idx, as determined by
194 * the mask in features. Returns the index of the last setting
195 * if nothing else matches.
196 */
197static inline int phy_find_valid(int idx, u32 features)
198{
199 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
200 idx++;
201
202 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
203}
204
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205/**
206 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
207 * @phydev: the target phy_device struct
00db8189 208 *
b3df0da8 209 * Description: Make sure the PHY is set to supported speeds and
00db8189 210 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 211 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 212 */
89ff05ec 213static void phy_sanitize_settings(struct phy_device *phydev)
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214{
215 u32 features = phydev->supported;
216 int idx;
217
218 /* Sanitize settings based on PHY capabilities */
219 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 220 phydev->autoneg = AUTONEG_DISABLE;
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221
222 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
223 features);
224
225 phydev->speed = settings[idx].speed;
226 phydev->duplex = settings[idx].duplex;
227}
00db8189 228
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229/**
230 * phy_ethtool_sset - generic ethtool sset function, handles all the details
231 * @phydev: target phy_device struct
232 * @cmd: ethtool_cmd
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233 *
234 * A few notes about parameter checking:
235 * - We don't set port or transceiver, so we don't care what they
236 * were set to.
237 * - phy_start_aneg() will make sure forced settings are sane, and
238 * choose the next best ones from the ones selected, so we don't
b3df0da8 239 * care if ethtool tries to give us bad values.
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240 */
241int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
242{
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DD
243 u32 speed = ethtool_cmd_speed(cmd);
244
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245 if (cmd->phy_address != phydev->addr)
246 return -EINVAL;
247
248 /* We make sure that we don't pass unsupported
249 * values in to the PHY */
250 cmd->advertising &= phydev->supported;
251
252 /* Verify the settings we care about. */
253 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
254 return -EINVAL;
255
256 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
257 return -EINVAL;
258
8e95a202 259 if (cmd->autoneg == AUTONEG_DISABLE &&
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DD
260 ((speed != SPEED_1000 &&
261 speed != SPEED_100 &&
262 speed != SPEED_10) ||
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JP
263 (cmd->duplex != DUPLEX_HALF &&
264 cmd->duplex != DUPLEX_FULL)))
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265 return -EINVAL;
266
267 phydev->autoneg = cmd->autoneg;
268
25db0338 269 phydev->speed = speed;
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270
271 phydev->advertising = cmd->advertising;
272
273 if (AUTONEG_ENABLE == cmd->autoneg)
274 phydev->advertising |= ADVERTISED_Autoneg;
275 else
276 phydev->advertising &= ~ADVERTISED_Autoneg;
277
278 phydev->duplex = cmd->duplex;
279
280 /* Restart the PHY */
281 phy_start_aneg(phydev);
282
283 return 0;
284}
9f6d55d0 285EXPORT_SYMBOL(phy_ethtool_sset);
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286
287int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
288{
289 cmd->supported = phydev->supported;
290
291 cmd->advertising = phydev->advertising;
292
70739497 293 ethtool_cmd_speed_set(cmd, phydev->speed);
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294 cmd->duplex = phydev->duplex;
295 cmd->port = PORT_MII;
296 cmd->phy_address = phydev->addr;
297 cmd->transceiver = XCVR_EXTERNAL;
298 cmd->autoneg = phydev->autoneg;
299
300 return 0;
301}
9f6d55d0 302EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 303
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304/**
305 * phy_mii_ioctl - generic PHY MII ioctl interface
306 * @phydev: the phy_device struct
00c7d920 307 * @ifr: &struct ifreq for socket ioctl's
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308 * @cmd: ioctl cmd to execute
309 *
310 * Note that this function is currently incompatible with the
00db8189 311 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 312 * current state. Use at own risk.
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313 */
314int phy_mii_ioctl(struct phy_device *phydev,
28b04113 315 struct ifreq *ifr, int cmd)
00db8189 316{
28b04113 317 struct mii_ioctl_data *mii_data = if_mii(ifr);
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318 u16 val = mii_data->val_in;
319
320 switch (cmd) {
321 case SIOCGMIIPHY:
322 mii_data->phy_id = phydev->addr;
c6d6a511
LB
323 /* fall through */
324
00db8189 325 case SIOCGMIIREG:
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326 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
327 mii_data->reg_num);
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328 break;
329
330 case SIOCSMIIREG:
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331 if (mii_data->phy_id == phydev->addr) {
332 switch(mii_data->reg_num) {
333 case MII_BMCR:
163642a2 334 if ((val & (BMCR_RESET|BMCR_ANENABLE)) == 0)
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335 phydev->autoneg = AUTONEG_DISABLE;
336 else
337 phydev->autoneg = AUTONEG_ENABLE;
338 if ((!phydev->autoneg) && (val & BMCR_FULLDPLX))
339 phydev->duplex = DUPLEX_FULL;
340 else
341 phydev->duplex = DUPLEX_HALF;
024a0a3c
SL
342 if ((!phydev->autoneg) &&
343 (val & BMCR_SPEED1000))
344 phydev->speed = SPEED_1000;
345 else if ((!phydev->autoneg) &&
346 (val & BMCR_SPEED100))
347 phydev->speed = SPEED_100;
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348 break;
349 case MII_ADVERTISE:
350 phydev->advertising = val;
351 break;
352 default:
353 /* do nothing */
354 break;
355 }
356 }
357
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PK
358 mdiobus_write(phydev->bus, mii_data->phy_id,
359 mii_data->reg_num, val);
360
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JP
361 if (mii_data->reg_num == MII_BMCR &&
362 val & BMCR_RESET &&
363 phydev->drv->config_init) {
f62220d3 364 phy_scan_fixups(phydev);
00db8189 365 phydev->drv->config_init(phydev);
f62220d3 366 }
00db8189 367 break;
dda93b48 368
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RC
369 case SIOCSHWTSTAMP:
370 if (phydev->drv->hwtstamp)
371 return phydev->drv->hwtstamp(phydev, ifr);
372 /* fall through */
373
dda93b48 374 default:
c6d6a511 375 return -EOPNOTSUPP;
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376 }
377
378 return 0;
379}
680e9fe9 380EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 381
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382/**
383 * phy_start_aneg - start auto-negotiation for this PHY device
384 * @phydev: the phy_device struct
e1393456 385 *
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386 * Description: Sanitizes the settings (if we're not autonegotiating
387 * them), and then calls the driver's config_aneg function.
388 * If the PHYCONTROL Layer is operating, we change the state to
389 * reflect the beginning of Auto-negotiation or forcing.
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390 */
391int phy_start_aneg(struct phy_device *phydev)
392{
393 int err;
394
35b5f6b1 395 mutex_lock(&phydev->lock);
e1393456
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396
397 if (AUTONEG_DISABLE == phydev->autoneg)
398 phy_sanitize_settings(phydev);
399
400 err = phydev->drv->config_aneg(phydev);
401
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AF
402 if (err < 0)
403 goto out_unlock;
404
405 if (phydev->state != PHY_HALTED) {
406 if (AUTONEG_ENABLE == phydev->autoneg) {
407 phydev->state = PHY_AN;
408 phydev->link_timeout = PHY_AN_TIMEOUT;
409 } else {
410 phydev->state = PHY_FORCING;
411 phydev->link_timeout = PHY_FORCE_TIMEOUT;
412 }
413 }
414
415out_unlock:
35b5f6b1 416 mutex_unlock(&phydev->lock);
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AF
417 return err;
418}
419EXPORT_SYMBOL(phy_start_aneg);
420
421
c4028958 422static void phy_change(struct work_struct *work);
e1393456 423
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424/**
425 * phy_start_machine - start PHY state machine tracking
426 * @phydev: the phy_device struct
427 * @handler: callback function for state change notifications
00db8189 428 *
b3df0da8 429 * Description: The PHY infrastructure can run a state machine
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430 * which tracks whether the PHY is starting up, negotiating,
431 * etc. This function starts the timer which tracks the state
b3df0da8
RD
432 * of the PHY. If you want to be notified when the state changes,
433 * pass in the callback @handler, otherwise, pass NULL. If you
00db8189 434 * want to maintain your own state machine, do not call this
b3df0da8
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435 * function.
436 */
00db8189
AF
437void phy_start_machine(struct phy_device *phydev,
438 void (*handler)(struct net_device *))
439{
440 phydev->adjust_state = handler;
441
bbb47bde 442 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
443}
444
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RD
445/**
446 * phy_stop_machine - stop the PHY state machine tracking
447 * @phydev: target phy_device struct
00db8189 448 *
b3df0da8 449 * Description: Stops the state machine timer, sets the state to UP
817acf5e 450 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
451 * phy_detach.
452 */
453void phy_stop_machine(struct phy_device *phydev)
454{
a390d1f3 455 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 456
35b5f6b1 457 mutex_lock(&phydev->lock);
00db8189
AF
458 if (phydev->state > PHY_UP)
459 phydev->state = PHY_UP;
35b5f6b1 460 mutex_unlock(&phydev->lock);
00db8189 461
00db8189
AF
462 phydev->adjust_state = NULL;
463}
464
b3df0da8
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465/**
466 * phy_error - enter HALTED state for this PHY device
467 * @phydev: target phy_device struct
00db8189
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468 *
469 * Moves the PHY to the HALTED state in response to a read
470 * or write error, and tells the controller the link is down.
471 * Must not be called from interrupt context, or while the
472 * phydev->lock is held.
473 */
9b9a8bfc 474static void phy_error(struct phy_device *phydev)
00db8189 475{
35b5f6b1 476 mutex_lock(&phydev->lock);
00db8189 477 phydev->state = PHY_HALTED;
35b5f6b1 478 mutex_unlock(&phydev->lock);
00db8189
AF
479}
480
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RD
481/**
482 * phy_interrupt - PHY interrupt handler
483 * @irq: interrupt line
484 * @phy_dat: phy_device pointer
e1393456 485 *
b3df0da8 486 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
487 * interrupts, and schedules a work task to clear the interrupt.
488 */
7d12e780 489static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
490{
491 struct phy_device *phydev = phy_dat;
492
3c3070d7
MR
493 if (PHY_HALTED == phydev->state)
494 return IRQ_NONE; /* It can't be ours. */
495
e1393456
AF
496 /* The MDIO bus is not allowed to be written in interrupt
497 * context, so we need to disable the irq here. A work
498 * queue will write the PHY to disable and clear the
499 * interrupt, and then reenable the irq line. */
500 disable_irq_nosync(irq);
0ac49527 501 atomic_inc(&phydev->irq_disable);
e1393456 502
bbb47bde 503 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
504
505 return IRQ_HANDLED;
506}
507
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508/**
509 * phy_enable_interrupts - Enable the interrupts from the PHY side
510 * @phydev: target phy_device struct
511 */
89ff05ec 512static int phy_enable_interrupts(struct phy_device *phydev)
00db8189
AF
513{
514 int err;
515
e1393456 516 err = phy_clear_interrupt(phydev);
00db8189 517
e1393456
AF
518 if (err < 0)
519 return err;
00db8189 520
e1393456 521 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189
AF
522
523 return err;
524}
00db8189 525
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526/**
527 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
528 * @phydev: target phy_device struct
529 */
89ff05ec 530static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
531{
532 int err;
533
534 /* Disable PHY interrupts */
535 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
536
537 if (err)
538 goto phy_err;
539
540 /* Clear the interrupt */
541 err = phy_clear_interrupt(phydev);
542
543 if (err)
544 goto phy_err;
545
546 return 0;
547
548phy_err:
549 phy_error(phydev);
550
551 return err;
552}
e1393456 553
b3df0da8
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554/**
555 * phy_start_interrupts - request and enable interrupts for a PHY device
556 * @phydev: target phy_device struct
e1393456 557 *
b3df0da8
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558 * Description: Request the interrupt for the given PHY.
559 * If this fails, then we set irq to PHY_POLL.
e1393456 560 * Otherwise, we enable the interrupts in the PHY.
e1393456 561 * This should only be called with a valid IRQ number.
b3df0da8 562 * Returns 0 on success or < 0 on error.
e1393456
AF
563 */
564int phy_start_interrupts(struct phy_device *phydev)
565{
566 int err = 0;
567
c4028958 568 INIT_WORK(&phydev->phy_queue, phy_change);
e1393456 569
0ac49527 570 atomic_set(&phydev->irq_disable, 0);
e1393456 571 if (request_irq(phydev->irq, phy_interrupt,
1fb9df5d 572 IRQF_SHARED,
e1393456
AF
573 "phy_interrupt",
574 phydev) < 0) {
8d242488
JP
575 pr_warn("%s: Can't get IRQ %d (PHY)\n",
576 phydev->bus->name, phydev->irq);
e1393456
AF
577 phydev->irq = PHY_POLL;
578 return 0;
579 }
580
581 err = phy_enable_interrupts(phydev);
582
583 return err;
584}
585EXPORT_SYMBOL(phy_start_interrupts);
586
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587/**
588 * phy_stop_interrupts - disable interrupts from a PHY device
589 * @phydev: target phy_device struct
590 */
e1393456
AF
591int phy_stop_interrupts(struct phy_device *phydev)
592{
593 int err;
594
595 err = phy_disable_interrupts(phydev);
596
597 if (err)
598 phy_error(phydev);
599
0ac49527
MR
600 free_irq(phydev->irq, phydev);
601
3c3070d7 602 /*
0ac49527
MR
603 * Cannot call flush_scheduled_work() here as desired because
604 * of rtnl_lock(), but we do not really care about what would
605 * be done, except from enable_irq(), so cancel any work
606 * possibly pending and take care of the matter below.
3c3070d7 607 */
28e53bdd 608 cancel_work_sync(&phydev->phy_queue);
0ac49527
MR
609 /*
610 * If work indeed has been cancelled, disable_irq() will have
611 * been left unbalanced from phy_interrupt() and enable_irq()
612 * has to be called so that other devices on the line work.
613 */
614 while (atomic_dec_return(&phydev->irq_disable) >= 0)
615 enable_irq(phydev->irq);
e1393456
AF
616
617 return err;
618}
619EXPORT_SYMBOL(phy_stop_interrupts);
620
621
b3df0da8
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622/**
623 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
624 * @work: work_struct that describes the work to be done
625 */
c4028958 626static void phy_change(struct work_struct *work)
e1393456
AF
627{
628 int err;
c4028958
DH
629 struct phy_device *phydev =
630 container_of(work, struct phy_device, phy_queue);
e1393456 631
a8729eb3
AG
632 if (phydev->drv->did_interrupt &&
633 !phydev->drv->did_interrupt(phydev))
634 goto ignore;
635
e1393456
AF
636 err = phy_disable_interrupts(phydev);
637
638 if (err)
639 goto phy_err;
640
35b5f6b1 641 mutex_lock(&phydev->lock);
e1393456
AF
642 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
643 phydev->state = PHY_CHANGELINK;
35b5f6b1 644 mutex_unlock(&phydev->lock);
e1393456 645
0ac49527 646 atomic_dec(&phydev->irq_disable);
e1393456
AF
647 enable_irq(phydev->irq);
648
649 /* Reenable interrupts */
3c3070d7
MR
650 if (PHY_HALTED != phydev->state)
651 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e1393456
AF
652
653 if (err)
654 goto irq_enable_err;
655
a390d1f3
MS
656 /* reschedule state queue work to run as soon as possible */
657 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 658 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
0acb2839 659
e1393456
AF
660 return;
661
a8729eb3
AG
662ignore:
663 atomic_dec(&phydev->irq_disable);
664 enable_irq(phydev->irq);
665 return;
666
e1393456
AF
667irq_enable_err:
668 disable_irq(phydev->irq);
0ac49527 669 atomic_inc(&phydev->irq_disable);
e1393456
AF
670phy_err:
671 phy_error(phydev);
672}
673
b3df0da8
RD
674/**
675 * phy_stop - Bring down the PHY link, and stop checking the status
676 * @phydev: target phy_device struct
677 */
e1393456
AF
678void phy_stop(struct phy_device *phydev)
679{
35b5f6b1 680 mutex_lock(&phydev->lock);
e1393456
AF
681
682 if (PHY_HALTED == phydev->state)
683 goto out_unlock;
684
3c3070d7 685 if (phydev->irq != PHY_POLL) {
e1393456
AF
686 /* Disable PHY Interrupts */
687 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 688
3c3070d7
MR
689 /* Clear any pending interrupts */
690 phy_clear_interrupt(phydev);
691 }
e1393456 692
6daf6531
MR
693 phydev->state = PHY_HALTED;
694
e1393456 695out_unlock:
35b5f6b1 696 mutex_unlock(&phydev->lock);
3c3070d7
MR
697
698 /*
699 * Cannot call flush_scheduled_work() here as desired because
700 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
701 * will not reenable interrupts.
702 */
e1393456
AF
703}
704
705
b3df0da8
RD
706/**
707 * phy_start - start or restart a PHY device
708 * @phydev: target phy_device struct
e1393456 709 *
b3df0da8 710 * Description: Indicates the attached device's readiness to
e1393456
AF
711 * handle PHY-related work. Used during startup to start the
712 * PHY, and after a call to phy_stop() to resume operation.
713 * Also used to indicate the MDIO bus has cleared an error
714 * condition.
715 */
716void phy_start(struct phy_device *phydev)
717{
35b5f6b1 718 mutex_lock(&phydev->lock);
e1393456
AF
719
720 switch (phydev->state) {
721 case PHY_STARTING:
722 phydev->state = PHY_PENDING;
723 break;
724 case PHY_READY:
725 phydev->state = PHY_UP;
726 break;
727 case PHY_HALTED:
728 phydev->state = PHY_RESUMING;
729 default:
730 break;
731 }
35b5f6b1 732 mutex_unlock(&phydev->lock);
e1393456
AF
733}
734EXPORT_SYMBOL(phy_stop);
735EXPORT_SYMBOL(phy_start);
67c4f3fa 736
35b5f6b1
NC
737/**
738 * phy_state_machine - Handle the state machine
739 * @work: work_struct that describes the work to be done
35b5f6b1 740 */
4f9c85a1 741void phy_state_machine(struct work_struct *work)
00db8189 742{
bf6aede7 743 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 744 struct phy_device *phydev =
a390d1f3 745 container_of(dwork, struct phy_device, state_queue);
00db8189
AF
746 int needs_aneg = 0;
747 int err = 0;
748
35b5f6b1 749 mutex_lock(&phydev->lock);
00db8189
AF
750
751 if (phydev->adjust_state)
752 phydev->adjust_state(phydev->attached_dev);
753
754 switch(phydev->state) {
755 case PHY_DOWN:
756 case PHY_STARTING:
757 case PHY_READY:
758 case PHY_PENDING:
759 break;
760 case PHY_UP:
761 needs_aneg = 1;
762
763 phydev->link_timeout = PHY_AN_TIMEOUT;
764
765 break;
766 case PHY_AN:
6b655529
AF
767 err = phy_read_status(phydev);
768
769 if (err < 0)
770 break;
771
772 /* If the link is down, give up on
773 * negotiation for now */
774 if (!phydev->link) {
775 phydev->state = PHY_NOLINK;
776 netif_carrier_off(phydev->attached_dev);
777 phydev->adjust_link(phydev->attached_dev);
778 break;
779 }
780
00db8189
AF
781 /* Check if negotiation is done. Break
782 * if there's an error */
783 err = phy_aneg_done(phydev);
784 if (err < 0)
785 break;
786
6b655529 787 /* If AN is done, we're running */
00db8189 788 if (err > 0) {
6b655529
AF
789 phydev->state = PHY_RUNNING;
790 netif_carrier_on(phydev->attached_dev);
791 phydev->adjust_link(phydev->attached_dev);
00db8189 792
6b655529 793 } else if (0 == phydev->link_timeout--) {
6b655529
AF
794 needs_aneg = 1;
795 /* If we have the magic_aneg bit,
796 * we try again */
797 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
00db8189 798 break;
00db8189
AF
799 }
800 break;
801 case PHY_NOLINK:
802 err = phy_read_status(phydev);
803
804 if (err)
805 break;
806
807 if (phydev->link) {
808 phydev->state = PHY_RUNNING;
809 netif_carrier_on(phydev->attached_dev);
810 phydev->adjust_link(phydev->attached_dev);
811 }
812 break;
813 case PHY_FORCING:
6b655529 814 err = genphy_update_link(phydev);
00db8189
AF
815
816 if (err)
817 break;
818
819 if (phydev->link) {
820 phydev->state = PHY_RUNNING;
821 netif_carrier_on(phydev->attached_dev);
822 } else {
a33e6112 823 if (0 == phydev->link_timeout--)
00db8189 824 needs_aneg = 1;
00db8189
AF
825 }
826
827 phydev->adjust_link(phydev->attached_dev);
828 break;
829 case PHY_RUNNING:
830 /* Only register a CHANGE if we are
831 * polling */
832 if (PHY_POLL == phydev->irq)
833 phydev->state = PHY_CHANGELINK;
834 break;
835 case PHY_CHANGELINK:
836 err = phy_read_status(phydev);
837
838 if (err)
839 break;
840
841 if (phydev->link) {
842 phydev->state = PHY_RUNNING;
843 netif_carrier_on(phydev->attached_dev);
844 } else {
845 phydev->state = PHY_NOLINK;
846 netif_carrier_off(phydev->attached_dev);
847 }
848
849 phydev->adjust_link(phydev->attached_dev);
850
851 if (PHY_POLL != phydev->irq)
852 err = phy_config_interrupt(phydev,
853 PHY_INTERRUPT_ENABLED);
854 break;
855 case PHY_HALTED:
856 if (phydev->link) {
857 phydev->link = 0;
858 netif_carrier_off(phydev->attached_dev);
859 phydev->adjust_link(phydev->attached_dev);
860 }
861 break;
862 case PHY_RESUMING:
863
864 err = phy_clear_interrupt(phydev);
865
866 if (err)
867 break;
868
869 err = phy_config_interrupt(phydev,
870 PHY_INTERRUPT_ENABLED);
871
872 if (err)
873 break;
874
875 if (AUTONEG_ENABLE == phydev->autoneg) {
876 err = phy_aneg_done(phydev);
877 if (err < 0)
878 break;
879
880 /* err > 0 if AN is done.
881 * Otherwise, it's 0, and we're
882 * still waiting for AN */
883 if (err > 0) {
42caa074
WF
884 err = phy_read_status(phydev);
885 if (err)
886 break;
887
888 if (phydev->link) {
889 phydev->state = PHY_RUNNING;
890 netif_carrier_on(phydev->attached_dev);
891 } else
892 phydev->state = PHY_NOLINK;
893 phydev->adjust_link(phydev->attached_dev);
00db8189
AF
894 } else {
895 phydev->state = PHY_AN;
896 phydev->link_timeout = PHY_AN_TIMEOUT;
897 }
42caa074
WF
898 } else {
899 err = phy_read_status(phydev);
900 if (err)
901 break;
902
903 if (phydev->link) {
904 phydev->state = PHY_RUNNING;
905 netif_carrier_on(phydev->attached_dev);
906 } else
907 phydev->state = PHY_NOLINK;
908 phydev->adjust_link(phydev->attached_dev);
909 }
00db8189
AF
910 break;
911 }
912
35b5f6b1 913 mutex_unlock(&phydev->lock);
00db8189
AF
914
915 if (needs_aneg)
916 err = phy_start_aneg(phydev);
917
918 if (err < 0)
919 phy_error(phydev);
920
bbb47bde
VK
921 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
922 PHY_STATE_TIME * HZ);
35b5f6b1 923}
a59a4d19
GC
924
925static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
926 int addr)
927{
928 /* Write the desired MMD Devad */
929 bus->write(bus, addr, MII_MMD_CTRL, devad);
930
931 /* Write the desired MMD register address */
932 bus->write(bus, addr, MII_MMD_DATA, prtad);
933
934 /* Select the Function : DATA with no post increment */
935 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
936}
937
938/**
939 * phy_read_mmd_indirect - reads data from the MMD registers
940 * @bus: the target MII bus
941 * @prtad: MMD Address
942 * @devad: MMD DEVAD
943 * @addr: PHY address on the MII bus
944 *
945 * Description: it reads data from the MMD registers (clause 22 to access to
946 * clause 45) of the specified phy address.
947 * To read these register we have:
948 * 1) Write reg 13 // DEVAD
949 * 2) Write reg 14 // MMD Address
950 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
951 * 3) Read reg 14 // Read MMD data
952 */
953static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
954 int addr)
955{
956 u32 ret;
957
958 mmd_phy_indirect(bus, prtad, devad, addr);
959
960 /* Read the content of the MMD's selected register */
961 ret = bus->read(bus, addr, MII_MMD_DATA);
962
963 return ret;
964}
965
966/**
967 * phy_write_mmd_indirect - writes data to the MMD registers
968 * @bus: the target MII bus
969 * @prtad: MMD Address
970 * @devad: MMD DEVAD
971 * @addr: PHY address on the MII bus
972 * @data: data to write in the MMD register
973 *
974 * Description: Write data from the MMD registers of the specified
975 * phy address.
976 * To write these register we have:
977 * 1) Write reg 13 // DEVAD
978 * 2) Write reg 14 // MMD Address
979 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
980 * 3) Write reg 14 // Write MMD data
981 */
982static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
983 int addr, u32 data)
984{
985 mmd_phy_indirect(bus, prtad, devad, addr);
986
987 /* Write the data into MMD's selected register */
988 bus->write(bus, addr, MII_MMD_DATA, data);
989}
990
a59a4d19
GC
991/**
992 * phy_init_eee - init and check the EEE feature
993 * @phydev: target phy_device struct
994 * @clk_stop_enable: PHY may stop the clock during LPI
995 *
996 * Description: it checks if the Energy-Efficient Ethernet (EEE)
997 * is supported by looking at the MMD registers 3.20 and 7.60/61
998 * and it programs the MMD register 3.0 setting the "Clock stop enable"
999 * bit if required.
1000 */
1001int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1002{
1003 int ret = -EPROTONOSUPPORT;
1004
1005 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1006 * Also EEE feature is active when core is operating with MII, GMII
1007 * or RGMII.
1008 */
1009 if ((phydev->duplex == DUPLEX_FULL) &&
1010 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1011 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
1012 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
1013 int eee_lp, eee_cap, eee_adv;
1014 u32 lp, cap, adv;
1015 int idx, status;
1016
1017 /* Read phy status to properly get the right settings */
1018 status = phy_read_status(phydev);
1019 if (status)
1020 return status;
1021
1022 /* First check if the EEE ability is supported */
1023 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1024 MDIO_MMD_PCS, phydev->addr);
1025 if (eee_cap < 0)
1026 return eee_cap;
1027
b32607dd 1028 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19
GC
1029 if (!cap)
1030 goto eee_exit;
1031
1032 /* Check which link settings negotiated and verify it in
1033 * the EEE advertising registers.
1034 */
1035 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1036 MDIO_MMD_AN, phydev->addr);
1037 if (eee_lp < 0)
1038 return eee_lp;
1039
1040 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1041 MDIO_MMD_AN, phydev->addr);
1042 if (eee_adv < 0)
1043 return eee_adv;
1044
b32607dd
AB
1045 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1046 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19 1047 idx = phy_find_setting(phydev->speed, phydev->duplex);
9a9c56cb 1048 if (!(lp & adv & settings[idx].setting))
a59a4d19
GC
1049 goto eee_exit;
1050
1051 if (clk_stop_enable) {
1052 /* Configure the PHY to stop receiving xMII
1053 * clock while it is signaling LPI.
1054 */
1055 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
1056 MDIO_MMD_PCS,
1057 phydev->addr);
1058 if (val < 0)
1059 return val;
1060
1061 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1062 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1063 MDIO_MMD_PCS, phydev->addr, val);
1064 }
1065
1066 ret = 0; /* EEE supported */
1067 }
1068
1069eee_exit:
1070 return ret;
1071}
1072EXPORT_SYMBOL(phy_init_eee);
1073
1074/**
1075 * phy_get_eee_err - report the EEE wake error count
1076 * @phydev: target phy_device struct
1077 *
1078 * Description: it is to report the number of time where the PHY
1079 * failed to complete its normal wake sequence.
1080 */
1081int phy_get_eee_err(struct phy_device *phydev)
1082{
1083 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1084 MDIO_MMD_PCS, phydev->addr);
1085
1086}
1087EXPORT_SYMBOL(phy_get_eee_err);
1088
1089/**
1090 * phy_ethtool_get_eee - get EEE supported and status
1091 * @phydev: target phy_device struct
1092 * @data: ethtool_eee data
1093 *
1094 * Description: it reportes the Supported/Advertisement/LP Advertisement
1095 * capabilities.
1096 */
1097int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1098{
1099 int val;
1100
1101 /* Get Supported EEE */
1102 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1103 MDIO_MMD_PCS, phydev->addr);
1104 if (val < 0)
1105 return val;
b32607dd 1106 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1107
1108 /* Get advertisement EEE */
1109 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1110 MDIO_MMD_AN, phydev->addr);
1111 if (val < 0)
1112 return val;
b32607dd 1113 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1114
1115 /* Get LP advertisement EEE */
1116 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1117 MDIO_MMD_AN, phydev->addr);
1118 if (val < 0)
1119 return val;
b32607dd 1120 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1121
1122 return 0;
1123}
1124EXPORT_SYMBOL(phy_ethtool_get_eee);
1125
1126/**
1127 * phy_ethtool_set_eee - set EEE supported and status
1128 * @phydev: target phy_device struct
1129 * @data: ethtool_eee data
1130 *
1131 * Description: it is to program the Advertisement EEE register.
1132 */
1133int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1134{
1135 int val;
1136
b32607dd 1137 val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19
GC
1138 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1139 phydev->addr, val);
1140
1141 return 0;
1142}
1143EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1144
1145int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1146{
1147 if (phydev->drv->set_wol)
1148 return phydev->drv->set_wol(phydev, wol);
1149
1150 return -EOPNOTSUPP;
1151}
1152EXPORT_SYMBOL(phy_ethtool_set_wol);
1153
1154void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1155{
1156 if (phydev->drv->get_wol)
1157 phydev->drv->get_wol(phydev, wol);
1158}
1159EXPORT_SYMBOL(phy_ethtool_get_wol);
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