net: sctp: test if association is dead in sctp_wake_up_waiters
[deliverable/linux.git] / drivers / net / phy / phy.c
CommitLineData
2f53e904 1/* Framework for configuring and reading PHY devices
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AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
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15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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27#include <linux/mm.h>
28#include <linux/module.h>
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29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
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32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
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SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
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41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
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61/**
62 * phy_print_status - Convenience function to print out the current phy status
63 * @phydev: the phy_device struct
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AF
64 */
65void phy_print_status(struct phy_device *phydev)
66{
2f53e904 67 if (phydev->link) {
df40cc88 68 netdev_info(phydev->attached_dev,
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FF
69 "Link is Up - %s/%s - flow control %s\n",
70 phy_speed_to_str(phydev->speed),
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FF
71 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
72 phydev->pause ? "rx/tx" : "off");
2f53e904 73 } else {
43b6329f 74 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 75 }
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AF
76}
77EXPORT_SYMBOL(phy_print_status);
00db8189 78
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79/**
80 * phy_clear_interrupt - Ack the phy device's interrupt
81 * @phydev: the phy_device struct
82 *
83 * If the @phydev driver has an ack_interrupt function, call it to
84 * ack and clear the phy device's interrupt.
85 *
ad033506 86 * Returns 0 on success or < 0 on error.
b3df0da8 87 */
89ff05ec 88static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 89{
00db8189 90 if (phydev->drv->ack_interrupt)
e62a768f 91 return phydev->drv->ack_interrupt(phydev);
00db8189 92
e62a768f 93 return 0;
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AF
94}
95
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RD
96/**
97 * phy_config_interrupt - configure the PHY device for the requested interrupts
98 * @phydev: the phy_device struct
99 * @interrupts: interrupt flags to configure for this @phydev
100 *
ad033506 101 * Returns 0 on success or < 0 on error.
b3df0da8 102 */
89ff05ec 103static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 104{
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105 phydev->interrupts = interrupts;
106 if (phydev->drv->config_intr)
e62a768f 107 return phydev->drv->config_intr(phydev);
00db8189 108
e62a768f 109 return 0;
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110}
111
112
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113/**
114 * phy_aneg_done - return auto-negotiation status
115 * @phydev: target phy_device struct
00db8189 116 *
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117 * Description: Return the auto-negotiation status from this @phydev
118 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
119 * is still pending.
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120 */
121static inline int phy_aneg_done(struct phy_device *phydev)
122{
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FF
123 if (phydev->drv->aneg_done)
124 return phydev->drv->aneg_done(phydev);
125
a9fa6e6a 126 return genphy_aneg_done(phydev);
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127}
128
00db8189 129/* A structure for mapping a particular speed and duplex
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130 * combination to a particular SUPPORTED and ADVERTISED value
131 */
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132struct phy_setting {
133 int speed;
134 int duplex;
135 u32 setting;
136};
137
138/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 139static const struct phy_setting settings[] = {
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140 {
141 .speed = 10000,
142 .duplex = DUPLEX_FULL,
143 .setting = SUPPORTED_10000baseT_Full,
144 },
145 {
146 .speed = SPEED_1000,
147 .duplex = DUPLEX_FULL,
148 .setting = SUPPORTED_1000baseT_Full,
149 },
150 {
151 .speed = SPEED_1000,
152 .duplex = DUPLEX_HALF,
153 .setting = SUPPORTED_1000baseT_Half,
154 },
155 {
156 .speed = SPEED_100,
157 .duplex = DUPLEX_FULL,
158 .setting = SUPPORTED_100baseT_Full,
159 },
160 {
161 .speed = SPEED_100,
162 .duplex = DUPLEX_HALF,
163 .setting = SUPPORTED_100baseT_Half,
164 },
165 {
166 .speed = SPEED_10,
167 .duplex = DUPLEX_FULL,
168 .setting = SUPPORTED_10baseT_Full,
169 },
170 {
171 .speed = SPEED_10,
172 .duplex = DUPLEX_HALF,
173 .setting = SUPPORTED_10baseT_Half,
174 },
175};
176
ff8ac609 177#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 178
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179/**
180 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
181 * @speed: speed to match
182 * @duplex: duplex to match
00db8189 183 *
b3df0da8 184 * Description: Searches the settings array for the setting which
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AF
185 * matches the desired speed and duplex, and returns the index
186 * of that setting. Returns the index of the last setting if
187 * none of the others match.
188 */
4ae6e50c 189static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 190{
4ae6e50c 191 unsigned int idx = 0;
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192
193 while (idx < ARRAY_SIZE(settings) &&
2f53e904 194 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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195 idx++;
196
197 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
198}
199
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200/**
201 * phy_find_valid - find a PHY setting that matches the requested features mask
202 * @idx: The first index in settings[] to search
203 * @features: A mask of the valid settings
00db8189 204 *
b3df0da8 205 * Description: Returns the index of the first valid setting less
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AF
206 * than or equal to the one pointed to by idx, as determined by
207 * the mask in features. Returns the index of the last setting
208 * if nothing else matches.
209 */
4ae6e50c 210static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
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AF
211{
212 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
213 idx++;
214
215 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
216}
217
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218/**
219 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
220 * @phydev: the target phy_device struct
00db8189 221 *
b3df0da8 222 * Description: Make sure the PHY is set to supported speeds and
00db8189 223 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 224 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 225 */
89ff05ec 226static void phy_sanitize_settings(struct phy_device *phydev)
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227{
228 u32 features = phydev->supported;
4ae6e50c 229 unsigned int idx;
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230
231 /* Sanitize settings based on PHY capabilities */
232 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 233 phydev->autoneg = AUTONEG_DISABLE;
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234
235 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
236 features);
237
238 phydev->speed = settings[idx].speed;
239 phydev->duplex = settings[idx].duplex;
240}
00db8189 241
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242/**
243 * phy_ethtool_sset - generic ethtool sset function, handles all the details
244 * @phydev: target phy_device struct
245 * @cmd: ethtool_cmd
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246 *
247 * A few notes about parameter checking:
248 * - We don't set port or transceiver, so we don't care what they
249 * were set to.
250 * - phy_start_aneg() will make sure forced settings are sane, and
251 * choose the next best ones from the ones selected, so we don't
b3df0da8 252 * care if ethtool tries to give us bad values.
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253 */
254int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
255{
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DD
256 u32 speed = ethtool_cmd_speed(cmd);
257
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258 if (cmd->phy_address != phydev->addr)
259 return -EINVAL;
260
2f53e904 261 /* We make sure that we don't pass unsupported values in to the PHY */
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262 cmd->advertising &= phydev->supported;
263
264 /* Verify the settings we care about. */
265 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
266 return -EINVAL;
267
268 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
269 return -EINVAL;
270
8e95a202 271 if (cmd->autoneg == AUTONEG_DISABLE &&
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DD
272 ((speed != SPEED_1000 &&
273 speed != SPEED_100 &&
274 speed != SPEED_10) ||
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JP
275 (cmd->duplex != DUPLEX_HALF &&
276 cmd->duplex != DUPLEX_FULL)))
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277 return -EINVAL;
278
279 phydev->autoneg = cmd->autoneg;
280
25db0338 281 phydev->speed = speed;
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282
283 phydev->advertising = cmd->advertising;
284
285 if (AUTONEG_ENABLE == cmd->autoneg)
286 phydev->advertising |= ADVERTISED_Autoneg;
287 else
288 phydev->advertising &= ~ADVERTISED_Autoneg;
289
290 phydev->duplex = cmd->duplex;
291
292 /* Restart the PHY */
293 phy_start_aneg(phydev);
294
295 return 0;
296}
9f6d55d0 297EXPORT_SYMBOL(phy_ethtool_sset);
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298
299int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
300{
301 cmd->supported = phydev->supported;
302
303 cmd->advertising = phydev->advertising;
114002bc 304 cmd->lp_advertising = phydev->lp_advertising;
00db8189 305
70739497 306 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 307 cmd->duplex = phydev->duplex;
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FF
308 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
309 cmd->port = PORT_BNC;
310 else
311 cmd->port = PORT_MII;
00db8189 312 cmd->phy_address = phydev->addr;
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FF
313 cmd->transceiver = phy_is_internal(phydev) ?
314 XCVR_INTERNAL : XCVR_EXTERNAL;
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315 cmd->autoneg = phydev->autoneg;
316
317 return 0;
318}
9f6d55d0 319EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 320
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321/**
322 * phy_mii_ioctl - generic PHY MII ioctl interface
323 * @phydev: the phy_device struct
00c7d920 324 * @ifr: &struct ifreq for socket ioctl's
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325 * @cmd: ioctl cmd to execute
326 *
327 * Note that this function is currently incompatible with the
00db8189 328 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 329 * current state. Use at own risk.
00db8189 330 */
2f53e904 331int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 332{
28b04113 333 struct mii_ioctl_data *mii_data = if_mii(ifr);
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AF
334 u16 val = mii_data->val_in;
335
336 switch (cmd) {
337 case SIOCGMIIPHY:
338 mii_data->phy_id = phydev->addr;
c6d6a511
LB
339 /* fall through */
340
00db8189 341 case SIOCGMIIREG:
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PK
342 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
343 mii_data->reg_num);
e62a768f 344 return 0;
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AF
345
346 case SIOCSMIIREG:
00db8189 347 if (mii_data->phy_id == phydev->addr) {
e109374f 348 switch (mii_data->reg_num) {
00db8189 349 case MII_BMCR:
2f53e904 350 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0)
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AF
351 phydev->autoneg = AUTONEG_DISABLE;
352 else
353 phydev->autoneg = AUTONEG_ENABLE;
2f53e904 354 if (!phydev->autoneg && (val & BMCR_FULLDPLX))
00db8189
AF
355 phydev->duplex = DUPLEX_FULL;
356 else
357 phydev->duplex = DUPLEX_HALF;
2f53e904 358 if (!phydev->autoneg && (val & BMCR_SPEED1000))
024a0a3c 359 phydev->speed = SPEED_1000;
2f53e904
SS
360 else if (!phydev->autoneg &&
361 (val & BMCR_SPEED100))
024a0a3c 362 phydev->speed = SPEED_100;
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AF
363 break;
364 case MII_ADVERTISE:
365 phydev->advertising = val;
366 break;
367 default:
368 /* do nothing */
369 break;
370 }
371 }
372
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PK
373 mdiobus_write(phydev->bus, mii_data->phy_id,
374 mii_data->reg_num, val);
375
8e95a202 376 if (mii_data->reg_num == MII_BMCR &&
2613f95f 377 val & BMCR_RESET)
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SS
378 return phy_init_hw(phydev);
379 return 0;
dda93b48 380
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RC
381 case SIOCSHWTSTAMP:
382 if (phydev->drv->hwtstamp)
383 return phydev->drv->hwtstamp(phydev, ifr);
384 /* fall through */
385
dda93b48 386 default:
c6d6a511 387 return -EOPNOTSUPP;
00db8189 388 }
00db8189 389}
680e9fe9 390EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 391
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RD
392/**
393 * phy_start_aneg - start auto-negotiation for this PHY device
394 * @phydev: the phy_device struct
e1393456 395 *
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396 * Description: Sanitizes the settings (if we're not autonegotiating
397 * them), and then calls the driver's config_aneg function.
398 * If the PHYCONTROL Layer is operating, we change the state to
399 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
400 */
401int phy_start_aneg(struct phy_device *phydev)
402{
403 int err;
404
35b5f6b1 405 mutex_lock(&phydev->lock);
e1393456
AF
406
407 if (AUTONEG_DISABLE == phydev->autoneg)
408 phy_sanitize_settings(phydev);
409
410 err = phydev->drv->config_aneg(phydev);
e1393456
AF
411 if (err < 0)
412 goto out_unlock;
413
414 if (phydev->state != PHY_HALTED) {
415 if (AUTONEG_ENABLE == phydev->autoneg) {
416 phydev->state = PHY_AN;
417 phydev->link_timeout = PHY_AN_TIMEOUT;
418 } else {
419 phydev->state = PHY_FORCING;
420 phydev->link_timeout = PHY_FORCE_TIMEOUT;
421 }
422 }
423
424out_unlock:
35b5f6b1 425 mutex_unlock(&phydev->lock);
e1393456
AF
426 return err;
427}
428EXPORT_SYMBOL(phy_start_aneg);
429
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RD
430/**
431 * phy_start_machine - start PHY state machine tracking
432 * @phydev: the phy_device struct
00db8189 433 *
b3df0da8 434 * Description: The PHY infrastructure can run a state machine
00db8189
AF
435 * which tracks whether the PHY is starting up, negotiating,
436 * etc. This function starts the timer which tracks the state
29935aeb
SS
437 * of the PHY. If you want to maintain your own state machine,
438 * do not call this function.
b3df0da8 439 */
29935aeb 440void phy_start_machine(struct phy_device *phydev)
00db8189 441{
bbb47bde 442 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
443}
444
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RD
445/**
446 * phy_stop_machine - stop the PHY state machine tracking
447 * @phydev: target phy_device struct
00db8189 448 *
b3df0da8 449 * Description: Stops the state machine timer, sets the state to UP
817acf5e 450 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
451 * phy_detach.
452 */
453void phy_stop_machine(struct phy_device *phydev)
454{
a390d1f3 455 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 456
35b5f6b1 457 mutex_lock(&phydev->lock);
00db8189
AF
458 if (phydev->state > PHY_UP)
459 phydev->state = PHY_UP;
35b5f6b1 460 mutex_unlock(&phydev->lock);
00db8189
AF
461}
462
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RD
463/**
464 * phy_error - enter HALTED state for this PHY device
465 * @phydev: target phy_device struct
00db8189
AF
466 *
467 * Moves the PHY to the HALTED state in response to a read
468 * or write error, and tells the controller the link is down.
469 * Must not be called from interrupt context, or while the
470 * phydev->lock is held.
471 */
9b9a8bfc 472static void phy_error(struct phy_device *phydev)
00db8189 473{
35b5f6b1 474 mutex_lock(&phydev->lock);
00db8189 475 phydev->state = PHY_HALTED;
35b5f6b1 476 mutex_unlock(&phydev->lock);
00db8189
AF
477}
478
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RD
479/**
480 * phy_interrupt - PHY interrupt handler
481 * @irq: interrupt line
482 * @phy_dat: phy_device pointer
e1393456 483 *
b3df0da8 484 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
485 * interrupts, and schedules a work task to clear the interrupt.
486 */
7d12e780 487static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
488{
489 struct phy_device *phydev = phy_dat;
490
3c3070d7
MR
491 if (PHY_HALTED == phydev->state)
492 return IRQ_NONE; /* It can't be ours. */
493
e1393456
AF
494 /* The MDIO bus is not allowed to be written in interrupt
495 * context, so we need to disable the irq here. A work
496 * queue will write the PHY to disable and clear the
2f53e904
SS
497 * interrupt, and then reenable the irq line.
498 */
e1393456 499 disable_irq_nosync(irq);
0ac49527 500 atomic_inc(&phydev->irq_disable);
e1393456 501
bbb47bde 502 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
503
504 return IRQ_HANDLED;
505}
506
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RD
507/**
508 * phy_enable_interrupts - Enable the interrupts from the PHY side
509 * @phydev: target phy_device struct
510 */
89ff05ec 511static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 512{
553fe92b 513 int err = phy_clear_interrupt(phydev);
00db8189 514
e1393456
AF
515 if (err < 0)
516 return err;
00db8189 517
553fe92b 518 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 519}
00db8189 520
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RD
521/**
522 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
523 * @phydev: target phy_device struct
524 */
89ff05ec 525static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
526{
527 int err;
528
529 /* Disable PHY interrupts */
530 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
531 if (err)
532 goto phy_err;
533
534 /* Clear the interrupt */
535 err = phy_clear_interrupt(phydev);
00db8189
AF
536 if (err)
537 goto phy_err;
538
539 return 0;
540
541phy_err:
542 phy_error(phydev);
543
544 return err;
545}
e1393456 546
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RD
547/**
548 * phy_start_interrupts - request and enable interrupts for a PHY device
549 * @phydev: target phy_device struct
e1393456 550 *
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RD
551 * Description: Request the interrupt for the given PHY.
552 * If this fails, then we set irq to PHY_POLL.
e1393456 553 * Otherwise, we enable the interrupts in the PHY.
e1393456 554 * This should only be called with a valid IRQ number.
b3df0da8 555 * Returns 0 on success or < 0 on error.
e1393456
AF
556 */
557int phy_start_interrupts(struct phy_device *phydev)
558{
0ac49527 559 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
560 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
561 phydev) < 0) {
8d242488
JP
562 pr_warn("%s: Can't get IRQ %d (PHY)\n",
563 phydev->bus->name, phydev->irq);
e1393456
AF
564 phydev->irq = PHY_POLL;
565 return 0;
566 }
567
e62a768f 568 return phy_enable_interrupts(phydev);
e1393456
AF
569}
570EXPORT_SYMBOL(phy_start_interrupts);
571
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RD
572/**
573 * phy_stop_interrupts - disable interrupts from a PHY device
574 * @phydev: target phy_device struct
575 */
e1393456
AF
576int phy_stop_interrupts(struct phy_device *phydev)
577{
553fe92b 578 int err = phy_disable_interrupts(phydev);
e1393456
AF
579
580 if (err)
581 phy_error(phydev);
582
0ac49527
MR
583 free_irq(phydev->irq, phydev);
584
2f53e904 585 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
586 * of rtnl_lock(), but we do not really care about what would
587 * be done, except from enable_irq(), so cancel any work
588 * possibly pending and take care of the matter below.
3c3070d7 589 */
28e53bdd 590 cancel_work_sync(&phydev->phy_queue);
2f53e904 591 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
592 * been left unbalanced from phy_interrupt() and enable_irq()
593 * has to be called so that other devices on the line work.
594 */
595 while (atomic_dec_return(&phydev->irq_disable) >= 0)
596 enable_irq(phydev->irq);
e1393456
AF
597
598 return err;
599}
600EXPORT_SYMBOL(phy_stop_interrupts);
601
b3df0da8
RD
602/**
603 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
604 * @work: work_struct that describes the work to be done
605 */
5ea94e76 606void phy_change(struct work_struct *work)
e1393456 607{
c4028958
DH
608 struct phy_device *phydev =
609 container_of(work, struct phy_device, phy_queue);
e1393456 610
a8729eb3
AG
611 if (phydev->drv->did_interrupt &&
612 !phydev->drv->did_interrupt(phydev))
613 goto ignore;
614
e62a768f 615 if (phy_disable_interrupts(phydev))
e1393456
AF
616 goto phy_err;
617
35b5f6b1 618 mutex_lock(&phydev->lock);
e1393456
AF
619 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
620 phydev->state = PHY_CHANGELINK;
35b5f6b1 621 mutex_unlock(&phydev->lock);
e1393456 622
0ac49527 623 atomic_dec(&phydev->irq_disable);
e1393456
AF
624 enable_irq(phydev->irq);
625
626 /* Reenable interrupts */
e62a768f
SS
627 if (PHY_HALTED != phydev->state &&
628 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
629 goto irq_enable_err;
630
a390d1f3
MS
631 /* reschedule state queue work to run as soon as possible */
632 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 633 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
634 return;
635
a8729eb3
AG
636ignore:
637 atomic_dec(&phydev->irq_disable);
638 enable_irq(phydev->irq);
639 return;
640
e1393456
AF
641irq_enable_err:
642 disable_irq(phydev->irq);
0ac49527 643 atomic_inc(&phydev->irq_disable);
e1393456
AF
644phy_err:
645 phy_error(phydev);
646}
647
b3df0da8
RD
648/**
649 * phy_stop - Bring down the PHY link, and stop checking the status
650 * @phydev: target phy_device struct
651 */
e1393456
AF
652void phy_stop(struct phy_device *phydev)
653{
35b5f6b1 654 mutex_lock(&phydev->lock);
e1393456
AF
655
656 if (PHY_HALTED == phydev->state)
657 goto out_unlock;
658
2c7b4921 659 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
660 /* Disable PHY Interrupts */
661 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 662
3c3070d7
MR
663 /* Clear any pending interrupts */
664 phy_clear_interrupt(phydev);
665 }
e1393456 666
6daf6531
MR
667 phydev->state = PHY_HALTED;
668
e1393456 669out_unlock:
35b5f6b1 670 mutex_unlock(&phydev->lock);
3c3070d7 671
2f53e904 672 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
673 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
674 * will not reenable interrupts.
675 */
e1393456 676}
2f53e904 677EXPORT_SYMBOL(phy_stop);
e1393456 678
b3df0da8
RD
679/**
680 * phy_start - start or restart a PHY device
681 * @phydev: target phy_device struct
e1393456 682 *
b3df0da8 683 * Description: Indicates the attached device's readiness to
e1393456
AF
684 * handle PHY-related work. Used during startup to start the
685 * PHY, and after a call to phy_stop() to resume operation.
686 * Also used to indicate the MDIO bus has cleared an error
687 * condition.
688 */
689void phy_start(struct phy_device *phydev)
690{
35b5f6b1 691 mutex_lock(&phydev->lock);
e1393456
AF
692
693 switch (phydev->state) {
e109374f
FF
694 case PHY_STARTING:
695 phydev->state = PHY_PENDING;
696 break;
697 case PHY_READY:
698 phydev->state = PHY_UP;
699 break;
700 case PHY_HALTED:
701 phydev->state = PHY_RESUMING;
702 default:
703 break;
e1393456 704 }
35b5f6b1 705 mutex_unlock(&phydev->lock);
e1393456 706}
e1393456 707EXPORT_SYMBOL(phy_start);
67c4f3fa 708
35b5f6b1
NC
709/**
710 * phy_state_machine - Handle the state machine
711 * @work: work_struct that describes the work to be done
35b5f6b1 712 */
4f9c85a1 713void phy_state_machine(struct work_struct *work)
00db8189 714{
bf6aede7 715 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 716 struct phy_device *phydev =
a390d1f3 717 container_of(dwork, struct phy_device, state_queue);
be9dad1f 718 int needs_aneg = 0, do_suspend = 0;
00db8189
AF
719 int err = 0;
720
35b5f6b1 721 mutex_lock(&phydev->lock);
00db8189 722
e109374f
FF
723 switch (phydev->state) {
724 case PHY_DOWN:
725 case PHY_STARTING:
726 case PHY_READY:
727 case PHY_PENDING:
728 break;
729 case PHY_UP:
730 needs_aneg = 1;
00db8189 731
e109374f
FF
732 phydev->link_timeout = PHY_AN_TIMEOUT;
733
734 break;
735 case PHY_AN:
736 err = phy_read_status(phydev);
e109374f 737 if (err < 0)
00db8189 738 break;
6b655529 739
2f53e904 740 /* If the link is down, give up on negotiation for now */
e109374f
FF
741 if (!phydev->link) {
742 phydev->state = PHY_NOLINK;
743 netif_carrier_off(phydev->attached_dev);
744 phydev->adjust_link(phydev->attached_dev);
745 break;
746 }
6b655529 747
2f53e904 748 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
749 err = phy_aneg_done(phydev);
750 if (err < 0)
751 break;
6b655529 752
e109374f
FF
753 /* If AN is done, we're running */
754 if (err > 0) {
755 phydev->state = PHY_RUNNING;
756 netif_carrier_on(phydev->attached_dev);
757 phydev->adjust_link(phydev->attached_dev);
00db8189 758
e109374f
FF
759 } else if (0 == phydev->link_timeout--) {
760 needs_aneg = 1;
2f53e904 761 /* If we have the magic_aneg bit, we try again */
e109374f
FF
762 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
763 break;
764 }
765 break;
766 case PHY_NOLINK:
767 err = phy_read_status(phydev);
e109374f 768 if (err)
00db8189 769 break;
00db8189 770
e109374f
FF
771 if (phydev->link) {
772 phydev->state = PHY_RUNNING;
773 netif_carrier_on(phydev->attached_dev);
774 phydev->adjust_link(phydev->attached_dev);
775 }
776 break;
777 case PHY_FORCING:
778 err = genphy_update_link(phydev);
e109374f 779 if (err)
00db8189 780 break;
00db8189 781
e109374f
FF
782 if (phydev->link) {
783 phydev->state = PHY_RUNNING;
784 netif_carrier_on(phydev->attached_dev);
785 } else {
786 if (0 == phydev->link_timeout--)
787 needs_aneg = 1;
788 }
00db8189 789
e109374f
FF
790 phydev->adjust_link(phydev->attached_dev);
791 break;
792 case PHY_RUNNING:
793 /* Only register a CHANGE if we are
794 * polling or ignoring interrupts
795 */
796 if (!phy_interrupt_is_valid(phydev))
797 phydev->state = PHY_CHANGELINK;
798 break;
799 case PHY_CHANGELINK:
800 err = phy_read_status(phydev);
e109374f 801 if (err)
00db8189 802 break;
00db8189 803
e109374f
FF
804 if (phydev->link) {
805 phydev->state = PHY_RUNNING;
806 netif_carrier_on(phydev->attached_dev);
807 } else {
808 phydev->state = PHY_NOLINK;
809 netif_carrier_off(phydev->attached_dev);
810 }
00db8189 811
e109374f 812 phydev->adjust_link(phydev->attached_dev);
00db8189 813
e109374f
FF
814 if (phy_interrupt_is_valid(phydev))
815 err = phy_config_interrupt(phydev,
2f53e904 816 PHY_INTERRUPT_ENABLED);
e109374f
FF
817 break;
818 case PHY_HALTED:
819 if (phydev->link) {
820 phydev->link = 0;
821 netif_carrier_off(phydev->attached_dev);
00db8189 822 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
823 do_suspend = 1;
824 }
825 break;
826 case PHY_RESUMING:
e109374f 827 err = phy_clear_interrupt(phydev);
e109374f
FF
828 if (err)
829 break;
00db8189 830
2f53e904 831 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e109374f
FF
832 if (err)
833 break;
00db8189 834
e109374f
FF
835 if (AUTONEG_ENABLE == phydev->autoneg) {
836 err = phy_aneg_done(phydev);
837 if (err < 0)
00db8189
AF
838 break;
839
e109374f 840 /* err > 0 if AN is done.
2f53e904
SS
841 * Otherwise, it's 0, and we're still waiting for AN
842 */
e109374f 843 if (err > 0) {
42caa074
WF
844 err = phy_read_status(phydev);
845 if (err)
846 break;
847
848 if (phydev->link) {
849 phydev->state = PHY_RUNNING;
850 netif_carrier_on(phydev->attached_dev);
2f53e904 851 } else {
42caa074 852 phydev->state = PHY_NOLINK;
2f53e904 853 }
42caa074 854 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
855 } else {
856 phydev->state = PHY_AN;
857 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 858 }
e109374f
FF
859 } else {
860 err = phy_read_status(phydev);
861 if (err)
862 break;
863
864 if (phydev->link) {
865 phydev->state = PHY_RUNNING;
866 netif_carrier_on(phydev->attached_dev);
2f53e904 867 } else {
e109374f 868 phydev->state = PHY_NOLINK;
2f53e904 869 }
e109374f
FF
870 phydev->adjust_link(phydev->attached_dev);
871 }
872 break;
00db8189
AF
873 }
874
35b5f6b1 875 mutex_unlock(&phydev->lock);
00db8189
AF
876
877 if (needs_aneg)
878 err = phy_start_aneg(phydev);
879
be9dad1f
SH
880 if (do_suspend)
881 phy_suspend(phydev);
882
00db8189
AF
883 if (err < 0)
884 phy_error(phydev);
885
bbb47bde 886 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 887 PHY_STATE_TIME * HZ);
35b5f6b1 888}
a59a4d19 889
5ea94e76
FF
890void phy_mac_interrupt(struct phy_device *phydev, int new_link)
891{
892 cancel_work_sync(&phydev->phy_queue);
893 phydev->link = new_link;
894 schedule_work(&phydev->phy_queue);
895}
896EXPORT_SYMBOL(phy_mac_interrupt);
897
a59a4d19
GC
898static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
899 int addr)
900{
901 /* Write the desired MMD Devad */
902 bus->write(bus, addr, MII_MMD_CTRL, devad);
903
904 /* Write the desired MMD register address */
905 bus->write(bus, addr, MII_MMD_DATA, prtad);
906
907 /* Select the Function : DATA with no post increment */
908 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
909}
910
911/**
912 * phy_read_mmd_indirect - reads data from the MMD registers
913 * @bus: the target MII bus
914 * @prtad: MMD Address
915 * @devad: MMD DEVAD
916 * @addr: PHY address on the MII bus
917 *
918 * Description: it reads data from the MMD registers (clause 22 to access to
919 * clause 45) of the specified phy address.
920 * To read these register we have:
921 * 1) Write reg 13 // DEVAD
922 * 2) Write reg 14 // MMD Address
923 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
924 * 3) Read reg 14 // Read MMD data
925 */
926static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
927 int addr)
928{
a59a4d19
GC
929 mmd_phy_indirect(bus, prtad, devad, addr);
930
931 /* Read the content of the MMD's selected register */
e62a768f 932 return bus->read(bus, addr, MII_MMD_DATA);
a59a4d19
GC
933}
934
935/**
936 * phy_write_mmd_indirect - writes data to the MMD registers
937 * @bus: the target MII bus
938 * @prtad: MMD Address
939 * @devad: MMD DEVAD
940 * @addr: PHY address on the MII bus
941 * @data: data to write in the MMD register
942 *
943 * Description: Write data from the MMD registers of the specified
944 * phy address.
945 * To write these register we have:
946 * 1) Write reg 13 // DEVAD
947 * 2) Write reg 14 // MMD Address
948 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
949 * 3) Write reg 14 // Write MMD data
950 */
951static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
952 int addr, u32 data)
953{
954 mmd_phy_indirect(bus, prtad, devad, addr);
955
956 /* Write the data into MMD's selected register */
957 bus->write(bus, addr, MII_MMD_DATA, data);
958}
959
a59a4d19
GC
960/**
961 * phy_init_eee - init and check the EEE feature
962 * @phydev: target phy_device struct
963 * @clk_stop_enable: PHY may stop the clock during LPI
964 *
965 * Description: it checks if the Energy-Efficient Ethernet (EEE)
966 * is supported by looking at the MMD registers 3.20 and 7.60/61
967 * and it programs the MMD register 3.0 setting the "Clock stop enable"
968 * bit if required.
969 */
970int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
971{
a59a4d19
GC
972 /* According to 802.3az,the EEE is supported only in full duplex-mode.
973 * Also EEE feature is active when core is operating with MII, GMII
974 * or RGMII.
975 */
976 if ((phydev->duplex == DUPLEX_FULL) &&
977 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
978 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
979 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
980 int eee_lp, eee_cap, eee_adv;
981 u32 lp, cap, adv;
4ae6e50c
BH
982 int status;
983 unsigned int idx;
a59a4d19
GC
984
985 /* Read phy status to properly get the right settings */
986 status = phy_read_status(phydev);
987 if (status)
988 return status;
989
990 /* First check if the EEE ability is supported */
991 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
992 MDIO_MMD_PCS, phydev->addr);
993 if (eee_cap < 0)
994 return eee_cap;
995
b32607dd 996 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 997 if (!cap)
e62a768f 998 return -EPROTONOSUPPORT;
a59a4d19
GC
999
1000 /* Check which link settings negotiated and verify it in
1001 * the EEE advertising registers.
1002 */
1003 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1004 MDIO_MMD_AN, phydev->addr);
1005 if (eee_lp < 0)
1006 return eee_lp;
1007
1008 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1009 MDIO_MMD_AN, phydev->addr);
1010 if (eee_adv < 0)
1011 return eee_adv;
1012
b32607dd
AB
1013 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1014 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19 1015 idx = phy_find_setting(phydev->speed, phydev->duplex);
9a9c56cb 1016 if (!(lp & adv & settings[idx].setting))
e62a768f 1017 return -EPROTONOSUPPORT;
a59a4d19
GC
1018
1019 if (clk_stop_enable) {
1020 /* Configure the PHY to stop receiving xMII
1021 * clock while it is signaling LPI.
1022 */
1023 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
1024 MDIO_MMD_PCS,
1025 phydev->addr);
1026 if (val < 0)
1027 return val;
1028
1029 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1030 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1031 MDIO_MMD_PCS, phydev->addr, val);
1032 }
1033
e62a768f 1034 return 0; /* EEE supported */
a59a4d19
GC
1035 }
1036
e62a768f 1037 return -EPROTONOSUPPORT;
a59a4d19
GC
1038}
1039EXPORT_SYMBOL(phy_init_eee);
1040
1041/**
1042 * phy_get_eee_err - report the EEE wake error count
1043 * @phydev: target phy_device struct
1044 *
1045 * Description: it is to report the number of time where the PHY
1046 * failed to complete its normal wake sequence.
1047 */
1048int phy_get_eee_err(struct phy_device *phydev)
1049{
1050 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1051 MDIO_MMD_PCS, phydev->addr);
a59a4d19
GC
1052}
1053EXPORT_SYMBOL(phy_get_eee_err);
1054
1055/**
1056 * phy_ethtool_get_eee - get EEE supported and status
1057 * @phydev: target phy_device struct
1058 * @data: ethtool_eee data
1059 *
1060 * Description: it reportes the Supported/Advertisement/LP Advertisement
1061 * capabilities.
1062 */
1063int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1064{
1065 int val;
1066
1067 /* Get Supported EEE */
1068 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1069 MDIO_MMD_PCS, phydev->addr);
1070 if (val < 0)
1071 return val;
b32607dd 1072 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1073
1074 /* Get advertisement EEE */
1075 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1076 MDIO_MMD_AN, phydev->addr);
1077 if (val < 0)
1078 return val;
b32607dd 1079 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1080
1081 /* Get LP advertisement EEE */
1082 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1083 MDIO_MMD_AN, phydev->addr);
1084 if (val < 0)
1085 return val;
b32607dd 1086 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1087
1088 return 0;
1089}
1090EXPORT_SYMBOL(phy_ethtool_get_eee);
1091
1092/**
1093 * phy_ethtool_set_eee - set EEE supported and status
1094 * @phydev: target phy_device struct
1095 * @data: ethtool_eee data
1096 *
1097 * Description: it is to program the Advertisement EEE register.
1098 */
1099int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1100{
553fe92b 1101 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1102
a59a4d19
GC
1103 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1104 phydev->addr, val);
1105
1106 return 0;
1107}
1108EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1109
1110int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1111{
1112 if (phydev->drv->set_wol)
1113 return phydev->drv->set_wol(phydev, wol);
1114
1115 return -EOPNOTSUPP;
1116}
1117EXPORT_SYMBOL(phy_ethtool_set_wol);
1118
1119void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1120{
1121 if (phydev->drv->get_wol)
1122 phydev->drv->get_wol(phydev, wol);
1123}
1124EXPORT_SYMBOL(phy_ethtool_get_wol);
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