net: phy: Fix verification of EEE support in phy_init_eee
[deliverable/linux.git] / drivers / net / phy / phy.c
CommitLineData
2f53e904 1/* Framework for configuring and reading PHY devices
00db8189
AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
00db8189
AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
JP
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
00db8189
AF
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
00db8189
AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
00db8189
AF
27#include <linux/mm.h>
28#include <linux/module.h>
00db8189
AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
3c3070d7
MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
2f53e904
SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
766d1d38
FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
b3df0da8
RD
61/**
62 * phy_print_status - Convenience function to print out the current phy status
63 * @phydev: the phy_device struct
e1393456
AF
64 */
65void phy_print_status(struct phy_device *phydev)
66{
2f53e904 67 if (phydev->link) {
df40cc88 68 netdev_info(phydev->attached_dev,
766d1d38
FF
69 "Link is Up - %s/%s - flow control %s\n",
70 phy_speed_to_str(phydev->speed),
df40cc88
FF
71 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
72 phydev->pause ? "rx/tx" : "off");
2f53e904 73 } else {
43b6329f 74 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 75 }
e1393456
AF
76}
77EXPORT_SYMBOL(phy_print_status);
00db8189 78
b3df0da8
RD
79/**
80 * phy_clear_interrupt - Ack the phy device's interrupt
81 * @phydev: the phy_device struct
82 *
83 * If the @phydev driver has an ack_interrupt function, call it to
84 * ack and clear the phy device's interrupt.
85 *
ad033506 86 * Returns 0 on success or < 0 on error.
b3df0da8 87 */
89ff05ec 88static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 89{
00db8189 90 if (phydev->drv->ack_interrupt)
e62a768f 91 return phydev->drv->ack_interrupt(phydev);
00db8189 92
e62a768f 93 return 0;
00db8189
AF
94}
95
b3df0da8
RD
96/**
97 * phy_config_interrupt - configure the PHY device for the requested interrupts
98 * @phydev: the phy_device struct
99 * @interrupts: interrupt flags to configure for this @phydev
100 *
ad033506 101 * Returns 0 on success or < 0 on error.
b3df0da8 102 */
89ff05ec 103static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 104{
00db8189
AF
105 phydev->interrupts = interrupts;
106 if (phydev->drv->config_intr)
e62a768f 107 return phydev->drv->config_intr(phydev);
00db8189 108
e62a768f 109 return 0;
00db8189
AF
110}
111
112
b3df0da8
RD
113/**
114 * phy_aneg_done - return auto-negotiation status
115 * @phydev: target phy_device struct
00db8189 116 *
76a423a3
FF
117 * Description: Return the auto-negotiation status from this @phydev
118 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
119 * is still pending.
00db8189
AF
120 */
121static inline int phy_aneg_done(struct phy_device *phydev)
122{
76a423a3
FF
123 if (phydev->drv->aneg_done)
124 return phydev->drv->aneg_done(phydev);
125
a9fa6e6a 126 return genphy_aneg_done(phydev);
00db8189
AF
127}
128
00db8189 129/* A structure for mapping a particular speed and duplex
2f53e904
SS
130 * combination to a particular SUPPORTED and ADVERTISED value
131 */
00db8189
AF
132struct phy_setting {
133 int speed;
134 int duplex;
135 u32 setting;
136};
137
138/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 139static const struct phy_setting settings[] = {
00db8189 140 {
3e707706
LT
141 .speed = SPEED_10000,
142 .duplex = DUPLEX_FULL,
143 .setting = SUPPORTED_10000baseKR_Full,
144 },
145 {
146 .speed = SPEED_10000,
147 .duplex = DUPLEX_FULL,
148 .setting = SUPPORTED_10000baseKX4_Full,
149 },
150 {
151 .speed = SPEED_10000,
00db8189
AF
152 .duplex = DUPLEX_FULL,
153 .setting = SUPPORTED_10000baseT_Full,
154 },
3e707706
LT
155 {
156 .speed = SPEED_2500,
157 .duplex = DUPLEX_FULL,
158 .setting = SUPPORTED_2500baseX_Full,
159 },
160 {
161 .speed = SPEED_1000,
162 .duplex = DUPLEX_FULL,
163 .setting = SUPPORTED_1000baseKX_Full,
164 },
00db8189
AF
165 {
166 .speed = SPEED_1000,
167 .duplex = DUPLEX_FULL,
168 .setting = SUPPORTED_1000baseT_Full,
169 },
170 {
171 .speed = SPEED_1000,
172 .duplex = DUPLEX_HALF,
173 .setting = SUPPORTED_1000baseT_Half,
174 },
175 {
176 .speed = SPEED_100,
177 .duplex = DUPLEX_FULL,
178 .setting = SUPPORTED_100baseT_Full,
179 },
180 {
181 .speed = SPEED_100,
182 .duplex = DUPLEX_HALF,
183 .setting = SUPPORTED_100baseT_Half,
184 },
185 {
186 .speed = SPEED_10,
187 .duplex = DUPLEX_FULL,
188 .setting = SUPPORTED_10baseT_Full,
189 },
190 {
191 .speed = SPEED_10,
192 .duplex = DUPLEX_HALF,
193 .setting = SUPPORTED_10baseT_Half,
194 },
195};
196
ff8ac609 197#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 198
b3df0da8
RD
199/**
200 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
201 * @speed: speed to match
202 * @duplex: duplex to match
00db8189 203 *
b3df0da8 204 * Description: Searches the settings array for the setting which
00db8189
AF
205 * matches the desired speed and duplex, and returns the index
206 * of that setting. Returns the index of the last setting if
207 * none of the others match.
208 */
4ae6e50c 209static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 210{
4ae6e50c 211 unsigned int idx = 0;
00db8189
AF
212
213 while (idx < ARRAY_SIZE(settings) &&
2f53e904 214 (settings[idx].speed != speed || settings[idx].duplex != duplex))
00db8189
AF
215 idx++;
216
217 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
218}
219
b3df0da8
RD
220/**
221 * phy_find_valid - find a PHY setting that matches the requested features mask
222 * @idx: The first index in settings[] to search
223 * @features: A mask of the valid settings
00db8189 224 *
b3df0da8 225 * Description: Returns the index of the first valid setting less
00db8189
AF
226 * than or equal to the one pointed to by idx, as determined by
227 * the mask in features. Returns the index of the last setting
228 * if nothing else matches.
229 */
4ae6e50c 230static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
00db8189
AF
231{
232 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
233 idx++;
234
235 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
236}
237
54da5a8b
GR
238/**
239 * phy_check_valid - check if there is a valid PHY setting which matches
240 * speed, duplex, and feature mask
241 * @speed: speed to match
242 * @duplex: duplex to match
243 * @features: A mask of the valid settings
244 *
245 * Description: Returns true if there is a valid setting, false otherwise.
246 */
247static inline bool phy_check_valid(int speed, int duplex, u32 features)
248{
249 unsigned int idx;
250
251 idx = phy_find_valid(phy_find_setting(speed, duplex), features);
252
253 return settings[idx].speed == speed && settings[idx].duplex == duplex &&
254 (settings[idx].setting & features);
255}
256
b3df0da8
RD
257/**
258 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
259 * @phydev: the target phy_device struct
00db8189 260 *
b3df0da8 261 * Description: Make sure the PHY is set to supported speeds and
00db8189 262 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 263 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 264 */
89ff05ec 265static void phy_sanitize_settings(struct phy_device *phydev)
00db8189
AF
266{
267 u32 features = phydev->supported;
4ae6e50c 268 unsigned int idx;
00db8189
AF
269
270 /* Sanitize settings based on PHY capabilities */
271 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 272 phydev->autoneg = AUTONEG_DISABLE;
00db8189
AF
273
274 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
275 features);
276
277 phydev->speed = settings[idx].speed;
278 phydev->duplex = settings[idx].duplex;
279}
00db8189 280
b3df0da8
RD
281/**
282 * phy_ethtool_sset - generic ethtool sset function, handles all the details
283 * @phydev: target phy_device struct
284 * @cmd: ethtool_cmd
00db8189
AF
285 *
286 * A few notes about parameter checking:
287 * - We don't set port or transceiver, so we don't care what they
288 * were set to.
289 * - phy_start_aneg() will make sure forced settings are sane, and
290 * choose the next best ones from the ones selected, so we don't
b3df0da8 291 * care if ethtool tries to give us bad values.
00db8189
AF
292 */
293int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
294{
25db0338
DD
295 u32 speed = ethtool_cmd_speed(cmd);
296
00db8189
AF
297 if (cmd->phy_address != phydev->addr)
298 return -EINVAL;
299
2f53e904 300 /* We make sure that we don't pass unsupported values in to the PHY */
00db8189
AF
301 cmd->advertising &= phydev->supported;
302
303 /* Verify the settings we care about. */
304 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
305 return -EINVAL;
306
307 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
308 return -EINVAL;
309
8e95a202 310 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
311 ((speed != SPEED_1000 &&
312 speed != SPEED_100 &&
313 speed != SPEED_10) ||
8e95a202
JP
314 (cmd->duplex != DUPLEX_HALF &&
315 cmd->duplex != DUPLEX_FULL)))
00db8189
AF
316 return -EINVAL;
317
318 phydev->autoneg = cmd->autoneg;
319
25db0338 320 phydev->speed = speed;
00db8189
AF
321
322 phydev->advertising = cmd->advertising;
323
324 if (AUTONEG_ENABLE == cmd->autoneg)
325 phydev->advertising |= ADVERTISED_Autoneg;
326 else
327 phydev->advertising &= ~ADVERTISED_Autoneg;
328
329 phydev->duplex = cmd->duplex;
330
331 /* Restart the PHY */
332 phy_start_aneg(phydev);
333
334 return 0;
335}
9f6d55d0 336EXPORT_SYMBOL(phy_ethtool_sset);
00db8189
AF
337
338int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
339{
340 cmd->supported = phydev->supported;
341
342 cmd->advertising = phydev->advertising;
114002bc 343 cmd->lp_advertising = phydev->lp_advertising;
00db8189 344
70739497 345 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 346 cmd->duplex = phydev->duplex;
c88838ce
FF
347 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
348 cmd->port = PORT_BNC;
349 else
350 cmd->port = PORT_MII;
00db8189 351 cmd->phy_address = phydev->addr;
4284b6a5
FF
352 cmd->transceiver = phy_is_internal(phydev) ?
353 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189
AF
354 cmd->autoneg = phydev->autoneg;
355
356 return 0;
357}
9f6d55d0 358EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 359
b3df0da8
RD
360/**
361 * phy_mii_ioctl - generic PHY MII ioctl interface
362 * @phydev: the phy_device struct
00c7d920 363 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
364 * @cmd: ioctl cmd to execute
365 *
366 * Note that this function is currently incompatible with the
00db8189 367 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 368 * current state. Use at own risk.
00db8189 369 */
2f53e904 370int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 371{
28b04113 372 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189 373 u16 val = mii_data->val_in;
79ce0477 374 bool change_autoneg = false;
00db8189
AF
375
376 switch (cmd) {
377 case SIOCGMIIPHY:
378 mii_data->phy_id = phydev->addr;
c6d6a511
LB
379 /* fall through */
380
00db8189 381 case SIOCGMIIREG:
af1dc13e
PK
382 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
383 mii_data->reg_num);
e62a768f 384 return 0;
00db8189
AF
385
386 case SIOCSMIIREG:
00db8189 387 if (mii_data->phy_id == phydev->addr) {
e109374f 388 switch (mii_data->reg_num) {
00db8189 389 case MII_BMCR:
79ce0477
BH
390 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) {
391 if (phydev->autoneg == AUTONEG_ENABLE)
392 change_autoneg = true;
00db8189 393 phydev->autoneg = AUTONEG_DISABLE;
79ce0477
BH
394 if (val & BMCR_FULLDPLX)
395 phydev->duplex = DUPLEX_FULL;
396 else
397 phydev->duplex = DUPLEX_HALF;
398 if (val & BMCR_SPEED1000)
399 phydev->speed = SPEED_1000;
400 else if (val & BMCR_SPEED100)
401 phydev->speed = SPEED_100;
402 else phydev->speed = SPEED_10;
403 }
404 else {
405 if (phydev->autoneg == AUTONEG_DISABLE)
406 change_autoneg = true;
00db8189 407 phydev->autoneg = AUTONEG_ENABLE;
79ce0477 408 }
00db8189
AF
409 break;
410 case MII_ADVERTISE:
79ce0477
BH
411 phydev->advertising = mii_adv_to_ethtool_adv_t(val);
412 change_autoneg = true;
00db8189
AF
413 break;
414 default:
415 /* do nothing */
416 break;
417 }
418 }
419
af1dc13e
PK
420 mdiobus_write(phydev->bus, mii_data->phy_id,
421 mii_data->reg_num, val);
422
8e95a202 423 if (mii_data->reg_num == MII_BMCR &&
2613f95f 424 val & BMCR_RESET)
e62a768f 425 return phy_init_hw(phydev);
79ce0477
BH
426
427 if (change_autoneg)
428 return phy_start_aneg(phydev);
429
e62a768f 430 return 0;
dda93b48 431
c1f19b51
RC
432 case SIOCSHWTSTAMP:
433 if (phydev->drv->hwtstamp)
434 return phydev->drv->hwtstamp(phydev, ifr);
435 /* fall through */
436
dda93b48 437 default:
c6d6a511 438 return -EOPNOTSUPP;
00db8189 439 }
00db8189 440}
680e9fe9 441EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 442
b3df0da8
RD
443/**
444 * phy_start_aneg - start auto-negotiation for this PHY device
445 * @phydev: the phy_device struct
e1393456 446 *
b3df0da8
RD
447 * Description: Sanitizes the settings (if we're not autonegotiating
448 * them), and then calls the driver's config_aneg function.
449 * If the PHYCONTROL Layer is operating, we change the state to
450 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
451 */
452int phy_start_aneg(struct phy_device *phydev)
453{
454 int err;
455
35b5f6b1 456 mutex_lock(&phydev->lock);
e1393456
AF
457
458 if (AUTONEG_DISABLE == phydev->autoneg)
459 phy_sanitize_settings(phydev);
460
9b3320ef
BH
461 /* Invalidate LP advertising flags */
462 phydev->lp_advertising = 0;
463
e1393456 464 err = phydev->drv->config_aneg(phydev);
e1393456
AF
465 if (err < 0)
466 goto out_unlock;
467
468 if (phydev->state != PHY_HALTED) {
469 if (AUTONEG_ENABLE == phydev->autoneg) {
470 phydev->state = PHY_AN;
471 phydev->link_timeout = PHY_AN_TIMEOUT;
472 } else {
473 phydev->state = PHY_FORCING;
474 phydev->link_timeout = PHY_FORCE_TIMEOUT;
475 }
476 }
477
478out_unlock:
35b5f6b1 479 mutex_unlock(&phydev->lock);
e1393456
AF
480 return err;
481}
482EXPORT_SYMBOL(phy_start_aneg);
483
b3df0da8
RD
484/**
485 * phy_start_machine - start PHY state machine tracking
486 * @phydev: the phy_device struct
00db8189 487 *
b3df0da8 488 * Description: The PHY infrastructure can run a state machine
00db8189
AF
489 * which tracks whether the PHY is starting up, negotiating,
490 * etc. This function starts the timer which tracks the state
29935aeb
SS
491 * of the PHY. If you want to maintain your own state machine,
492 * do not call this function.
b3df0da8 493 */
29935aeb 494void phy_start_machine(struct phy_device *phydev)
00db8189 495{
bbb47bde 496 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
497}
498
b3df0da8
RD
499/**
500 * phy_stop_machine - stop the PHY state machine tracking
501 * @phydev: target phy_device struct
00db8189 502 *
b3df0da8 503 * Description: Stops the state machine timer, sets the state to UP
817acf5e 504 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
505 * phy_detach.
506 */
507void phy_stop_machine(struct phy_device *phydev)
508{
a390d1f3 509 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 510
35b5f6b1 511 mutex_lock(&phydev->lock);
00db8189
AF
512 if (phydev->state > PHY_UP)
513 phydev->state = PHY_UP;
35b5f6b1 514 mutex_unlock(&phydev->lock);
00db8189
AF
515}
516
b3df0da8
RD
517/**
518 * phy_error - enter HALTED state for this PHY device
519 * @phydev: target phy_device struct
00db8189
AF
520 *
521 * Moves the PHY to the HALTED state in response to a read
522 * or write error, and tells the controller the link is down.
523 * Must not be called from interrupt context, or while the
524 * phydev->lock is held.
525 */
9b9a8bfc 526static void phy_error(struct phy_device *phydev)
00db8189 527{
35b5f6b1 528 mutex_lock(&phydev->lock);
00db8189 529 phydev->state = PHY_HALTED;
35b5f6b1 530 mutex_unlock(&phydev->lock);
00db8189
AF
531}
532
b3df0da8
RD
533/**
534 * phy_interrupt - PHY interrupt handler
535 * @irq: interrupt line
536 * @phy_dat: phy_device pointer
e1393456 537 *
b3df0da8 538 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
539 * interrupts, and schedules a work task to clear the interrupt.
540 */
7d12e780 541static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
542{
543 struct phy_device *phydev = phy_dat;
544
3c3070d7
MR
545 if (PHY_HALTED == phydev->state)
546 return IRQ_NONE; /* It can't be ours. */
547
e1393456
AF
548 /* The MDIO bus is not allowed to be written in interrupt
549 * context, so we need to disable the irq here. A work
550 * queue will write the PHY to disable and clear the
2f53e904
SS
551 * interrupt, and then reenable the irq line.
552 */
e1393456 553 disable_irq_nosync(irq);
0ac49527 554 atomic_inc(&phydev->irq_disable);
e1393456 555
bbb47bde 556 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
557
558 return IRQ_HANDLED;
559}
560
b3df0da8
RD
561/**
562 * phy_enable_interrupts - Enable the interrupts from the PHY side
563 * @phydev: target phy_device struct
564 */
89ff05ec 565static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 566{
553fe92b 567 int err = phy_clear_interrupt(phydev);
00db8189 568
e1393456
AF
569 if (err < 0)
570 return err;
00db8189 571
553fe92b 572 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 573}
00db8189 574
b3df0da8
RD
575/**
576 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
577 * @phydev: target phy_device struct
578 */
89ff05ec 579static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
580{
581 int err;
582
583 /* Disable PHY interrupts */
584 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
585 if (err)
586 goto phy_err;
587
588 /* Clear the interrupt */
589 err = phy_clear_interrupt(phydev);
00db8189
AF
590 if (err)
591 goto phy_err;
592
593 return 0;
594
595phy_err:
596 phy_error(phydev);
597
598 return err;
599}
e1393456 600
b3df0da8
RD
601/**
602 * phy_start_interrupts - request and enable interrupts for a PHY device
603 * @phydev: target phy_device struct
e1393456 604 *
b3df0da8
RD
605 * Description: Request the interrupt for the given PHY.
606 * If this fails, then we set irq to PHY_POLL.
e1393456 607 * Otherwise, we enable the interrupts in the PHY.
e1393456 608 * This should only be called with a valid IRQ number.
b3df0da8 609 * Returns 0 on success or < 0 on error.
e1393456
AF
610 */
611int phy_start_interrupts(struct phy_device *phydev)
612{
0ac49527 613 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
614 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
615 phydev) < 0) {
8d242488
JP
616 pr_warn("%s: Can't get IRQ %d (PHY)\n",
617 phydev->bus->name, phydev->irq);
e1393456
AF
618 phydev->irq = PHY_POLL;
619 return 0;
620 }
621
e62a768f 622 return phy_enable_interrupts(phydev);
e1393456
AF
623}
624EXPORT_SYMBOL(phy_start_interrupts);
625
b3df0da8
RD
626/**
627 * phy_stop_interrupts - disable interrupts from a PHY device
628 * @phydev: target phy_device struct
629 */
e1393456
AF
630int phy_stop_interrupts(struct phy_device *phydev)
631{
553fe92b 632 int err = phy_disable_interrupts(phydev);
e1393456
AF
633
634 if (err)
635 phy_error(phydev);
636
0ac49527
MR
637 free_irq(phydev->irq, phydev);
638
2f53e904 639 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
640 * of rtnl_lock(), but we do not really care about what would
641 * be done, except from enable_irq(), so cancel any work
642 * possibly pending and take care of the matter below.
3c3070d7 643 */
28e53bdd 644 cancel_work_sync(&phydev->phy_queue);
2f53e904 645 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
646 * been left unbalanced from phy_interrupt() and enable_irq()
647 * has to be called so that other devices on the line work.
648 */
649 while (atomic_dec_return(&phydev->irq_disable) >= 0)
650 enable_irq(phydev->irq);
e1393456
AF
651
652 return err;
653}
654EXPORT_SYMBOL(phy_stop_interrupts);
655
b3df0da8
RD
656/**
657 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
658 * @work: work_struct that describes the work to be done
659 */
5ea94e76 660void phy_change(struct work_struct *work)
e1393456 661{
c4028958
DH
662 struct phy_device *phydev =
663 container_of(work, struct phy_device, phy_queue);
e1393456 664
a8729eb3
AG
665 if (phydev->drv->did_interrupt &&
666 !phydev->drv->did_interrupt(phydev))
667 goto ignore;
668
e62a768f 669 if (phy_disable_interrupts(phydev))
e1393456
AF
670 goto phy_err;
671
35b5f6b1 672 mutex_lock(&phydev->lock);
e1393456
AF
673 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
674 phydev->state = PHY_CHANGELINK;
35b5f6b1 675 mutex_unlock(&phydev->lock);
e1393456 676
0ac49527 677 atomic_dec(&phydev->irq_disable);
e1393456
AF
678 enable_irq(phydev->irq);
679
680 /* Reenable interrupts */
e62a768f
SS
681 if (PHY_HALTED != phydev->state &&
682 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
683 goto irq_enable_err;
684
a390d1f3
MS
685 /* reschedule state queue work to run as soon as possible */
686 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 687 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
688 return;
689
a8729eb3
AG
690ignore:
691 atomic_dec(&phydev->irq_disable);
692 enable_irq(phydev->irq);
693 return;
694
e1393456
AF
695irq_enable_err:
696 disable_irq(phydev->irq);
0ac49527 697 atomic_inc(&phydev->irq_disable);
e1393456
AF
698phy_err:
699 phy_error(phydev);
700}
701
b3df0da8
RD
702/**
703 * phy_stop - Bring down the PHY link, and stop checking the status
704 * @phydev: target phy_device struct
705 */
e1393456
AF
706void phy_stop(struct phy_device *phydev)
707{
35b5f6b1 708 mutex_lock(&phydev->lock);
e1393456
AF
709
710 if (PHY_HALTED == phydev->state)
711 goto out_unlock;
712
2c7b4921 713 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
714 /* Disable PHY Interrupts */
715 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 716
3c3070d7
MR
717 /* Clear any pending interrupts */
718 phy_clear_interrupt(phydev);
719 }
e1393456 720
6daf6531
MR
721 phydev->state = PHY_HALTED;
722
e1393456 723out_unlock:
35b5f6b1 724 mutex_unlock(&phydev->lock);
3c3070d7 725
2f53e904 726 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
727 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
728 * will not reenable interrupts.
729 */
e1393456 730}
2f53e904 731EXPORT_SYMBOL(phy_stop);
e1393456 732
b3df0da8
RD
733/**
734 * phy_start - start or restart a PHY device
735 * @phydev: target phy_device struct
e1393456 736 *
b3df0da8 737 * Description: Indicates the attached device's readiness to
e1393456
AF
738 * handle PHY-related work. Used during startup to start the
739 * PHY, and after a call to phy_stop() to resume operation.
740 * Also used to indicate the MDIO bus has cleared an error
741 * condition.
742 */
743void phy_start(struct phy_device *phydev)
744{
35b5f6b1 745 mutex_lock(&phydev->lock);
e1393456
AF
746
747 switch (phydev->state) {
e109374f
FF
748 case PHY_STARTING:
749 phydev->state = PHY_PENDING;
750 break;
751 case PHY_READY:
752 phydev->state = PHY_UP;
753 break;
754 case PHY_HALTED:
755 phydev->state = PHY_RESUMING;
756 default:
757 break;
e1393456 758 }
35b5f6b1 759 mutex_unlock(&phydev->lock);
e1393456 760}
e1393456 761EXPORT_SYMBOL(phy_start);
67c4f3fa 762
35b5f6b1
NC
763/**
764 * phy_state_machine - Handle the state machine
765 * @work: work_struct that describes the work to be done
35b5f6b1 766 */
4f9c85a1 767void phy_state_machine(struct work_struct *work)
00db8189 768{
bf6aede7 769 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 770 struct phy_device *phydev =
a390d1f3 771 container_of(dwork, struct phy_device, state_queue);
6e14a5ee 772 bool needs_aneg = false, do_suspend = false, do_resume = false;
00db8189
AF
773 int err = 0;
774
35b5f6b1 775 mutex_lock(&phydev->lock);
00db8189 776
2b8f2a28
DM
777 if (phydev->drv->link_change_notify)
778 phydev->drv->link_change_notify(phydev);
779
e109374f
FF
780 switch (phydev->state) {
781 case PHY_DOWN:
782 case PHY_STARTING:
783 case PHY_READY:
784 case PHY_PENDING:
785 break;
786 case PHY_UP:
6e14a5ee 787 needs_aneg = true;
00db8189 788
e109374f
FF
789 phydev->link_timeout = PHY_AN_TIMEOUT;
790
791 break;
792 case PHY_AN:
793 err = phy_read_status(phydev);
e109374f 794 if (err < 0)
00db8189 795 break;
6b655529 796
2f53e904 797 /* If the link is down, give up on negotiation for now */
e109374f
FF
798 if (!phydev->link) {
799 phydev->state = PHY_NOLINK;
800 netif_carrier_off(phydev->attached_dev);
801 phydev->adjust_link(phydev->attached_dev);
802 break;
803 }
6b655529 804
2f53e904 805 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
806 err = phy_aneg_done(phydev);
807 if (err < 0)
808 break;
6b655529 809
e109374f
FF
810 /* If AN is done, we're running */
811 if (err > 0) {
812 phydev->state = PHY_RUNNING;
813 netif_carrier_on(phydev->attached_dev);
814 phydev->adjust_link(phydev->attached_dev);
00db8189 815
fa8cddaf 816 } else if (0 == phydev->link_timeout--)
6e14a5ee 817 needs_aneg = true;
e109374f
FF
818 break;
819 case PHY_NOLINK:
820 err = phy_read_status(phydev);
e109374f 821 if (err)
00db8189 822 break;
00db8189 823
e109374f 824 if (phydev->link) {
e46e08b8
BK
825 if (AUTONEG_ENABLE == phydev->autoneg) {
826 err = phy_aneg_done(phydev);
827 if (err < 0)
828 break;
829
830 if (!err) {
831 phydev->state = PHY_AN;
832 phydev->link_timeout = PHY_AN_TIMEOUT;
833 break;
834 }
835 }
e109374f
FF
836 phydev->state = PHY_RUNNING;
837 netif_carrier_on(phydev->attached_dev);
838 phydev->adjust_link(phydev->attached_dev);
839 }
840 break;
841 case PHY_FORCING:
842 err = genphy_update_link(phydev);
e109374f 843 if (err)
00db8189 844 break;
00db8189 845
e109374f
FF
846 if (phydev->link) {
847 phydev->state = PHY_RUNNING;
848 netif_carrier_on(phydev->attached_dev);
849 } else {
850 if (0 == phydev->link_timeout--)
6e14a5ee 851 needs_aneg = true;
e109374f 852 }
00db8189 853
e109374f
FF
854 phydev->adjust_link(phydev->attached_dev);
855 break;
856 case PHY_RUNNING:
857 /* Only register a CHANGE if we are
858 * polling or ignoring interrupts
859 */
860 if (!phy_interrupt_is_valid(phydev))
861 phydev->state = PHY_CHANGELINK;
862 break;
863 case PHY_CHANGELINK:
864 err = phy_read_status(phydev);
e109374f 865 if (err)
00db8189 866 break;
00db8189 867
e109374f
FF
868 if (phydev->link) {
869 phydev->state = PHY_RUNNING;
870 netif_carrier_on(phydev->attached_dev);
871 } else {
872 phydev->state = PHY_NOLINK;
873 netif_carrier_off(phydev->attached_dev);
874 }
00db8189 875
e109374f 876 phydev->adjust_link(phydev->attached_dev);
00db8189 877
e109374f
FF
878 if (phy_interrupt_is_valid(phydev))
879 err = phy_config_interrupt(phydev,
2f53e904 880 PHY_INTERRUPT_ENABLED);
e109374f
FF
881 break;
882 case PHY_HALTED:
883 if (phydev->link) {
884 phydev->link = 0;
885 netif_carrier_off(phydev->attached_dev);
00db8189 886 phydev->adjust_link(phydev->attached_dev);
6e14a5ee 887 do_suspend = true;
e109374f
FF
888 }
889 break;
890 case PHY_RESUMING:
e109374f 891 err = phy_clear_interrupt(phydev);
e109374f
FF
892 if (err)
893 break;
00db8189 894
2f53e904 895 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e109374f
FF
896 if (err)
897 break;
00db8189 898
e109374f
FF
899 if (AUTONEG_ENABLE == phydev->autoneg) {
900 err = phy_aneg_done(phydev);
901 if (err < 0)
00db8189
AF
902 break;
903
e109374f 904 /* err > 0 if AN is done.
2f53e904
SS
905 * Otherwise, it's 0, and we're still waiting for AN
906 */
e109374f 907 if (err > 0) {
42caa074
WF
908 err = phy_read_status(phydev);
909 if (err)
910 break;
911
912 if (phydev->link) {
913 phydev->state = PHY_RUNNING;
914 netif_carrier_on(phydev->attached_dev);
2f53e904 915 } else {
42caa074 916 phydev->state = PHY_NOLINK;
2f53e904 917 }
42caa074 918 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
919 } else {
920 phydev->state = PHY_AN;
921 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 922 }
e109374f
FF
923 } else {
924 err = phy_read_status(phydev);
925 if (err)
926 break;
927
928 if (phydev->link) {
929 phydev->state = PHY_RUNNING;
930 netif_carrier_on(phydev->attached_dev);
2f53e904 931 } else {
e109374f 932 phydev->state = PHY_NOLINK;
2f53e904 933 }
e109374f
FF
934 phydev->adjust_link(phydev->attached_dev);
935 }
6e14a5ee 936 do_resume = true;
e109374f 937 break;
00db8189
AF
938 }
939
35b5f6b1 940 mutex_unlock(&phydev->lock);
00db8189
AF
941
942 if (needs_aneg)
943 err = phy_start_aneg(phydev);
6e14a5ee 944 else if (do_suspend)
be9dad1f 945 phy_suspend(phydev);
6e14a5ee
ZG
946 else if (do_resume)
947 phy_resume(phydev);
be9dad1f 948
00db8189
AF
949 if (err < 0)
950 phy_error(phydev);
951
bbb47bde 952 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 953 PHY_STATE_TIME * HZ);
35b5f6b1 954}
a59a4d19 955
5ea94e76
FF
956void phy_mac_interrupt(struct phy_device *phydev, int new_link)
957{
958 cancel_work_sync(&phydev->phy_queue);
959 phydev->link = new_link;
960 schedule_work(&phydev->phy_queue);
961}
962EXPORT_SYMBOL(phy_mac_interrupt);
963
a59a4d19
GC
964static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
965 int addr)
966{
967 /* Write the desired MMD Devad */
968 bus->write(bus, addr, MII_MMD_CTRL, devad);
969
970 /* Write the desired MMD register address */
971 bus->write(bus, addr, MII_MMD_DATA, prtad);
972
973 /* Select the Function : DATA with no post increment */
974 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
975}
976
977/**
978 * phy_read_mmd_indirect - reads data from the MMD registers
0c1d77df 979 * @phydev: The PHY device bus
a59a4d19
GC
980 * @prtad: MMD Address
981 * @devad: MMD DEVAD
982 * @addr: PHY address on the MII bus
983 *
984 * Description: it reads data from the MMD registers (clause 22 to access to
985 * clause 45) of the specified phy address.
986 * To read these register we have:
987 * 1) Write reg 13 // DEVAD
988 * 2) Write reg 14 // MMD Address
989 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
990 * 3) Read reg 14 // Read MMD data
991 */
66ce7fb9 992int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,
0c1d77df 993 int devad, int addr)
a59a4d19 994{
0c1d77df
VB
995 struct phy_driver *phydrv = phydev->drv;
996 int value = -1;
a59a4d19 997
0c1d77df
VB
998 if (phydrv->read_mmd_indirect == NULL) {
999 mmd_phy_indirect(phydev->bus, prtad, devad, addr);
1000
1001 /* Read the content of the MMD's selected register */
1002 value = phydev->bus->read(phydev->bus, addr, MII_MMD_DATA);
1003 } else {
1004 value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr);
1005 }
1006 return value;
a59a4d19 1007}
66ce7fb9 1008EXPORT_SYMBOL(phy_read_mmd_indirect);
a59a4d19
GC
1009
1010/**
1011 * phy_write_mmd_indirect - writes data to the MMD registers
0c1d77df 1012 * @phydev: The PHY device
a59a4d19
GC
1013 * @prtad: MMD Address
1014 * @devad: MMD DEVAD
1015 * @addr: PHY address on the MII bus
1016 * @data: data to write in the MMD register
1017 *
1018 * Description: Write data from the MMD registers of the specified
1019 * phy address.
1020 * To write these register we have:
1021 * 1) Write reg 13 // DEVAD
1022 * 2) Write reg 14 // MMD Address
1023 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1024 * 3) Write reg 14 // Write MMD data
1025 */
66ce7fb9 1026void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
0c1d77df 1027 int devad, int addr, u32 data)
a59a4d19 1028{
0c1d77df 1029 struct phy_driver *phydrv = phydev->drv;
a59a4d19 1030
0c1d77df
VB
1031 if (phydrv->write_mmd_indirect == NULL) {
1032 mmd_phy_indirect(phydev->bus, prtad, devad, addr);
1033
1034 /* Write the data into MMD's selected register */
1035 phydev->bus->write(phydev->bus, addr, MII_MMD_DATA, data);
1036 } else {
1037 phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data);
1038 }
a59a4d19 1039}
66ce7fb9 1040EXPORT_SYMBOL(phy_write_mmd_indirect);
a59a4d19 1041
a59a4d19
GC
1042/**
1043 * phy_init_eee - init and check the EEE feature
1044 * @phydev: target phy_device struct
1045 * @clk_stop_enable: PHY may stop the clock during LPI
1046 *
1047 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1048 * is supported by looking at the MMD registers 3.20 and 7.60/61
1049 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1050 * bit if required.
1051 */
1052int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1053{
a59a4d19
GC
1054 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1055 * Also EEE feature is active when core is operating with MII, GMII
a9f63095
FF
1056 * or RGMII. Internal PHYs are also allowed to proceed and should
1057 * return an error if they do not support EEE.
a59a4d19
GC
1058 */
1059 if ((phydev->duplex == DUPLEX_FULL) &&
1060 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1061 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
a9f63095
FF
1062 (phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
1063 phy_is_internal(phydev))) {
a59a4d19
GC
1064 int eee_lp, eee_cap, eee_adv;
1065 u32 lp, cap, adv;
4ae6e50c 1066 int status;
a59a4d19
GC
1067
1068 /* Read phy status to properly get the right settings */
1069 status = phy_read_status(phydev);
1070 if (status)
1071 return status;
1072
1073 /* First check if the EEE ability is supported */
0c1d77df 1074 eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
a59a4d19 1075 MDIO_MMD_PCS, phydev->addr);
7a4cecf7
GC
1076 if (eee_cap <= 0)
1077 goto eee_exit_err;
a59a4d19 1078
b32607dd 1079 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 1080 if (!cap)
7a4cecf7 1081 goto eee_exit_err;
a59a4d19
GC
1082
1083 /* Check which link settings negotiated and verify it in
1084 * the EEE advertising registers.
1085 */
0c1d77df 1086 eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
a59a4d19 1087 MDIO_MMD_AN, phydev->addr);
7a4cecf7
GC
1088 if (eee_lp <= 0)
1089 goto eee_exit_err;
a59a4d19 1090
0c1d77df 1091 eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
a59a4d19 1092 MDIO_MMD_AN, phydev->addr);
7a4cecf7
GC
1093 if (eee_adv <= 0)
1094 goto eee_exit_err;
a59a4d19 1095
b32607dd
AB
1096 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1097 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
54da5a8b 1098 if (!phy_check_valid(phydev->speed, phydev->duplex, lp & adv))
7a4cecf7 1099 goto eee_exit_err;
a59a4d19
GC
1100
1101 if (clk_stop_enable) {
1102 /* Configure the PHY to stop receiving xMII
1103 * clock while it is signaling LPI.
1104 */
0c1d77df 1105 int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
a59a4d19
GC
1106 MDIO_MMD_PCS,
1107 phydev->addr);
1108 if (val < 0)
1109 return val;
1110
1111 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
0c1d77df
VB
1112 phy_write_mmd_indirect(phydev, MDIO_CTRL1,
1113 MDIO_MMD_PCS, phydev->addr,
1114 val);
a59a4d19
GC
1115 }
1116
e62a768f 1117 return 0; /* EEE supported */
a59a4d19 1118 }
7a4cecf7 1119eee_exit_err:
e62a768f 1120 return -EPROTONOSUPPORT;
a59a4d19
GC
1121}
1122EXPORT_SYMBOL(phy_init_eee);
1123
1124/**
1125 * phy_get_eee_err - report the EEE wake error count
1126 * @phydev: target phy_device struct
1127 *
1128 * Description: it is to report the number of time where the PHY
1129 * failed to complete its normal wake sequence.
1130 */
1131int phy_get_eee_err(struct phy_device *phydev)
1132{
0c1d77df 1133 return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR,
a59a4d19 1134 MDIO_MMD_PCS, phydev->addr);
a59a4d19
GC
1135}
1136EXPORT_SYMBOL(phy_get_eee_err);
1137
1138/**
1139 * phy_ethtool_get_eee - get EEE supported and status
1140 * @phydev: target phy_device struct
1141 * @data: ethtool_eee data
1142 *
1143 * Description: it reportes the Supported/Advertisement/LP Advertisement
1144 * capabilities.
1145 */
1146int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1147{
1148 int val;
1149
1150 /* Get Supported EEE */
0c1d77df 1151 val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
a59a4d19
GC
1152 MDIO_MMD_PCS, phydev->addr);
1153 if (val < 0)
1154 return val;
b32607dd 1155 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1156
1157 /* Get advertisement EEE */
0c1d77df 1158 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
a59a4d19
GC
1159 MDIO_MMD_AN, phydev->addr);
1160 if (val < 0)
1161 return val;
b32607dd 1162 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1163
1164 /* Get LP advertisement EEE */
0c1d77df 1165 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
a59a4d19
GC
1166 MDIO_MMD_AN, phydev->addr);
1167 if (val < 0)
1168 return val;
b32607dd 1169 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1170
1171 return 0;
1172}
1173EXPORT_SYMBOL(phy_ethtool_get_eee);
1174
1175/**
1176 * phy_ethtool_set_eee - set EEE supported and status
1177 * @phydev: target phy_device struct
1178 * @data: ethtool_eee data
1179 *
1180 * Description: it is to program the Advertisement EEE register.
1181 */
1182int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1183{
553fe92b 1184 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1185
0c1d77df 1186 phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
a59a4d19
GC
1187 phydev->addr, val);
1188
1189 return 0;
1190}
1191EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1192
1193int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1194{
1195 if (phydev->drv->set_wol)
1196 return phydev->drv->set_wol(phydev, wol);
1197
1198 return -EOPNOTSUPP;
1199}
1200EXPORT_SYMBOL(phy_ethtool_set_wol);
1201
1202void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1203{
1204 if (phydev->drv->get_wol)
1205 phydev->drv->get_wol(phydev, wol);
1206}
1207EXPORT_SYMBOL(phy_ethtool_get_wol);
This page took 1.052777 seconds and 5 git commands to generate.