tcp: TLP loss detection.
[deliverable/linux.git] / drivers / net / phy / phy.c
CommitLineData
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1/*
2 * drivers/net/phy/phy.c
3 *
4 * Framework for configuring and reading PHY devices
5 * Based on code in sungem_phy.c and gianfar_phy.c
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 10 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
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18
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
00db8189 21#include <linux/kernel.h>
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22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/unistd.h>
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25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/skbuff.h>
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31#include <linux/mm.h>
32#include <linux/module.h>
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33#include <linux/mii.h>
34#include <linux/ethtool.h>
35#include <linux/phy.h>
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36#include <linux/timer.h>
37#include <linux/workqueue.h>
a59a4d19 38#include <linux/mdio.h>
00db8189 39
60063497 40#include <linux/atomic.h>
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41#include <asm/io.h>
42#include <asm/irq.h>
43#include <asm/uaccess.h>
44
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45/**
46 * phy_print_status - Convenience function to print out the current phy status
47 * @phydev: the phy_device struct
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48 */
49void phy_print_status(struct phy_device *phydev)
50{
e1393456 51 if (phydev->link)
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JP
52 pr_info("%s - Link is Up - %d/%s\n",
53 dev_name(&phydev->dev),
54 phydev->speed,
55 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
56 else
57 pr_info("%s - Link is Down\n", dev_name(&phydev->dev));
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AF
58}
59EXPORT_SYMBOL(phy_print_status);
00db8189 60
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61/**
62 * phy_clear_interrupt - Ack the phy device's interrupt
63 * @phydev: the phy_device struct
64 *
65 * If the @phydev driver has an ack_interrupt function, call it to
66 * ack and clear the phy device's interrupt.
67 *
68 * Returns 0 on success on < 0 on error.
69 */
89ff05ec 70static int phy_clear_interrupt(struct phy_device *phydev)
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71{
72 int err = 0;
73
74 if (phydev->drv->ack_interrupt)
75 err = phydev->drv->ack_interrupt(phydev);
76
77 return err;
78}
79
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80/**
81 * phy_config_interrupt - configure the PHY device for the requested interrupts
82 * @phydev: the phy_device struct
83 * @interrupts: interrupt flags to configure for this @phydev
84 *
85 * Returns 0 on success on < 0 on error.
86 */
89ff05ec 87static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
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AF
88{
89 int err = 0;
90
91 phydev->interrupts = interrupts;
92 if (phydev->drv->config_intr)
93 err = phydev->drv->config_intr(phydev);
94
95 return err;
96}
97
98
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99/**
100 * phy_aneg_done - return auto-negotiation status
101 * @phydev: target phy_device struct
00db8189 102 *
b3df0da8 103 * Description: Reads the status register and returns 0 either if
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104 * auto-negotiation is incomplete, or if there was an error.
105 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
106 */
107static inline int phy_aneg_done(struct phy_device *phydev)
108{
109 int retval;
110
111 retval = phy_read(phydev, MII_BMSR);
112
113 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
114}
115
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116/* A structure for mapping a particular speed and duplex
117 * combination to a particular SUPPORTED and ADVERTISED value */
118struct phy_setting {
119 int speed;
120 int duplex;
121 u32 setting;
122};
123
124/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 125static const struct phy_setting settings[] = {
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126 {
127 .speed = 10000,
128 .duplex = DUPLEX_FULL,
129 .setting = SUPPORTED_10000baseT_Full,
130 },
131 {
132 .speed = SPEED_1000,
133 .duplex = DUPLEX_FULL,
134 .setting = SUPPORTED_1000baseT_Full,
135 },
136 {
137 .speed = SPEED_1000,
138 .duplex = DUPLEX_HALF,
139 .setting = SUPPORTED_1000baseT_Half,
140 },
141 {
142 .speed = SPEED_100,
143 .duplex = DUPLEX_FULL,
144 .setting = SUPPORTED_100baseT_Full,
145 },
146 {
147 .speed = SPEED_100,
148 .duplex = DUPLEX_HALF,
149 .setting = SUPPORTED_100baseT_Half,
150 },
151 {
152 .speed = SPEED_10,
153 .duplex = DUPLEX_FULL,
154 .setting = SUPPORTED_10baseT_Full,
155 },
156 {
157 .speed = SPEED_10,
158 .duplex = DUPLEX_HALF,
159 .setting = SUPPORTED_10baseT_Half,
160 },
161};
162
ff8ac609 163#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 164
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165/**
166 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
167 * @speed: speed to match
168 * @duplex: duplex to match
00db8189 169 *
b3df0da8 170 * Description: Searches the settings array for the setting which
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171 * matches the desired speed and duplex, and returns the index
172 * of that setting. Returns the index of the last setting if
173 * none of the others match.
174 */
175static inline int phy_find_setting(int speed, int duplex)
176{
177 int idx = 0;
178
179 while (idx < ARRAY_SIZE(settings) &&
180 (settings[idx].speed != speed ||
181 settings[idx].duplex != duplex))
182 idx++;
183
184 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
185}
186
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187/**
188 * phy_find_valid - find a PHY setting that matches the requested features mask
189 * @idx: The first index in settings[] to search
190 * @features: A mask of the valid settings
00db8189 191 *
b3df0da8 192 * Description: Returns the index of the first valid setting less
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AF
193 * than or equal to the one pointed to by idx, as determined by
194 * the mask in features. Returns the index of the last setting
195 * if nothing else matches.
196 */
197static inline int phy_find_valid(int idx, u32 features)
198{
199 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
200 idx++;
201
202 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
203}
204
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205/**
206 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
207 * @phydev: the target phy_device struct
00db8189 208 *
b3df0da8 209 * Description: Make sure the PHY is set to supported speeds and
00db8189 210 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 211 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 212 */
89ff05ec 213static void phy_sanitize_settings(struct phy_device *phydev)
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214{
215 u32 features = phydev->supported;
216 int idx;
217
218 /* Sanitize settings based on PHY capabilities */
219 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 220 phydev->autoneg = AUTONEG_DISABLE;
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221
222 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
223 features);
224
225 phydev->speed = settings[idx].speed;
226 phydev->duplex = settings[idx].duplex;
227}
00db8189 228
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229/**
230 * phy_ethtool_sset - generic ethtool sset function, handles all the details
231 * @phydev: target phy_device struct
232 * @cmd: ethtool_cmd
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233 *
234 * A few notes about parameter checking:
235 * - We don't set port or transceiver, so we don't care what they
236 * were set to.
237 * - phy_start_aneg() will make sure forced settings are sane, and
238 * choose the next best ones from the ones selected, so we don't
b3df0da8 239 * care if ethtool tries to give us bad values.
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240 */
241int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
242{
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DD
243 u32 speed = ethtool_cmd_speed(cmd);
244
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245 if (cmd->phy_address != phydev->addr)
246 return -EINVAL;
247
248 /* We make sure that we don't pass unsupported
249 * values in to the PHY */
250 cmd->advertising &= phydev->supported;
251
252 /* Verify the settings we care about. */
253 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
254 return -EINVAL;
255
256 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
257 return -EINVAL;
258
8e95a202 259 if (cmd->autoneg == AUTONEG_DISABLE &&
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DD
260 ((speed != SPEED_1000 &&
261 speed != SPEED_100 &&
262 speed != SPEED_10) ||
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263 (cmd->duplex != DUPLEX_HALF &&
264 cmd->duplex != DUPLEX_FULL)))
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265 return -EINVAL;
266
267 phydev->autoneg = cmd->autoneg;
268
25db0338 269 phydev->speed = speed;
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270
271 phydev->advertising = cmd->advertising;
272
273 if (AUTONEG_ENABLE == cmd->autoneg)
274 phydev->advertising |= ADVERTISED_Autoneg;
275 else
276 phydev->advertising &= ~ADVERTISED_Autoneg;
277
278 phydev->duplex = cmd->duplex;
279
280 /* Restart the PHY */
281 phy_start_aneg(phydev);
282
283 return 0;
284}
9f6d55d0 285EXPORT_SYMBOL(phy_ethtool_sset);
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286
287int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
288{
289 cmd->supported = phydev->supported;
290
291 cmd->advertising = phydev->advertising;
292
70739497 293 ethtool_cmd_speed_set(cmd, phydev->speed);
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294 cmd->duplex = phydev->duplex;
295 cmd->port = PORT_MII;
296 cmd->phy_address = phydev->addr;
297 cmd->transceiver = XCVR_EXTERNAL;
298 cmd->autoneg = phydev->autoneg;
299
300 return 0;
301}
9f6d55d0 302EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 303
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304/**
305 * phy_mii_ioctl - generic PHY MII ioctl interface
306 * @phydev: the phy_device struct
00c7d920 307 * @ifr: &struct ifreq for socket ioctl's
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308 * @cmd: ioctl cmd to execute
309 *
310 * Note that this function is currently incompatible with the
00db8189 311 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 312 * current state. Use at own risk.
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313 */
314int phy_mii_ioctl(struct phy_device *phydev,
28b04113 315 struct ifreq *ifr, int cmd)
00db8189 316{
28b04113 317 struct mii_ioctl_data *mii_data = if_mii(ifr);
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318 u16 val = mii_data->val_in;
319
320 switch (cmd) {
321 case SIOCGMIIPHY:
322 mii_data->phy_id = phydev->addr;
c6d6a511
LB
323 /* fall through */
324
00db8189 325 case SIOCGMIIREG:
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326 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
327 mii_data->reg_num);
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328 break;
329
330 case SIOCSMIIREG:
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331 if (mii_data->phy_id == phydev->addr) {
332 switch(mii_data->reg_num) {
333 case MII_BMCR:
163642a2 334 if ((val & (BMCR_RESET|BMCR_ANENABLE)) == 0)
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335 phydev->autoneg = AUTONEG_DISABLE;
336 else
337 phydev->autoneg = AUTONEG_ENABLE;
338 if ((!phydev->autoneg) && (val & BMCR_FULLDPLX))
339 phydev->duplex = DUPLEX_FULL;
340 else
341 phydev->duplex = DUPLEX_HALF;
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SL
342 if ((!phydev->autoneg) &&
343 (val & BMCR_SPEED1000))
344 phydev->speed = SPEED_1000;
345 else if ((!phydev->autoneg) &&
346 (val & BMCR_SPEED100))
347 phydev->speed = SPEED_100;
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348 break;
349 case MII_ADVERTISE:
350 phydev->advertising = val;
351 break;
352 default:
353 /* do nothing */
354 break;
355 }
356 }
357
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PK
358 mdiobus_write(phydev->bus, mii_data->phy_id,
359 mii_data->reg_num, val);
360
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JP
361 if (mii_data->reg_num == MII_BMCR &&
362 val & BMCR_RESET &&
363 phydev->drv->config_init) {
f62220d3 364 phy_scan_fixups(phydev);
00db8189 365 phydev->drv->config_init(phydev);
f62220d3 366 }
00db8189 367 break;
dda93b48 368
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RC
369 case SIOCSHWTSTAMP:
370 if (phydev->drv->hwtstamp)
371 return phydev->drv->hwtstamp(phydev, ifr);
372 /* fall through */
373
dda93b48 374 default:
c6d6a511 375 return -EOPNOTSUPP;
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376 }
377
378 return 0;
379}
680e9fe9 380EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 381
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382/**
383 * phy_start_aneg - start auto-negotiation for this PHY device
384 * @phydev: the phy_device struct
e1393456 385 *
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386 * Description: Sanitizes the settings (if we're not autonegotiating
387 * them), and then calls the driver's config_aneg function.
388 * If the PHYCONTROL Layer is operating, we change the state to
389 * reflect the beginning of Auto-negotiation or forcing.
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390 */
391int phy_start_aneg(struct phy_device *phydev)
392{
393 int err;
394
35b5f6b1 395 mutex_lock(&phydev->lock);
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396
397 if (AUTONEG_DISABLE == phydev->autoneg)
398 phy_sanitize_settings(phydev);
399
400 err = phydev->drv->config_aneg(phydev);
401
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AF
402 if (err < 0)
403 goto out_unlock;
404
405 if (phydev->state != PHY_HALTED) {
406 if (AUTONEG_ENABLE == phydev->autoneg) {
407 phydev->state = PHY_AN;
408 phydev->link_timeout = PHY_AN_TIMEOUT;
409 } else {
410 phydev->state = PHY_FORCING;
411 phydev->link_timeout = PHY_FORCE_TIMEOUT;
412 }
413 }
414
415out_unlock:
35b5f6b1 416 mutex_unlock(&phydev->lock);
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AF
417 return err;
418}
419EXPORT_SYMBOL(phy_start_aneg);
420
421
c4028958 422static void phy_change(struct work_struct *work);
e1393456 423
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424/**
425 * phy_start_machine - start PHY state machine tracking
426 * @phydev: the phy_device struct
427 * @handler: callback function for state change notifications
00db8189 428 *
b3df0da8 429 * Description: The PHY infrastructure can run a state machine
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AF
430 * which tracks whether the PHY is starting up, negotiating,
431 * etc. This function starts the timer which tracks the state
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432 * of the PHY. If you want to be notified when the state changes,
433 * pass in the callback @handler, otherwise, pass NULL. If you
00db8189 434 * want to maintain your own state machine, do not call this
b3df0da8
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435 * function.
436 */
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437void phy_start_machine(struct phy_device *phydev,
438 void (*handler)(struct net_device *))
439{
440 phydev->adjust_state = handler;
441
3664090e 442 schedule_delayed_work(&phydev->state_queue, HZ);
00db8189
AF
443}
444
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445/**
446 * phy_stop_machine - stop the PHY state machine tracking
447 * @phydev: target phy_device struct
00db8189 448 *
b3df0da8 449 * Description: Stops the state machine timer, sets the state to UP
817acf5e 450 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
451 * phy_detach.
452 */
453void phy_stop_machine(struct phy_device *phydev)
454{
a390d1f3 455 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 456
35b5f6b1 457 mutex_lock(&phydev->lock);
00db8189
AF
458 if (phydev->state > PHY_UP)
459 phydev->state = PHY_UP;
35b5f6b1 460 mutex_unlock(&phydev->lock);
00db8189 461
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AF
462 phydev->adjust_state = NULL;
463}
464
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465/**
466 * phy_force_reduction - reduce PHY speed/duplex settings by one step
467 * @phydev: target phy_device struct
e1393456 468 *
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469 * Description: Reduces the speed/duplex settings by one notch,
470 * in this order--
471 * 1000/FULL, 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
472 * The function bottoms out at 10/HALF.
e1393456
AF
473 */
474static void phy_force_reduction(struct phy_device *phydev)
475{
476 int idx;
477
478 idx = phy_find_setting(phydev->speed, phydev->duplex);
479
480 idx++;
481
482 idx = phy_find_valid(idx, phydev->supported);
483
484 phydev->speed = settings[idx].speed;
485 phydev->duplex = settings[idx].duplex;
486
8d242488
JP
487 pr_info("Trying %d/%s\n",
488 phydev->speed, DUPLEX_FULL == phydev->duplex ? "FULL" : "HALF");
e1393456
AF
489}
490
491
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492/**
493 * phy_error - enter HALTED state for this PHY device
494 * @phydev: target phy_device struct
00db8189
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495 *
496 * Moves the PHY to the HALTED state in response to a read
497 * or write error, and tells the controller the link is down.
498 * Must not be called from interrupt context, or while the
499 * phydev->lock is held.
500 */
9b9a8bfc 501static void phy_error(struct phy_device *phydev)
00db8189 502{
35b5f6b1 503 mutex_lock(&phydev->lock);
00db8189 504 phydev->state = PHY_HALTED;
35b5f6b1 505 mutex_unlock(&phydev->lock);
00db8189
AF
506}
507
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508/**
509 * phy_interrupt - PHY interrupt handler
510 * @irq: interrupt line
511 * @phy_dat: phy_device pointer
e1393456 512 *
b3df0da8 513 * Description: When a PHY interrupt occurs, the handler disables
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AF
514 * interrupts, and schedules a work task to clear the interrupt.
515 */
7d12e780 516static irqreturn_t phy_interrupt(int irq, void *phy_dat)
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AF
517{
518 struct phy_device *phydev = phy_dat;
519
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MR
520 if (PHY_HALTED == phydev->state)
521 return IRQ_NONE; /* It can't be ours. */
522
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AF
523 /* The MDIO bus is not allowed to be written in interrupt
524 * context, so we need to disable the irq here. A work
525 * queue will write the PHY to disable and clear the
526 * interrupt, and then reenable the irq line. */
527 disable_irq_nosync(irq);
0ac49527 528 atomic_inc(&phydev->irq_disable);
e1393456
AF
529
530 schedule_work(&phydev->phy_queue);
531
532 return IRQ_HANDLED;
533}
534
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535/**
536 * phy_enable_interrupts - Enable the interrupts from the PHY side
537 * @phydev: target phy_device struct
538 */
89ff05ec 539static int phy_enable_interrupts(struct phy_device *phydev)
00db8189
AF
540{
541 int err;
542
e1393456 543 err = phy_clear_interrupt(phydev);
00db8189 544
e1393456
AF
545 if (err < 0)
546 return err;
00db8189 547
e1393456 548 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189
AF
549
550 return err;
551}
00db8189 552
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553/**
554 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
555 * @phydev: target phy_device struct
556 */
89ff05ec 557static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
558{
559 int err;
560
561 /* Disable PHY interrupts */
562 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
563
564 if (err)
565 goto phy_err;
566
567 /* Clear the interrupt */
568 err = phy_clear_interrupt(phydev);
569
570 if (err)
571 goto phy_err;
572
573 return 0;
574
575phy_err:
576 phy_error(phydev);
577
578 return err;
579}
e1393456 580
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581/**
582 * phy_start_interrupts - request and enable interrupts for a PHY device
583 * @phydev: target phy_device struct
e1393456 584 *
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585 * Description: Request the interrupt for the given PHY.
586 * If this fails, then we set irq to PHY_POLL.
e1393456 587 * Otherwise, we enable the interrupts in the PHY.
e1393456 588 * This should only be called with a valid IRQ number.
b3df0da8 589 * Returns 0 on success or < 0 on error.
e1393456
AF
590 */
591int phy_start_interrupts(struct phy_device *phydev)
592{
593 int err = 0;
594
c4028958 595 INIT_WORK(&phydev->phy_queue, phy_change);
e1393456 596
0ac49527 597 atomic_set(&phydev->irq_disable, 0);
e1393456 598 if (request_irq(phydev->irq, phy_interrupt,
1fb9df5d 599 IRQF_SHARED,
e1393456
AF
600 "phy_interrupt",
601 phydev) < 0) {
8d242488
JP
602 pr_warn("%s: Can't get IRQ %d (PHY)\n",
603 phydev->bus->name, phydev->irq);
e1393456
AF
604 phydev->irq = PHY_POLL;
605 return 0;
606 }
607
608 err = phy_enable_interrupts(phydev);
609
610 return err;
611}
612EXPORT_SYMBOL(phy_start_interrupts);
613
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614/**
615 * phy_stop_interrupts - disable interrupts from a PHY device
616 * @phydev: target phy_device struct
617 */
e1393456
AF
618int phy_stop_interrupts(struct phy_device *phydev)
619{
620 int err;
621
622 err = phy_disable_interrupts(phydev);
623
624 if (err)
625 phy_error(phydev);
626
0ac49527
MR
627 free_irq(phydev->irq, phydev);
628
3c3070d7 629 /*
0ac49527
MR
630 * Cannot call flush_scheduled_work() here as desired because
631 * of rtnl_lock(), but we do not really care about what would
632 * be done, except from enable_irq(), so cancel any work
633 * possibly pending and take care of the matter below.
3c3070d7 634 */
28e53bdd 635 cancel_work_sync(&phydev->phy_queue);
0ac49527
MR
636 /*
637 * If work indeed has been cancelled, disable_irq() will have
638 * been left unbalanced from phy_interrupt() and enable_irq()
639 * has to be called so that other devices on the line work.
640 */
641 while (atomic_dec_return(&phydev->irq_disable) >= 0)
642 enable_irq(phydev->irq);
e1393456
AF
643
644 return err;
645}
646EXPORT_SYMBOL(phy_stop_interrupts);
647
648
b3df0da8
RD
649/**
650 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
651 * @work: work_struct that describes the work to be done
652 */
c4028958 653static void phy_change(struct work_struct *work)
e1393456
AF
654{
655 int err;
c4028958
DH
656 struct phy_device *phydev =
657 container_of(work, struct phy_device, phy_queue);
e1393456 658
a8729eb3
AG
659 if (phydev->drv->did_interrupt &&
660 !phydev->drv->did_interrupt(phydev))
661 goto ignore;
662
e1393456
AF
663 err = phy_disable_interrupts(phydev);
664
665 if (err)
666 goto phy_err;
667
35b5f6b1 668 mutex_lock(&phydev->lock);
e1393456
AF
669 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
670 phydev->state = PHY_CHANGELINK;
35b5f6b1 671 mutex_unlock(&phydev->lock);
e1393456 672
0ac49527 673 atomic_dec(&phydev->irq_disable);
e1393456
AF
674 enable_irq(phydev->irq);
675
676 /* Reenable interrupts */
3c3070d7
MR
677 if (PHY_HALTED != phydev->state)
678 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e1393456
AF
679
680 if (err)
681 goto irq_enable_err;
682
a390d1f3
MS
683 /* reschedule state queue work to run as soon as possible */
684 cancel_delayed_work_sync(&phydev->state_queue);
685 schedule_delayed_work(&phydev->state_queue, 0);
0acb2839 686
e1393456
AF
687 return;
688
a8729eb3
AG
689ignore:
690 atomic_dec(&phydev->irq_disable);
691 enable_irq(phydev->irq);
692 return;
693
e1393456
AF
694irq_enable_err:
695 disable_irq(phydev->irq);
0ac49527 696 atomic_inc(&phydev->irq_disable);
e1393456
AF
697phy_err:
698 phy_error(phydev);
699}
700
b3df0da8
RD
701/**
702 * phy_stop - Bring down the PHY link, and stop checking the status
703 * @phydev: target phy_device struct
704 */
e1393456
AF
705void phy_stop(struct phy_device *phydev)
706{
35b5f6b1 707 mutex_lock(&phydev->lock);
e1393456
AF
708
709 if (PHY_HALTED == phydev->state)
710 goto out_unlock;
711
3c3070d7 712 if (phydev->irq != PHY_POLL) {
e1393456
AF
713 /* Disable PHY Interrupts */
714 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 715
3c3070d7
MR
716 /* Clear any pending interrupts */
717 phy_clear_interrupt(phydev);
718 }
e1393456 719
6daf6531
MR
720 phydev->state = PHY_HALTED;
721
e1393456 722out_unlock:
35b5f6b1 723 mutex_unlock(&phydev->lock);
3c3070d7
MR
724
725 /*
726 * Cannot call flush_scheduled_work() here as desired because
727 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
728 * will not reenable interrupts.
729 */
e1393456
AF
730}
731
732
b3df0da8
RD
733/**
734 * phy_start - start or restart a PHY device
735 * @phydev: target phy_device struct
e1393456 736 *
b3df0da8 737 * Description: Indicates the attached device's readiness to
e1393456
AF
738 * handle PHY-related work. Used during startup to start the
739 * PHY, and after a call to phy_stop() to resume operation.
740 * Also used to indicate the MDIO bus has cleared an error
741 * condition.
742 */
743void phy_start(struct phy_device *phydev)
744{
35b5f6b1 745 mutex_lock(&phydev->lock);
e1393456
AF
746
747 switch (phydev->state) {
748 case PHY_STARTING:
749 phydev->state = PHY_PENDING;
750 break;
751 case PHY_READY:
752 phydev->state = PHY_UP;
753 break;
754 case PHY_HALTED:
755 phydev->state = PHY_RESUMING;
756 default:
757 break;
758 }
35b5f6b1 759 mutex_unlock(&phydev->lock);
e1393456
AF
760}
761EXPORT_SYMBOL(phy_stop);
762EXPORT_SYMBOL(phy_start);
67c4f3fa 763
35b5f6b1
NC
764/**
765 * phy_state_machine - Handle the state machine
766 * @work: work_struct that describes the work to be done
35b5f6b1 767 */
4f9c85a1 768void phy_state_machine(struct work_struct *work)
00db8189 769{
bf6aede7 770 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 771 struct phy_device *phydev =
a390d1f3 772 container_of(dwork, struct phy_device, state_queue);
00db8189
AF
773 int needs_aneg = 0;
774 int err = 0;
775
35b5f6b1 776 mutex_lock(&phydev->lock);
00db8189
AF
777
778 if (phydev->adjust_state)
779 phydev->adjust_state(phydev->attached_dev);
780
781 switch(phydev->state) {
782 case PHY_DOWN:
783 case PHY_STARTING:
784 case PHY_READY:
785 case PHY_PENDING:
786 break;
787 case PHY_UP:
788 needs_aneg = 1;
789
790 phydev->link_timeout = PHY_AN_TIMEOUT;
791
792 break;
793 case PHY_AN:
6b655529
AF
794 err = phy_read_status(phydev);
795
796 if (err < 0)
797 break;
798
799 /* If the link is down, give up on
800 * negotiation for now */
801 if (!phydev->link) {
802 phydev->state = PHY_NOLINK;
803 netif_carrier_off(phydev->attached_dev);
804 phydev->adjust_link(phydev->attached_dev);
805 break;
806 }
807
00db8189
AF
808 /* Check if negotiation is done. Break
809 * if there's an error */
810 err = phy_aneg_done(phydev);
811 if (err < 0)
812 break;
813
6b655529 814 /* If AN is done, we're running */
00db8189 815 if (err > 0) {
6b655529
AF
816 phydev->state = PHY_RUNNING;
817 netif_carrier_on(phydev->attached_dev);
818 phydev->adjust_link(phydev->attached_dev);
00db8189 819
6b655529
AF
820 } else if (0 == phydev->link_timeout--) {
821 int idx;
00db8189 822
6b655529
AF
823 needs_aneg = 1;
824 /* If we have the magic_aneg bit,
825 * we try again */
826 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
00db8189
AF
827 break;
828
6b655529
AF
829 /* The timer expired, and we still
830 * don't have a setting, so we try
831 * forcing it until we find one that
832 * works, starting from the fastest speed,
833 * and working our way down */
834 idx = phy_find_valid(0, phydev->supported);
00db8189 835
6b655529
AF
836 phydev->speed = settings[idx].speed;
837 phydev->duplex = settings[idx].duplex;
00db8189 838
6b655529 839 phydev->autoneg = AUTONEG_DISABLE;
00db8189 840
8d242488
JP
841 pr_info("Trying %d/%s\n",
842 phydev->speed,
843 DUPLEX_FULL == phydev->duplex ?
844 "FULL" : "HALF");
00db8189
AF
845 }
846 break;
847 case PHY_NOLINK:
848 err = phy_read_status(phydev);
849
850 if (err)
851 break;
852
853 if (phydev->link) {
854 phydev->state = PHY_RUNNING;
855 netif_carrier_on(phydev->attached_dev);
856 phydev->adjust_link(phydev->attached_dev);
857 }
858 break;
859 case PHY_FORCING:
6b655529 860 err = genphy_update_link(phydev);
00db8189
AF
861
862 if (err)
863 break;
864
865 if (phydev->link) {
866 phydev->state = PHY_RUNNING;
867 netif_carrier_on(phydev->attached_dev);
868 } else {
869 if (0 == phydev->link_timeout--) {
870 phy_force_reduction(phydev);
871 needs_aneg = 1;
872 }
873 }
874
875 phydev->adjust_link(phydev->attached_dev);
876 break;
877 case PHY_RUNNING:
878 /* Only register a CHANGE if we are
879 * polling */
880 if (PHY_POLL == phydev->irq)
881 phydev->state = PHY_CHANGELINK;
882 break;
883 case PHY_CHANGELINK:
884 err = phy_read_status(phydev);
885
886 if (err)
887 break;
888
889 if (phydev->link) {
890 phydev->state = PHY_RUNNING;
891 netif_carrier_on(phydev->attached_dev);
892 } else {
893 phydev->state = PHY_NOLINK;
894 netif_carrier_off(phydev->attached_dev);
895 }
896
897 phydev->adjust_link(phydev->attached_dev);
898
899 if (PHY_POLL != phydev->irq)
900 err = phy_config_interrupt(phydev,
901 PHY_INTERRUPT_ENABLED);
902 break;
903 case PHY_HALTED:
904 if (phydev->link) {
905 phydev->link = 0;
906 netif_carrier_off(phydev->attached_dev);
907 phydev->adjust_link(phydev->attached_dev);
908 }
909 break;
910 case PHY_RESUMING:
911
912 err = phy_clear_interrupt(phydev);
913
914 if (err)
915 break;
916
917 err = phy_config_interrupt(phydev,
918 PHY_INTERRUPT_ENABLED);
919
920 if (err)
921 break;
922
923 if (AUTONEG_ENABLE == phydev->autoneg) {
924 err = phy_aneg_done(phydev);
925 if (err < 0)
926 break;
927
928 /* err > 0 if AN is done.
929 * Otherwise, it's 0, and we're
930 * still waiting for AN */
931 if (err > 0) {
42caa074
WF
932 err = phy_read_status(phydev);
933 if (err)
934 break;
935
936 if (phydev->link) {
937 phydev->state = PHY_RUNNING;
938 netif_carrier_on(phydev->attached_dev);
939 } else
940 phydev->state = PHY_NOLINK;
941 phydev->adjust_link(phydev->attached_dev);
00db8189
AF
942 } else {
943 phydev->state = PHY_AN;
944 phydev->link_timeout = PHY_AN_TIMEOUT;
945 }
42caa074
WF
946 } else {
947 err = phy_read_status(phydev);
948 if (err)
949 break;
950
951 if (phydev->link) {
952 phydev->state = PHY_RUNNING;
953 netif_carrier_on(phydev->attached_dev);
954 } else
955 phydev->state = PHY_NOLINK;
956 phydev->adjust_link(phydev->attached_dev);
957 }
00db8189
AF
958 break;
959 }
960
35b5f6b1 961 mutex_unlock(&phydev->lock);
00db8189
AF
962
963 if (needs_aneg)
964 err = phy_start_aneg(phydev);
965
966 if (err < 0)
967 phy_error(phydev);
968
3664090e 969 schedule_delayed_work(&phydev->state_queue, PHY_STATE_TIME * HZ);
35b5f6b1 970}
a59a4d19
GC
971
972static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
973 int addr)
974{
975 /* Write the desired MMD Devad */
976 bus->write(bus, addr, MII_MMD_CTRL, devad);
977
978 /* Write the desired MMD register address */
979 bus->write(bus, addr, MII_MMD_DATA, prtad);
980
981 /* Select the Function : DATA with no post increment */
982 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
983}
984
985/**
986 * phy_read_mmd_indirect - reads data from the MMD registers
987 * @bus: the target MII bus
988 * @prtad: MMD Address
989 * @devad: MMD DEVAD
990 * @addr: PHY address on the MII bus
991 *
992 * Description: it reads data from the MMD registers (clause 22 to access to
993 * clause 45) of the specified phy address.
994 * To read these register we have:
995 * 1) Write reg 13 // DEVAD
996 * 2) Write reg 14 // MMD Address
997 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
998 * 3) Read reg 14 // Read MMD data
999 */
1000static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
1001 int addr)
1002{
1003 u32 ret;
1004
1005 mmd_phy_indirect(bus, prtad, devad, addr);
1006
1007 /* Read the content of the MMD's selected register */
1008 ret = bus->read(bus, addr, MII_MMD_DATA);
1009
1010 return ret;
1011}
1012
1013/**
1014 * phy_write_mmd_indirect - writes data to the MMD registers
1015 * @bus: the target MII bus
1016 * @prtad: MMD Address
1017 * @devad: MMD DEVAD
1018 * @addr: PHY address on the MII bus
1019 * @data: data to write in the MMD register
1020 *
1021 * Description: Write data from the MMD registers of the specified
1022 * phy address.
1023 * To write these register we have:
1024 * 1) Write reg 13 // DEVAD
1025 * 2) Write reg 14 // MMD Address
1026 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1027 * 3) Write reg 14 // Write MMD data
1028 */
1029static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
1030 int addr, u32 data)
1031{
1032 mmd_phy_indirect(bus, prtad, devad, addr);
1033
1034 /* Write the data into MMD's selected register */
1035 bus->write(bus, addr, MII_MMD_DATA, data);
1036}
1037
a59a4d19
GC
1038/**
1039 * phy_init_eee - init and check the EEE feature
1040 * @phydev: target phy_device struct
1041 * @clk_stop_enable: PHY may stop the clock during LPI
1042 *
1043 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1044 * is supported by looking at the MMD registers 3.20 and 7.60/61
1045 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1046 * bit if required.
1047 */
1048int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1049{
1050 int ret = -EPROTONOSUPPORT;
1051
1052 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1053 * Also EEE feature is active when core is operating with MII, GMII
1054 * or RGMII.
1055 */
1056 if ((phydev->duplex == DUPLEX_FULL) &&
1057 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1058 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
1059 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
1060 int eee_lp, eee_cap, eee_adv;
1061 u32 lp, cap, adv;
1062 int idx, status;
1063
1064 /* Read phy status to properly get the right settings */
1065 status = phy_read_status(phydev);
1066 if (status)
1067 return status;
1068
1069 /* First check if the EEE ability is supported */
1070 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1071 MDIO_MMD_PCS, phydev->addr);
1072 if (eee_cap < 0)
1073 return eee_cap;
1074
b32607dd 1075 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19
GC
1076 if (!cap)
1077 goto eee_exit;
1078
1079 /* Check which link settings negotiated and verify it in
1080 * the EEE advertising registers.
1081 */
1082 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1083 MDIO_MMD_AN, phydev->addr);
1084 if (eee_lp < 0)
1085 return eee_lp;
1086
1087 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1088 MDIO_MMD_AN, phydev->addr);
1089 if (eee_adv < 0)
1090 return eee_adv;
1091
b32607dd
AB
1092 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1093 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19
GC
1094 idx = phy_find_setting(phydev->speed, phydev->duplex);
1095 if ((lp & adv & settings[idx].setting))
1096 goto eee_exit;
1097
1098 if (clk_stop_enable) {
1099 /* Configure the PHY to stop receiving xMII
1100 * clock while it is signaling LPI.
1101 */
1102 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
1103 MDIO_MMD_PCS,
1104 phydev->addr);
1105 if (val < 0)
1106 return val;
1107
1108 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1109 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1110 MDIO_MMD_PCS, phydev->addr, val);
1111 }
1112
1113 ret = 0; /* EEE supported */
1114 }
1115
1116eee_exit:
1117 return ret;
1118}
1119EXPORT_SYMBOL(phy_init_eee);
1120
1121/**
1122 * phy_get_eee_err - report the EEE wake error count
1123 * @phydev: target phy_device struct
1124 *
1125 * Description: it is to report the number of time where the PHY
1126 * failed to complete its normal wake sequence.
1127 */
1128int phy_get_eee_err(struct phy_device *phydev)
1129{
1130 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1131 MDIO_MMD_PCS, phydev->addr);
1132
1133}
1134EXPORT_SYMBOL(phy_get_eee_err);
1135
1136/**
1137 * phy_ethtool_get_eee - get EEE supported and status
1138 * @phydev: target phy_device struct
1139 * @data: ethtool_eee data
1140 *
1141 * Description: it reportes the Supported/Advertisement/LP Advertisement
1142 * capabilities.
1143 */
1144int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1145{
1146 int val;
1147
1148 /* Get Supported EEE */
1149 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1150 MDIO_MMD_PCS, phydev->addr);
1151 if (val < 0)
1152 return val;
b32607dd 1153 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1154
1155 /* Get advertisement EEE */
1156 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1157 MDIO_MMD_AN, phydev->addr);
1158 if (val < 0)
1159 return val;
b32607dd 1160 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1161
1162 /* Get LP advertisement EEE */
1163 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1164 MDIO_MMD_AN, phydev->addr);
1165 if (val < 0)
1166 return val;
b32607dd 1167 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1168
1169 return 0;
1170}
1171EXPORT_SYMBOL(phy_ethtool_get_eee);
1172
1173/**
1174 * phy_ethtool_set_eee - set EEE supported and status
1175 * @phydev: target phy_device struct
1176 * @data: ethtool_eee data
1177 *
1178 * Description: it is to program the Advertisement EEE register.
1179 */
1180int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1181{
1182 int val;
1183
b32607dd 1184 val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19
GC
1185 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1186 phydev->addr, val);
1187
1188 return 0;
1189}
1190EXPORT_SYMBOL(phy_ethtool_set_eee);
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