net/irda: bfin_sir: remove duplicate defines
[deliverable/linux.git] / drivers / net / phy / phy.c
CommitLineData
2f53e904 1/* Framework for configuring and reading PHY devices
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2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
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15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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27#include <linux/mm.h>
28#include <linux/module.h>
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29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
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32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
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SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
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FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
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FF
61#define PHY_STATE_STR(_state) \
62 case PHY_##_state: \
63 return __stringify(_state); \
64
65static const char *phy_state_to_str(enum phy_state st)
66{
67 switch (st) {
68 PHY_STATE_STR(DOWN)
69 PHY_STATE_STR(STARTING)
70 PHY_STATE_STR(READY)
71 PHY_STATE_STR(PENDING)
72 PHY_STATE_STR(UP)
73 PHY_STATE_STR(AN)
74 PHY_STATE_STR(RUNNING)
75 PHY_STATE_STR(NOLINK)
76 PHY_STATE_STR(FORCING)
77 PHY_STATE_STR(CHANGELINK)
78 PHY_STATE_STR(HALTED)
79 PHY_STATE_STR(RESUMING)
80 }
81
82 return NULL;
83}
84
85
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86/**
87 * phy_print_status - Convenience function to print out the current phy status
88 * @phydev: the phy_device struct
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89 */
90void phy_print_status(struct phy_device *phydev)
91{
2f53e904 92 if (phydev->link) {
df40cc88 93 netdev_info(phydev->attached_dev,
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FF
94 "Link is Up - %s/%s - flow control %s\n",
95 phy_speed_to_str(phydev->speed),
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FF
96 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
97 phydev->pause ? "rx/tx" : "off");
2f53e904 98 } else {
43b6329f 99 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 100 }
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AF
101}
102EXPORT_SYMBOL(phy_print_status);
00db8189 103
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104/**
105 * phy_clear_interrupt - Ack the phy device's interrupt
106 * @phydev: the phy_device struct
107 *
108 * If the @phydev driver has an ack_interrupt function, call it to
109 * ack and clear the phy device's interrupt.
110 *
ad033506 111 * Returns 0 on success or < 0 on error.
b3df0da8 112 */
89ff05ec 113static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 114{
00db8189 115 if (phydev->drv->ack_interrupt)
e62a768f 116 return phydev->drv->ack_interrupt(phydev);
00db8189 117
e62a768f 118 return 0;
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AF
119}
120
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121/**
122 * phy_config_interrupt - configure the PHY device for the requested interrupts
123 * @phydev: the phy_device struct
124 * @interrupts: interrupt flags to configure for this @phydev
125 *
ad033506 126 * Returns 0 on success or < 0 on error.
b3df0da8 127 */
89ff05ec 128static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 129{
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130 phydev->interrupts = interrupts;
131 if (phydev->drv->config_intr)
e62a768f 132 return phydev->drv->config_intr(phydev);
00db8189 133
e62a768f 134 return 0;
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135}
136
137
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138/**
139 * phy_aneg_done - return auto-negotiation status
140 * @phydev: target phy_device struct
00db8189 141 *
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142 * Description: Return the auto-negotiation status from this @phydev
143 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
144 * is still pending.
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145 */
146static inline int phy_aneg_done(struct phy_device *phydev)
147{
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FF
148 if (phydev->drv->aneg_done)
149 return phydev->drv->aneg_done(phydev);
150
a9fa6e6a 151 return genphy_aneg_done(phydev);
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152}
153
00db8189 154/* A structure for mapping a particular speed and duplex
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155 * combination to a particular SUPPORTED and ADVERTISED value
156 */
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157struct phy_setting {
158 int speed;
159 int duplex;
160 u32 setting;
161};
162
163/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 164static const struct phy_setting settings[] = {
00db8189 165 {
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166 .speed = SPEED_10000,
167 .duplex = DUPLEX_FULL,
168 .setting = SUPPORTED_10000baseKR_Full,
169 },
170 {
171 .speed = SPEED_10000,
172 .duplex = DUPLEX_FULL,
173 .setting = SUPPORTED_10000baseKX4_Full,
174 },
175 {
176 .speed = SPEED_10000,
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177 .duplex = DUPLEX_FULL,
178 .setting = SUPPORTED_10000baseT_Full,
179 },
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LT
180 {
181 .speed = SPEED_2500,
182 .duplex = DUPLEX_FULL,
183 .setting = SUPPORTED_2500baseX_Full,
184 },
185 {
186 .speed = SPEED_1000,
187 .duplex = DUPLEX_FULL,
188 .setting = SUPPORTED_1000baseKX_Full,
189 },
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AF
190 {
191 .speed = SPEED_1000,
192 .duplex = DUPLEX_FULL,
193 .setting = SUPPORTED_1000baseT_Full,
194 },
195 {
196 .speed = SPEED_1000,
197 .duplex = DUPLEX_HALF,
198 .setting = SUPPORTED_1000baseT_Half,
199 },
200 {
201 .speed = SPEED_100,
202 .duplex = DUPLEX_FULL,
203 .setting = SUPPORTED_100baseT_Full,
204 },
205 {
206 .speed = SPEED_100,
207 .duplex = DUPLEX_HALF,
208 .setting = SUPPORTED_100baseT_Half,
209 },
210 {
211 .speed = SPEED_10,
212 .duplex = DUPLEX_FULL,
213 .setting = SUPPORTED_10baseT_Full,
214 },
215 {
216 .speed = SPEED_10,
217 .duplex = DUPLEX_HALF,
218 .setting = SUPPORTED_10baseT_Half,
219 },
220};
221
ff8ac609 222#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 223
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224/**
225 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
226 * @speed: speed to match
227 * @duplex: duplex to match
00db8189 228 *
b3df0da8 229 * Description: Searches the settings array for the setting which
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AF
230 * matches the desired speed and duplex, and returns the index
231 * of that setting. Returns the index of the last setting if
232 * none of the others match.
233 */
4ae6e50c 234static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 235{
4ae6e50c 236 unsigned int idx = 0;
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237
238 while (idx < ARRAY_SIZE(settings) &&
2f53e904 239 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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240 idx++;
241
242 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
243}
244
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245/**
246 * phy_find_valid - find a PHY setting that matches the requested features mask
247 * @idx: The first index in settings[] to search
248 * @features: A mask of the valid settings
00db8189 249 *
b3df0da8 250 * Description: Returns the index of the first valid setting less
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AF
251 * than or equal to the one pointed to by idx, as determined by
252 * the mask in features. Returns the index of the last setting
253 * if nothing else matches.
254 */
4ae6e50c 255static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
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256{
257 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
258 idx++;
259
260 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
261}
262
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GR
263/**
264 * phy_check_valid - check if there is a valid PHY setting which matches
265 * speed, duplex, and feature mask
266 * @speed: speed to match
267 * @duplex: duplex to match
268 * @features: A mask of the valid settings
269 *
270 * Description: Returns true if there is a valid setting, false otherwise.
271 */
272static inline bool phy_check_valid(int speed, int duplex, u32 features)
273{
274 unsigned int idx;
275
276 idx = phy_find_valid(phy_find_setting(speed, duplex), features);
277
278 return settings[idx].speed == speed && settings[idx].duplex == duplex &&
279 (settings[idx].setting & features);
280}
281
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282/**
283 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
284 * @phydev: the target phy_device struct
00db8189 285 *
b3df0da8 286 * Description: Make sure the PHY is set to supported speeds and
00db8189 287 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 288 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 289 */
89ff05ec 290static void phy_sanitize_settings(struct phy_device *phydev)
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291{
292 u32 features = phydev->supported;
4ae6e50c 293 unsigned int idx;
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294
295 /* Sanitize settings based on PHY capabilities */
296 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 297 phydev->autoneg = AUTONEG_DISABLE;
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298
299 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
300 features);
301
302 phydev->speed = settings[idx].speed;
303 phydev->duplex = settings[idx].duplex;
304}
00db8189 305
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306/**
307 * phy_ethtool_sset - generic ethtool sset function, handles all the details
308 * @phydev: target phy_device struct
309 * @cmd: ethtool_cmd
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310 *
311 * A few notes about parameter checking:
312 * - We don't set port or transceiver, so we don't care what they
313 * were set to.
314 * - phy_start_aneg() will make sure forced settings are sane, and
315 * choose the next best ones from the ones selected, so we don't
b3df0da8 316 * care if ethtool tries to give us bad values.
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317 */
318int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
319{
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DD
320 u32 speed = ethtool_cmd_speed(cmd);
321
e5a03bfd 322 if (cmd->phy_address != phydev->mdio.addr)
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323 return -EINVAL;
324
2f53e904 325 /* We make sure that we don't pass unsupported values in to the PHY */
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326 cmd->advertising &= phydev->supported;
327
328 /* Verify the settings we care about. */
329 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
330 return -EINVAL;
331
332 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
333 return -EINVAL;
334
8e95a202 335 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
336 ((speed != SPEED_1000 &&
337 speed != SPEED_100 &&
338 speed != SPEED_10) ||
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JP
339 (cmd->duplex != DUPLEX_HALF &&
340 cmd->duplex != DUPLEX_FULL)))
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341 return -EINVAL;
342
343 phydev->autoneg = cmd->autoneg;
344
25db0338 345 phydev->speed = speed;
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346
347 phydev->advertising = cmd->advertising;
348
349 if (AUTONEG_ENABLE == cmd->autoneg)
350 phydev->advertising |= ADVERTISED_Autoneg;
351 else
352 phydev->advertising &= ~ADVERTISED_Autoneg;
353
354 phydev->duplex = cmd->duplex;
355
634ec36c
DT
356 phydev->mdix = cmd->eth_tp_mdix_ctrl;
357
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358 /* Restart the PHY */
359 phy_start_aneg(phydev);
360
361 return 0;
362}
9f6d55d0 363EXPORT_SYMBOL(phy_ethtool_sset);
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364
365int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
366{
367 cmd->supported = phydev->supported;
368
369 cmd->advertising = phydev->advertising;
114002bc 370 cmd->lp_advertising = phydev->lp_advertising;
00db8189 371
70739497 372 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 373 cmd->duplex = phydev->duplex;
c88838ce
FF
374 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
375 cmd->port = PORT_BNC;
376 else
377 cmd->port = PORT_MII;
e5a03bfd 378 cmd->phy_address = phydev->mdio.addr;
4284b6a5
FF
379 cmd->transceiver = phy_is_internal(phydev) ?
380 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189 381 cmd->autoneg = phydev->autoneg;
239aa55b 382 cmd->eth_tp_mdix_ctrl = phydev->mdix;
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AF
383
384 return 0;
385}
9f6d55d0 386EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 387
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RD
388/**
389 * phy_mii_ioctl - generic PHY MII ioctl interface
390 * @phydev: the phy_device struct
00c7d920 391 * @ifr: &struct ifreq for socket ioctl's
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RD
392 * @cmd: ioctl cmd to execute
393 *
394 * Note that this function is currently incompatible with the
00db8189 395 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 396 * current state. Use at own risk.
00db8189 397 */
2f53e904 398int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 399{
28b04113 400 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189 401 u16 val = mii_data->val_in;
79ce0477 402 bool change_autoneg = false;
00db8189
AF
403
404 switch (cmd) {
405 case SIOCGMIIPHY:
e5a03bfd 406 mii_data->phy_id = phydev->mdio.addr;
c6d6a511
LB
407 /* fall through */
408
00db8189 409 case SIOCGMIIREG:
e5a03bfd
AL
410 mii_data->val_out = mdiobus_read(phydev->mdio.bus,
411 mii_data->phy_id,
af1dc13e 412 mii_data->reg_num);
e62a768f 413 return 0;
00db8189
AF
414
415 case SIOCSMIIREG:
e5a03bfd 416 if (mii_data->phy_id == phydev->mdio.addr) {
e109374f 417 switch (mii_data->reg_num) {
00db8189 418 case MII_BMCR:
79ce0477
BH
419 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) {
420 if (phydev->autoneg == AUTONEG_ENABLE)
421 change_autoneg = true;
00db8189 422 phydev->autoneg = AUTONEG_DISABLE;
79ce0477
BH
423 if (val & BMCR_FULLDPLX)
424 phydev->duplex = DUPLEX_FULL;
425 else
426 phydev->duplex = DUPLEX_HALF;
427 if (val & BMCR_SPEED1000)
428 phydev->speed = SPEED_1000;
429 else if (val & BMCR_SPEED100)
430 phydev->speed = SPEED_100;
431 else phydev->speed = SPEED_10;
432 }
433 else {
434 if (phydev->autoneg == AUTONEG_DISABLE)
435 change_autoneg = true;
00db8189 436 phydev->autoneg = AUTONEG_ENABLE;
79ce0477 437 }
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AF
438 break;
439 case MII_ADVERTISE:
79ce0477
BH
440 phydev->advertising = mii_adv_to_ethtool_adv_t(val);
441 change_autoneg = true;
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AF
442 break;
443 default:
444 /* do nothing */
445 break;
446 }
447 }
448
e5a03bfd 449 mdiobus_write(phydev->mdio.bus, mii_data->phy_id,
af1dc13e
PK
450 mii_data->reg_num, val);
451
e5a03bfd 452 if (mii_data->phy_id == phydev->mdio.addr &&
cf18b778 453 mii_data->reg_num == MII_BMCR &&
2613f95f 454 val & BMCR_RESET)
e62a768f 455 return phy_init_hw(phydev);
79ce0477
BH
456
457 if (change_autoneg)
458 return phy_start_aneg(phydev);
459
e62a768f 460 return 0;
dda93b48 461
c1f19b51
RC
462 case SIOCSHWTSTAMP:
463 if (phydev->drv->hwtstamp)
464 return phydev->drv->hwtstamp(phydev, ifr);
465 /* fall through */
466
dda93b48 467 default:
c6d6a511 468 return -EOPNOTSUPP;
00db8189 469 }
00db8189 470}
680e9fe9 471EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 472
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RD
473/**
474 * phy_start_aneg - start auto-negotiation for this PHY device
475 * @phydev: the phy_device struct
e1393456 476 *
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RD
477 * Description: Sanitizes the settings (if we're not autonegotiating
478 * them), and then calls the driver's config_aneg function.
479 * If the PHYCONTROL Layer is operating, we change the state to
480 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
481 */
482int phy_start_aneg(struct phy_device *phydev)
483{
484 int err;
485
35b5f6b1 486 mutex_lock(&phydev->lock);
e1393456
AF
487
488 if (AUTONEG_DISABLE == phydev->autoneg)
489 phy_sanitize_settings(phydev);
490
9b3320ef
BH
491 /* Invalidate LP advertising flags */
492 phydev->lp_advertising = 0;
493
e1393456 494 err = phydev->drv->config_aneg(phydev);
e1393456
AF
495 if (err < 0)
496 goto out_unlock;
497
498 if (phydev->state != PHY_HALTED) {
499 if (AUTONEG_ENABLE == phydev->autoneg) {
500 phydev->state = PHY_AN;
501 phydev->link_timeout = PHY_AN_TIMEOUT;
502 } else {
503 phydev->state = PHY_FORCING;
504 phydev->link_timeout = PHY_FORCE_TIMEOUT;
505 }
506 }
507
508out_unlock:
35b5f6b1 509 mutex_unlock(&phydev->lock);
e1393456
AF
510 return err;
511}
512EXPORT_SYMBOL(phy_start_aneg);
513
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RD
514/**
515 * phy_start_machine - start PHY state machine tracking
516 * @phydev: the phy_device struct
00db8189 517 *
b3df0da8 518 * Description: The PHY infrastructure can run a state machine
00db8189
AF
519 * which tracks whether the PHY is starting up, negotiating,
520 * etc. This function starts the timer which tracks the state
29935aeb
SS
521 * of the PHY. If you want to maintain your own state machine,
522 * do not call this function.
b3df0da8 523 */
29935aeb 524void phy_start_machine(struct phy_device *phydev)
00db8189 525{
bbb47bde 526 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
527}
528
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RD
529/**
530 * phy_stop_machine - stop the PHY state machine tracking
531 * @phydev: target phy_device struct
00db8189 532 *
b3df0da8 533 * Description: Stops the state machine timer, sets the state to UP
817acf5e 534 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
535 * phy_detach.
536 */
537void phy_stop_machine(struct phy_device *phydev)
538{
a390d1f3 539 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 540
35b5f6b1 541 mutex_lock(&phydev->lock);
00db8189
AF
542 if (phydev->state > PHY_UP)
543 phydev->state = PHY_UP;
35b5f6b1 544 mutex_unlock(&phydev->lock);
00db8189
AF
545}
546
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RD
547/**
548 * phy_error - enter HALTED state for this PHY device
549 * @phydev: target phy_device struct
00db8189
AF
550 *
551 * Moves the PHY to the HALTED state in response to a read
552 * or write error, and tells the controller the link is down.
553 * Must not be called from interrupt context, or while the
554 * phydev->lock is held.
555 */
9b9a8bfc 556static void phy_error(struct phy_device *phydev)
00db8189 557{
35b5f6b1 558 mutex_lock(&phydev->lock);
00db8189 559 phydev->state = PHY_HALTED;
35b5f6b1 560 mutex_unlock(&phydev->lock);
00db8189
AF
561}
562
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RD
563/**
564 * phy_interrupt - PHY interrupt handler
565 * @irq: interrupt line
566 * @phy_dat: phy_device pointer
e1393456 567 *
b3df0da8 568 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
569 * interrupts, and schedules a work task to clear the interrupt.
570 */
7d12e780 571static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
572{
573 struct phy_device *phydev = phy_dat;
574
3c3070d7
MR
575 if (PHY_HALTED == phydev->state)
576 return IRQ_NONE; /* It can't be ours. */
577
e1393456
AF
578 /* The MDIO bus is not allowed to be written in interrupt
579 * context, so we need to disable the irq here. A work
580 * queue will write the PHY to disable and clear the
2f53e904
SS
581 * interrupt, and then reenable the irq line.
582 */
e1393456 583 disable_irq_nosync(irq);
0ac49527 584 atomic_inc(&phydev->irq_disable);
e1393456 585
bbb47bde 586 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
587
588 return IRQ_HANDLED;
589}
590
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RD
591/**
592 * phy_enable_interrupts - Enable the interrupts from the PHY side
593 * @phydev: target phy_device struct
594 */
89ff05ec 595static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 596{
553fe92b 597 int err = phy_clear_interrupt(phydev);
00db8189 598
e1393456
AF
599 if (err < 0)
600 return err;
00db8189 601
553fe92b 602 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 603}
00db8189 604
b3df0da8
RD
605/**
606 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
607 * @phydev: target phy_device struct
608 */
89ff05ec 609static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
610{
611 int err;
612
613 /* Disable PHY interrupts */
614 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
615 if (err)
616 goto phy_err;
617
618 /* Clear the interrupt */
619 err = phy_clear_interrupt(phydev);
00db8189
AF
620 if (err)
621 goto phy_err;
622
623 return 0;
624
625phy_err:
626 phy_error(phydev);
627
628 return err;
629}
e1393456 630
b3df0da8
RD
631/**
632 * phy_start_interrupts - request and enable interrupts for a PHY device
633 * @phydev: target phy_device struct
e1393456 634 *
b3df0da8
RD
635 * Description: Request the interrupt for the given PHY.
636 * If this fails, then we set irq to PHY_POLL.
e1393456 637 * Otherwise, we enable the interrupts in the PHY.
e1393456 638 * This should only be called with a valid IRQ number.
b3df0da8 639 * Returns 0 on success or < 0 on error.
e1393456
AF
640 */
641int phy_start_interrupts(struct phy_device *phydev)
642{
0ac49527 643 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
644 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
645 phydev) < 0) {
8d242488 646 pr_warn("%s: Can't get IRQ %d (PHY)\n",
e5a03bfd 647 phydev->mdio.bus->name, phydev->irq);
e1393456
AF
648 phydev->irq = PHY_POLL;
649 return 0;
650 }
651
e62a768f 652 return phy_enable_interrupts(phydev);
e1393456
AF
653}
654EXPORT_SYMBOL(phy_start_interrupts);
655
b3df0da8
RD
656/**
657 * phy_stop_interrupts - disable interrupts from a PHY device
658 * @phydev: target phy_device struct
659 */
e1393456
AF
660int phy_stop_interrupts(struct phy_device *phydev)
661{
553fe92b 662 int err = phy_disable_interrupts(phydev);
e1393456
AF
663
664 if (err)
665 phy_error(phydev);
666
0ac49527
MR
667 free_irq(phydev->irq, phydev);
668
2f53e904 669 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
670 * of rtnl_lock(), but we do not really care about what would
671 * be done, except from enable_irq(), so cancel any work
672 * possibly pending and take care of the matter below.
3c3070d7 673 */
28e53bdd 674 cancel_work_sync(&phydev->phy_queue);
2f53e904 675 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
676 * been left unbalanced from phy_interrupt() and enable_irq()
677 * has to be called so that other devices on the line work.
678 */
679 while (atomic_dec_return(&phydev->irq_disable) >= 0)
680 enable_irq(phydev->irq);
e1393456
AF
681
682 return err;
683}
684EXPORT_SYMBOL(phy_stop_interrupts);
685
b3df0da8
RD
686/**
687 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
688 * @work: work_struct that describes the work to be done
689 */
5ea94e76 690void phy_change(struct work_struct *work)
e1393456 691{
c4028958
DH
692 struct phy_device *phydev =
693 container_of(work, struct phy_device, phy_queue);
e1393456 694
a8729eb3
AG
695 if (phydev->drv->did_interrupt &&
696 !phydev->drv->did_interrupt(phydev))
697 goto ignore;
698
e62a768f 699 if (phy_disable_interrupts(phydev))
e1393456
AF
700 goto phy_err;
701
35b5f6b1 702 mutex_lock(&phydev->lock);
e1393456
AF
703 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
704 phydev->state = PHY_CHANGELINK;
35b5f6b1 705 mutex_unlock(&phydev->lock);
e1393456 706
0ac49527 707 atomic_dec(&phydev->irq_disable);
e1393456
AF
708 enable_irq(phydev->irq);
709
710 /* Reenable interrupts */
e62a768f
SS
711 if (PHY_HALTED != phydev->state &&
712 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
713 goto irq_enable_err;
714
a390d1f3
MS
715 /* reschedule state queue work to run as soon as possible */
716 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 717 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
718 return;
719
a8729eb3
AG
720ignore:
721 atomic_dec(&phydev->irq_disable);
722 enable_irq(phydev->irq);
723 return;
724
e1393456
AF
725irq_enable_err:
726 disable_irq(phydev->irq);
0ac49527 727 atomic_inc(&phydev->irq_disable);
e1393456
AF
728phy_err:
729 phy_error(phydev);
730}
731
b3df0da8
RD
732/**
733 * phy_stop - Bring down the PHY link, and stop checking the status
734 * @phydev: target phy_device struct
735 */
e1393456
AF
736void phy_stop(struct phy_device *phydev)
737{
35b5f6b1 738 mutex_lock(&phydev->lock);
e1393456
AF
739
740 if (PHY_HALTED == phydev->state)
741 goto out_unlock;
742
2c7b4921 743 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
744 /* Disable PHY Interrupts */
745 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 746
3c3070d7
MR
747 /* Clear any pending interrupts */
748 phy_clear_interrupt(phydev);
749 }
e1393456 750
6daf6531
MR
751 phydev->state = PHY_HALTED;
752
e1393456 753out_unlock:
35b5f6b1 754 mutex_unlock(&phydev->lock);
3c3070d7 755
2f53e904 756 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
757 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
758 * will not reenable interrupts.
759 */
e1393456 760}
2f53e904 761EXPORT_SYMBOL(phy_stop);
e1393456 762
b3df0da8
RD
763/**
764 * phy_start - start or restart a PHY device
765 * @phydev: target phy_device struct
e1393456 766 *
b3df0da8 767 * Description: Indicates the attached device's readiness to
e1393456
AF
768 * handle PHY-related work. Used during startup to start the
769 * PHY, and after a call to phy_stop() to resume operation.
770 * Also used to indicate the MDIO bus has cleared an error
771 * condition.
772 */
773void phy_start(struct phy_device *phydev)
774{
c15e10e7
TB
775 bool do_resume = false;
776 int err = 0;
777
35b5f6b1 778 mutex_lock(&phydev->lock);
e1393456
AF
779
780 switch (phydev->state) {
e109374f
FF
781 case PHY_STARTING:
782 phydev->state = PHY_PENDING;
783 break;
784 case PHY_READY:
785 phydev->state = PHY_UP;
786 break;
787 case PHY_HALTED:
c15e10e7
TB
788 /* make sure interrupts are re-enabled for the PHY */
789 err = phy_enable_interrupts(phydev);
790 if (err < 0)
791 break;
792
e109374f 793 phydev->state = PHY_RESUMING;
c15e10e7
TB
794 do_resume = true;
795 break;
e109374f
FF
796 default:
797 break;
e1393456 798 }
35b5f6b1 799 mutex_unlock(&phydev->lock);
c15e10e7
TB
800
801 /* if phy was suspended, bring the physical link up again */
802 if (do_resume)
803 phy_resume(phydev);
e1393456 804}
e1393456 805EXPORT_SYMBOL(phy_start);
67c4f3fa 806
35b5f6b1
NC
807/**
808 * phy_state_machine - Handle the state machine
809 * @work: work_struct that describes the work to be done
35b5f6b1 810 */
4f9c85a1 811void phy_state_machine(struct work_struct *work)
00db8189 812{
bf6aede7 813 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 814 struct phy_device *phydev =
a390d1f3 815 container_of(dwork, struct phy_device, state_queue);
c15e10e7 816 bool needs_aneg = false, do_suspend = false;
3e2186e0 817 enum phy_state old_state;
00db8189 818 int err = 0;
11e122cb 819 int old_link;
00db8189 820
35b5f6b1 821 mutex_lock(&phydev->lock);
00db8189 822
3e2186e0
FF
823 old_state = phydev->state;
824
2b8f2a28
DM
825 if (phydev->drv->link_change_notify)
826 phydev->drv->link_change_notify(phydev);
827
e109374f
FF
828 switch (phydev->state) {
829 case PHY_DOWN:
830 case PHY_STARTING:
831 case PHY_READY:
832 case PHY_PENDING:
833 break;
834 case PHY_UP:
6e14a5ee 835 needs_aneg = true;
00db8189 836
e109374f
FF
837 phydev->link_timeout = PHY_AN_TIMEOUT;
838
839 break;
840 case PHY_AN:
841 err = phy_read_status(phydev);
e109374f 842 if (err < 0)
00db8189 843 break;
6b655529 844
2f53e904 845 /* If the link is down, give up on negotiation for now */
e109374f
FF
846 if (!phydev->link) {
847 phydev->state = PHY_NOLINK;
848 netif_carrier_off(phydev->attached_dev);
849 phydev->adjust_link(phydev->attached_dev);
850 break;
851 }
6b655529 852
2f53e904 853 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
854 err = phy_aneg_done(phydev);
855 if (err < 0)
856 break;
6b655529 857
e109374f
FF
858 /* If AN is done, we're running */
859 if (err > 0) {
860 phydev->state = PHY_RUNNING;
861 netif_carrier_on(phydev->attached_dev);
862 phydev->adjust_link(phydev->attached_dev);
00db8189 863
fa8cddaf 864 } else if (0 == phydev->link_timeout--)
6e14a5ee 865 needs_aneg = true;
e109374f
FF
866 break;
867 case PHY_NOLINK:
321beec5
AL
868 if (phy_interrupt_is_valid(phydev))
869 break;
870
e109374f 871 err = phy_read_status(phydev);
e109374f 872 if (err)
00db8189 873 break;
00db8189 874
e109374f 875 if (phydev->link) {
e46e08b8
BK
876 if (AUTONEG_ENABLE == phydev->autoneg) {
877 err = phy_aneg_done(phydev);
878 if (err < 0)
879 break;
880
881 if (!err) {
882 phydev->state = PHY_AN;
883 phydev->link_timeout = PHY_AN_TIMEOUT;
884 break;
885 }
886 }
e109374f
FF
887 phydev->state = PHY_RUNNING;
888 netif_carrier_on(phydev->attached_dev);
889 phydev->adjust_link(phydev->attached_dev);
890 }
891 break;
892 case PHY_FORCING:
893 err = genphy_update_link(phydev);
e109374f 894 if (err)
00db8189 895 break;
00db8189 896
e109374f
FF
897 if (phydev->link) {
898 phydev->state = PHY_RUNNING;
899 netif_carrier_on(phydev->attached_dev);
900 } else {
901 if (0 == phydev->link_timeout--)
6e14a5ee 902 needs_aneg = true;
e109374f 903 }
00db8189 904
e109374f
FF
905 phydev->adjust_link(phydev->attached_dev);
906 break;
907 case PHY_RUNNING:
11e122cb
SX
908 /* Only register a CHANGE if we are polling or ignoring
909 * interrupts and link changed since latest checking.
e109374f 910 */
11e122cb
SX
911 if (!phy_interrupt_is_valid(phydev)) {
912 old_link = phydev->link;
913 err = phy_read_status(phydev);
914 if (err)
915 break;
916
917 if (old_link != phydev->link)
918 phydev->state = PHY_CHANGELINK;
919 }
e109374f
FF
920 break;
921 case PHY_CHANGELINK:
922 err = phy_read_status(phydev);
e109374f 923 if (err)
00db8189 924 break;
00db8189 925
e109374f
FF
926 if (phydev->link) {
927 phydev->state = PHY_RUNNING;
928 netif_carrier_on(phydev->attached_dev);
929 } else {
930 phydev->state = PHY_NOLINK;
931 netif_carrier_off(phydev->attached_dev);
932 }
00db8189 933
e109374f 934 phydev->adjust_link(phydev->attached_dev);
00db8189 935
e109374f
FF
936 if (phy_interrupt_is_valid(phydev))
937 err = phy_config_interrupt(phydev,
2f53e904 938 PHY_INTERRUPT_ENABLED);
e109374f
FF
939 break;
940 case PHY_HALTED:
941 if (phydev->link) {
942 phydev->link = 0;
943 netif_carrier_off(phydev->attached_dev);
00db8189 944 phydev->adjust_link(phydev->attached_dev);
6e14a5ee 945 do_suspend = true;
e109374f
FF
946 }
947 break;
948 case PHY_RESUMING:
e109374f
FF
949 if (AUTONEG_ENABLE == phydev->autoneg) {
950 err = phy_aneg_done(phydev);
951 if (err < 0)
00db8189
AF
952 break;
953
e109374f 954 /* err > 0 if AN is done.
2f53e904
SS
955 * Otherwise, it's 0, and we're still waiting for AN
956 */
e109374f 957 if (err > 0) {
42caa074
WF
958 err = phy_read_status(phydev);
959 if (err)
960 break;
961
962 if (phydev->link) {
963 phydev->state = PHY_RUNNING;
964 netif_carrier_on(phydev->attached_dev);
2f53e904 965 } else {
42caa074 966 phydev->state = PHY_NOLINK;
2f53e904 967 }
42caa074 968 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
969 } else {
970 phydev->state = PHY_AN;
971 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 972 }
e109374f
FF
973 } else {
974 err = phy_read_status(phydev);
975 if (err)
976 break;
977
978 if (phydev->link) {
979 phydev->state = PHY_RUNNING;
980 netif_carrier_on(phydev->attached_dev);
2f53e904 981 } else {
e109374f 982 phydev->state = PHY_NOLINK;
2f53e904 983 }
e109374f
FF
984 phydev->adjust_link(phydev->attached_dev);
985 }
986 break;
00db8189
AF
987 }
988
35b5f6b1 989 mutex_unlock(&phydev->lock);
00db8189
AF
990
991 if (needs_aneg)
992 err = phy_start_aneg(phydev);
6e14a5ee 993 else if (do_suspend)
be9dad1f
SH
994 phy_suspend(phydev);
995
00db8189
AF
996 if (err < 0)
997 phy_error(phydev);
998
72ba48be
AL
999 phydev_dbg(phydev, "PHY state change %s -> %s\n",
1000 phy_state_to_str(old_state),
1001 phy_state_to_str(phydev->state));
3e2186e0 1002
bbb47bde 1003 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 1004 PHY_STATE_TIME * HZ);
35b5f6b1 1005}
a59a4d19 1006
5ea94e76
FF
1007void phy_mac_interrupt(struct phy_device *phydev, int new_link)
1008{
1009 cancel_work_sync(&phydev->phy_queue);
1010 phydev->link = new_link;
1011 schedule_work(&phydev->phy_queue);
1012}
1013EXPORT_SYMBOL(phy_mac_interrupt);
1014
a59a4d19
GC
1015static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
1016 int addr)
1017{
1018 /* Write the desired MMD Devad */
1019 bus->write(bus, addr, MII_MMD_CTRL, devad);
1020
1021 /* Write the desired MMD register address */
1022 bus->write(bus, addr, MII_MMD_DATA, prtad);
1023
1024 /* Select the Function : DATA with no post increment */
1025 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
1026}
1027
1028/**
1029 * phy_read_mmd_indirect - reads data from the MMD registers
0c1d77df 1030 * @phydev: The PHY device bus
a59a4d19
GC
1031 * @prtad: MMD Address
1032 * @devad: MMD DEVAD
a59a4d19
GC
1033 *
1034 * Description: it reads data from the MMD registers (clause 22 to access to
1035 * clause 45) of the specified phy address.
1036 * To read these register we have:
1037 * 1) Write reg 13 // DEVAD
1038 * 2) Write reg 14 // MMD Address
1039 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1040 * 3) Read reg 14 // Read MMD data
1041 */
053e7e16 1042int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
a59a4d19 1043{
0c1d77df 1044 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1045 int addr = phydev->mdio.addr;
0c1d77df 1046 int value = -1;
a59a4d19 1047
ef899c07 1048 if (!phydrv->read_mmd_indirect) {
e5a03bfd 1049 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1050
1051 mutex_lock(&bus->mdio_lock);
1052 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1053
1054 /* Read the content of the MMD's selected register */
05a7f582
RK
1055 value = bus->read(bus, addr, MII_MMD_DATA);
1056 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1057 } else {
1058 value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr);
1059 }
1060 return value;
a59a4d19 1061}
66ce7fb9 1062EXPORT_SYMBOL(phy_read_mmd_indirect);
a59a4d19
GC
1063
1064/**
1065 * phy_write_mmd_indirect - writes data to the MMD registers
0c1d77df 1066 * @phydev: The PHY device
a59a4d19
GC
1067 * @prtad: MMD Address
1068 * @devad: MMD DEVAD
a59a4d19
GC
1069 * @data: data to write in the MMD register
1070 *
1071 * Description: Write data from the MMD registers of the specified
1072 * phy address.
1073 * To write these register we have:
1074 * 1) Write reg 13 // DEVAD
1075 * 2) Write reg 14 // MMD Address
1076 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1077 * 3) Write reg 14 // Write MMD data
1078 */
66ce7fb9 1079void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
053e7e16 1080 int devad, u32 data)
a59a4d19 1081{
0c1d77df 1082 struct phy_driver *phydrv = phydev->drv;
e5a03bfd 1083 int addr = phydev->mdio.addr;
a59a4d19 1084
ef899c07 1085 if (!phydrv->write_mmd_indirect) {
e5a03bfd 1086 struct mii_bus *bus = phydev->mdio.bus;
05a7f582
RK
1087
1088 mutex_lock(&bus->mdio_lock);
1089 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1090
1091 /* Write the data into MMD's selected register */
05a7f582
RK
1092 bus->write(bus, addr, MII_MMD_DATA, data);
1093 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1094 } else {
1095 phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data);
1096 }
a59a4d19 1097}
66ce7fb9 1098EXPORT_SYMBOL(phy_write_mmd_indirect);
a59a4d19 1099
a59a4d19
GC
1100/**
1101 * phy_init_eee - init and check the EEE feature
1102 * @phydev: target phy_device struct
1103 * @clk_stop_enable: PHY may stop the clock during LPI
1104 *
1105 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1106 * is supported by looking at the MMD registers 3.20 and 7.60/61
1107 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1108 * bit if required.
1109 */
1110int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1111{
a59a4d19
GC
1112 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1113 * Also EEE feature is active when core is operating with MII, GMII
7e140696
FF
1114 * or RGMII (all kinds). Internal PHYs are also allowed to proceed and
1115 * should return an error if they do not support EEE.
a59a4d19
GC
1116 */
1117 if ((phydev->duplex == DUPLEX_FULL) &&
1118 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1119 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
32a64161 1120 phy_interface_is_rgmii(phydev) ||
a9f63095 1121 phy_is_internal(phydev))) {
a59a4d19
GC
1122 int eee_lp, eee_cap, eee_adv;
1123 u32 lp, cap, adv;
4ae6e50c 1124 int status;
a59a4d19
GC
1125
1126 /* Read phy status to properly get the right settings */
1127 status = phy_read_status(phydev);
1128 if (status)
1129 return status;
1130
1131 /* First check if the EEE ability is supported */
0c1d77df 1132 eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
053e7e16 1133 MDIO_MMD_PCS);
7a4cecf7
GC
1134 if (eee_cap <= 0)
1135 goto eee_exit_err;
a59a4d19 1136
b32607dd 1137 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 1138 if (!cap)
7a4cecf7 1139 goto eee_exit_err;
a59a4d19
GC
1140
1141 /* Check which link settings negotiated and verify it in
1142 * the EEE advertising registers.
1143 */
0c1d77df 1144 eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
053e7e16 1145 MDIO_MMD_AN);
7a4cecf7
GC
1146 if (eee_lp <= 0)
1147 goto eee_exit_err;
a59a4d19 1148
0c1d77df 1149 eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
053e7e16 1150 MDIO_MMD_AN);
7a4cecf7
GC
1151 if (eee_adv <= 0)
1152 goto eee_exit_err;
a59a4d19 1153
b32607dd
AB
1154 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1155 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
54da5a8b 1156 if (!phy_check_valid(phydev->speed, phydev->duplex, lp & adv))
7a4cecf7 1157 goto eee_exit_err;
a59a4d19
GC
1158
1159 if (clk_stop_enable) {
1160 /* Configure the PHY to stop receiving xMII
1161 * clock while it is signaling LPI.
1162 */
0c1d77df 1163 int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1164 MDIO_MMD_PCS);
a59a4d19
GC
1165 if (val < 0)
1166 return val;
1167
1168 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
0c1d77df 1169 phy_write_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1170 MDIO_MMD_PCS, val);
a59a4d19
GC
1171 }
1172
e62a768f 1173 return 0; /* EEE supported */
a59a4d19 1174 }
7a4cecf7 1175eee_exit_err:
e62a768f 1176 return -EPROTONOSUPPORT;
a59a4d19
GC
1177}
1178EXPORT_SYMBOL(phy_init_eee);
1179
1180/**
1181 * phy_get_eee_err - report the EEE wake error count
1182 * @phydev: target phy_device struct
1183 *
1184 * Description: it is to report the number of time where the PHY
1185 * failed to complete its normal wake sequence.
1186 */
1187int phy_get_eee_err(struct phy_device *phydev)
1188{
053e7e16 1189 return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR, MDIO_MMD_PCS);
a59a4d19
GC
1190}
1191EXPORT_SYMBOL(phy_get_eee_err);
1192
1193/**
1194 * phy_ethtool_get_eee - get EEE supported and status
1195 * @phydev: target phy_device struct
1196 * @data: ethtool_eee data
1197 *
1198 * Description: it reportes the Supported/Advertisement/LP Advertisement
1199 * capabilities.
1200 */
1201int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1202{
1203 int val;
1204
1205 /* Get Supported EEE */
053e7e16 1206 val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE, MDIO_MMD_PCS);
a59a4d19
GC
1207 if (val < 0)
1208 return val;
b32607dd 1209 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1210
1211 /* Get advertisement EEE */
053e7e16 1212 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN);
a59a4d19
GC
1213 if (val < 0)
1214 return val;
b32607dd 1215 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1216
1217 /* Get LP advertisement EEE */
053e7e16 1218 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE, MDIO_MMD_AN);
a59a4d19
GC
1219 if (val < 0)
1220 return val;
b32607dd 1221 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1222
1223 return 0;
1224}
1225EXPORT_SYMBOL(phy_ethtool_get_eee);
1226
1227/**
1228 * phy_ethtool_set_eee - set EEE supported and status
1229 * @phydev: target phy_device struct
1230 * @data: ethtool_eee data
1231 *
1232 * Description: it is to program the Advertisement EEE register.
1233 */
1234int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1235{
553fe92b 1236 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1237
053e7e16 1238 phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN, val);
a59a4d19
GC
1239
1240 return 0;
1241}
1242EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1243
1244int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1245{
1246 if (phydev->drv->set_wol)
1247 return phydev->drv->set_wol(phydev, wol);
1248
1249 return -EOPNOTSUPP;
1250}
1251EXPORT_SYMBOL(phy_ethtool_set_wol);
1252
1253void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1254{
1255 if (phydev->drv->get_wol)
1256 phydev->drv->get_wol(phydev, wol);
1257}
1258EXPORT_SYMBOL(phy_ethtool_get_wol);
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