net: phy: update phy_print_status to show pause settings
[deliverable/linux.git] / drivers / net / phy / phy.c
CommitLineData
2f53e904 1/* Framework for configuring and reading PHY devices
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2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
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15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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27#include <linux/mm.h>
28#include <linux/module.h>
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29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
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32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
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SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
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41/**
42 * phy_print_status - Convenience function to print out the current phy status
43 * @phydev: the phy_device struct
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AF
44 */
45void phy_print_status(struct phy_device *phydev)
46{
2f53e904 47 if (phydev->link) {
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48 netdev_info(phydev->attached_dev,
49 "Link is Up - %d/%s - flow control %s\n",
8d242488 50 phydev->speed,
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51 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
52 phydev->pause ? "rx/tx" : "off");
2f53e904 53 } else {
43b6329f 54 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 55 }
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AF
56}
57EXPORT_SYMBOL(phy_print_status);
00db8189 58
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59/**
60 * phy_clear_interrupt - Ack the phy device's interrupt
61 * @phydev: the phy_device struct
62 *
63 * If the @phydev driver has an ack_interrupt function, call it to
64 * ack and clear the phy device's interrupt.
65 *
66 * Returns 0 on success on < 0 on error.
67 */
89ff05ec 68static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 69{
00db8189 70 if (phydev->drv->ack_interrupt)
e62a768f 71 return phydev->drv->ack_interrupt(phydev);
00db8189 72
e62a768f 73 return 0;
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AF
74}
75
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RD
76/**
77 * phy_config_interrupt - configure the PHY device for the requested interrupts
78 * @phydev: the phy_device struct
79 * @interrupts: interrupt flags to configure for this @phydev
80 *
81 * Returns 0 on success on < 0 on error.
82 */
89ff05ec 83static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 84{
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AF
85 phydev->interrupts = interrupts;
86 if (phydev->drv->config_intr)
e62a768f 87 return phydev->drv->config_intr(phydev);
00db8189 88
e62a768f 89 return 0;
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AF
90}
91
92
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93/**
94 * phy_aneg_done - return auto-negotiation status
95 * @phydev: target phy_device struct
00db8189 96 *
b3df0da8 97 * Description: Reads the status register and returns 0 either if
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98 * auto-negotiation is incomplete, or if there was an error.
99 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
100 */
101static inline int phy_aneg_done(struct phy_device *phydev)
102{
553fe92b 103 int retval = phy_read(phydev, MII_BMSR);
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104
105 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
106}
107
00db8189 108/* A structure for mapping a particular speed and duplex
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109 * combination to a particular SUPPORTED and ADVERTISED value
110 */
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111struct phy_setting {
112 int speed;
113 int duplex;
114 u32 setting;
115};
116
117/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 118static const struct phy_setting settings[] = {
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AF
119 {
120 .speed = 10000,
121 .duplex = DUPLEX_FULL,
122 .setting = SUPPORTED_10000baseT_Full,
123 },
124 {
125 .speed = SPEED_1000,
126 .duplex = DUPLEX_FULL,
127 .setting = SUPPORTED_1000baseT_Full,
128 },
129 {
130 .speed = SPEED_1000,
131 .duplex = DUPLEX_HALF,
132 .setting = SUPPORTED_1000baseT_Half,
133 },
134 {
135 .speed = SPEED_100,
136 .duplex = DUPLEX_FULL,
137 .setting = SUPPORTED_100baseT_Full,
138 },
139 {
140 .speed = SPEED_100,
141 .duplex = DUPLEX_HALF,
142 .setting = SUPPORTED_100baseT_Half,
143 },
144 {
145 .speed = SPEED_10,
146 .duplex = DUPLEX_FULL,
147 .setting = SUPPORTED_10baseT_Full,
148 },
149 {
150 .speed = SPEED_10,
151 .duplex = DUPLEX_HALF,
152 .setting = SUPPORTED_10baseT_Half,
153 },
154};
155
ff8ac609 156#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 157
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158/**
159 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
160 * @speed: speed to match
161 * @duplex: duplex to match
00db8189 162 *
b3df0da8 163 * Description: Searches the settings array for the setting which
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AF
164 * matches the desired speed and duplex, and returns the index
165 * of that setting. Returns the index of the last setting if
166 * none of the others match.
167 */
168static inline int phy_find_setting(int speed, int duplex)
169{
170 int idx = 0;
171
172 while (idx < ARRAY_SIZE(settings) &&
2f53e904 173 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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174 idx++;
175
176 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
177}
178
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179/**
180 * phy_find_valid - find a PHY setting that matches the requested features mask
181 * @idx: The first index in settings[] to search
182 * @features: A mask of the valid settings
00db8189 183 *
b3df0da8 184 * Description: Returns the index of the first valid setting less
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AF
185 * than or equal to the one pointed to by idx, as determined by
186 * the mask in features. Returns the index of the last setting
187 * if nothing else matches.
188 */
189static inline int phy_find_valid(int idx, u32 features)
190{
191 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
192 idx++;
193
194 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
195}
196
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197/**
198 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
199 * @phydev: the target phy_device struct
00db8189 200 *
b3df0da8 201 * Description: Make sure the PHY is set to supported speeds and
00db8189 202 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 203 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 204 */
89ff05ec 205static void phy_sanitize_settings(struct phy_device *phydev)
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206{
207 u32 features = phydev->supported;
208 int idx;
209
210 /* Sanitize settings based on PHY capabilities */
211 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 212 phydev->autoneg = AUTONEG_DISABLE;
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213
214 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
215 features);
216
217 phydev->speed = settings[idx].speed;
218 phydev->duplex = settings[idx].duplex;
219}
00db8189 220
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221/**
222 * phy_ethtool_sset - generic ethtool sset function, handles all the details
223 * @phydev: target phy_device struct
224 * @cmd: ethtool_cmd
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225 *
226 * A few notes about parameter checking:
227 * - We don't set port or transceiver, so we don't care what they
228 * were set to.
229 * - phy_start_aneg() will make sure forced settings are sane, and
230 * choose the next best ones from the ones selected, so we don't
b3df0da8 231 * care if ethtool tries to give us bad values.
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232 */
233int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
234{
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DD
235 u32 speed = ethtool_cmd_speed(cmd);
236
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237 if (cmd->phy_address != phydev->addr)
238 return -EINVAL;
239
2f53e904 240 /* We make sure that we don't pass unsupported values in to the PHY */
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241 cmd->advertising &= phydev->supported;
242
243 /* Verify the settings we care about. */
244 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
245 return -EINVAL;
246
247 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
248 return -EINVAL;
249
8e95a202 250 if (cmd->autoneg == AUTONEG_DISABLE &&
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DD
251 ((speed != SPEED_1000 &&
252 speed != SPEED_100 &&
253 speed != SPEED_10) ||
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JP
254 (cmd->duplex != DUPLEX_HALF &&
255 cmd->duplex != DUPLEX_FULL)))
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256 return -EINVAL;
257
258 phydev->autoneg = cmd->autoneg;
259
25db0338 260 phydev->speed = speed;
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261
262 phydev->advertising = cmd->advertising;
263
264 if (AUTONEG_ENABLE == cmd->autoneg)
265 phydev->advertising |= ADVERTISED_Autoneg;
266 else
267 phydev->advertising &= ~ADVERTISED_Autoneg;
268
269 phydev->duplex = cmd->duplex;
270
271 /* Restart the PHY */
272 phy_start_aneg(phydev);
273
274 return 0;
275}
9f6d55d0 276EXPORT_SYMBOL(phy_ethtool_sset);
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277
278int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
279{
280 cmd->supported = phydev->supported;
281
282 cmd->advertising = phydev->advertising;
114002bc 283 cmd->lp_advertising = phydev->lp_advertising;
00db8189 284
70739497 285 ethtool_cmd_speed_set(cmd, phydev->speed);
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286 cmd->duplex = phydev->duplex;
287 cmd->port = PORT_MII;
288 cmd->phy_address = phydev->addr;
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FF
289 cmd->transceiver = phy_is_internal(phydev) ?
290 XCVR_INTERNAL : XCVR_EXTERNAL;
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291 cmd->autoneg = phydev->autoneg;
292
293 return 0;
294}
9f6d55d0 295EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 296
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297/**
298 * phy_mii_ioctl - generic PHY MII ioctl interface
299 * @phydev: the phy_device struct
00c7d920 300 * @ifr: &struct ifreq for socket ioctl's
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301 * @cmd: ioctl cmd to execute
302 *
303 * Note that this function is currently incompatible with the
00db8189 304 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 305 * current state. Use at own risk.
00db8189 306 */
2f53e904 307int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 308{
28b04113 309 struct mii_ioctl_data *mii_data = if_mii(ifr);
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310 u16 val = mii_data->val_in;
311
312 switch (cmd) {
313 case SIOCGMIIPHY:
314 mii_data->phy_id = phydev->addr;
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LB
315 /* fall through */
316
00db8189 317 case SIOCGMIIREG:
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PK
318 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
319 mii_data->reg_num);
e62a768f 320 return 0;
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321
322 case SIOCSMIIREG:
00db8189 323 if (mii_data->phy_id == phydev->addr) {
e109374f 324 switch (mii_data->reg_num) {
00db8189 325 case MII_BMCR:
2f53e904 326 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0)
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AF
327 phydev->autoneg = AUTONEG_DISABLE;
328 else
329 phydev->autoneg = AUTONEG_ENABLE;
2f53e904 330 if (!phydev->autoneg && (val & BMCR_FULLDPLX))
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331 phydev->duplex = DUPLEX_FULL;
332 else
333 phydev->duplex = DUPLEX_HALF;
2f53e904 334 if (!phydev->autoneg && (val & BMCR_SPEED1000))
024a0a3c 335 phydev->speed = SPEED_1000;
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SS
336 else if (!phydev->autoneg &&
337 (val & BMCR_SPEED100))
024a0a3c 338 phydev->speed = SPEED_100;
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339 break;
340 case MII_ADVERTISE:
341 phydev->advertising = val;
342 break;
343 default:
344 /* do nothing */
345 break;
346 }
347 }
348
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PK
349 mdiobus_write(phydev->bus, mii_data->phy_id,
350 mii_data->reg_num, val);
351
8e95a202 352 if (mii_data->reg_num == MII_BMCR &&
2613f95f 353 val & BMCR_RESET)
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SS
354 return phy_init_hw(phydev);
355 return 0;
dda93b48 356
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RC
357 case SIOCSHWTSTAMP:
358 if (phydev->drv->hwtstamp)
359 return phydev->drv->hwtstamp(phydev, ifr);
360 /* fall through */
361
dda93b48 362 default:
c6d6a511 363 return -EOPNOTSUPP;
00db8189 364 }
00db8189 365}
680e9fe9 366EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 367
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368/**
369 * phy_start_aneg - start auto-negotiation for this PHY device
370 * @phydev: the phy_device struct
e1393456 371 *
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372 * Description: Sanitizes the settings (if we're not autonegotiating
373 * them), and then calls the driver's config_aneg function.
374 * If the PHYCONTROL Layer is operating, we change the state to
375 * reflect the beginning of Auto-negotiation or forcing.
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AF
376 */
377int phy_start_aneg(struct phy_device *phydev)
378{
379 int err;
380
35b5f6b1 381 mutex_lock(&phydev->lock);
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AF
382
383 if (AUTONEG_DISABLE == phydev->autoneg)
384 phy_sanitize_settings(phydev);
385
386 err = phydev->drv->config_aneg(phydev);
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AF
387 if (err < 0)
388 goto out_unlock;
389
390 if (phydev->state != PHY_HALTED) {
391 if (AUTONEG_ENABLE == phydev->autoneg) {
392 phydev->state = PHY_AN;
393 phydev->link_timeout = PHY_AN_TIMEOUT;
394 } else {
395 phydev->state = PHY_FORCING;
396 phydev->link_timeout = PHY_FORCE_TIMEOUT;
397 }
398 }
399
400out_unlock:
35b5f6b1 401 mutex_unlock(&phydev->lock);
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AF
402 return err;
403}
404EXPORT_SYMBOL(phy_start_aneg);
405
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406/**
407 * phy_start_machine - start PHY state machine tracking
408 * @phydev: the phy_device struct
00db8189 409 *
b3df0da8 410 * Description: The PHY infrastructure can run a state machine
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AF
411 * which tracks whether the PHY is starting up, negotiating,
412 * etc. This function starts the timer which tracks the state
29935aeb
SS
413 * of the PHY. If you want to maintain your own state machine,
414 * do not call this function.
b3df0da8 415 */
29935aeb 416void phy_start_machine(struct phy_device *phydev)
00db8189 417{
bbb47bde 418 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
419}
420
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RD
421/**
422 * phy_stop_machine - stop the PHY state machine tracking
423 * @phydev: target phy_device struct
00db8189 424 *
b3df0da8 425 * Description: Stops the state machine timer, sets the state to UP
817acf5e 426 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
427 * phy_detach.
428 */
429void phy_stop_machine(struct phy_device *phydev)
430{
a390d1f3 431 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 432
35b5f6b1 433 mutex_lock(&phydev->lock);
00db8189
AF
434 if (phydev->state > PHY_UP)
435 phydev->state = PHY_UP;
35b5f6b1 436 mutex_unlock(&phydev->lock);
00db8189
AF
437}
438
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RD
439/**
440 * phy_error - enter HALTED state for this PHY device
441 * @phydev: target phy_device struct
00db8189
AF
442 *
443 * Moves the PHY to the HALTED state in response to a read
444 * or write error, and tells the controller the link is down.
445 * Must not be called from interrupt context, or while the
446 * phydev->lock is held.
447 */
9b9a8bfc 448static void phy_error(struct phy_device *phydev)
00db8189 449{
35b5f6b1 450 mutex_lock(&phydev->lock);
00db8189 451 phydev->state = PHY_HALTED;
35b5f6b1 452 mutex_unlock(&phydev->lock);
00db8189
AF
453}
454
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RD
455/**
456 * phy_interrupt - PHY interrupt handler
457 * @irq: interrupt line
458 * @phy_dat: phy_device pointer
e1393456 459 *
b3df0da8 460 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
461 * interrupts, and schedules a work task to clear the interrupt.
462 */
7d12e780 463static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
464{
465 struct phy_device *phydev = phy_dat;
466
3c3070d7
MR
467 if (PHY_HALTED == phydev->state)
468 return IRQ_NONE; /* It can't be ours. */
469
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AF
470 /* The MDIO bus is not allowed to be written in interrupt
471 * context, so we need to disable the irq here. A work
472 * queue will write the PHY to disable and clear the
2f53e904
SS
473 * interrupt, and then reenable the irq line.
474 */
e1393456 475 disable_irq_nosync(irq);
0ac49527 476 atomic_inc(&phydev->irq_disable);
e1393456 477
bbb47bde 478 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
479
480 return IRQ_HANDLED;
481}
482
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RD
483/**
484 * phy_enable_interrupts - Enable the interrupts from the PHY side
485 * @phydev: target phy_device struct
486 */
89ff05ec 487static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 488{
553fe92b 489 int err = phy_clear_interrupt(phydev);
00db8189 490
e1393456
AF
491 if (err < 0)
492 return err;
00db8189 493
553fe92b 494 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 495}
00db8189 496
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RD
497/**
498 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
499 * @phydev: target phy_device struct
500 */
89ff05ec 501static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
502{
503 int err;
504
505 /* Disable PHY interrupts */
506 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
507 if (err)
508 goto phy_err;
509
510 /* Clear the interrupt */
511 err = phy_clear_interrupt(phydev);
00db8189
AF
512 if (err)
513 goto phy_err;
514
515 return 0;
516
517phy_err:
518 phy_error(phydev);
519
520 return err;
521}
e1393456 522
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RD
523/**
524 * phy_start_interrupts - request and enable interrupts for a PHY device
525 * @phydev: target phy_device struct
e1393456 526 *
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527 * Description: Request the interrupt for the given PHY.
528 * If this fails, then we set irq to PHY_POLL.
e1393456 529 * Otherwise, we enable the interrupts in the PHY.
e1393456 530 * This should only be called with a valid IRQ number.
b3df0da8 531 * Returns 0 on success or < 0 on error.
e1393456
AF
532 */
533int phy_start_interrupts(struct phy_device *phydev)
534{
0ac49527 535 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
536 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
537 phydev) < 0) {
8d242488
JP
538 pr_warn("%s: Can't get IRQ %d (PHY)\n",
539 phydev->bus->name, phydev->irq);
e1393456
AF
540 phydev->irq = PHY_POLL;
541 return 0;
542 }
543
e62a768f 544 return phy_enable_interrupts(phydev);
e1393456
AF
545}
546EXPORT_SYMBOL(phy_start_interrupts);
547
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RD
548/**
549 * phy_stop_interrupts - disable interrupts from a PHY device
550 * @phydev: target phy_device struct
551 */
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AF
552int phy_stop_interrupts(struct phy_device *phydev)
553{
553fe92b 554 int err = phy_disable_interrupts(phydev);
e1393456
AF
555
556 if (err)
557 phy_error(phydev);
558
0ac49527
MR
559 free_irq(phydev->irq, phydev);
560
2f53e904 561 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
562 * of rtnl_lock(), but we do not really care about what would
563 * be done, except from enable_irq(), so cancel any work
564 * possibly pending and take care of the matter below.
3c3070d7 565 */
28e53bdd 566 cancel_work_sync(&phydev->phy_queue);
2f53e904 567 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
568 * been left unbalanced from phy_interrupt() and enable_irq()
569 * has to be called so that other devices on the line work.
570 */
571 while (atomic_dec_return(&phydev->irq_disable) >= 0)
572 enable_irq(phydev->irq);
e1393456
AF
573
574 return err;
575}
576EXPORT_SYMBOL(phy_stop_interrupts);
577
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RD
578/**
579 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
580 * @work: work_struct that describes the work to be done
581 */
5ea94e76 582void phy_change(struct work_struct *work)
e1393456 583{
c4028958
DH
584 struct phy_device *phydev =
585 container_of(work, struct phy_device, phy_queue);
e1393456 586
a8729eb3
AG
587 if (phydev->drv->did_interrupt &&
588 !phydev->drv->did_interrupt(phydev))
589 goto ignore;
590
e62a768f 591 if (phy_disable_interrupts(phydev))
e1393456
AF
592 goto phy_err;
593
35b5f6b1 594 mutex_lock(&phydev->lock);
e1393456
AF
595 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
596 phydev->state = PHY_CHANGELINK;
35b5f6b1 597 mutex_unlock(&phydev->lock);
e1393456 598
0ac49527 599 atomic_dec(&phydev->irq_disable);
e1393456
AF
600 enable_irq(phydev->irq);
601
602 /* Reenable interrupts */
e62a768f
SS
603 if (PHY_HALTED != phydev->state &&
604 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
605 goto irq_enable_err;
606
a390d1f3
MS
607 /* reschedule state queue work to run as soon as possible */
608 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 609 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
610 return;
611
a8729eb3
AG
612ignore:
613 atomic_dec(&phydev->irq_disable);
614 enable_irq(phydev->irq);
615 return;
616
e1393456
AF
617irq_enable_err:
618 disable_irq(phydev->irq);
0ac49527 619 atomic_inc(&phydev->irq_disable);
e1393456
AF
620phy_err:
621 phy_error(phydev);
622}
623
b3df0da8
RD
624/**
625 * phy_stop - Bring down the PHY link, and stop checking the status
626 * @phydev: target phy_device struct
627 */
e1393456
AF
628void phy_stop(struct phy_device *phydev)
629{
35b5f6b1 630 mutex_lock(&phydev->lock);
e1393456
AF
631
632 if (PHY_HALTED == phydev->state)
633 goto out_unlock;
634
2c7b4921 635 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
636 /* Disable PHY Interrupts */
637 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 638
3c3070d7
MR
639 /* Clear any pending interrupts */
640 phy_clear_interrupt(phydev);
641 }
e1393456 642
6daf6531
MR
643 phydev->state = PHY_HALTED;
644
e1393456 645out_unlock:
35b5f6b1 646 mutex_unlock(&phydev->lock);
3c3070d7 647
2f53e904 648 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
649 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
650 * will not reenable interrupts.
651 */
e1393456 652}
2f53e904 653EXPORT_SYMBOL(phy_stop);
e1393456 654
b3df0da8
RD
655/**
656 * phy_start - start or restart a PHY device
657 * @phydev: target phy_device struct
e1393456 658 *
b3df0da8 659 * Description: Indicates the attached device's readiness to
e1393456
AF
660 * handle PHY-related work. Used during startup to start the
661 * PHY, and after a call to phy_stop() to resume operation.
662 * Also used to indicate the MDIO bus has cleared an error
663 * condition.
664 */
665void phy_start(struct phy_device *phydev)
666{
35b5f6b1 667 mutex_lock(&phydev->lock);
e1393456
AF
668
669 switch (phydev->state) {
e109374f
FF
670 case PHY_STARTING:
671 phydev->state = PHY_PENDING;
672 break;
673 case PHY_READY:
674 phydev->state = PHY_UP;
675 break;
676 case PHY_HALTED:
677 phydev->state = PHY_RESUMING;
678 default:
679 break;
e1393456 680 }
35b5f6b1 681 mutex_unlock(&phydev->lock);
e1393456 682}
e1393456 683EXPORT_SYMBOL(phy_start);
67c4f3fa 684
35b5f6b1
NC
685/**
686 * phy_state_machine - Handle the state machine
687 * @work: work_struct that describes the work to be done
35b5f6b1 688 */
4f9c85a1 689void phy_state_machine(struct work_struct *work)
00db8189 690{
bf6aede7 691 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 692 struct phy_device *phydev =
a390d1f3 693 container_of(dwork, struct phy_device, state_queue);
be9dad1f 694 int needs_aneg = 0, do_suspend = 0;
00db8189
AF
695 int err = 0;
696
35b5f6b1 697 mutex_lock(&phydev->lock);
00db8189 698
e109374f
FF
699 switch (phydev->state) {
700 case PHY_DOWN:
701 case PHY_STARTING:
702 case PHY_READY:
703 case PHY_PENDING:
704 break;
705 case PHY_UP:
706 needs_aneg = 1;
00db8189 707
e109374f
FF
708 phydev->link_timeout = PHY_AN_TIMEOUT;
709
710 break;
711 case PHY_AN:
712 err = phy_read_status(phydev);
e109374f 713 if (err < 0)
00db8189 714 break;
6b655529 715
2f53e904 716 /* If the link is down, give up on negotiation for now */
e109374f
FF
717 if (!phydev->link) {
718 phydev->state = PHY_NOLINK;
719 netif_carrier_off(phydev->attached_dev);
720 phydev->adjust_link(phydev->attached_dev);
721 break;
722 }
6b655529 723
2f53e904 724 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
725 err = phy_aneg_done(phydev);
726 if (err < 0)
727 break;
6b655529 728
e109374f
FF
729 /* If AN is done, we're running */
730 if (err > 0) {
731 phydev->state = PHY_RUNNING;
732 netif_carrier_on(phydev->attached_dev);
733 phydev->adjust_link(phydev->attached_dev);
00db8189 734
e109374f
FF
735 } else if (0 == phydev->link_timeout--) {
736 needs_aneg = 1;
2f53e904 737 /* If we have the magic_aneg bit, we try again */
e109374f
FF
738 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
739 break;
740 }
741 break;
742 case PHY_NOLINK:
743 err = phy_read_status(phydev);
e109374f 744 if (err)
00db8189 745 break;
00db8189 746
e109374f
FF
747 if (phydev->link) {
748 phydev->state = PHY_RUNNING;
749 netif_carrier_on(phydev->attached_dev);
750 phydev->adjust_link(phydev->attached_dev);
751 }
752 break;
753 case PHY_FORCING:
754 err = genphy_update_link(phydev);
e109374f 755 if (err)
00db8189 756 break;
00db8189 757
e109374f
FF
758 if (phydev->link) {
759 phydev->state = PHY_RUNNING;
760 netif_carrier_on(phydev->attached_dev);
761 } else {
762 if (0 == phydev->link_timeout--)
763 needs_aneg = 1;
764 }
00db8189 765
e109374f
FF
766 phydev->adjust_link(phydev->attached_dev);
767 break;
768 case PHY_RUNNING:
769 /* Only register a CHANGE if we are
770 * polling or ignoring interrupts
771 */
772 if (!phy_interrupt_is_valid(phydev))
773 phydev->state = PHY_CHANGELINK;
774 break;
775 case PHY_CHANGELINK:
776 err = phy_read_status(phydev);
e109374f 777 if (err)
00db8189 778 break;
00db8189 779
e109374f
FF
780 if (phydev->link) {
781 phydev->state = PHY_RUNNING;
782 netif_carrier_on(phydev->attached_dev);
783 } else {
784 phydev->state = PHY_NOLINK;
785 netif_carrier_off(phydev->attached_dev);
786 }
00db8189 787
e109374f 788 phydev->adjust_link(phydev->attached_dev);
00db8189 789
e109374f
FF
790 if (phy_interrupt_is_valid(phydev))
791 err = phy_config_interrupt(phydev,
2f53e904 792 PHY_INTERRUPT_ENABLED);
e109374f
FF
793 break;
794 case PHY_HALTED:
795 if (phydev->link) {
796 phydev->link = 0;
797 netif_carrier_off(phydev->attached_dev);
00db8189 798 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
799 do_suspend = 1;
800 }
801 break;
802 case PHY_RESUMING:
e109374f 803 err = phy_clear_interrupt(phydev);
e109374f
FF
804 if (err)
805 break;
00db8189 806
2f53e904 807 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e109374f
FF
808 if (err)
809 break;
00db8189 810
e109374f
FF
811 if (AUTONEG_ENABLE == phydev->autoneg) {
812 err = phy_aneg_done(phydev);
813 if (err < 0)
00db8189
AF
814 break;
815
e109374f 816 /* err > 0 if AN is done.
2f53e904
SS
817 * Otherwise, it's 0, and we're still waiting for AN
818 */
e109374f 819 if (err > 0) {
42caa074
WF
820 err = phy_read_status(phydev);
821 if (err)
822 break;
823
824 if (phydev->link) {
825 phydev->state = PHY_RUNNING;
826 netif_carrier_on(phydev->attached_dev);
2f53e904 827 } else {
42caa074 828 phydev->state = PHY_NOLINK;
2f53e904 829 }
42caa074 830 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
831 } else {
832 phydev->state = PHY_AN;
833 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 834 }
e109374f
FF
835 } else {
836 err = phy_read_status(phydev);
837 if (err)
838 break;
839
840 if (phydev->link) {
841 phydev->state = PHY_RUNNING;
842 netif_carrier_on(phydev->attached_dev);
2f53e904 843 } else {
e109374f 844 phydev->state = PHY_NOLINK;
2f53e904 845 }
e109374f
FF
846 phydev->adjust_link(phydev->attached_dev);
847 }
848 break;
00db8189
AF
849 }
850
35b5f6b1 851 mutex_unlock(&phydev->lock);
00db8189
AF
852
853 if (needs_aneg)
854 err = phy_start_aneg(phydev);
855
be9dad1f
SH
856 if (do_suspend)
857 phy_suspend(phydev);
858
00db8189
AF
859 if (err < 0)
860 phy_error(phydev);
861
bbb47bde 862 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 863 PHY_STATE_TIME * HZ);
35b5f6b1 864}
a59a4d19 865
5ea94e76
FF
866void phy_mac_interrupt(struct phy_device *phydev, int new_link)
867{
868 cancel_work_sync(&phydev->phy_queue);
869 phydev->link = new_link;
870 schedule_work(&phydev->phy_queue);
871}
872EXPORT_SYMBOL(phy_mac_interrupt);
873
a59a4d19
GC
874static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
875 int addr)
876{
877 /* Write the desired MMD Devad */
878 bus->write(bus, addr, MII_MMD_CTRL, devad);
879
880 /* Write the desired MMD register address */
881 bus->write(bus, addr, MII_MMD_DATA, prtad);
882
883 /* Select the Function : DATA with no post increment */
884 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
885}
886
887/**
888 * phy_read_mmd_indirect - reads data from the MMD registers
889 * @bus: the target MII bus
890 * @prtad: MMD Address
891 * @devad: MMD DEVAD
892 * @addr: PHY address on the MII bus
893 *
894 * Description: it reads data from the MMD registers (clause 22 to access to
895 * clause 45) of the specified phy address.
896 * To read these register we have:
897 * 1) Write reg 13 // DEVAD
898 * 2) Write reg 14 // MMD Address
899 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
900 * 3) Read reg 14 // Read MMD data
901 */
902static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
903 int addr)
904{
a59a4d19
GC
905 mmd_phy_indirect(bus, prtad, devad, addr);
906
907 /* Read the content of the MMD's selected register */
e62a768f 908 return bus->read(bus, addr, MII_MMD_DATA);
a59a4d19
GC
909}
910
911/**
912 * phy_write_mmd_indirect - writes data to the MMD registers
913 * @bus: the target MII bus
914 * @prtad: MMD Address
915 * @devad: MMD DEVAD
916 * @addr: PHY address on the MII bus
917 * @data: data to write in the MMD register
918 *
919 * Description: Write data from the MMD registers of the specified
920 * phy address.
921 * To write these register we have:
922 * 1) Write reg 13 // DEVAD
923 * 2) Write reg 14 // MMD Address
924 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
925 * 3) Write reg 14 // Write MMD data
926 */
927static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
928 int addr, u32 data)
929{
930 mmd_phy_indirect(bus, prtad, devad, addr);
931
932 /* Write the data into MMD's selected register */
933 bus->write(bus, addr, MII_MMD_DATA, data);
934}
935
a59a4d19
GC
936/**
937 * phy_init_eee - init and check the EEE feature
938 * @phydev: target phy_device struct
939 * @clk_stop_enable: PHY may stop the clock during LPI
940 *
941 * Description: it checks if the Energy-Efficient Ethernet (EEE)
942 * is supported by looking at the MMD registers 3.20 and 7.60/61
943 * and it programs the MMD register 3.0 setting the "Clock stop enable"
944 * bit if required.
945 */
946int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
947{
a59a4d19
GC
948 /* According to 802.3az,the EEE is supported only in full duplex-mode.
949 * Also EEE feature is active when core is operating with MII, GMII
950 * or RGMII.
951 */
952 if ((phydev->duplex == DUPLEX_FULL) &&
953 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
954 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
955 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
956 int eee_lp, eee_cap, eee_adv;
957 u32 lp, cap, adv;
958 int idx, status;
959
960 /* Read phy status to properly get the right settings */
961 status = phy_read_status(phydev);
962 if (status)
963 return status;
964
965 /* First check if the EEE ability is supported */
966 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
967 MDIO_MMD_PCS, phydev->addr);
968 if (eee_cap < 0)
969 return eee_cap;
970
b32607dd 971 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 972 if (!cap)
e62a768f 973 return -EPROTONOSUPPORT;
a59a4d19
GC
974
975 /* Check which link settings negotiated and verify it in
976 * the EEE advertising registers.
977 */
978 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
979 MDIO_MMD_AN, phydev->addr);
980 if (eee_lp < 0)
981 return eee_lp;
982
983 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
984 MDIO_MMD_AN, phydev->addr);
985 if (eee_adv < 0)
986 return eee_adv;
987
b32607dd
AB
988 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
989 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19 990 idx = phy_find_setting(phydev->speed, phydev->duplex);
9a9c56cb 991 if (!(lp & adv & settings[idx].setting))
e62a768f 992 return -EPROTONOSUPPORT;
a59a4d19
GC
993
994 if (clk_stop_enable) {
995 /* Configure the PHY to stop receiving xMII
996 * clock while it is signaling LPI.
997 */
998 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
999 MDIO_MMD_PCS,
1000 phydev->addr);
1001 if (val < 0)
1002 return val;
1003
1004 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1005 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1006 MDIO_MMD_PCS, phydev->addr, val);
1007 }
1008
e62a768f 1009 return 0; /* EEE supported */
a59a4d19
GC
1010 }
1011
e62a768f 1012 return -EPROTONOSUPPORT;
a59a4d19
GC
1013}
1014EXPORT_SYMBOL(phy_init_eee);
1015
1016/**
1017 * phy_get_eee_err - report the EEE wake error count
1018 * @phydev: target phy_device struct
1019 *
1020 * Description: it is to report the number of time where the PHY
1021 * failed to complete its normal wake sequence.
1022 */
1023int phy_get_eee_err(struct phy_device *phydev)
1024{
1025 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1026 MDIO_MMD_PCS, phydev->addr);
a59a4d19
GC
1027}
1028EXPORT_SYMBOL(phy_get_eee_err);
1029
1030/**
1031 * phy_ethtool_get_eee - get EEE supported and status
1032 * @phydev: target phy_device struct
1033 * @data: ethtool_eee data
1034 *
1035 * Description: it reportes the Supported/Advertisement/LP Advertisement
1036 * capabilities.
1037 */
1038int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1039{
1040 int val;
1041
1042 /* Get Supported EEE */
1043 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1044 MDIO_MMD_PCS, phydev->addr);
1045 if (val < 0)
1046 return val;
b32607dd 1047 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1048
1049 /* Get advertisement EEE */
1050 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1051 MDIO_MMD_AN, phydev->addr);
1052 if (val < 0)
1053 return val;
b32607dd 1054 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1055
1056 /* Get LP advertisement EEE */
1057 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1058 MDIO_MMD_AN, phydev->addr);
1059 if (val < 0)
1060 return val;
b32607dd 1061 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1062
1063 return 0;
1064}
1065EXPORT_SYMBOL(phy_ethtool_get_eee);
1066
1067/**
1068 * phy_ethtool_set_eee - set EEE supported and status
1069 * @phydev: target phy_device struct
1070 * @data: ethtool_eee data
1071 *
1072 * Description: it is to program the Advertisement EEE register.
1073 */
1074int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1075{
553fe92b 1076 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1077
a59a4d19
GC
1078 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1079 phydev->addr, val);
1080
1081 return 0;
1082}
1083EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1084
1085int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1086{
1087 if (phydev->drv->set_wol)
1088 return phydev->drv->set_wol(phydev, wol);
1089
1090 return -EOPNOTSUPP;
1091}
1092EXPORT_SYMBOL(phy_ethtool_set_wol);
1093
1094void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1095{
1096 if (phydev->drv->get_wol)
1097 phydev->drv->get_wol(phydev, wol);
1098}
1099EXPORT_SYMBOL(phy_ethtool_get_wol);
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