inet: frag: make sure forced eviction removes all frags
[deliverable/linux.git] / drivers / net / phy / phy.c
CommitLineData
2f53e904 1/* Framework for configuring and reading PHY devices
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2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
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15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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AF
27#include <linux/mm.h>
28#include <linux/module.h>
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AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
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32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
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SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
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RD
41/**
42 * phy_print_status - Convenience function to print out the current phy status
43 * @phydev: the phy_device struct
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AF
44 */
45void phy_print_status(struct phy_device *phydev)
46{
2f53e904 47 if (phydev->link) {
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JP
48 pr_info("%s - Link is Up - %d/%s\n",
49 dev_name(&phydev->dev),
50 phydev->speed,
51 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
2f53e904 52 } else {
8d242488 53 pr_info("%s - Link is Down\n", dev_name(&phydev->dev));
2f53e904 54 }
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AF
55}
56EXPORT_SYMBOL(phy_print_status);
00db8189 57
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RD
58/**
59 * phy_clear_interrupt - Ack the phy device's interrupt
60 * @phydev: the phy_device struct
61 *
62 * If the @phydev driver has an ack_interrupt function, call it to
63 * ack and clear the phy device's interrupt.
64 *
65 * Returns 0 on success on < 0 on error.
66 */
89ff05ec 67static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 68{
00db8189 69 if (phydev->drv->ack_interrupt)
e62a768f 70 return phydev->drv->ack_interrupt(phydev);
00db8189 71
e62a768f 72 return 0;
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AF
73}
74
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RD
75/**
76 * phy_config_interrupt - configure the PHY device for the requested interrupts
77 * @phydev: the phy_device struct
78 * @interrupts: interrupt flags to configure for this @phydev
79 *
80 * Returns 0 on success on < 0 on error.
81 */
89ff05ec 82static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 83{
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AF
84 phydev->interrupts = interrupts;
85 if (phydev->drv->config_intr)
e62a768f 86 return phydev->drv->config_intr(phydev);
00db8189 87
e62a768f 88 return 0;
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AF
89}
90
91
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RD
92/**
93 * phy_aneg_done - return auto-negotiation status
94 * @phydev: target phy_device struct
00db8189 95 *
b3df0da8 96 * Description: Reads the status register and returns 0 either if
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AF
97 * auto-negotiation is incomplete, or if there was an error.
98 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
99 */
100static inline int phy_aneg_done(struct phy_device *phydev)
101{
553fe92b 102 int retval = phy_read(phydev, MII_BMSR);
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103
104 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
105}
106
00db8189 107/* A structure for mapping a particular speed and duplex
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SS
108 * combination to a particular SUPPORTED and ADVERTISED value
109 */
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AF
110struct phy_setting {
111 int speed;
112 int duplex;
113 u32 setting;
114};
115
116/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 117static const struct phy_setting settings[] = {
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AF
118 {
119 .speed = 10000,
120 .duplex = DUPLEX_FULL,
121 .setting = SUPPORTED_10000baseT_Full,
122 },
123 {
124 .speed = SPEED_1000,
125 .duplex = DUPLEX_FULL,
126 .setting = SUPPORTED_1000baseT_Full,
127 },
128 {
129 .speed = SPEED_1000,
130 .duplex = DUPLEX_HALF,
131 .setting = SUPPORTED_1000baseT_Half,
132 },
133 {
134 .speed = SPEED_100,
135 .duplex = DUPLEX_FULL,
136 .setting = SUPPORTED_100baseT_Full,
137 },
138 {
139 .speed = SPEED_100,
140 .duplex = DUPLEX_HALF,
141 .setting = SUPPORTED_100baseT_Half,
142 },
143 {
144 .speed = SPEED_10,
145 .duplex = DUPLEX_FULL,
146 .setting = SUPPORTED_10baseT_Full,
147 },
148 {
149 .speed = SPEED_10,
150 .duplex = DUPLEX_HALF,
151 .setting = SUPPORTED_10baseT_Half,
152 },
153};
154
ff8ac609 155#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 156
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157/**
158 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
159 * @speed: speed to match
160 * @duplex: duplex to match
00db8189 161 *
b3df0da8 162 * Description: Searches the settings array for the setting which
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AF
163 * matches the desired speed and duplex, and returns the index
164 * of that setting. Returns the index of the last setting if
165 * none of the others match.
166 */
167static inline int phy_find_setting(int speed, int duplex)
168{
169 int idx = 0;
170
171 while (idx < ARRAY_SIZE(settings) &&
2f53e904 172 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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173 idx++;
174
175 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
176}
177
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178/**
179 * phy_find_valid - find a PHY setting that matches the requested features mask
180 * @idx: The first index in settings[] to search
181 * @features: A mask of the valid settings
00db8189 182 *
b3df0da8 183 * Description: Returns the index of the first valid setting less
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AF
184 * than or equal to the one pointed to by idx, as determined by
185 * the mask in features. Returns the index of the last setting
186 * if nothing else matches.
187 */
188static inline int phy_find_valid(int idx, u32 features)
189{
190 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
191 idx++;
192
193 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
194}
195
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196/**
197 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
198 * @phydev: the target phy_device struct
00db8189 199 *
b3df0da8 200 * Description: Make sure the PHY is set to supported speeds and
00db8189 201 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 202 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 203 */
89ff05ec 204static void phy_sanitize_settings(struct phy_device *phydev)
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AF
205{
206 u32 features = phydev->supported;
207 int idx;
208
209 /* Sanitize settings based on PHY capabilities */
210 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 211 phydev->autoneg = AUTONEG_DISABLE;
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212
213 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
214 features);
215
216 phydev->speed = settings[idx].speed;
217 phydev->duplex = settings[idx].duplex;
218}
00db8189 219
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220/**
221 * phy_ethtool_sset - generic ethtool sset function, handles all the details
222 * @phydev: target phy_device struct
223 * @cmd: ethtool_cmd
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224 *
225 * A few notes about parameter checking:
226 * - We don't set port or transceiver, so we don't care what they
227 * were set to.
228 * - phy_start_aneg() will make sure forced settings are sane, and
229 * choose the next best ones from the ones selected, so we don't
b3df0da8 230 * care if ethtool tries to give us bad values.
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231 */
232int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
233{
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DD
234 u32 speed = ethtool_cmd_speed(cmd);
235
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236 if (cmd->phy_address != phydev->addr)
237 return -EINVAL;
238
2f53e904 239 /* We make sure that we don't pass unsupported values in to the PHY */
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240 cmd->advertising &= phydev->supported;
241
242 /* Verify the settings we care about. */
243 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
244 return -EINVAL;
245
246 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
247 return -EINVAL;
248
8e95a202 249 if (cmd->autoneg == AUTONEG_DISABLE &&
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DD
250 ((speed != SPEED_1000 &&
251 speed != SPEED_100 &&
252 speed != SPEED_10) ||
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JP
253 (cmd->duplex != DUPLEX_HALF &&
254 cmd->duplex != DUPLEX_FULL)))
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255 return -EINVAL;
256
257 phydev->autoneg = cmd->autoneg;
258
25db0338 259 phydev->speed = speed;
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260
261 phydev->advertising = cmd->advertising;
262
263 if (AUTONEG_ENABLE == cmd->autoneg)
264 phydev->advertising |= ADVERTISED_Autoneg;
265 else
266 phydev->advertising &= ~ADVERTISED_Autoneg;
267
268 phydev->duplex = cmd->duplex;
269
270 /* Restart the PHY */
271 phy_start_aneg(phydev);
272
273 return 0;
274}
9f6d55d0 275EXPORT_SYMBOL(phy_ethtool_sset);
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276
277int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
278{
279 cmd->supported = phydev->supported;
280
281 cmd->advertising = phydev->advertising;
114002bc 282 cmd->lp_advertising = phydev->lp_advertising;
00db8189 283
70739497 284 ethtool_cmd_speed_set(cmd, phydev->speed);
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285 cmd->duplex = phydev->duplex;
286 cmd->port = PORT_MII;
287 cmd->phy_address = phydev->addr;
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FF
288 cmd->transceiver = phy_is_internal(phydev) ?
289 XCVR_INTERNAL : XCVR_EXTERNAL;
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290 cmd->autoneg = phydev->autoneg;
291
292 return 0;
293}
9f6d55d0 294EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 295
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RD
296/**
297 * phy_mii_ioctl - generic PHY MII ioctl interface
298 * @phydev: the phy_device struct
00c7d920 299 * @ifr: &struct ifreq for socket ioctl's
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RD
300 * @cmd: ioctl cmd to execute
301 *
302 * Note that this function is currently incompatible with the
00db8189 303 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 304 * current state. Use at own risk.
00db8189 305 */
2f53e904 306int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 307{
28b04113 308 struct mii_ioctl_data *mii_data = if_mii(ifr);
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AF
309 u16 val = mii_data->val_in;
310
311 switch (cmd) {
312 case SIOCGMIIPHY:
313 mii_data->phy_id = phydev->addr;
c6d6a511
LB
314 /* fall through */
315
00db8189 316 case SIOCGMIIREG:
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PK
317 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
318 mii_data->reg_num);
e62a768f 319 return 0;
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AF
320
321 case SIOCSMIIREG:
00db8189 322 if (mii_data->phy_id == phydev->addr) {
e109374f 323 switch (mii_data->reg_num) {
00db8189 324 case MII_BMCR:
2f53e904 325 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0)
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AF
326 phydev->autoneg = AUTONEG_DISABLE;
327 else
328 phydev->autoneg = AUTONEG_ENABLE;
2f53e904 329 if (!phydev->autoneg && (val & BMCR_FULLDPLX))
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AF
330 phydev->duplex = DUPLEX_FULL;
331 else
332 phydev->duplex = DUPLEX_HALF;
2f53e904 333 if (!phydev->autoneg && (val & BMCR_SPEED1000))
024a0a3c 334 phydev->speed = SPEED_1000;
2f53e904
SS
335 else if (!phydev->autoneg &&
336 (val & BMCR_SPEED100))
024a0a3c 337 phydev->speed = SPEED_100;
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AF
338 break;
339 case MII_ADVERTISE:
340 phydev->advertising = val;
341 break;
342 default:
343 /* do nothing */
344 break;
345 }
346 }
347
af1dc13e
PK
348 mdiobus_write(phydev->bus, mii_data->phy_id,
349 mii_data->reg_num, val);
350
8e95a202 351 if (mii_data->reg_num == MII_BMCR &&
2613f95f 352 val & BMCR_RESET)
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SS
353 return phy_init_hw(phydev);
354 return 0;
dda93b48 355
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RC
356 case SIOCSHWTSTAMP:
357 if (phydev->drv->hwtstamp)
358 return phydev->drv->hwtstamp(phydev, ifr);
359 /* fall through */
360
dda93b48 361 default:
c6d6a511 362 return -EOPNOTSUPP;
00db8189 363 }
00db8189 364}
680e9fe9 365EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 366
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RD
367/**
368 * phy_start_aneg - start auto-negotiation for this PHY device
369 * @phydev: the phy_device struct
e1393456 370 *
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371 * Description: Sanitizes the settings (if we're not autonegotiating
372 * them), and then calls the driver's config_aneg function.
373 * If the PHYCONTROL Layer is operating, we change the state to
374 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
375 */
376int phy_start_aneg(struct phy_device *phydev)
377{
378 int err;
379
35b5f6b1 380 mutex_lock(&phydev->lock);
e1393456
AF
381
382 if (AUTONEG_DISABLE == phydev->autoneg)
383 phy_sanitize_settings(phydev);
384
385 err = phydev->drv->config_aneg(phydev);
e1393456
AF
386 if (err < 0)
387 goto out_unlock;
388
389 if (phydev->state != PHY_HALTED) {
390 if (AUTONEG_ENABLE == phydev->autoneg) {
391 phydev->state = PHY_AN;
392 phydev->link_timeout = PHY_AN_TIMEOUT;
393 } else {
394 phydev->state = PHY_FORCING;
395 phydev->link_timeout = PHY_FORCE_TIMEOUT;
396 }
397 }
398
399out_unlock:
35b5f6b1 400 mutex_unlock(&phydev->lock);
e1393456
AF
401 return err;
402}
403EXPORT_SYMBOL(phy_start_aneg);
404
b3df0da8
RD
405/**
406 * phy_start_machine - start PHY state machine tracking
407 * @phydev: the phy_device struct
00db8189 408 *
b3df0da8 409 * Description: The PHY infrastructure can run a state machine
00db8189
AF
410 * which tracks whether the PHY is starting up, negotiating,
411 * etc. This function starts the timer which tracks the state
29935aeb
SS
412 * of the PHY. If you want to maintain your own state machine,
413 * do not call this function.
b3df0da8 414 */
29935aeb 415void phy_start_machine(struct phy_device *phydev)
00db8189 416{
bbb47bde 417 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
418}
419
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RD
420/**
421 * phy_stop_machine - stop the PHY state machine tracking
422 * @phydev: target phy_device struct
00db8189 423 *
b3df0da8 424 * Description: Stops the state machine timer, sets the state to UP
817acf5e 425 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
426 * phy_detach.
427 */
428void phy_stop_machine(struct phy_device *phydev)
429{
a390d1f3 430 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 431
35b5f6b1 432 mutex_lock(&phydev->lock);
00db8189
AF
433 if (phydev->state > PHY_UP)
434 phydev->state = PHY_UP;
35b5f6b1 435 mutex_unlock(&phydev->lock);
00db8189
AF
436}
437
b3df0da8
RD
438/**
439 * phy_error - enter HALTED state for this PHY device
440 * @phydev: target phy_device struct
00db8189
AF
441 *
442 * Moves the PHY to the HALTED state in response to a read
443 * or write error, and tells the controller the link is down.
444 * Must not be called from interrupt context, or while the
445 * phydev->lock is held.
446 */
9b9a8bfc 447static void phy_error(struct phy_device *phydev)
00db8189 448{
35b5f6b1 449 mutex_lock(&phydev->lock);
00db8189 450 phydev->state = PHY_HALTED;
35b5f6b1 451 mutex_unlock(&phydev->lock);
00db8189
AF
452}
453
b3df0da8
RD
454/**
455 * phy_interrupt - PHY interrupt handler
456 * @irq: interrupt line
457 * @phy_dat: phy_device pointer
e1393456 458 *
b3df0da8 459 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
460 * interrupts, and schedules a work task to clear the interrupt.
461 */
7d12e780 462static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
463{
464 struct phy_device *phydev = phy_dat;
465
3c3070d7
MR
466 if (PHY_HALTED == phydev->state)
467 return IRQ_NONE; /* It can't be ours. */
468
e1393456
AF
469 /* The MDIO bus is not allowed to be written in interrupt
470 * context, so we need to disable the irq here. A work
471 * queue will write the PHY to disable and clear the
2f53e904
SS
472 * interrupt, and then reenable the irq line.
473 */
e1393456 474 disable_irq_nosync(irq);
0ac49527 475 atomic_inc(&phydev->irq_disable);
e1393456 476
bbb47bde 477 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
478
479 return IRQ_HANDLED;
480}
481
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RD
482/**
483 * phy_enable_interrupts - Enable the interrupts from the PHY side
484 * @phydev: target phy_device struct
485 */
89ff05ec 486static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 487{
553fe92b 488 int err = phy_clear_interrupt(phydev);
00db8189 489
e1393456
AF
490 if (err < 0)
491 return err;
00db8189 492
553fe92b 493 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 494}
00db8189 495
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RD
496/**
497 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
498 * @phydev: target phy_device struct
499 */
89ff05ec 500static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
501{
502 int err;
503
504 /* Disable PHY interrupts */
505 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
506 if (err)
507 goto phy_err;
508
509 /* Clear the interrupt */
510 err = phy_clear_interrupt(phydev);
00db8189
AF
511 if (err)
512 goto phy_err;
513
514 return 0;
515
516phy_err:
517 phy_error(phydev);
518
519 return err;
520}
e1393456 521
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RD
522/**
523 * phy_start_interrupts - request and enable interrupts for a PHY device
524 * @phydev: target phy_device struct
e1393456 525 *
b3df0da8
RD
526 * Description: Request the interrupt for the given PHY.
527 * If this fails, then we set irq to PHY_POLL.
e1393456 528 * Otherwise, we enable the interrupts in the PHY.
e1393456 529 * This should only be called with a valid IRQ number.
b3df0da8 530 * Returns 0 on success or < 0 on error.
e1393456
AF
531 */
532int phy_start_interrupts(struct phy_device *phydev)
533{
0ac49527 534 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
535 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
536 phydev) < 0) {
8d242488
JP
537 pr_warn("%s: Can't get IRQ %d (PHY)\n",
538 phydev->bus->name, phydev->irq);
e1393456
AF
539 phydev->irq = PHY_POLL;
540 return 0;
541 }
542
e62a768f 543 return phy_enable_interrupts(phydev);
e1393456
AF
544}
545EXPORT_SYMBOL(phy_start_interrupts);
546
b3df0da8
RD
547/**
548 * phy_stop_interrupts - disable interrupts from a PHY device
549 * @phydev: target phy_device struct
550 */
e1393456
AF
551int phy_stop_interrupts(struct phy_device *phydev)
552{
553fe92b 553 int err = phy_disable_interrupts(phydev);
e1393456
AF
554
555 if (err)
556 phy_error(phydev);
557
0ac49527
MR
558 free_irq(phydev->irq, phydev);
559
2f53e904 560 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
561 * of rtnl_lock(), but we do not really care about what would
562 * be done, except from enable_irq(), so cancel any work
563 * possibly pending and take care of the matter below.
3c3070d7 564 */
28e53bdd 565 cancel_work_sync(&phydev->phy_queue);
2f53e904 566 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
567 * been left unbalanced from phy_interrupt() and enable_irq()
568 * has to be called so that other devices on the line work.
569 */
570 while (atomic_dec_return(&phydev->irq_disable) >= 0)
571 enable_irq(phydev->irq);
e1393456
AF
572
573 return err;
574}
575EXPORT_SYMBOL(phy_stop_interrupts);
576
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RD
577/**
578 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
579 * @work: work_struct that describes the work to be done
580 */
5ea94e76 581void phy_change(struct work_struct *work)
e1393456 582{
c4028958
DH
583 struct phy_device *phydev =
584 container_of(work, struct phy_device, phy_queue);
e1393456 585
a8729eb3
AG
586 if (phydev->drv->did_interrupt &&
587 !phydev->drv->did_interrupt(phydev))
588 goto ignore;
589
e62a768f 590 if (phy_disable_interrupts(phydev))
e1393456
AF
591 goto phy_err;
592
35b5f6b1 593 mutex_lock(&phydev->lock);
e1393456
AF
594 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
595 phydev->state = PHY_CHANGELINK;
35b5f6b1 596 mutex_unlock(&phydev->lock);
e1393456 597
0ac49527 598 atomic_dec(&phydev->irq_disable);
e1393456
AF
599 enable_irq(phydev->irq);
600
601 /* Reenable interrupts */
e62a768f
SS
602 if (PHY_HALTED != phydev->state &&
603 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
604 goto irq_enable_err;
605
a390d1f3
MS
606 /* reschedule state queue work to run as soon as possible */
607 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 608 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
609 return;
610
a8729eb3
AG
611ignore:
612 atomic_dec(&phydev->irq_disable);
613 enable_irq(phydev->irq);
614 return;
615
e1393456
AF
616irq_enable_err:
617 disable_irq(phydev->irq);
0ac49527 618 atomic_inc(&phydev->irq_disable);
e1393456
AF
619phy_err:
620 phy_error(phydev);
621}
622
b3df0da8
RD
623/**
624 * phy_stop - Bring down the PHY link, and stop checking the status
625 * @phydev: target phy_device struct
626 */
e1393456
AF
627void phy_stop(struct phy_device *phydev)
628{
35b5f6b1 629 mutex_lock(&phydev->lock);
e1393456
AF
630
631 if (PHY_HALTED == phydev->state)
632 goto out_unlock;
633
2c7b4921 634 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
635 /* Disable PHY Interrupts */
636 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 637
3c3070d7
MR
638 /* Clear any pending interrupts */
639 phy_clear_interrupt(phydev);
640 }
e1393456 641
6daf6531
MR
642 phydev->state = PHY_HALTED;
643
e1393456 644out_unlock:
35b5f6b1 645 mutex_unlock(&phydev->lock);
3c3070d7 646
2f53e904 647 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
648 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
649 * will not reenable interrupts.
650 */
e1393456 651}
2f53e904 652EXPORT_SYMBOL(phy_stop);
e1393456 653
b3df0da8
RD
654/**
655 * phy_start - start or restart a PHY device
656 * @phydev: target phy_device struct
e1393456 657 *
b3df0da8 658 * Description: Indicates the attached device's readiness to
e1393456
AF
659 * handle PHY-related work. Used during startup to start the
660 * PHY, and after a call to phy_stop() to resume operation.
661 * Also used to indicate the MDIO bus has cleared an error
662 * condition.
663 */
664void phy_start(struct phy_device *phydev)
665{
35b5f6b1 666 mutex_lock(&phydev->lock);
e1393456
AF
667
668 switch (phydev->state) {
e109374f
FF
669 case PHY_STARTING:
670 phydev->state = PHY_PENDING;
671 break;
672 case PHY_READY:
673 phydev->state = PHY_UP;
674 break;
675 case PHY_HALTED:
676 phydev->state = PHY_RESUMING;
677 default:
678 break;
e1393456 679 }
35b5f6b1 680 mutex_unlock(&phydev->lock);
e1393456 681}
e1393456 682EXPORT_SYMBOL(phy_start);
67c4f3fa 683
35b5f6b1
NC
684/**
685 * phy_state_machine - Handle the state machine
686 * @work: work_struct that describes the work to be done
35b5f6b1 687 */
4f9c85a1 688void phy_state_machine(struct work_struct *work)
00db8189 689{
bf6aede7 690 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 691 struct phy_device *phydev =
a390d1f3 692 container_of(dwork, struct phy_device, state_queue);
be9dad1f 693 int needs_aneg = 0, do_suspend = 0;
00db8189
AF
694 int err = 0;
695
35b5f6b1 696 mutex_lock(&phydev->lock);
00db8189 697
e109374f
FF
698 switch (phydev->state) {
699 case PHY_DOWN:
700 case PHY_STARTING:
701 case PHY_READY:
702 case PHY_PENDING:
703 break;
704 case PHY_UP:
705 needs_aneg = 1;
00db8189 706
e109374f
FF
707 phydev->link_timeout = PHY_AN_TIMEOUT;
708
709 break;
710 case PHY_AN:
711 err = phy_read_status(phydev);
e109374f 712 if (err < 0)
00db8189 713 break;
6b655529 714
2f53e904 715 /* If the link is down, give up on negotiation for now */
e109374f
FF
716 if (!phydev->link) {
717 phydev->state = PHY_NOLINK;
718 netif_carrier_off(phydev->attached_dev);
719 phydev->adjust_link(phydev->attached_dev);
720 break;
721 }
6b655529 722
2f53e904 723 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
724 err = phy_aneg_done(phydev);
725 if (err < 0)
726 break;
6b655529 727
e109374f
FF
728 /* If AN is done, we're running */
729 if (err > 0) {
730 phydev->state = PHY_RUNNING;
731 netif_carrier_on(phydev->attached_dev);
732 phydev->adjust_link(phydev->attached_dev);
00db8189 733
e109374f
FF
734 } else if (0 == phydev->link_timeout--) {
735 needs_aneg = 1;
2f53e904 736 /* If we have the magic_aneg bit, we try again */
e109374f
FF
737 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
738 break;
739 }
740 break;
741 case PHY_NOLINK:
742 err = phy_read_status(phydev);
e109374f 743 if (err)
00db8189 744 break;
00db8189 745
e109374f
FF
746 if (phydev->link) {
747 phydev->state = PHY_RUNNING;
748 netif_carrier_on(phydev->attached_dev);
749 phydev->adjust_link(phydev->attached_dev);
750 }
751 break;
752 case PHY_FORCING:
753 err = genphy_update_link(phydev);
e109374f 754 if (err)
00db8189 755 break;
00db8189 756
e109374f
FF
757 if (phydev->link) {
758 phydev->state = PHY_RUNNING;
759 netif_carrier_on(phydev->attached_dev);
760 } else {
761 if (0 == phydev->link_timeout--)
762 needs_aneg = 1;
763 }
00db8189 764
e109374f
FF
765 phydev->adjust_link(phydev->attached_dev);
766 break;
767 case PHY_RUNNING:
768 /* Only register a CHANGE if we are
769 * polling or ignoring interrupts
770 */
771 if (!phy_interrupt_is_valid(phydev))
772 phydev->state = PHY_CHANGELINK;
773 break;
774 case PHY_CHANGELINK:
775 err = phy_read_status(phydev);
e109374f 776 if (err)
00db8189 777 break;
00db8189 778
e109374f
FF
779 if (phydev->link) {
780 phydev->state = PHY_RUNNING;
781 netif_carrier_on(phydev->attached_dev);
782 } else {
783 phydev->state = PHY_NOLINK;
784 netif_carrier_off(phydev->attached_dev);
785 }
00db8189 786
e109374f 787 phydev->adjust_link(phydev->attached_dev);
00db8189 788
e109374f
FF
789 if (phy_interrupt_is_valid(phydev))
790 err = phy_config_interrupt(phydev,
2f53e904 791 PHY_INTERRUPT_ENABLED);
e109374f
FF
792 break;
793 case PHY_HALTED:
794 if (phydev->link) {
795 phydev->link = 0;
796 netif_carrier_off(phydev->attached_dev);
00db8189 797 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
798 do_suspend = 1;
799 }
800 break;
801 case PHY_RESUMING:
e109374f 802 err = phy_clear_interrupt(phydev);
e109374f
FF
803 if (err)
804 break;
00db8189 805
2f53e904 806 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e109374f
FF
807 if (err)
808 break;
00db8189 809
e109374f
FF
810 if (AUTONEG_ENABLE == phydev->autoneg) {
811 err = phy_aneg_done(phydev);
812 if (err < 0)
00db8189
AF
813 break;
814
e109374f 815 /* err > 0 if AN is done.
2f53e904
SS
816 * Otherwise, it's 0, and we're still waiting for AN
817 */
e109374f 818 if (err > 0) {
42caa074
WF
819 err = phy_read_status(phydev);
820 if (err)
821 break;
822
823 if (phydev->link) {
824 phydev->state = PHY_RUNNING;
825 netif_carrier_on(phydev->attached_dev);
2f53e904 826 } else {
42caa074 827 phydev->state = PHY_NOLINK;
2f53e904 828 }
42caa074 829 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
830 } else {
831 phydev->state = PHY_AN;
832 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 833 }
e109374f
FF
834 } else {
835 err = phy_read_status(phydev);
836 if (err)
837 break;
838
839 if (phydev->link) {
840 phydev->state = PHY_RUNNING;
841 netif_carrier_on(phydev->attached_dev);
2f53e904 842 } else {
e109374f 843 phydev->state = PHY_NOLINK;
2f53e904 844 }
e109374f
FF
845 phydev->adjust_link(phydev->attached_dev);
846 }
847 break;
00db8189
AF
848 }
849
35b5f6b1 850 mutex_unlock(&phydev->lock);
00db8189
AF
851
852 if (needs_aneg)
853 err = phy_start_aneg(phydev);
854
be9dad1f
SH
855 if (do_suspend)
856 phy_suspend(phydev);
857
00db8189
AF
858 if (err < 0)
859 phy_error(phydev);
860
bbb47bde 861 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 862 PHY_STATE_TIME * HZ);
35b5f6b1 863}
a59a4d19 864
5ea94e76
FF
865void phy_mac_interrupt(struct phy_device *phydev, int new_link)
866{
867 cancel_work_sync(&phydev->phy_queue);
868 phydev->link = new_link;
869 schedule_work(&phydev->phy_queue);
870}
871EXPORT_SYMBOL(phy_mac_interrupt);
872
a59a4d19
GC
873static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
874 int addr)
875{
876 /* Write the desired MMD Devad */
877 bus->write(bus, addr, MII_MMD_CTRL, devad);
878
879 /* Write the desired MMD register address */
880 bus->write(bus, addr, MII_MMD_DATA, prtad);
881
882 /* Select the Function : DATA with no post increment */
883 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
884}
885
886/**
887 * phy_read_mmd_indirect - reads data from the MMD registers
888 * @bus: the target MII bus
889 * @prtad: MMD Address
890 * @devad: MMD DEVAD
891 * @addr: PHY address on the MII bus
892 *
893 * Description: it reads data from the MMD registers (clause 22 to access to
894 * clause 45) of the specified phy address.
895 * To read these register we have:
896 * 1) Write reg 13 // DEVAD
897 * 2) Write reg 14 // MMD Address
898 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
899 * 3) Read reg 14 // Read MMD data
900 */
901static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
902 int addr)
903{
a59a4d19
GC
904 mmd_phy_indirect(bus, prtad, devad, addr);
905
906 /* Read the content of the MMD's selected register */
e62a768f 907 return bus->read(bus, addr, MII_MMD_DATA);
a59a4d19
GC
908}
909
910/**
911 * phy_write_mmd_indirect - writes data to the MMD registers
912 * @bus: the target MII bus
913 * @prtad: MMD Address
914 * @devad: MMD DEVAD
915 * @addr: PHY address on the MII bus
916 * @data: data to write in the MMD register
917 *
918 * Description: Write data from the MMD registers of the specified
919 * phy address.
920 * To write these register we have:
921 * 1) Write reg 13 // DEVAD
922 * 2) Write reg 14 // MMD Address
923 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
924 * 3) Write reg 14 // Write MMD data
925 */
926static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
927 int addr, u32 data)
928{
929 mmd_phy_indirect(bus, prtad, devad, addr);
930
931 /* Write the data into MMD's selected register */
932 bus->write(bus, addr, MII_MMD_DATA, data);
933}
934
a59a4d19
GC
935/**
936 * phy_init_eee - init and check the EEE feature
937 * @phydev: target phy_device struct
938 * @clk_stop_enable: PHY may stop the clock during LPI
939 *
940 * Description: it checks if the Energy-Efficient Ethernet (EEE)
941 * is supported by looking at the MMD registers 3.20 and 7.60/61
942 * and it programs the MMD register 3.0 setting the "Clock stop enable"
943 * bit if required.
944 */
945int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
946{
a59a4d19
GC
947 /* According to 802.3az,the EEE is supported only in full duplex-mode.
948 * Also EEE feature is active when core is operating with MII, GMII
949 * or RGMII.
950 */
951 if ((phydev->duplex == DUPLEX_FULL) &&
952 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
953 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
954 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
955 int eee_lp, eee_cap, eee_adv;
956 u32 lp, cap, adv;
957 int idx, status;
958
959 /* Read phy status to properly get the right settings */
960 status = phy_read_status(phydev);
961 if (status)
962 return status;
963
964 /* First check if the EEE ability is supported */
965 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
966 MDIO_MMD_PCS, phydev->addr);
967 if (eee_cap < 0)
968 return eee_cap;
969
b32607dd 970 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 971 if (!cap)
e62a768f 972 return -EPROTONOSUPPORT;
a59a4d19
GC
973
974 /* Check which link settings negotiated and verify it in
975 * the EEE advertising registers.
976 */
977 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
978 MDIO_MMD_AN, phydev->addr);
979 if (eee_lp < 0)
980 return eee_lp;
981
982 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
983 MDIO_MMD_AN, phydev->addr);
984 if (eee_adv < 0)
985 return eee_adv;
986
b32607dd
AB
987 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
988 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19 989 idx = phy_find_setting(phydev->speed, phydev->duplex);
9a9c56cb 990 if (!(lp & adv & settings[idx].setting))
e62a768f 991 return -EPROTONOSUPPORT;
a59a4d19
GC
992
993 if (clk_stop_enable) {
994 /* Configure the PHY to stop receiving xMII
995 * clock while it is signaling LPI.
996 */
997 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
998 MDIO_MMD_PCS,
999 phydev->addr);
1000 if (val < 0)
1001 return val;
1002
1003 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1004 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1005 MDIO_MMD_PCS, phydev->addr, val);
1006 }
1007
e62a768f 1008 return 0; /* EEE supported */
a59a4d19
GC
1009 }
1010
e62a768f 1011 return -EPROTONOSUPPORT;
a59a4d19
GC
1012}
1013EXPORT_SYMBOL(phy_init_eee);
1014
1015/**
1016 * phy_get_eee_err - report the EEE wake error count
1017 * @phydev: target phy_device struct
1018 *
1019 * Description: it is to report the number of time where the PHY
1020 * failed to complete its normal wake sequence.
1021 */
1022int phy_get_eee_err(struct phy_device *phydev)
1023{
1024 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1025 MDIO_MMD_PCS, phydev->addr);
a59a4d19
GC
1026}
1027EXPORT_SYMBOL(phy_get_eee_err);
1028
1029/**
1030 * phy_ethtool_get_eee - get EEE supported and status
1031 * @phydev: target phy_device struct
1032 * @data: ethtool_eee data
1033 *
1034 * Description: it reportes the Supported/Advertisement/LP Advertisement
1035 * capabilities.
1036 */
1037int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1038{
1039 int val;
1040
1041 /* Get Supported EEE */
1042 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1043 MDIO_MMD_PCS, phydev->addr);
1044 if (val < 0)
1045 return val;
b32607dd 1046 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1047
1048 /* Get advertisement EEE */
1049 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1050 MDIO_MMD_AN, phydev->addr);
1051 if (val < 0)
1052 return val;
b32607dd 1053 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1054
1055 /* Get LP advertisement EEE */
1056 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1057 MDIO_MMD_AN, phydev->addr);
1058 if (val < 0)
1059 return val;
b32607dd 1060 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1061
1062 return 0;
1063}
1064EXPORT_SYMBOL(phy_ethtool_get_eee);
1065
1066/**
1067 * phy_ethtool_set_eee - set EEE supported and status
1068 * @phydev: target phy_device struct
1069 * @data: ethtool_eee data
1070 *
1071 * Description: it is to program the Advertisement EEE register.
1072 */
1073int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1074{
553fe92b 1075 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1076
a59a4d19
GC
1077 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1078 phydev->addr, val);
1079
1080 return 0;
1081}
1082EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1083
1084int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1085{
1086 if (phydev->drv->set_wol)
1087 return phydev->drv->set_wol(phydev, wol);
1088
1089 return -EOPNOTSUPP;
1090}
1091EXPORT_SYMBOL(phy_ethtool_set_wol);
1092
1093void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1094{
1095 if (phydev->drv->get_wol)
1096 phydev->drv->get_wol(phydev, wol);
1097}
1098EXPORT_SYMBOL(phy_ethtool_get_wol);
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