mdio: Move allocation of interrupts into core
[deliverable/linux.git] / drivers / net / phy / phy.c
CommitLineData
2f53e904 1/* Framework for configuring and reading PHY devices
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AF
2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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AF
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
8d242488
JP
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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AF
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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AF
27#include <linux/mm.h>
28#include <linux/module.h>
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AF
29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
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MR
32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
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SS
35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
766d1d38
FF
41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
3e2186e0
FF
61#define PHY_STATE_STR(_state) \
62 case PHY_##_state: \
63 return __stringify(_state); \
64
65static const char *phy_state_to_str(enum phy_state st)
66{
67 switch (st) {
68 PHY_STATE_STR(DOWN)
69 PHY_STATE_STR(STARTING)
70 PHY_STATE_STR(READY)
71 PHY_STATE_STR(PENDING)
72 PHY_STATE_STR(UP)
73 PHY_STATE_STR(AN)
74 PHY_STATE_STR(RUNNING)
75 PHY_STATE_STR(NOLINK)
76 PHY_STATE_STR(FORCING)
77 PHY_STATE_STR(CHANGELINK)
78 PHY_STATE_STR(HALTED)
79 PHY_STATE_STR(RESUMING)
80 }
81
82 return NULL;
83}
84
85
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RD
86/**
87 * phy_print_status - Convenience function to print out the current phy status
88 * @phydev: the phy_device struct
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AF
89 */
90void phy_print_status(struct phy_device *phydev)
91{
2f53e904 92 if (phydev->link) {
df40cc88 93 netdev_info(phydev->attached_dev,
766d1d38
FF
94 "Link is Up - %s/%s - flow control %s\n",
95 phy_speed_to_str(phydev->speed),
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FF
96 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
97 phydev->pause ? "rx/tx" : "off");
2f53e904 98 } else {
43b6329f 99 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 100 }
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AF
101}
102EXPORT_SYMBOL(phy_print_status);
00db8189 103
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104/**
105 * phy_clear_interrupt - Ack the phy device's interrupt
106 * @phydev: the phy_device struct
107 *
108 * If the @phydev driver has an ack_interrupt function, call it to
109 * ack and clear the phy device's interrupt.
110 *
ad033506 111 * Returns 0 on success or < 0 on error.
b3df0da8 112 */
89ff05ec 113static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 114{
00db8189 115 if (phydev->drv->ack_interrupt)
e62a768f 116 return phydev->drv->ack_interrupt(phydev);
00db8189 117
e62a768f 118 return 0;
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AF
119}
120
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RD
121/**
122 * phy_config_interrupt - configure the PHY device for the requested interrupts
123 * @phydev: the phy_device struct
124 * @interrupts: interrupt flags to configure for this @phydev
125 *
ad033506 126 * Returns 0 on success or < 0 on error.
b3df0da8 127 */
89ff05ec 128static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 129{
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AF
130 phydev->interrupts = interrupts;
131 if (phydev->drv->config_intr)
e62a768f 132 return phydev->drv->config_intr(phydev);
00db8189 133
e62a768f 134 return 0;
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AF
135}
136
137
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RD
138/**
139 * phy_aneg_done - return auto-negotiation status
140 * @phydev: target phy_device struct
00db8189 141 *
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FF
142 * Description: Return the auto-negotiation status from this @phydev
143 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
144 * is still pending.
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145 */
146static inline int phy_aneg_done(struct phy_device *phydev)
147{
76a423a3
FF
148 if (phydev->drv->aneg_done)
149 return phydev->drv->aneg_done(phydev);
150
a9fa6e6a 151 return genphy_aneg_done(phydev);
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152}
153
00db8189 154/* A structure for mapping a particular speed and duplex
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SS
155 * combination to a particular SUPPORTED and ADVERTISED value
156 */
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157struct phy_setting {
158 int speed;
159 int duplex;
160 u32 setting;
161};
162
163/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 164static const struct phy_setting settings[] = {
00db8189 165 {
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LT
166 .speed = SPEED_10000,
167 .duplex = DUPLEX_FULL,
168 .setting = SUPPORTED_10000baseKR_Full,
169 },
170 {
171 .speed = SPEED_10000,
172 .duplex = DUPLEX_FULL,
173 .setting = SUPPORTED_10000baseKX4_Full,
174 },
175 {
176 .speed = SPEED_10000,
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AF
177 .duplex = DUPLEX_FULL,
178 .setting = SUPPORTED_10000baseT_Full,
179 },
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LT
180 {
181 .speed = SPEED_2500,
182 .duplex = DUPLEX_FULL,
183 .setting = SUPPORTED_2500baseX_Full,
184 },
185 {
186 .speed = SPEED_1000,
187 .duplex = DUPLEX_FULL,
188 .setting = SUPPORTED_1000baseKX_Full,
189 },
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AF
190 {
191 .speed = SPEED_1000,
192 .duplex = DUPLEX_FULL,
193 .setting = SUPPORTED_1000baseT_Full,
194 },
195 {
196 .speed = SPEED_1000,
197 .duplex = DUPLEX_HALF,
198 .setting = SUPPORTED_1000baseT_Half,
199 },
200 {
201 .speed = SPEED_100,
202 .duplex = DUPLEX_FULL,
203 .setting = SUPPORTED_100baseT_Full,
204 },
205 {
206 .speed = SPEED_100,
207 .duplex = DUPLEX_HALF,
208 .setting = SUPPORTED_100baseT_Half,
209 },
210 {
211 .speed = SPEED_10,
212 .duplex = DUPLEX_FULL,
213 .setting = SUPPORTED_10baseT_Full,
214 },
215 {
216 .speed = SPEED_10,
217 .duplex = DUPLEX_HALF,
218 .setting = SUPPORTED_10baseT_Half,
219 },
220};
221
ff8ac609 222#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 223
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RD
224/**
225 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
226 * @speed: speed to match
227 * @duplex: duplex to match
00db8189 228 *
b3df0da8 229 * Description: Searches the settings array for the setting which
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AF
230 * matches the desired speed and duplex, and returns the index
231 * of that setting. Returns the index of the last setting if
232 * none of the others match.
233 */
4ae6e50c 234static inline unsigned int phy_find_setting(int speed, int duplex)
00db8189 235{
4ae6e50c 236 unsigned int idx = 0;
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237
238 while (idx < ARRAY_SIZE(settings) &&
2f53e904 239 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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240 idx++;
241
242 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
243}
244
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245/**
246 * phy_find_valid - find a PHY setting that matches the requested features mask
247 * @idx: The first index in settings[] to search
248 * @features: A mask of the valid settings
00db8189 249 *
b3df0da8 250 * Description: Returns the index of the first valid setting less
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AF
251 * than or equal to the one pointed to by idx, as determined by
252 * the mask in features. Returns the index of the last setting
253 * if nothing else matches.
254 */
4ae6e50c 255static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
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AF
256{
257 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
258 idx++;
259
260 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
261}
262
54da5a8b
GR
263/**
264 * phy_check_valid - check if there is a valid PHY setting which matches
265 * speed, duplex, and feature mask
266 * @speed: speed to match
267 * @duplex: duplex to match
268 * @features: A mask of the valid settings
269 *
270 * Description: Returns true if there is a valid setting, false otherwise.
271 */
272static inline bool phy_check_valid(int speed, int duplex, u32 features)
273{
274 unsigned int idx;
275
276 idx = phy_find_valid(phy_find_setting(speed, duplex), features);
277
278 return settings[idx].speed == speed && settings[idx].duplex == duplex &&
279 (settings[idx].setting & features);
280}
281
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RD
282/**
283 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
284 * @phydev: the target phy_device struct
00db8189 285 *
b3df0da8 286 * Description: Make sure the PHY is set to supported speeds and
00db8189 287 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 288 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 289 */
89ff05ec 290static void phy_sanitize_settings(struct phy_device *phydev)
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AF
291{
292 u32 features = phydev->supported;
4ae6e50c 293 unsigned int idx;
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294
295 /* Sanitize settings based on PHY capabilities */
296 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 297 phydev->autoneg = AUTONEG_DISABLE;
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AF
298
299 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
300 features);
301
302 phydev->speed = settings[idx].speed;
303 phydev->duplex = settings[idx].duplex;
304}
00db8189 305
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306/**
307 * phy_ethtool_sset - generic ethtool sset function, handles all the details
308 * @phydev: target phy_device struct
309 * @cmd: ethtool_cmd
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310 *
311 * A few notes about parameter checking:
312 * - We don't set port or transceiver, so we don't care what they
313 * were set to.
314 * - phy_start_aneg() will make sure forced settings are sane, and
315 * choose the next best ones from the ones selected, so we don't
b3df0da8 316 * care if ethtool tries to give us bad values.
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AF
317 */
318int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
319{
25db0338
DD
320 u32 speed = ethtool_cmd_speed(cmd);
321
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AF
322 if (cmd->phy_address != phydev->addr)
323 return -EINVAL;
324
2f53e904 325 /* We make sure that we don't pass unsupported values in to the PHY */
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326 cmd->advertising &= phydev->supported;
327
328 /* Verify the settings we care about. */
329 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
330 return -EINVAL;
331
332 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
333 return -EINVAL;
334
8e95a202 335 if (cmd->autoneg == AUTONEG_DISABLE &&
25db0338
DD
336 ((speed != SPEED_1000 &&
337 speed != SPEED_100 &&
338 speed != SPEED_10) ||
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JP
339 (cmd->duplex != DUPLEX_HALF &&
340 cmd->duplex != DUPLEX_FULL)))
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AF
341 return -EINVAL;
342
343 phydev->autoneg = cmd->autoneg;
344
25db0338 345 phydev->speed = speed;
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AF
346
347 phydev->advertising = cmd->advertising;
348
349 if (AUTONEG_ENABLE == cmd->autoneg)
350 phydev->advertising |= ADVERTISED_Autoneg;
351 else
352 phydev->advertising &= ~ADVERTISED_Autoneg;
353
354 phydev->duplex = cmd->duplex;
355
634ec36c
DT
356 phydev->mdix = cmd->eth_tp_mdix_ctrl;
357
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AF
358 /* Restart the PHY */
359 phy_start_aneg(phydev);
360
361 return 0;
362}
9f6d55d0 363EXPORT_SYMBOL(phy_ethtool_sset);
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AF
364
365int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
366{
367 cmd->supported = phydev->supported;
368
369 cmd->advertising = phydev->advertising;
114002bc 370 cmd->lp_advertising = phydev->lp_advertising;
00db8189 371
70739497 372 ethtool_cmd_speed_set(cmd, phydev->speed);
00db8189 373 cmd->duplex = phydev->duplex;
c88838ce
FF
374 if (phydev->interface == PHY_INTERFACE_MODE_MOCA)
375 cmd->port = PORT_BNC;
376 else
377 cmd->port = PORT_MII;
00db8189 378 cmd->phy_address = phydev->addr;
4284b6a5
FF
379 cmd->transceiver = phy_is_internal(phydev) ?
380 XCVR_INTERNAL : XCVR_EXTERNAL;
00db8189 381 cmd->autoneg = phydev->autoneg;
239aa55b 382 cmd->eth_tp_mdix_ctrl = phydev->mdix;
00db8189
AF
383
384 return 0;
385}
9f6d55d0 386EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 387
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RD
388/**
389 * phy_mii_ioctl - generic PHY MII ioctl interface
390 * @phydev: the phy_device struct
00c7d920 391 * @ifr: &struct ifreq for socket ioctl's
b3df0da8
RD
392 * @cmd: ioctl cmd to execute
393 *
394 * Note that this function is currently incompatible with the
00db8189 395 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 396 * current state. Use at own risk.
00db8189 397 */
2f53e904 398int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 399{
28b04113 400 struct mii_ioctl_data *mii_data = if_mii(ifr);
00db8189 401 u16 val = mii_data->val_in;
79ce0477 402 bool change_autoneg = false;
00db8189
AF
403
404 switch (cmd) {
405 case SIOCGMIIPHY:
406 mii_data->phy_id = phydev->addr;
c6d6a511
LB
407 /* fall through */
408
00db8189 409 case SIOCGMIIREG:
af1dc13e
PK
410 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
411 mii_data->reg_num);
e62a768f 412 return 0;
00db8189
AF
413
414 case SIOCSMIIREG:
00db8189 415 if (mii_data->phy_id == phydev->addr) {
e109374f 416 switch (mii_data->reg_num) {
00db8189 417 case MII_BMCR:
79ce0477
BH
418 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0) {
419 if (phydev->autoneg == AUTONEG_ENABLE)
420 change_autoneg = true;
00db8189 421 phydev->autoneg = AUTONEG_DISABLE;
79ce0477
BH
422 if (val & BMCR_FULLDPLX)
423 phydev->duplex = DUPLEX_FULL;
424 else
425 phydev->duplex = DUPLEX_HALF;
426 if (val & BMCR_SPEED1000)
427 phydev->speed = SPEED_1000;
428 else if (val & BMCR_SPEED100)
429 phydev->speed = SPEED_100;
430 else phydev->speed = SPEED_10;
431 }
432 else {
433 if (phydev->autoneg == AUTONEG_DISABLE)
434 change_autoneg = true;
00db8189 435 phydev->autoneg = AUTONEG_ENABLE;
79ce0477 436 }
00db8189
AF
437 break;
438 case MII_ADVERTISE:
79ce0477
BH
439 phydev->advertising = mii_adv_to_ethtool_adv_t(val);
440 change_autoneg = true;
00db8189
AF
441 break;
442 default:
443 /* do nothing */
444 break;
445 }
446 }
447
af1dc13e
PK
448 mdiobus_write(phydev->bus, mii_data->phy_id,
449 mii_data->reg_num, val);
450
cf18b778
JP
451 if (mii_data->phy_id == phydev->addr &&
452 mii_data->reg_num == MII_BMCR &&
2613f95f 453 val & BMCR_RESET)
e62a768f 454 return phy_init_hw(phydev);
79ce0477
BH
455
456 if (change_autoneg)
457 return phy_start_aneg(phydev);
458
e62a768f 459 return 0;
dda93b48 460
c1f19b51
RC
461 case SIOCSHWTSTAMP:
462 if (phydev->drv->hwtstamp)
463 return phydev->drv->hwtstamp(phydev, ifr);
464 /* fall through */
465
dda93b48 466 default:
c6d6a511 467 return -EOPNOTSUPP;
00db8189 468 }
00db8189 469}
680e9fe9 470EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 471
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RD
472/**
473 * phy_start_aneg - start auto-negotiation for this PHY device
474 * @phydev: the phy_device struct
e1393456 475 *
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RD
476 * Description: Sanitizes the settings (if we're not autonegotiating
477 * them), and then calls the driver's config_aneg function.
478 * If the PHYCONTROL Layer is operating, we change the state to
479 * reflect the beginning of Auto-negotiation or forcing.
e1393456
AF
480 */
481int phy_start_aneg(struct phy_device *phydev)
482{
483 int err;
484
35b5f6b1 485 mutex_lock(&phydev->lock);
e1393456
AF
486
487 if (AUTONEG_DISABLE == phydev->autoneg)
488 phy_sanitize_settings(phydev);
489
9b3320ef
BH
490 /* Invalidate LP advertising flags */
491 phydev->lp_advertising = 0;
492
e1393456 493 err = phydev->drv->config_aneg(phydev);
e1393456
AF
494 if (err < 0)
495 goto out_unlock;
496
497 if (phydev->state != PHY_HALTED) {
498 if (AUTONEG_ENABLE == phydev->autoneg) {
499 phydev->state = PHY_AN;
500 phydev->link_timeout = PHY_AN_TIMEOUT;
501 } else {
502 phydev->state = PHY_FORCING;
503 phydev->link_timeout = PHY_FORCE_TIMEOUT;
504 }
505 }
506
507out_unlock:
35b5f6b1 508 mutex_unlock(&phydev->lock);
e1393456
AF
509 return err;
510}
511EXPORT_SYMBOL(phy_start_aneg);
512
b3df0da8
RD
513/**
514 * phy_start_machine - start PHY state machine tracking
515 * @phydev: the phy_device struct
00db8189 516 *
b3df0da8 517 * Description: The PHY infrastructure can run a state machine
00db8189
AF
518 * which tracks whether the PHY is starting up, negotiating,
519 * etc. This function starts the timer which tracks the state
29935aeb
SS
520 * of the PHY. If you want to maintain your own state machine,
521 * do not call this function.
b3df0da8 522 */
29935aeb 523void phy_start_machine(struct phy_device *phydev)
00db8189 524{
bbb47bde 525 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
00db8189
AF
526}
527
b3df0da8
RD
528/**
529 * phy_stop_machine - stop the PHY state machine tracking
530 * @phydev: target phy_device struct
00db8189 531 *
b3df0da8 532 * Description: Stops the state machine timer, sets the state to UP
817acf5e 533 * (unless it wasn't up yet). This function must be called BEFORE
00db8189
AF
534 * phy_detach.
535 */
536void phy_stop_machine(struct phy_device *phydev)
537{
a390d1f3 538 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 539
35b5f6b1 540 mutex_lock(&phydev->lock);
00db8189
AF
541 if (phydev->state > PHY_UP)
542 phydev->state = PHY_UP;
35b5f6b1 543 mutex_unlock(&phydev->lock);
00db8189
AF
544}
545
b3df0da8
RD
546/**
547 * phy_error - enter HALTED state for this PHY device
548 * @phydev: target phy_device struct
00db8189
AF
549 *
550 * Moves the PHY to the HALTED state in response to a read
551 * or write error, and tells the controller the link is down.
552 * Must not be called from interrupt context, or while the
553 * phydev->lock is held.
554 */
9b9a8bfc 555static void phy_error(struct phy_device *phydev)
00db8189 556{
35b5f6b1 557 mutex_lock(&phydev->lock);
00db8189 558 phydev->state = PHY_HALTED;
35b5f6b1 559 mutex_unlock(&phydev->lock);
00db8189
AF
560}
561
b3df0da8
RD
562/**
563 * phy_interrupt - PHY interrupt handler
564 * @irq: interrupt line
565 * @phy_dat: phy_device pointer
e1393456 566 *
b3df0da8 567 * Description: When a PHY interrupt occurs, the handler disables
e1393456
AF
568 * interrupts, and schedules a work task to clear the interrupt.
569 */
7d12e780 570static irqreturn_t phy_interrupt(int irq, void *phy_dat)
e1393456
AF
571{
572 struct phy_device *phydev = phy_dat;
573
3c3070d7
MR
574 if (PHY_HALTED == phydev->state)
575 return IRQ_NONE; /* It can't be ours. */
576
e1393456
AF
577 /* The MDIO bus is not allowed to be written in interrupt
578 * context, so we need to disable the irq here. A work
579 * queue will write the PHY to disable and clear the
2f53e904
SS
580 * interrupt, and then reenable the irq line.
581 */
e1393456 582 disable_irq_nosync(irq);
0ac49527 583 atomic_inc(&phydev->irq_disable);
e1393456 584
bbb47bde 585 queue_work(system_power_efficient_wq, &phydev->phy_queue);
e1393456
AF
586
587 return IRQ_HANDLED;
588}
589
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RD
590/**
591 * phy_enable_interrupts - Enable the interrupts from the PHY side
592 * @phydev: target phy_device struct
593 */
89ff05ec 594static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 595{
553fe92b 596 int err = phy_clear_interrupt(phydev);
00db8189 597
e1393456
AF
598 if (err < 0)
599 return err;
00db8189 600
553fe92b 601 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 602}
00db8189 603
b3df0da8
RD
604/**
605 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
606 * @phydev: target phy_device struct
607 */
89ff05ec 608static int phy_disable_interrupts(struct phy_device *phydev)
00db8189
AF
609{
610 int err;
611
612 /* Disable PHY interrupts */
613 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
00db8189
AF
614 if (err)
615 goto phy_err;
616
617 /* Clear the interrupt */
618 err = phy_clear_interrupt(phydev);
00db8189
AF
619 if (err)
620 goto phy_err;
621
622 return 0;
623
624phy_err:
625 phy_error(phydev);
626
627 return err;
628}
e1393456 629
b3df0da8
RD
630/**
631 * phy_start_interrupts - request and enable interrupts for a PHY device
632 * @phydev: target phy_device struct
e1393456 633 *
b3df0da8
RD
634 * Description: Request the interrupt for the given PHY.
635 * If this fails, then we set irq to PHY_POLL.
e1393456 636 * Otherwise, we enable the interrupts in the PHY.
e1393456 637 * This should only be called with a valid IRQ number.
b3df0da8 638 * Returns 0 on success or < 0 on error.
e1393456
AF
639 */
640int phy_start_interrupts(struct phy_device *phydev)
641{
0ac49527 642 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
643 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
644 phydev) < 0) {
8d242488
JP
645 pr_warn("%s: Can't get IRQ %d (PHY)\n",
646 phydev->bus->name, phydev->irq);
e1393456
AF
647 phydev->irq = PHY_POLL;
648 return 0;
649 }
650
e62a768f 651 return phy_enable_interrupts(phydev);
e1393456
AF
652}
653EXPORT_SYMBOL(phy_start_interrupts);
654
b3df0da8
RD
655/**
656 * phy_stop_interrupts - disable interrupts from a PHY device
657 * @phydev: target phy_device struct
658 */
e1393456
AF
659int phy_stop_interrupts(struct phy_device *phydev)
660{
553fe92b 661 int err = phy_disable_interrupts(phydev);
e1393456
AF
662
663 if (err)
664 phy_error(phydev);
665
0ac49527
MR
666 free_irq(phydev->irq, phydev);
667
2f53e904 668 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
669 * of rtnl_lock(), but we do not really care about what would
670 * be done, except from enable_irq(), so cancel any work
671 * possibly pending and take care of the matter below.
3c3070d7 672 */
28e53bdd 673 cancel_work_sync(&phydev->phy_queue);
2f53e904 674 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
675 * been left unbalanced from phy_interrupt() and enable_irq()
676 * has to be called so that other devices on the line work.
677 */
678 while (atomic_dec_return(&phydev->irq_disable) >= 0)
679 enable_irq(phydev->irq);
e1393456
AF
680
681 return err;
682}
683EXPORT_SYMBOL(phy_stop_interrupts);
684
b3df0da8
RD
685/**
686 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
687 * @work: work_struct that describes the work to be done
688 */
5ea94e76 689void phy_change(struct work_struct *work)
e1393456 690{
c4028958
DH
691 struct phy_device *phydev =
692 container_of(work, struct phy_device, phy_queue);
e1393456 693
a8729eb3
AG
694 if (phydev->drv->did_interrupt &&
695 !phydev->drv->did_interrupt(phydev))
696 goto ignore;
697
e62a768f 698 if (phy_disable_interrupts(phydev))
e1393456
AF
699 goto phy_err;
700
35b5f6b1 701 mutex_lock(&phydev->lock);
e1393456
AF
702 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
703 phydev->state = PHY_CHANGELINK;
35b5f6b1 704 mutex_unlock(&phydev->lock);
e1393456 705
0ac49527 706 atomic_dec(&phydev->irq_disable);
e1393456
AF
707 enable_irq(phydev->irq);
708
709 /* Reenable interrupts */
e62a768f
SS
710 if (PHY_HALTED != phydev->state &&
711 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
712 goto irq_enable_err;
713
a390d1f3
MS
714 /* reschedule state queue work to run as soon as possible */
715 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 716 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
717 return;
718
a8729eb3
AG
719ignore:
720 atomic_dec(&phydev->irq_disable);
721 enable_irq(phydev->irq);
722 return;
723
e1393456
AF
724irq_enable_err:
725 disable_irq(phydev->irq);
0ac49527 726 atomic_inc(&phydev->irq_disable);
e1393456
AF
727phy_err:
728 phy_error(phydev);
729}
730
b3df0da8
RD
731/**
732 * phy_stop - Bring down the PHY link, and stop checking the status
733 * @phydev: target phy_device struct
734 */
e1393456
AF
735void phy_stop(struct phy_device *phydev)
736{
35b5f6b1 737 mutex_lock(&phydev->lock);
e1393456
AF
738
739 if (PHY_HALTED == phydev->state)
740 goto out_unlock;
741
2c7b4921 742 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
743 /* Disable PHY Interrupts */
744 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 745
3c3070d7
MR
746 /* Clear any pending interrupts */
747 phy_clear_interrupt(phydev);
748 }
e1393456 749
6daf6531
MR
750 phydev->state = PHY_HALTED;
751
e1393456 752out_unlock:
35b5f6b1 753 mutex_unlock(&phydev->lock);
3c3070d7 754
2f53e904 755 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
756 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
757 * will not reenable interrupts.
758 */
e1393456 759}
2f53e904 760EXPORT_SYMBOL(phy_stop);
e1393456 761
b3df0da8
RD
762/**
763 * phy_start - start or restart a PHY device
764 * @phydev: target phy_device struct
e1393456 765 *
b3df0da8 766 * Description: Indicates the attached device's readiness to
e1393456
AF
767 * handle PHY-related work. Used during startup to start the
768 * PHY, and after a call to phy_stop() to resume operation.
769 * Also used to indicate the MDIO bus has cleared an error
770 * condition.
771 */
772void phy_start(struct phy_device *phydev)
773{
c15e10e7
TB
774 bool do_resume = false;
775 int err = 0;
776
35b5f6b1 777 mutex_lock(&phydev->lock);
e1393456
AF
778
779 switch (phydev->state) {
e109374f
FF
780 case PHY_STARTING:
781 phydev->state = PHY_PENDING;
782 break;
783 case PHY_READY:
784 phydev->state = PHY_UP;
785 break;
786 case PHY_HALTED:
c15e10e7
TB
787 /* make sure interrupts are re-enabled for the PHY */
788 err = phy_enable_interrupts(phydev);
789 if (err < 0)
790 break;
791
e109374f 792 phydev->state = PHY_RESUMING;
c15e10e7
TB
793 do_resume = true;
794 break;
e109374f
FF
795 default:
796 break;
e1393456 797 }
35b5f6b1 798 mutex_unlock(&phydev->lock);
c15e10e7
TB
799
800 /* if phy was suspended, bring the physical link up again */
801 if (do_resume)
802 phy_resume(phydev);
e1393456 803}
e1393456 804EXPORT_SYMBOL(phy_start);
67c4f3fa 805
35b5f6b1
NC
806/**
807 * phy_state_machine - Handle the state machine
808 * @work: work_struct that describes the work to be done
35b5f6b1 809 */
4f9c85a1 810void phy_state_machine(struct work_struct *work)
00db8189 811{
bf6aede7 812 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 813 struct phy_device *phydev =
a390d1f3 814 container_of(dwork, struct phy_device, state_queue);
c15e10e7 815 bool needs_aneg = false, do_suspend = false;
3e2186e0 816 enum phy_state old_state;
00db8189 817 int err = 0;
11e122cb 818 int old_link;
00db8189 819
35b5f6b1 820 mutex_lock(&phydev->lock);
00db8189 821
3e2186e0
FF
822 old_state = phydev->state;
823
2b8f2a28
DM
824 if (phydev->drv->link_change_notify)
825 phydev->drv->link_change_notify(phydev);
826
e109374f
FF
827 switch (phydev->state) {
828 case PHY_DOWN:
829 case PHY_STARTING:
830 case PHY_READY:
831 case PHY_PENDING:
832 break;
833 case PHY_UP:
6e14a5ee 834 needs_aneg = true;
00db8189 835
e109374f
FF
836 phydev->link_timeout = PHY_AN_TIMEOUT;
837
838 break;
839 case PHY_AN:
840 err = phy_read_status(phydev);
e109374f 841 if (err < 0)
00db8189 842 break;
6b655529 843
2f53e904 844 /* If the link is down, give up on negotiation for now */
e109374f
FF
845 if (!phydev->link) {
846 phydev->state = PHY_NOLINK;
847 netif_carrier_off(phydev->attached_dev);
848 phydev->adjust_link(phydev->attached_dev);
849 break;
850 }
6b655529 851
2f53e904 852 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
853 err = phy_aneg_done(phydev);
854 if (err < 0)
855 break;
6b655529 856
e109374f
FF
857 /* If AN is done, we're running */
858 if (err > 0) {
859 phydev->state = PHY_RUNNING;
860 netif_carrier_on(phydev->attached_dev);
861 phydev->adjust_link(phydev->attached_dev);
00db8189 862
fa8cddaf 863 } else if (0 == phydev->link_timeout--)
6e14a5ee 864 needs_aneg = true;
e109374f
FF
865 break;
866 case PHY_NOLINK:
321beec5
AL
867 if (phy_interrupt_is_valid(phydev))
868 break;
869
e109374f 870 err = phy_read_status(phydev);
e109374f 871 if (err)
00db8189 872 break;
00db8189 873
e109374f 874 if (phydev->link) {
e46e08b8
BK
875 if (AUTONEG_ENABLE == phydev->autoneg) {
876 err = phy_aneg_done(phydev);
877 if (err < 0)
878 break;
879
880 if (!err) {
881 phydev->state = PHY_AN;
882 phydev->link_timeout = PHY_AN_TIMEOUT;
883 break;
884 }
885 }
e109374f
FF
886 phydev->state = PHY_RUNNING;
887 netif_carrier_on(phydev->attached_dev);
888 phydev->adjust_link(phydev->attached_dev);
889 }
890 break;
891 case PHY_FORCING:
892 err = genphy_update_link(phydev);
e109374f 893 if (err)
00db8189 894 break;
00db8189 895
e109374f
FF
896 if (phydev->link) {
897 phydev->state = PHY_RUNNING;
898 netif_carrier_on(phydev->attached_dev);
899 } else {
900 if (0 == phydev->link_timeout--)
6e14a5ee 901 needs_aneg = true;
e109374f 902 }
00db8189 903
e109374f
FF
904 phydev->adjust_link(phydev->attached_dev);
905 break;
906 case PHY_RUNNING:
11e122cb
SX
907 /* Only register a CHANGE if we are polling or ignoring
908 * interrupts and link changed since latest checking.
e109374f 909 */
11e122cb
SX
910 if (!phy_interrupt_is_valid(phydev)) {
911 old_link = phydev->link;
912 err = phy_read_status(phydev);
913 if (err)
914 break;
915
916 if (old_link != phydev->link)
917 phydev->state = PHY_CHANGELINK;
918 }
e109374f
FF
919 break;
920 case PHY_CHANGELINK:
921 err = phy_read_status(phydev);
e109374f 922 if (err)
00db8189 923 break;
00db8189 924
e109374f
FF
925 if (phydev->link) {
926 phydev->state = PHY_RUNNING;
927 netif_carrier_on(phydev->attached_dev);
928 } else {
929 phydev->state = PHY_NOLINK;
930 netif_carrier_off(phydev->attached_dev);
931 }
00db8189 932
e109374f 933 phydev->adjust_link(phydev->attached_dev);
00db8189 934
e109374f
FF
935 if (phy_interrupt_is_valid(phydev))
936 err = phy_config_interrupt(phydev,
2f53e904 937 PHY_INTERRUPT_ENABLED);
e109374f
FF
938 break;
939 case PHY_HALTED:
940 if (phydev->link) {
941 phydev->link = 0;
942 netif_carrier_off(phydev->attached_dev);
00db8189 943 phydev->adjust_link(phydev->attached_dev);
6e14a5ee 944 do_suspend = true;
e109374f
FF
945 }
946 break;
947 case PHY_RESUMING:
e109374f
FF
948 if (AUTONEG_ENABLE == phydev->autoneg) {
949 err = phy_aneg_done(phydev);
950 if (err < 0)
00db8189
AF
951 break;
952
e109374f 953 /* err > 0 if AN is done.
2f53e904
SS
954 * Otherwise, it's 0, and we're still waiting for AN
955 */
e109374f 956 if (err > 0) {
42caa074
WF
957 err = phy_read_status(phydev);
958 if (err)
959 break;
960
961 if (phydev->link) {
962 phydev->state = PHY_RUNNING;
963 netif_carrier_on(phydev->attached_dev);
2f53e904 964 } else {
42caa074 965 phydev->state = PHY_NOLINK;
2f53e904 966 }
42caa074 967 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
968 } else {
969 phydev->state = PHY_AN;
970 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 971 }
e109374f
FF
972 } else {
973 err = phy_read_status(phydev);
974 if (err)
975 break;
976
977 if (phydev->link) {
978 phydev->state = PHY_RUNNING;
979 netif_carrier_on(phydev->attached_dev);
2f53e904 980 } else {
e109374f 981 phydev->state = PHY_NOLINK;
2f53e904 982 }
e109374f
FF
983 phydev->adjust_link(phydev->attached_dev);
984 }
985 break;
00db8189
AF
986 }
987
35b5f6b1 988 mutex_unlock(&phydev->lock);
00db8189
AF
989
990 if (needs_aneg)
991 err = phy_start_aneg(phydev);
6e14a5ee 992 else if (do_suspend)
be9dad1f
SH
993 phy_suspend(phydev);
994
00db8189
AF
995 if (err < 0)
996 phy_error(phydev);
997
72ba48be
AL
998 phydev_dbg(phydev, "PHY state change %s -> %s\n",
999 phy_state_to_str(old_state),
1000 phy_state_to_str(phydev->state));
3e2186e0 1001
bbb47bde 1002 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 1003 PHY_STATE_TIME * HZ);
35b5f6b1 1004}
a59a4d19 1005
5ea94e76
FF
1006void phy_mac_interrupt(struct phy_device *phydev, int new_link)
1007{
1008 cancel_work_sync(&phydev->phy_queue);
1009 phydev->link = new_link;
1010 schedule_work(&phydev->phy_queue);
1011}
1012EXPORT_SYMBOL(phy_mac_interrupt);
1013
a59a4d19
GC
1014static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
1015 int addr)
1016{
1017 /* Write the desired MMD Devad */
1018 bus->write(bus, addr, MII_MMD_CTRL, devad);
1019
1020 /* Write the desired MMD register address */
1021 bus->write(bus, addr, MII_MMD_DATA, prtad);
1022
1023 /* Select the Function : DATA with no post increment */
1024 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
1025}
1026
1027/**
1028 * phy_read_mmd_indirect - reads data from the MMD registers
0c1d77df 1029 * @phydev: The PHY device bus
a59a4d19
GC
1030 * @prtad: MMD Address
1031 * @devad: MMD DEVAD
a59a4d19
GC
1032 *
1033 * Description: it reads data from the MMD registers (clause 22 to access to
1034 * clause 45) of the specified phy address.
1035 * To read these register we have:
1036 * 1) Write reg 13 // DEVAD
1037 * 2) Write reg 14 // MMD Address
1038 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1039 * 3) Read reg 14 // Read MMD data
1040 */
053e7e16 1041int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
a59a4d19 1042{
0c1d77df 1043 struct phy_driver *phydrv = phydev->drv;
053e7e16 1044 int addr = phydev->addr;
0c1d77df 1045 int value = -1;
a59a4d19 1046
ef899c07 1047 if (!phydrv->read_mmd_indirect) {
05a7f582
RK
1048 struct mii_bus *bus = phydev->bus;
1049
1050 mutex_lock(&bus->mdio_lock);
1051 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1052
1053 /* Read the content of the MMD's selected register */
05a7f582
RK
1054 value = bus->read(bus, addr, MII_MMD_DATA);
1055 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1056 } else {
1057 value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr);
1058 }
1059 return value;
a59a4d19 1060}
66ce7fb9 1061EXPORT_SYMBOL(phy_read_mmd_indirect);
a59a4d19
GC
1062
1063/**
1064 * phy_write_mmd_indirect - writes data to the MMD registers
0c1d77df 1065 * @phydev: The PHY device
a59a4d19
GC
1066 * @prtad: MMD Address
1067 * @devad: MMD DEVAD
a59a4d19
GC
1068 * @data: data to write in the MMD register
1069 *
1070 * Description: Write data from the MMD registers of the specified
1071 * phy address.
1072 * To write these register we have:
1073 * 1) Write reg 13 // DEVAD
1074 * 2) Write reg 14 // MMD Address
1075 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
1076 * 3) Write reg 14 // Write MMD data
1077 */
66ce7fb9 1078void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,
053e7e16 1079 int devad, u32 data)
a59a4d19 1080{
0c1d77df 1081 struct phy_driver *phydrv = phydev->drv;
053e7e16 1082 int addr = phydev->addr;
a59a4d19 1083
ef899c07 1084 if (!phydrv->write_mmd_indirect) {
05a7f582
RK
1085 struct mii_bus *bus = phydev->bus;
1086
1087 mutex_lock(&bus->mdio_lock);
1088 mmd_phy_indirect(bus, prtad, devad, addr);
0c1d77df
VB
1089
1090 /* Write the data into MMD's selected register */
05a7f582
RK
1091 bus->write(bus, addr, MII_MMD_DATA, data);
1092 mutex_unlock(&bus->mdio_lock);
0c1d77df
VB
1093 } else {
1094 phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data);
1095 }
a59a4d19 1096}
66ce7fb9 1097EXPORT_SYMBOL(phy_write_mmd_indirect);
a59a4d19 1098
a59a4d19
GC
1099/**
1100 * phy_init_eee - init and check the EEE feature
1101 * @phydev: target phy_device struct
1102 * @clk_stop_enable: PHY may stop the clock during LPI
1103 *
1104 * Description: it checks if the Energy-Efficient Ethernet (EEE)
1105 * is supported by looking at the MMD registers 3.20 and 7.60/61
1106 * and it programs the MMD register 3.0 setting the "Clock stop enable"
1107 * bit if required.
1108 */
1109int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1110{
a59a4d19
GC
1111 /* According to 802.3az,the EEE is supported only in full duplex-mode.
1112 * Also EEE feature is active when core is operating with MII, GMII
7e140696
FF
1113 * or RGMII (all kinds). Internal PHYs are also allowed to proceed and
1114 * should return an error if they do not support EEE.
a59a4d19
GC
1115 */
1116 if ((phydev->duplex == DUPLEX_FULL) &&
1117 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
1118 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
32a64161 1119 phy_interface_is_rgmii(phydev) ||
a9f63095 1120 phy_is_internal(phydev))) {
a59a4d19
GC
1121 int eee_lp, eee_cap, eee_adv;
1122 u32 lp, cap, adv;
4ae6e50c 1123 int status;
a59a4d19
GC
1124
1125 /* Read phy status to properly get the right settings */
1126 status = phy_read_status(phydev);
1127 if (status)
1128 return status;
1129
1130 /* First check if the EEE ability is supported */
0c1d77df 1131 eee_cap = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE,
053e7e16 1132 MDIO_MMD_PCS);
7a4cecf7
GC
1133 if (eee_cap <= 0)
1134 goto eee_exit_err;
a59a4d19 1135
b32607dd 1136 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 1137 if (!cap)
7a4cecf7 1138 goto eee_exit_err;
a59a4d19
GC
1139
1140 /* Check which link settings negotiated and verify it in
1141 * the EEE advertising registers.
1142 */
0c1d77df 1143 eee_lp = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE,
053e7e16 1144 MDIO_MMD_AN);
7a4cecf7
GC
1145 if (eee_lp <= 0)
1146 goto eee_exit_err;
a59a4d19 1147
0c1d77df 1148 eee_adv = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV,
053e7e16 1149 MDIO_MMD_AN);
7a4cecf7
GC
1150 if (eee_adv <= 0)
1151 goto eee_exit_err;
a59a4d19 1152
b32607dd
AB
1153 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1154 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
54da5a8b 1155 if (!phy_check_valid(phydev->speed, phydev->duplex, lp & adv))
7a4cecf7 1156 goto eee_exit_err;
a59a4d19
GC
1157
1158 if (clk_stop_enable) {
1159 /* Configure the PHY to stop receiving xMII
1160 * clock while it is signaling LPI.
1161 */
0c1d77df 1162 int val = phy_read_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1163 MDIO_MMD_PCS);
a59a4d19
GC
1164 if (val < 0)
1165 return val;
1166
1167 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
0c1d77df 1168 phy_write_mmd_indirect(phydev, MDIO_CTRL1,
053e7e16 1169 MDIO_MMD_PCS, val);
a59a4d19
GC
1170 }
1171
e62a768f 1172 return 0; /* EEE supported */
a59a4d19 1173 }
7a4cecf7 1174eee_exit_err:
e62a768f 1175 return -EPROTONOSUPPORT;
a59a4d19
GC
1176}
1177EXPORT_SYMBOL(phy_init_eee);
1178
1179/**
1180 * phy_get_eee_err - report the EEE wake error count
1181 * @phydev: target phy_device struct
1182 *
1183 * Description: it is to report the number of time where the PHY
1184 * failed to complete its normal wake sequence.
1185 */
1186int phy_get_eee_err(struct phy_device *phydev)
1187{
053e7e16 1188 return phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_WK_ERR, MDIO_MMD_PCS);
a59a4d19
GC
1189}
1190EXPORT_SYMBOL(phy_get_eee_err);
1191
1192/**
1193 * phy_ethtool_get_eee - get EEE supported and status
1194 * @phydev: target phy_device struct
1195 * @data: ethtool_eee data
1196 *
1197 * Description: it reportes the Supported/Advertisement/LP Advertisement
1198 * capabilities.
1199 */
1200int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1201{
1202 int val;
1203
1204 /* Get Supported EEE */
053e7e16 1205 val = phy_read_mmd_indirect(phydev, MDIO_PCS_EEE_ABLE, MDIO_MMD_PCS);
a59a4d19
GC
1206 if (val < 0)
1207 return val;
b32607dd 1208 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
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GC
1209
1210 /* Get advertisement EEE */
053e7e16 1211 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN);
a59a4d19
GC
1212 if (val < 0)
1213 return val;
b32607dd 1214 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
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GC
1215
1216 /* Get LP advertisement EEE */
053e7e16 1217 val = phy_read_mmd_indirect(phydev, MDIO_AN_EEE_LPABLE, MDIO_MMD_AN);
a59a4d19
GC
1218 if (val < 0)
1219 return val;
b32607dd 1220 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1221
1222 return 0;
1223}
1224EXPORT_SYMBOL(phy_ethtool_get_eee);
1225
1226/**
1227 * phy_ethtool_set_eee - set EEE supported and status
1228 * @phydev: target phy_device struct
1229 * @data: ethtool_eee data
1230 *
1231 * Description: it is to program the Advertisement EEE register.
1232 */
1233int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1234{
553fe92b 1235 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1236
053e7e16 1237 phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN, val);
a59a4d19
GC
1238
1239 return 0;
1240}
1241EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1242
1243int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1244{
1245 if (phydev->drv->set_wol)
1246 return phydev->drv->set_wol(phydev, wol);
1247
1248 return -EOPNOTSUPP;
1249}
1250EXPORT_SYMBOL(phy_ethtool_set_wol);
1251
1252void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1253{
1254 if (phydev->drv->get_wol)
1255 phydev->drv->get_wol(phydev, wol);
1256}
1257EXPORT_SYMBOL(phy_ethtool_get_wol);
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