net: phy: add MoCA PHY type
[deliverable/linux.git] / drivers / net / phy / phy.c
CommitLineData
2f53e904 1/* Framework for configuring and reading PHY devices
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2 * Based on code in sungem_phy.c and gianfar_phy.c
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0ac49527 7 * Copyright (c) 2006, 2007 Maciej W. Rozycki
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8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
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15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
00db8189 18#include <linux/kernel.h>
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19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
00db8189 22#include <linux/interrupt.h>
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23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
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27#include <linux/mm.h>
28#include <linux/module.h>
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29#include <linux/mii.h>
30#include <linux/ethtool.h>
31#include <linux/phy.h>
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32#include <linux/timer.h>
33#include <linux/workqueue.h>
a59a4d19 34#include <linux/mdio.h>
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35#include <linux/io.h>
36#include <linux/uaccess.h>
60063497 37#include <linux/atomic.h>
2f53e904 38
00db8189 39#include <asm/irq.h>
00db8189 40
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41static const char *phy_speed_to_str(int speed)
42{
43 switch (speed) {
44 case SPEED_10:
45 return "10Mbps";
46 case SPEED_100:
47 return "100Mbps";
48 case SPEED_1000:
49 return "1Gbps";
50 case SPEED_2500:
51 return "2.5Gbps";
52 case SPEED_10000:
53 return "10Gbps";
54 case SPEED_UNKNOWN:
55 return "Unknown";
56 default:
57 return "Unsupported (update phy.c)";
58 }
59}
60
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61/**
62 * phy_print_status - Convenience function to print out the current phy status
63 * @phydev: the phy_device struct
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64 */
65void phy_print_status(struct phy_device *phydev)
66{
2f53e904 67 if (phydev->link) {
df40cc88 68 netdev_info(phydev->attached_dev,
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69 "Link is Up - %s/%s - flow control %s\n",
70 phy_speed_to_str(phydev->speed),
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71 DUPLEX_FULL == phydev->duplex ? "Full" : "Half",
72 phydev->pause ? "rx/tx" : "off");
2f53e904 73 } else {
43b6329f 74 netdev_info(phydev->attached_dev, "Link is Down\n");
2f53e904 75 }
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76}
77EXPORT_SYMBOL(phy_print_status);
00db8189 78
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79/**
80 * phy_clear_interrupt - Ack the phy device's interrupt
81 * @phydev: the phy_device struct
82 *
83 * If the @phydev driver has an ack_interrupt function, call it to
84 * ack and clear the phy device's interrupt.
85 *
ad033506 86 * Returns 0 on success or < 0 on error.
b3df0da8 87 */
89ff05ec 88static int phy_clear_interrupt(struct phy_device *phydev)
00db8189 89{
00db8189 90 if (phydev->drv->ack_interrupt)
e62a768f 91 return phydev->drv->ack_interrupt(phydev);
00db8189 92
e62a768f 93 return 0;
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94}
95
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96/**
97 * phy_config_interrupt - configure the PHY device for the requested interrupts
98 * @phydev: the phy_device struct
99 * @interrupts: interrupt flags to configure for this @phydev
100 *
ad033506 101 * Returns 0 on success or < 0 on error.
b3df0da8 102 */
89ff05ec 103static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts)
00db8189 104{
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105 phydev->interrupts = interrupts;
106 if (phydev->drv->config_intr)
e62a768f 107 return phydev->drv->config_intr(phydev);
00db8189 108
e62a768f 109 return 0;
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110}
111
112
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113/**
114 * phy_aneg_done - return auto-negotiation status
115 * @phydev: target phy_device struct
00db8189 116 *
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117 * Description: Return the auto-negotiation status from this @phydev
118 * Returns > 0 on success or < 0 on error. 0 means that auto-negotiation
119 * is still pending.
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120 */
121static inline int phy_aneg_done(struct phy_device *phydev)
122{
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123 if (phydev->drv->aneg_done)
124 return phydev->drv->aneg_done(phydev);
125
a9fa6e6a 126 return genphy_aneg_done(phydev);
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127}
128
00db8189 129/* A structure for mapping a particular speed and duplex
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130 * combination to a particular SUPPORTED and ADVERTISED value
131 */
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132struct phy_setting {
133 int speed;
134 int duplex;
135 u32 setting;
136};
137
138/* A mapping of all SUPPORTED settings to speed/duplex */
f71e1309 139static const struct phy_setting settings[] = {
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140 {
141 .speed = 10000,
142 .duplex = DUPLEX_FULL,
143 .setting = SUPPORTED_10000baseT_Full,
144 },
145 {
146 .speed = SPEED_1000,
147 .duplex = DUPLEX_FULL,
148 .setting = SUPPORTED_1000baseT_Full,
149 },
150 {
151 .speed = SPEED_1000,
152 .duplex = DUPLEX_HALF,
153 .setting = SUPPORTED_1000baseT_Half,
154 },
155 {
156 .speed = SPEED_100,
157 .duplex = DUPLEX_FULL,
158 .setting = SUPPORTED_100baseT_Full,
159 },
160 {
161 .speed = SPEED_100,
162 .duplex = DUPLEX_HALF,
163 .setting = SUPPORTED_100baseT_Half,
164 },
165 {
166 .speed = SPEED_10,
167 .duplex = DUPLEX_FULL,
168 .setting = SUPPORTED_10baseT_Full,
169 },
170 {
171 .speed = SPEED_10,
172 .duplex = DUPLEX_HALF,
173 .setting = SUPPORTED_10baseT_Half,
174 },
175};
176
ff8ac609 177#define MAX_NUM_SETTINGS ARRAY_SIZE(settings)
00db8189 178
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179/**
180 * phy_find_setting - find a PHY settings array entry that matches speed & duplex
181 * @speed: speed to match
182 * @duplex: duplex to match
00db8189 183 *
b3df0da8 184 * Description: Searches the settings array for the setting which
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AF
185 * matches the desired speed and duplex, and returns the index
186 * of that setting. Returns the index of the last setting if
187 * none of the others match.
188 */
189static inline int phy_find_setting(int speed, int duplex)
190{
191 int idx = 0;
192
193 while (idx < ARRAY_SIZE(settings) &&
2f53e904 194 (settings[idx].speed != speed || settings[idx].duplex != duplex))
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195 idx++;
196
197 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
198}
199
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200/**
201 * phy_find_valid - find a PHY setting that matches the requested features mask
202 * @idx: The first index in settings[] to search
203 * @features: A mask of the valid settings
00db8189 204 *
b3df0da8 205 * Description: Returns the index of the first valid setting less
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206 * than or equal to the one pointed to by idx, as determined by
207 * the mask in features. Returns the index of the last setting
208 * if nothing else matches.
209 */
210static inline int phy_find_valid(int idx, u32 features)
211{
212 while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features))
213 idx++;
214
215 return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
216}
217
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218/**
219 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
220 * @phydev: the target phy_device struct
00db8189 221 *
b3df0da8 222 * Description: Make sure the PHY is set to supported speeds and
00db8189 223 * duplexes. Drop down by one in this order: 1000/FULL,
b3df0da8 224 * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF.
00db8189 225 */
89ff05ec 226static void phy_sanitize_settings(struct phy_device *phydev)
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227{
228 u32 features = phydev->supported;
229 int idx;
230
231 /* Sanitize settings based on PHY capabilities */
232 if ((features & SUPPORTED_Autoneg) == 0)
163642a2 233 phydev->autoneg = AUTONEG_DISABLE;
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234
235 idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex),
236 features);
237
238 phydev->speed = settings[idx].speed;
239 phydev->duplex = settings[idx].duplex;
240}
00db8189 241
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242/**
243 * phy_ethtool_sset - generic ethtool sset function, handles all the details
244 * @phydev: target phy_device struct
245 * @cmd: ethtool_cmd
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246 *
247 * A few notes about parameter checking:
248 * - We don't set port or transceiver, so we don't care what they
249 * were set to.
250 * - phy_start_aneg() will make sure forced settings are sane, and
251 * choose the next best ones from the ones selected, so we don't
b3df0da8 252 * care if ethtool tries to give us bad values.
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253 */
254int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd)
255{
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256 u32 speed = ethtool_cmd_speed(cmd);
257
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258 if (cmd->phy_address != phydev->addr)
259 return -EINVAL;
260
2f53e904 261 /* We make sure that we don't pass unsupported values in to the PHY */
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262 cmd->advertising &= phydev->supported;
263
264 /* Verify the settings we care about. */
265 if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
266 return -EINVAL;
267
268 if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
269 return -EINVAL;
270
8e95a202 271 if (cmd->autoneg == AUTONEG_DISABLE &&
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272 ((speed != SPEED_1000 &&
273 speed != SPEED_100 &&
274 speed != SPEED_10) ||
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275 (cmd->duplex != DUPLEX_HALF &&
276 cmd->duplex != DUPLEX_FULL)))
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277 return -EINVAL;
278
279 phydev->autoneg = cmd->autoneg;
280
25db0338 281 phydev->speed = speed;
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282
283 phydev->advertising = cmd->advertising;
284
285 if (AUTONEG_ENABLE == cmd->autoneg)
286 phydev->advertising |= ADVERTISED_Autoneg;
287 else
288 phydev->advertising &= ~ADVERTISED_Autoneg;
289
290 phydev->duplex = cmd->duplex;
291
292 /* Restart the PHY */
293 phy_start_aneg(phydev);
294
295 return 0;
296}
9f6d55d0 297EXPORT_SYMBOL(phy_ethtool_sset);
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298
299int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd)
300{
301 cmd->supported = phydev->supported;
302
303 cmd->advertising = phydev->advertising;
114002bc 304 cmd->lp_advertising = phydev->lp_advertising;
00db8189 305
70739497 306 ethtool_cmd_speed_set(cmd, phydev->speed);
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307 cmd->duplex = phydev->duplex;
308 cmd->port = PORT_MII;
309 cmd->phy_address = phydev->addr;
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310 cmd->transceiver = phy_is_internal(phydev) ?
311 XCVR_INTERNAL : XCVR_EXTERNAL;
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312 cmd->autoneg = phydev->autoneg;
313
314 return 0;
315}
9f6d55d0 316EXPORT_SYMBOL(phy_ethtool_gset);
00db8189 317
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318/**
319 * phy_mii_ioctl - generic PHY MII ioctl interface
320 * @phydev: the phy_device struct
00c7d920 321 * @ifr: &struct ifreq for socket ioctl's
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322 * @cmd: ioctl cmd to execute
323 *
324 * Note that this function is currently incompatible with the
00db8189 325 * PHYCONTROL layer. It changes registers without regard to
b3df0da8 326 * current state. Use at own risk.
00db8189 327 */
2f53e904 328int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
00db8189 329{
28b04113 330 struct mii_ioctl_data *mii_data = if_mii(ifr);
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331 u16 val = mii_data->val_in;
332
333 switch (cmd) {
334 case SIOCGMIIPHY:
335 mii_data->phy_id = phydev->addr;
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336 /* fall through */
337
00db8189 338 case SIOCGMIIREG:
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339 mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
340 mii_data->reg_num);
e62a768f 341 return 0;
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342
343 case SIOCSMIIREG:
00db8189 344 if (mii_data->phy_id == phydev->addr) {
e109374f 345 switch (mii_data->reg_num) {
00db8189 346 case MII_BMCR:
2f53e904 347 if ((val & (BMCR_RESET | BMCR_ANENABLE)) == 0)
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348 phydev->autoneg = AUTONEG_DISABLE;
349 else
350 phydev->autoneg = AUTONEG_ENABLE;
2f53e904 351 if (!phydev->autoneg && (val & BMCR_FULLDPLX))
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352 phydev->duplex = DUPLEX_FULL;
353 else
354 phydev->duplex = DUPLEX_HALF;
2f53e904 355 if (!phydev->autoneg && (val & BMCR_SPEED1000))
024a0a3c 356 phydev->speed = SPEED_1000;
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357 else if (!phydev->autoneg &&
358 (val & BMCR_SPEED100))
024a0a3c 359 phydev->speed = SPEED_100;
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360 break;
361 case MII_ADVERTISE:
362 phydev->advertising = val;
363 break;
364 default:
365 /* do nothing */
366 break;
367 }
368 }
369
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370 mdiobus_write(phydev->bus, mii_data->phy_id,
371 mii_data->reg_num, val);
372
8e95a202 373 if (mii_data->reg_num == MII_BMCR &&
2613f95f 374 val & BMCR_RESET)
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SS
375 return phy_init_hw(phydev);
376 return 0;
dda93b48 377
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378 case SIOCSHWTSTAMP:
379 if (phydev->drv->hwtstamp)
380 return phydev->drv->hwtstamp(phydev, ifr);
381 /* fall through */
382
dda93b48 383 default:
c6d6a511 384 return -EOPNOTSUPP;
00db8189 385 }
00db8189 386}
680e9fe9 387EXPORT_SYMBOL(phy_mii_ioctl);
00db8189 388
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389/**
390 * phy_start_aneg - start auto-negotiation for this PHY device
391 * @phydev: the phy_device struct
e1393456 392 *
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393 * Description: Sanitizes the settings (if we're not autonegotiating
394 * them), and then calls the driver's config_aneg function.
395 * If the PHYCONTROL Layer is operating, we change the state to
396 * reflect the beginning of Auto-negotiation or forcing.
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397 */
398int phy_start_aneg(struct phy_device *phydev)
399{
400 int err;
401
35b5f6b1 402 mutex_lock(&phydev->lock);
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403
404 if (AUTONEG_DISABLE == phydev->autoneg)
405 phy_sanitize_settings(phydev);
406
407 err = phydev->drv->config_aneg(phydev);
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408 if (err < 0)
409 goto out_unlock;
410
411 if (phydev->state != PHY_HALTED) {
412 if (AUTONEG_ENABLE == phydev->autoneg) {
413 phydev->state = PHY_AN;
414 phydev->link_timeout = PHY_AN_TIMEOUT;
415 } else {
416 phydev->state = PHY_FORCING;
417 phydev->link_timeout = PHY_FORCE_TIMEOUT;
418 }
419 }
420
421out_unlock:
35b5f6b1 422 mutex_unlock(&phydev->lock);
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423 return err;
424}
425EXPORT_SYMBOL(phy_start_aneg);
426
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427/**
428 * phy_start_machine - start PHY state machine tracking
429 * @phydev: the phy_device struct
00db8189 430 *
b3df0da8 431 * Description: The PHY infrastructure can run a state machine
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AF
432 * which tracks whether the PHY is starting up, negotiating,
433 * etc. This function starts the timer which tracks the state
29935aeb
SS
434 * of the PHY. If you want to maintain your own state machine,
435 * do not call this function.
b3df0da8 436 */
29935aeb 437void phy_start_machine(struct phy_device *phydev)
00db8189 438{
bbb47bde 439 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
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AF
440}
441
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442/**
443 * phy_stop_machine - stop the PHY state machine tracking
444 * @phydev: target phy_device struct
00db8189 445 *
b3df0da8 446 * Description: Stops the state machine timer, sets the state to UP
817acf5e 447 * (unless it wasn't up yet). This function must be called BEFORE
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AF
448 * phy_detach.
449 */
450void phy_stop_machine(struct phy_device *phydev)
451{
a390d1f3 452 cancel_delayed_work_sync(&phydev->state_queue);
00db8189 453
35b5f6b1 454 mutex_lock(&phydev->lock);
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AF
455 if (phydev->state > PHY_UP)
456 phydev->state = PHY_UP;
35b5f6b1 457 mutex_unlock(&phydev->lock);
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458}
459
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460/**
461 * phy_error - enter HALTED state for this PHY device
462 * @phydev: target phy_device struct
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463 *
464 * Moves the PHY to the HALTED state in response to a read
465 * or write error, and tells the controller the link is down.
466 * Must not be called from interrupt context, or while the
467 * phydev->lock is held.
468 */
9b9a8bfc 469static void phy_error(struct phy_device *phydev)
00db8189 470{
35b5f6b1 471 mutex_lock(&phydev->lock);
00db8189 472 phydev->state = PHY_HALTED;
35b5f6b1 473 mutex_unlock(&phydev->lock);
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AF
474}
475
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476/**
477 * phy_interrupt - PHY interrupt handler
478 * @irq: interrupt line
479 * @phy_dat: phy_device pointer
e1393456 480 *
b3df0da8 481 * Description: When a PHY interrupt occurs, the handler disables
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482 * interrupts, and schedules a work task to clear the interrupt.
483 */
7d12e780 484static irqreturn_t phy_interrupt(int irq, void *phy_dat)
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485{
486 struct phy_device *phydev = phy_dat;
487
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MR
488 if (PHY_HALTED == phydev->state)
489 return IRQ_NONE; /* It can't be ours. */
490
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491 /* The MDIO bus is not allowed to be written in interrupt
492 * context, so we need to disable the irq here. A work
493 * queue will write the PHY to disable and clear the
2f53e904
SS
494 * interrupt, and then reenable the irq line.
495 */
e1393456 496 disable_irq_nosync(irq);
0ac49527 497 atomic_inc(&phydev->irq_disable);
e1393456 498
bbb47bde 499 queue_work(system_power_efficient_wq, &phydev->phy_queue);
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500
501 return IRQ_HANDLED;
502}
503
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504/**
505 * phy_enable_interrupts - Enable the interrupts from the PHY side
506 * @phydev: target phy_device struct
507 */
89ff05ec 508static int phy_enable_interrupts(struct phy_device *phydev)
00db8189 509{
553fe92b 510 int err = phy_clear_interrupt(phydev);
00db8189 511
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AF
512 if (err < 0)
513 return err;
00db8189 514
553fe92b 515 return phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
00db8189 516}
00db8189 517
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518/**
519 * phy_disable_interrupts - Disable the PHY interrupts from the PHY side
520 * @phydev: target phy_device struct
521 */
89ff05ec 522static int phy_disable_interrupts(struct phy_device *phydev)
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AF
523{
524 int err;
525
526 /* Disable PHY interrupts */
527 err = phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
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AF
528 if (err)
529 goto phy_err;
530
531 /* Clear the interrupt */
532 err = phy_clear_interrupt(phydev);
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AF
533 if (err)
534 goto phy_err;
535
536 return 0;
537
538phy_err:
539 phy_error(phydev);
540
541 return err;
542}
e1393456 543
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544/**
545 * phy_start_interrupts - request and enable interrupts for a PHY device
546 * @phydev: target phy_device struct
e1393456 547 *
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548 * Description: Request the interrupt for the given PHY.
549 * If this fails, then we set irq to PHY_POLL.
e1393456 550 * Otherwise, we enable the interrupts in the PHY.
e1393456 551 * This should only be called with a valid IRQ number.
b3df0da8 552 * Returns 0 on success or < 0 on error.
e1393456
AF
553 */
554int phy_start_interrupts(struct phy_device *phydev)
555{
0ac49527 556 atomic_set(&phydev->irq_disable, 0);
33c133cc
SS
557 if (request_irq(phydev->irq, phy_interrupt, 0, "phy_interrupt",
558 phydev) < 0) {
8d242488
JP
559 pr_warn("%s: Can't get IRQ %d (PHY)\n",
560 phydev->bus->name, phydev->irq);
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AF
561 phydev->irq = PHY_POLL;
562 return 0;
563 }
564
e62a768f 565 return phy_enable_interrupts(phydev);
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AF
566}
567EXPORT_SYMBOL(phy_start_interrupts);
568
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569/**
570 * phy_stop_interrupts - disable interrupts from a PHY device
571 * @phydev: target phy_device struct
572 */
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573int phy_stop_interrupts(struct phy_device *phydev)
574{
553fe92b 575 int err = phy_disable_interrupts(phydev);
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AF
576
577 if (err)
578 phy_error(phydev);
579
0ac49527
MR
580 free_irq(phydev->irq, phydev);
581
2f53e904 582 /* Cannot call flush_scheduled_work() here as desired because
0ac49527
MR
583 * of rtnl_lock(), but we do not really care about what would
584 * be done, except from enable_irq(), so cancel any work
585 * possibly pending and take care of the matter below.
3c3070d7 586 */
28e53bdd 587 cancel_work_sync(&phydev->phy_queue);
2f53e904 588 /* If work indeed has been cancelled, disable_irq() will have
0ac49527
MR
589 * been left unbalanced from phy_interrupt() and enable_irq()
590 * has to be called so that other devices on the line work.
591 */
592 while (atomic_dec_return(&phydev->irq_disable) >= 0)
593 enable_irq(phydev->irq);
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AF
594
595 return err;
596}
597EXPORT_SYMBOL(phy_stop_interrupts);
598
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599/**
600 * phy_change - Scheduled by the phy_interrupt/timer to handle PHY changes
601 * @work: work_struct that describes the work to be done
602 */
5ea94e76 603void phy_change(struct work_struct *work)
e1393456 604{
c4028958
DH
605 struct phy_device *phydev =
606 container_of(work, struct phy_device, phy_queue);
e1393456 607
a8729eb3
AG
608 if (phydev->drv->did_interrupt &&
609 !phydev->drv->did_interrupt(phydev))
610 goto ignore;
611
e62a768f 612 if (phy_disable_interrupts(phydev))
e1393456
AF
613 goto phy_err;
614
35b5f6b1 615 mutex_lock(&phydev->lock);
e1393456
AF
616 if ((PHY_RUNNING == phydev->state) || (PHY_NOLINK == phydev->state))
617 phydev->state = PHY_CHANGELINK;
35b5f6b1 618 mutex_unlock(&phydev->lock);
e1393456 619
0ac49527 620 atomic_dec(&phydev->irq_disable);
e1393456
AF
621 enable_irq(phydev->irq);
622
623 /* Reenable interrupts */
e62a768f
SS
624 if (PHY_HALTED != phydev->state &&
625 phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED))
e1393456
AF
626 goto irq_enable_err;
627
a390d1f3
MS
628 /* reschedule state queue work to run as soon as possible */
629 cancel_delayed_work_sync(&phydev->state_queue);
bbb47bde 630 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
e1393456
AF
631 return;
632
a8729eb3
AG
633ignore:
634 atomic_dec(&phydev->irq_disable);
635 enable_irq(phydev->irq);
636 return;
637
e1393456
AF
638irq_enable_err:
639 disable_irq(phydev->irq);
0ac49527 640 atomic_inc(&phydev->irq_disable);
e1393456
AF
641phy_err:
642 phy_error(phydev);
643}
644
b3df0da8
RD
645/**
646 * phy_stop - Bring down the PHY link, and stop checking the status
647 * @phydev: target phy_device struct
648 */
e1393456
AF
649void phy_stop(struct phy_device *phydev)
650{
35b5f6b1 651 mutex_lock(&phydev->lock);
e1393456
AF
652
653 if (PHY_HALTED == phydev->state)
654 goto out_unlock;
655
2c7b4921 656 if (phy_interrupt_is_valid(phydev)) {
e1393456
AF
657 /* Disable PHY Interrupts */
658 phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
e1393456 659
3c3070d7
MR
660 /* Clear any pending interrupts */
661 phy_clear_interrupt(phydev);
662 }
e1393456 663
6daf6531
MR
664 phydev->state = PHY_HALTED;
665
e1393456 666out_unlock:
35b5f6b1 667 mutex_unlock(&phydev->lock);
3c3070d7 668
2f53e904 669 /* Cannot call flush_scheduled_work() here as desired because
3c3070d7
MR
670 * of rtnl_lock(), but PHY_HALTED shall guarantee phy_change()
671 * will not reenable interrupts.
672 */
e1393456 673}
2f53e904 674EXPORT_SYMBOL(phy_stop);
e1393456 675
b3df0da8
RD
676/**
677 * phy_start - start or restart a PHY device
678 * @phydev: target phy_device struct
e1393456 679 *
b3df0da8 680 * Description: Indicates the attached device's readiness to
e1393456
AF
681 * handle PHY-related work. Used during startup to start the
682 * PHY, and after a call to phy_stop() to resume operation.
683 * Also used to indicate the MDIO bus has cleared an error
684 * condition.
685 */
686void phy_start(struct phy_device *phydev)
687{
35b5f6b1 688 mutex_lock(&phydev->lock);
e1393456
AF
689
690 switch (phydev->state) {
e109374f
FF
691 case PHY_STARTING:
692 phydev->state = PHY_PENDING;
693 break;
694 case PHY_READY:
695 phydev->state = PHY_UP;
696 break;
697 case PHY_HALTED:
698 phydev->state = PHY_RESUMING;
699 default:
700 break;
e1393456 701 }
35b5f6b1 702 mutex_unlock(&phydev->lock);
e1393456 703}
e1393456 704EXPORT_SYMBOL(phy_start);
67c4f3fa 705
35b5f6b1
NC
706/**
707 * phy_state_machine - Handle the state machine
708 * @work: work_struct that describes the work to be done
35b5f6b1 709 */
4f9c85a1 710void phy_state_machine(struct work_struct *work)
00db8189 711{
bf6aede7 712 struct delayed_work *dwork = to_delayed_work(work);
35b5f6b1 713 struct phy_device *phydev =
a390d1f3 714 container_of(dwork, struct phy_device, state_queue);
be9dad1f 715 int needs_aneg = 0, do_suspend = 0;
00db8189
AF
716 int err = 0;
717
35b5f6b1 718 mutex_lock(&phydev->lock);
00db8189 719
e109374f
FF
720 switch (phydev->state) {
721 case PHY_DOWN:
722 case PHY_STARTING:
723 case PHY_READY:
724 case PHY_PENDING:
725 break;
726 case PHY_UP:
727 needs_aneg = 1;
00db8189 728
e109374f
FF
729 phydev->link_timeout = PHY_AN_TIMEOUT;
730
731 break;
732 case PHY_AN:
733 err = phy_read_status(phydev);
e109374f 734 if (err < 0)
00db8189 735 break;
6b655529 736
2f53e904 737 /* If the link is down, give up on negotiation for now */
e109374f
FF
738 if (!phydev->link) {
739 phydev->state = PHY_NOLINK;
740 netif_carrier_off(phydev->attached_dev);
741 phydev->adjust_link(phydev->attached_dev);
742 break;
743 }
6b655529 744
2f53e904 745 /* Check if negotiation is done. Break if there's an error */
e109374f
FF
746 err = phy_aneg_done(phydev);
747 if (err < 0)
748 break;
6b655529 749
e109374f
FF
750 /* If AN is done, we're running */
751 if (err > 0) {
752 phydev->state = PHY_RUNNING;
753 netif_carrier_on(phydev->attached_dev);
754 phydev->adjust_link(phydev->attached_dev);
00db8189 755
e109374f
FF
756 } else if (0 == phydev->link_timeout--) {
757 needs_aneg = 1;
2f53e904 758 /* If we have the magic_aneg bit, we try again */
e109374f
FF
759 if (phydev->drv->flags & PHY_HAS_MAGICANEG)
760 break;
761 }
762 break;
763 case PHY_NOLINK:
764 err = phy_read_status(phydev);
e109374f 765 if (err)
00db8189 766 break;
00db8189 767
e109374f
FF
768 if (phydev->link) {
769 phydev->state = PHY_RUNNING;
770 netif_carrier_on(phydev->attached_dev);
771 phydev->adjust_link(phydev->attached_dev);
772 }
773 break;
774 case PHY_FORCING:
775 err = genphy_update_link(phydev);
e109374f 776 if (err)
00db8189 777 break;
00db8189 778
e109374f
FF
779 if (phydev->link) {
780 phydev->state = PHY_RUNNING;
781 netif_carrier_on(phydev->attached_dev);
782 } else {
783 if (0 == phydev->link_timeout--)
784 needs_aneg = 1;
785 }
00db8189 786
e109374f
FF
787 phydev->adjust_link(phydev->attached_dev);
788 break;
789 case PHY_RUNNING:
790 /* Only register a CHANGE if we are
791 * polling or ignoring interrupts
792 */
793 if (!phy_interrupt_is_valid(phydev))
794 phydev->state = PHY_CHANGELINK;
795 break;
796 case PHY_CHANGELINK:
797 err = phy_read_status(phydev);
e109374f 798 if (err)
00db8189 799 break;
00db8189 800
e109374f
FF
801 if (phydev->link) {
802 phydev->state = PHY_RUNNING;
803 netif_carrier_on(phydev->attached_dev);
804 } else {
805 phydev->state = PHY_NOLINK;
806 netif_carrier_off(phydev->attached_dev);
807 }
00db8189 808
e109374f 809 phydev->adjust_link(phydev->attached_dev);
00db8189 810
e109374f
FF
811 if (phy_interrupt_is_valid(phydev))
812 err = phy_config_interrupt(phydev,
2f53e904 813 PHY_INTERRUPT_ENABLED);
e109374f
FF
814 break;
815 case PHY_HALTED:
816 if (phydev->link) {
817 phydev->link = 0;
818 netif_carrier_off(phydev->attached_dev);
00db8189 819 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
820 do_suspend = 1;
821 }
822 break;
823 case PHY_RESUMING:
e109374f 824 err = phy_clear_interrupt(phydev);
e109374f
FF
825 if (err)
826 break;
00db8189 827
2f53e904 828 err = phy_config_interrupt(phydev, PHY_INTERRUPT_ENABLED);
e109374f
FF
829 if (err)
830 break;
00db8189 831
e109374f
FF
832 if (AUTONEG_ENABLE == phydev->autoneg) {
833 err = phy_aneg_done(phydev);
834 if (err < 0)
00db8189
AF
835 break;
836
e109374f 837 /* err > 0 if AN is done.
2f53e904
SS
838 * Otherwise, it's 0, and we're still waiting for AN
839 */
e109374f 840 if (err > 0) {
42caa074
WF
841 err = phy_read_status(phydev);
842 if (err)
843 break;
844
845 if (phydev->link) {
846 phydev->state = PHY_RUNNING;
847 netif_carrier_on(phydev->attached_dev);
2f53e904 848 } else {
42caa074 849 phydev->state = PHY_NOLINK;
2f53e904 850 }
42caa074 851 phydev->adjust_link(phydev->attached_dev);
e109374f
FF
852 } else {
853 phydev->state = PHY_AN;
854 phydev->link_timeout = PHY_AN_TIMEOUT;
42caa074 855 }
e109374f
FF
856 } else {
857 err = phy_read_status(phydev);
858 if (err)
859 break;
860
861 if (phydev->link) {
862 phydev->state = PHY_RUNNING;
863 netif_carrier_on(phydev->attached_dev);
2f53e904 864 } else {
e109374f 865 phydev->state = PHY_NOLINK;
2f53e904 866 }
e109374f
FF
867 phydev->adjust_link(phydev->attached_dev);
868 }
869 break;
00db8189
AF
870 }
871
35b5f6b1 872 mutex_unlock(&phydev->lock);
00db8189
AF
873
874 if (needs_aneg)
875 err = phy_start_aneg(phydev);
876
be9dad1f
SH
877 if (do_suspend)
878 phy_suspend(phydev);
879
00db8189
AF
880 if (err < 0)
881 phy_error(phydev);
882
bbb47bde 883 queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
2f53e904 884 PHY_STATE_TIME * HZ);
35b5f6b1 885}
a59a4d19 886
5ea94e76
FF
887void phy_mac_interrupt(struct phy_device *phydev, int new_link)
888{
889 cancel_work_sync(&phydev->phy_queue);
890 phydev->link = new_link;
891 schedule_work(&phydev->phy_queue);
892}
893EXPORT_SYMBOL(phy_mac_interrupt);
894
a59a4d19
GC
895static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
896 int addr)
897{
898 /* Write the desired MMD Devad */
899 bus->write(bus, addr, MII_MMD_CTRL, devad);
900
901 /* Write the desired MMD register address */
902 bus->write(bus, addr, MII_MMD_DATA, prtad);
903
904 /* Select the Function : DATA with no post increment */
905 bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
906}
907
908/**
909 * phy_read_mmd_indirect - reads data from the MMD registers
910 * @bus: the target MII bus
911 * @prtad: MMD Address
912 * @devad: MMD DEVAD
913 * @addr: PHY address on the MII bus
914 *
915 * Description: it reads data from the MMD registers (clause 22 to access to
916 * clause 45) of the specified phy address.
917 * To read these register we have:
918 * 1) Write reg 13 // DEVAD
919 * 2) Write reg 14 // MMD Address
920 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
921 * 3) Read reg 14 // Read MMD data
922 */
923static int phy_read_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
924 int addr)
925{
a59a4d19
GC
926 mmd_phy_indirect(bus, prtad, devad, addr);
927
928 /* Read the content of the MMD's selected register */
e62a768f 929 return bus->read(bus, addr, MII_MMD_DATA);
a59a4d19
GC
930}
931
932/**
933 * phy_write_mmd_indirect - writes data to the MMD registers
934 * @bus: the target MII bus
935 * @prtad: MMD Address
936 * @devad: MMD DEVAD
937 * @addr: PHY address on the MII bus
938 * @data: data to write in the MMD register
939 *
940 * Description: Write data from the MMD registers of the specified
941 * phy address.
942 * To write these register we have:
943 * 1) Write reg 13 // DEVAD
944 * 2) Write reg 14 // MMD Address
945 * 3) Write reg 13 // MMD Data Command for MMD DEVAD
946 * 3) Write reg 14 // Write MMD data
947 */
948static void phy_write_mmd_indirect(struct mii_bus *bus, int prtad, int devad,
949 int addr, u32 data)
950{
951 mmd_phy_indirect(bus, prtad, devad, addr);
952
953 /* Write the data into MMD's selected register */
954 bus->write(bus, addr, MII_MMD_DATA, data);
955}
956
a59a4d19
GC
957/**
958 * phy_init_eee - init and check the EEE feature
959 * @phydev: target phy_device struct
960 * @clk_stop_enable: PHY may stop the clock during LPI
961 *
962 * Description: it checks if the Energy-Efficient Ethernet (EEE)
963 * is supported by looking at the MMD registers 3.20 and 7.60/61
964 * and it programs the MMD register 3.0 setting the "Clock stop enable"
965 * bit if required.
966 */
967int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
968{
a59a4d19
GC
969 /* According to 802.3az,the EEE is supported only in full duplex-mode.
970 * Also EEE feature is active when core is operating with MII, GMII
971 * or RGMII.
972 */
973 if ((phydev->duplex == DUPLEX_FULL) &&
974 ((phydev->interface == PHY_INTERFACE_MODE_MII) ||
975 (phydev->interface == PHY_INTERFACE_MODE_GMII) ||
976 (phydev->interface == PHY_INTERFACE_MODE_RGMII))) {
977 int eee_lp, eee_cap, eee_adv;
978 u32 lp, cap, adv;
979 int idx, status;
980
981 /* Read phy status to properly get the right settings */
982 status = phy_read_status(phydev);
983 if (status)
984 return status;
985
986 /* First check if the EEE ability is supported */
987 eee_cap = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
988 MDIO_MMD_PCS, phydev->addr);
989 if (eee_cap < 0)
990 return eee_cap;
991
b32607dd 992 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
a59a4d19 993 if (!cap)
e62a768f 994 return -EPROTONOSUPPORT;
a59a4d19
GC
995
996 /* Check which link settings negotiated and verify it in
997 * the EEE advertising registers.
998 */
999 eee_lp = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1000 MDIO_MMD_AN, phydev->addr);
1001 if (eee_lp < 0)
1002 return eee_lp;
1003
1004 eee_adv = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1005 MDIO_MMD_AN, phydev->addr);
1006 if (eee_adv < 0)
1007 return eee_adv;
1008
b32607dd
AB
1009 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1010 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
a59a4d19 1011 idx = phy_find_setting(phydev->speed, phydev->duplex);
9a9c56cb 1012 if (!(lp & adv & settings[idx].setting))
e62a768f 1013 return -EPROTONOSUPPORT;
a59a4d19
GC
1014
1015 if (clk_stop_enable) {
1016 /* Configure the PHY to stop receiving xMII
1017 * clock while it is signaling LPI.
1018 */
1019 int val = phy_read_mmd_indirect(phydev->bus, MDIO_CTRL1,
1020 MDIO_MMD_PCS,
1021 phydev->addr);
1022 if (val < 0)
1023 return val;
1024
1025 val |= MDIO_PCS_CTRL1_CLKSTOP_EN;
1026 phy_write_mmd_indirect(phydev->bus, MDIO_CTRL1,
1027 MDIO_MMD_PCS, phydev->addr, val);
1028 }
1029
e62a768f 1030 return 0; /* EEE supported */
a59a4d19
GC
1031 }
1032
e62a768f 1033 return -EPROTONOSUPPORT;
a59a4d19
GC
1034}
1035EXPORT_SYMBOL(phy_init_eee);
1036
1037/**
1038 * phy_get_eee_err - report the EEE wake error count
1039 * @phydev: target phy_device struct
1040 *
1041 * Description: it is to report the number of time where the PHY
1042 * failed to complete its normal wake sequence.
1043 */
1044int phy_get_eee_err(struct phy_device *phydev)
1045{
1046 return phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_WK_ERR,
1047 MDIO_MMD_PCS, phydev->addr);
a59a4d19
GC
1048}
1049EXPORT_SYMBOL(phy_get_eee_err);
1050
1051/**
1052 * phy_ethtool_get_eee - get EEE supported and status
1053 * @phydev: target phy_device struct
1054 * @data: ethtool_eee data
1055 *
1056 * Description: it reportes the Supported/Advertisement/LP Advertisement
1057 * capabilities.
1058 */
1059int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data)
1060{
1061 int val;
1062
1063 /* Get Supported EEE */
1064 val = phy_read_mmd_indirect(phydev->bus, MDIO_PCS_EEE_ABLE,
1065 MDIO_MMD_PCS, phydev->addr);
1066 if (val < 0)
1067 return val;
b32607dd 1068 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
a59a4d19
GC
1069
1070 /* Get advertisement EEE */
1071 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV,
1072 MDIO_MMD_AN, phydev->addr);
1073 if (val < 0)
1074 return val;
b32607dd 1075 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1076
1077 /* Get LP advertisement EEE */
1078 val = phy_read_mmd_indirect(phydev->bus, MDIO_AN_EEE_LPABLE,
1079 MDIO_MMD_AN, phydev->addr);
1080 if (val < 0)
1081 return val;
b32607dd 1082 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
a59a4d19
GC
1083
1084 return 0;
1085}
1086EXPORT_SYMBOL(phy_ethtool_get_eee);
1087
1088/**
1089 * phy_ethtool_set_eee - set EEE supported and status
1090 * @phydev: target phy_device struct
1091 * @data: ethtool_eee data
1092 *
1093 * Description: it is to program the Advertisement EEE register.
1094 */
1095int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data)
1096{
553fe92b 1097 int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
a59a4d19 1098
a59a4d19
GC
1099 phy_write_mmd_indirect(phydev->bus, MDIO_AN_EEE_ADV, MDIO_MMD_AN,
1100 phydev->addr, val);
1101
1102 return 0;
1103}
1104EXPORT_SYMBOL(phy_ethtool_set_eee);
42e836eb
MS
1105
1106int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1107{
1108 if (phydev->drv->set_wol)
1109 return phydev->drv->set_wol(phydev, wol);
1110
1111 return -EOPNOTSUPP;
1112}
1113EXPORT_SYMBOL(phy_ethtool_set_wol);
1114
1115void phy_ethtool_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
1116{
1117 if (phydev->drv->get_wol)
1118 phydev->drv->get_wol(phydev, wol);
1119}
1120EXPORT_SYMBOL(phy_ethtool_get_wol);
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