cdc-ether: clean packet filter upon probe
[deliverable/linux.git] / drivers / net / phy / phy_device.c
CommitLineData
2f53e904 1/* Framework for finding and configuring PHYs.
00db8189
AF
2 * Also contains generic PHY driver
3 *
4 * Author: Andy Fleming
5 *
6 * Copyright (c) 2004 Freescale Semiconductor, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
8d242488
JP
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
00db8189 17#include <linux/kernel.h>
00db8189
AF
18#include <linux/string.h>
19#include <linux/errno.h>
20#include <linux/unistd.h>
21#include <linux/slab.h>
22#include <linux/interrupt.h>
23#include <linux/init.h>
24#include <linux/delay.h>
25#include <linux/netdevice.h>
26#include <linux/etherdevice.h>
27#include <linux/skbuff.h>
00db8189
AF
28#include <linux/mm.h>
29#include <linux/module.h>
00db8189
AF
30#include <linux/mii.h>
31#include <linux/ethtool.h>
32#include <linux/phy.h>
124059fd 33#include <linux/mdio.h>
2f53e904
SS
34#include <linux/io.h>
35#include <linux/uaccess.h>
de906af1 36#include <linux/of.h>
00db8189 37
00db8189 38#include <asm/irq.h>
00db8189 39
afcceaa3
OH
40MODULE_DESCRIPTION("PHY library");
41MODULE_AUTHOR("Andy Fleming");
42MODULE_LICENSE("GPL");
43
6f4a7f41
AV
44void phy_device_free(struct phy_device *phydev)
45{
b2a43191 46 put_device(&phydev->dev);
6f4a7f41 47}
4dea547f 48EXPORT_SYMBOL(phy_device_free);
6f4a7f41
AV
49
50static void phy_device_release(struct device *dev)
51{
b2a43191 52 kfree(to_phy_device(dev));
6f4a7f41
AV
53}
54
ab2145ed
SX
55enum genphy_driver {
56 GENPHY_DRV_1G,
124059fd 57 GENPHY_DRV_10G,
ab2145ed
SX
58 GENPHY_DRV_MAX
59};
60
61static struct phy_driver genphy_driver[GENPHY_DRV_MAX];
4dea547f 62
f62220d3
AF
63static LIST_HEAD(phy_fixup_list);
64static DEFINE_MUTEX(phy_fixup_lock);
65
2f53e904
SS
66/**
67 * phy_register_fixup - creates a new phy_fixup and adds it to the list
f62220d3
AF
68 * @bus_id: A string which matches phydev->dev.bus_id (or PHY_ANY_ID)
69 * @phy_uid: Used to match against phydev->phy_id (the UID of the PHY)
2f53e904 70 * It can also be PHY_ANY_UID
f62220d3 71 * @phy_uid_mask: Applied to phydev->phy_id and fixup->phy_uid before
2f53e904 72 * comparison
f62220d3
AF
73 * @run: The actual code to be run when a matching PHY is found
74 */
75int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
2f53e904 76 int (*run)(struct phy_device *))
f62220d3 77{
553fe92b 78 struct phy_fixup *fixup = kzalloc(sizeof(*fixup), GFP_KERNEL);
f62220d3 79
f62220d3
AF
80 if (!fixup)
81 return -ENOMEM;
82
fb28ad35 83 strlcpy(fixup->bus_id, bus_id, sizeof(fixup->bus_id));
f62220d3
AF
84 fixup->phy_uid = phy_uid;
85 fixup->phy_uid_mask = phy_uid_mask;
86 fixup->run = run;
87
88 mutex_lock(&phy_fixup_lock);
89 list_add_tail(&fixup->list, &phy_fixup_list);
90 mutex_unlock(&phy_fixup_lock);
91
92 return 0;
93}
94EXPORT_SYMBOL(phy_register_fixup);
95
96/* Registers a fixup to be run on any PHY with the UID in phy_uid */
97int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
2f53e904 98 int (*run)(struct phy_device *))
f62220d3
AF
99{
100 return phy_register_fixup(PHY_ANY_ID, phy_uid, phy_uid_mask, run);
101}
102EXPORT_SYMBOL(phy_register_fixup_for_uid);
103
104/* Registers a fixup to be run on the PHY with id string bus_id */
105int phy_register_fixup_for_id(const char *bus_id,
2f53e904 106 int (*run)(struct phy_device *))
f62220d3
AF
107{
108 return phy_register_fixup(bus_id, PHY_ANY_UID, 0xffffffff, run);
109}
110EXPORT_SYMBOL(phy_register_fixup_for_id);
111
2f53e904 112/* Returns 1 if fixup matches phydev in bus_id and phy_uid.
f62220d3
AF
113 * Fixups can be set to match any in one or more fields.
114 */
115static int phy_needs_fixup(struct phy_device *phydev, struct phy_fixup *fixup)
116{
fb28ad35 117 if (strcmp(fixup->bus_id, dev_name(&phydev->dev)) != 0)
f62220d3
AF
118 if (strcmp(fixup->bus_id, PHY_ANY_ID) != 0)
119 return 0;
120
121 if ((fixup->phy_uid & fixup->phy_uid_mask) !=
2f53e904 122 (phydev->phy_id & fixup->phy_uid_mask))
f62220d3
AF
123 if (fixup->phy_uid != PHY_ANY_UID)
124 return 0;
125
126 return 1;
127}
128
129/* Runs any matching fixups for this phydev */
fbfcec63 130static int phy_scan_fixups(struct phy_device *phydev)
f62220d3
AF
131{
132 struct phy_fixup *fixup;
133
134 mutex_lock(&phy_fixup_lock);
135 list_for_each_entry(fixup, &phy_fixup_list, list) {
136 if (phy_needs_fixup(phydev, fixup)) {
553fe92b 137 int err = fixup->run(phydev);
f62220d3 138
bc23283c
JS
139 if (err < 0) {
140 mutex_unlock(&phy_fixup_lock);
f62220d3 141 return err;
bc23283c 142 }
b0ae009f 143 phydev->has_fixups = true;
f62220d3
AF
144 }
145 }
146 mutex_unlock(&phy_fixup_lock);
147
148 return 0;
149}
f62220d3 150
ac28b9f8 151struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
2f53e904
SS
152 bool is_c45,
153 struct phy_c45_device_ids *c45_ids)
11b0bacd
VB
154{
155 struct phy_device *dev;
8626d3b4 156
2f53e904 157 /* We allocate the device, and initialize the default values */
cd861280 158 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
11b0bacd 159 if (NULL == dev)
e109374f 160 return (struct phy_device *)PTR_ERR((void *)-ENOMEM);
11b0bacd 161
6f4a7f41
AV
162 dev->dev.release = phy_device_release;
163
11b0bacd
VB
164 dev->speed = 0;
165 dev->duplex = -1;
2f53e904
SS
166 dev->pause = 0;
167 dev->asym_pause = 0;
11b0bacd 168 dev->link = 1;
e8a2b6a4 169 dev->interface = PHY_INTERFACE_MODE_GMII;
11b0bacd
VB
170
171 dev->autoneg = AUTONEG_ENABLE;
172
ac28b9f8 173 dev->is_c45 = is_c45;
11b0bacd
VB
174 dev->addr = addr;
175 dev->phy_id = phy_id;
ac28b9f8
DD
176 if (c45_ids)
177 dev->c45_ids = *c45_ids;
11b0bacd 178 dev->bus = bus;
4dea547f
GL
179 dev->dev.parent = bus->parent;
180 dev->dev.bus = &mdio_bus_type;
181 dev->irq = bus->irq != NULL ? bus->irq[addr] : PHY_POLL;
182 dev_set_name(&dev->dev, PHY_ID_FMT, bus->id, addr);
11b0bacd
VB
183
184 dev->state = PHY_DOWN;
185
35b5f6b1 186 mutex_init(&dev->lock);
4f9c85a1 187 INIT_DELAYED_WORK(&dev->state_queue, phy_state_machine);
5ea94e76 188 INIT_WORK(&dev->phy_queue, phy_change);
11b0bacd 189
8626d3b4 190 /* Request the appropriate module unconditionally; don't
2f53e904
SS
191 * bother trying to do so only if it isn't already loaded,
192 * because that gets complicated. A hotplug event would have
193 * done an unconditional modprobe anyway.
194 * We don't do normal hotplug because it won't work for MDIO
195 * -- because it relies on the device staying around for long
196 * enough for the driver to get loaded. With MDIO, the NIC
197 * driver will get bored and give up as soon as it finds that
198 * there's no driver _already_ loaded.
199 */
8626d3b4
DW
200 request_module(MDIO_MODULE_PREFIX MDIO_ID_FMT, MDIO_ID_ARGS(phy_id));
201
b2a43191
PM
202 device_initialize(&dev->dev);
203
11b0bacd
VB
204 return dev;
205}
ac28b9f8
DD
206EXPORT_SYMBOL(phy_device_create);
207
208/**
209 * get_phy_c45_ids - reads the specified addr for its 802.3-c45 IDs.
210 * @bus: the target MII bus
211 * @addr: PHY address on the MII bus
212 * @phy_id: where to store the ID retrieved.
213 * @c45_ids: where to store the c45 ID information.
214 *
215 * If the PHY devices-in-package appears to be valid, it and the
216 * corresponding identifiers are stored in @c45_ids, zero is stored
217 * in @phy_id. Otherwise 0xffffffff is stored in @phy_id. Returns
218 * zero on success.
219 *
220 */
221static int get_phy_c45_ids(struct mii_bus *bus, int addr, u32 *phy_id,
222 struct phy_c45_device_ids *c45_ids) {
223 int phy_reg;
224 int i, reg_addr;
225 const int num_ids = ARRAY_SIZE(c45_ids->device_ids);
226
227 /* Find first non-zero Devices In package. Device
228 * zero is reserved, so don't probe it.
229 */
230 for (i = 1;
231 i < num_ids && c45_ids->devices_in_package == 0;
232 i++) {
233 reg_addr = MII_ADDR_C45 | i << 16 | 6;
234 phy_reg = mdiobus_read(bus, addr, reg_addr);
235 if (phy_reg < 0)
236 return -EIO;
237 c45_ids->devices_in_package = (phy_reg & 0xffff) << 16;
238
239 reg_addr = MII_ADDR_C45 | i << 16 | 5;
240 phy_reg = mdiobus_read(bus, addr, reg_addr);
241 if (phy_reg < 0)
242 return -EIO;
243 c45_ids->devices_in_package |= (phy_reg & 0xffff);
244
245 /* If mostly Fs, there is no device there,
246 * let's get out of here.
247 */
248 if ((c45_ids->devices_in_package & 0x1fffffff) == 0x1fffffff) {
249 *phy_id = 0xffffffff;
250 return 0;
251 }
252 }
253
254 /* Now probe Device Identifiers for each device present. */
255 for (i = 1; i < num_ids; i++) {
256 if (!(c45_ids->devices_in_package & (1 << i)))
257 continue;
258
259 reg_addr = MII_ADDR_C45 | i << 16 | MII_PHYSID1;
260 phy_reg = mdiobus_read(bus, addr, reg_addr);
261 if (phy_reg < 0)
262 return -EIO;
263 c45_ids->device_ids[i] = (phy_reg & 0xffff) << 16;
264
265 reg_addr = MII_ADDR_C45 | i << 16 | MII_PHYSID2;
266 phy_reg = mdiobus_read(bus, addr, reg_addr);
267 if (phy_reg < 0)
268 return -EIO;
269 c45_ids->device_ids[i] |= (phy_reg & 0xffff);
270 }
271 *phy_id = 0;
272 return 0;
273}
11b0bacd 274
b3df0da8 275/**
cac1f3c8 276 * get_phy_id - reads the specified addr for its ID.
b3df0da8
RD
277 * @bus: the target MII bus
278 * @addr: PHY address on the MII bus
cac1f3c8 279 * @phy_id: where to store the ID retrieved.
ac28b9f8
DD
280 * @is_c45: If true the PHY uses the 802.3 clause 45 protocol
281 * @c45_ids: where to store the c45 ID information.
282 *
283 * Description: In the case of a 802.3-c22 PHY, reads the ID registers
284 * of the PHY at @addr on the @bus, stores it in @phy_id and returns
285 * zero on success.
286 *
287 * In the case of a 802.3-c45 PHY, get_phy_c45_ids() is invoked, and
288 * its return value is in turn returned.
00db8189 289 *
00db8189 290 */
ac28b9f8
DD
291static int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id,
292 bool is_c45, struct phy_c45_device_ids *c45_ids)
00db8189
AF
293{
294 int phy_reg;
00db8189 295
ac28b9f8
DD
296 if (is_c45)
297 return get_phy_c45_ids(bus, addr, phy_id, c45_ids);
298
2f53e904 299 /* Grab the bits from PHYIR1, and put them in the upper half */
6fe32649 300 phy_reg = mdiobus_read(bus, addr, MII_PHYSID1);
00db8189 301 if (phy_reg < 0)
cac1f3c8 302 return -EIO;
00db8189 303
cac1f3c8 304 *phy_id = (phy_reg & 0xffff) << 16;
00db8189
AF
305
306 /* Grab the bits from PHYIR2, and put them in the lower half */
6fe32649 307 phy_reg = mdiobus_read(bus, addr, MII_PHYSID2);
00db8189 308 if (phy_reg < 0)
cac1f3c8
PG
309 return -EIO;
310
311 *phy_id |= (phy_reg & 0xffff);
312
313 return 0;
314}
315
316/**
2f53e904
SS
317 * get_phy_device - reads the specified PHY device and returns its @phy_device
318 * struct
cac1f3c8
PG
319 * @bus: the target MII bus
320 * @addr: PHY address on the MII bus
ac28b9f8 321 * @is_c45: If true the PHY uses the 802.3 clause 45 protocol
cac1f3c8
PG
322 *
323 * Description: Reads the ID registers of the PHY at @addr on the
324 * @bus, then allocates and returns the phy_device to represent it.
325 */
ac28b9f8 326struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
cac1f3c8 327{
ac28b9f8 328 struct phy_c45_device_ids c45_ids = {0};
160c85f0 329 u32 phy_id = 0;
cac1f3c8 330 int r;
00db8189 331
ac28b9f8 332 r = get_phy_id(bus, addr, &phy_id, is_c45, &c45_ids);
cac1f3c8
PG
333 if (r)
334 return ERR_PTR(r);
00db8189 335
6436cbcd
GC
336 /* If the phy_id is mostly Fs, there is no device there */
337 if ((phy_id & 0x1fffffff) == 0x1fffffff)
338 return NULL;
339
e62a768f 340 return phy_device_create(bus, addr, phy_id, is_c45, &c45_ids);
00db8189 341}
4dea547f
GL
342EXPORT_SYMBOL(get_phy_device);
343
344/**
345 * phy_device_register - Register the phy device on the MDIO bus
1d4ac5d5 346 * @phydev: phy_device structure to be added to the MDIO bus
4dea547f
GL
347 */
348int phy_device_register(struct phy_device *phydev)
349{
350 int err;
351
2f53e904 352 /* Don't register a phy if one is already registered at this address */
4dea547f
GL
353 if (phydev->bus->phy_map[phydev->addr])
354 return -EINVAL;
355 phydev->bus->phy_map[phydev->addr] = phydev;
356
357 /* Run all of the fixups for this PHY */
87aa9f9c
FF
358 err = phy_init_hw(phydev);
359 if (err) {
360 pr_err("PHY %d failed to initialize\n", phydev->addr);
361 goto out;
362 }
4dea547f 363
b2a43191 364 err = device_add(&phydev->dev);
4dea547f 365 if (err) {
b2a43191 366 pr_err("PHY %d failed to add\n", phydev->addr);
4dea547f
GL
367 goto out;
368 }
369
370 return 0;
371
372 out:
373 phydev->bus->phy_map[phydev->addr] = NULL;
374 return err;
375}
376EXPORT_SYMBOL(phy_device_register);
00db8189 377
f8f76db1
JP
378/**
379 * phy_find_first - finds the first PHY device on the bus
380 * @bus: the target MII bus
381 */
382struct phy_device *phy_find_first(struct mii_bus *bus)
383{
384 int addr;
385
386 for (addr = 0; addr < PHY_MAX_ADDR; addr++) {
387 if (bus->phy_map[addr])
388 return bus->phy_map[addr];
389 }
390 return NULL;
391}
392EXPORT_SYMBOL(phy_find_first);
393
b3df0da8
RD
394/**
395 * phy_prepare_link - prepares the PHY layer to monitor link status
396 * @phydev: target phy_device struct
397 * @handler: callback function for link status change notifications
00db8189 398 *
b3df0da8 399 * Description: Tells the PHY infrastructure to handle the
00db8189
AF
400 * gory details on monitoring link status (whether through
401 * polling or an interrupt), and to call back to the
402 * connected device driver when the link status changes.
403 * If you want to monitor your own link state, don't call
b3df0da8
RD
404 * this function.
405 */
89ff05ec 406static void phy_prepare_link(struct phy_device *phydev,
2f53e904 407 void (*handler)(struct net_device *))
00db8189
AF
408{
409 phydev->adjust_link = handler;
410}
411
fa94f6d9
GL
412/**
413 * phy_connect_direct - connect an ethernet device to a specific phy_device
414 * @dev: the network device to connect
415 * @phydev: the pointer to the phy device
416 * @handler: callback function for state change notifications
fa94f6d9
GL
417 * @interface: PHY device's interface
418 */
419int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
f9a8f83b 420 void (*handler)(struct net_device *),
fa94f6d9
GL
421 phy_interface_t interface)
422{
423 int rc;
424
f9a8f83b 425 rc = phy_attach_direct(dev, phydev, phydev->dev_flags, interface);
fa94f6d9
GL
426 if (rc)
427 return rc;
428
429 phy_prepare_link(phydev, handler);
29935aeb 430 phy_start_machine(phydev);
fa94f6d9
GL
431 if (phydev->irq > 0)
432 phy_start_interrupts(phydev);
433
434 return 0;
435}
436EXPORT_SYMBOL(phy_connect_direct);
437
b3df0da8
RD
438/**
439 * phy_connect - connect an ethernet device to a PHY device
440 * @dev: the network device to connect
5d12b132 441 * @bus_id: the id string of the PHY device to connect
b3df0da8 442 * @handler: callback function for state change notifications
b3df0da8 443 * @interface: PHY device's interface
e1393456 444 *
b3df0da8 445 * Description: Convenience function for connecting ethernet
e1393456
AF
446 * devices to PHY devices. The default behavior is for
447 * the PHY infrastructure to handle everything, and only notify
448 * the connected driver when the link status changes. If you
449 * don't want, or can't use the provided functionality, you may
450 * choose to call only the subset of functions which provide
451 * the desired functionality.
452 */
e109374f 453struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
2f53e904
SS
454 void (*handler)(struct net_device *),
455 phy_interface_t interface)
e1393456
AF
456{
457 struct phy_device *phydev;
fa94f6d9
GL
458 struct device *d;
459 int rc;
e1393456 460
fa94f6d9 461 /* Search the list of PHY devices on the mdio bus for the
2f53e904
SS
462 * PHY with the requested name
463 */
fa94f6d9
GL
464 d = bus_find_device_by_name(&mdio_bus_type, NULL, bus_id);
465 if (!d) {
466 pr_err("PHY %s not found\n", bus_id);
467 return ERR_PTR(-ENODEV);
468 }
469 phydev = to_phy_device(d);
e1393456 470
f9a8f83b 471 rc = phy_connect_direct(dev, phydev, handler, interface);
fa94f6d9
GL
472 if (rc)
473 return ERR_PTR(rc);
e1393456
AF
474
475 return phydev;
476}
477EXPORT_SYMBOL(phy_connect);
478
b3df0da8 479/**
2f53e904
SS
480 * phy_disconnect - disable interrupts, stop state machine, and detach a PHY
481 * device
b3df0da8
RD
482 * @phydev: target phy_device struct
483 */
e1393456
AF
484void phy_disconnect(struct phy_device *phydev)
485{
486 if (phydev->irq > 0)
487 phy_stop_interrupts(phydev);
488
489 phy_stop_machine(phydev);
e109374f 490
e1393456
AF
491 phydev->adjust_link = NULL;
492
493 phy_detach(phydev);
494}
495EXPORT_SYMBOL(phy_disconnect);
496
87aa9f9c
FF
497/**
498 * phy_poll_reset - Safely wait until a PHY reset has properly completed
499 * @phydev: The PHY device to poll
500 *
501 * Description: According to IEEE 802.3, Section 2, Subsection 22.2.4.1.1, as
502 * published in 2008, a PHY reset may take up to 0.5 seconds. The MII BMCR
503 * register must be polled until the BMCR_RESET bit clears.
504 *
505 * Furthermore, any attempts to write to PHY registers may have no effect
506 * or even generate MDIO bus errors until this is complete.
507 *
508 * Some PHYs (such as the Marvell 88E1111) don't entirely conform to the
509 * standard and do not fully reset after the BMCR_RESET bit is set, and may
510 * even *REQUIRE* a soft-reset to properly restart autonegotiation. In an
511 * effort to support such broken PHYs, this function is separate from the
512 * standard phy_init_hw() which will zero all the other bits in the BMCR
513 * and reapply all driver-specific and board-specific fixups.
514 */
515static int phy_poll_reset(struct phy_device *phydev)
516{
517 /* Poll until the reset bit clears (50ms per retry == 0.6 sec) */
518 unsigned int retries = 12;
519 int ret;
520
521 do {
522 msleep(50);
523 ret = phy_read(phydev, MII_BMCR);
524 if (ret < 0)
525 return ret;
526 } while (ret & BMCR_RESET && --retries);
527 if (ret & BMCR_RESET)
528 return -ETIMEDOUT;
529
2f53e904 530 /* Some chips (smsc911x) may still need up to another 1ms after the
87aa9f9c
FF
531 * BMCR_RESET bit is cleared before they are usable.
532 */
533 msleep(1);
534 return 0;
535}
536
2f5cb434
AV
537int phy_init_hw(struct phy_device *phydev)
538{
9df81dd7 539 int ret = 0;
2f5cb434
AV
540
541 if (!phydev->drv || !phydev->drv->config_init)
542 return 0;
543
9df81dd7
FF
544 if (phydev->drv->soft_reset)
545 ret = phydev->drv->soft_reset(phydev);
546 else
547 ret = genphy_soft_reset(phydev);
548
87aa9f9c
FF
549 if (ret < 0)
550 return ret;
551
2f5cb434
AV
552 ret = phy_scan_fixups(phydev);
553 if (ret < 0)
554 return ret;
555
556 return phydev->drv->config_init(phydev);
557}
87aa9f9c 558EXPORT_SYMBOL(phy_init_hw);
2f5cb434 559
b3df0da8 560/**
fa94f6d9 561 * phy_attach_direct - attach a network device to a given PHY device pointer
b3df0da8 562 * @dev: network device to attach
fa94f6d9 563 * @phydev: Pointer to phy_device to attach
b3df0da8
RD
564 * @flags: PHY device's dev_flags
565 * @interface: PHY device's interface
e1393456 566 *
b3df0da8 567 * Description: Called by drivers to attach to a particular PHY
e1393456 568 * device. The phy_device is found, and properly hooked up
257184d7
AF
569 * to the phy_driver. If no driver is attached, then a
570 * generic driver is used. The phy_device is given a ptr to
e1393456 571 * the attaching device, and given a callback for link status
b3df0da8 572 * change. The phy_device is returned to the attaching driver.
e1393456 573 */
257184d7
AF
574int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
575 u32 flags, phy_interface_t interface)
e1393456 576{
fa94f6d9 577 struct device *d = &phydev->dev;
b3565f27 578 struct module *bus_module;
d005a09e 579 int err;
e1393456
AF
580
581 /* Assume that if there is no driver, that it doesn't
2f53e904
SS
582 * exist, and we should use the genphy driver.
583 */
e1393456 584 if (NULL == d->driver) {
257184d7
AF
585 if (phydev->is_c45)
586 d->driver = &genphy_driver[GENPHY_DRV_10G].driver;
587 else
588 d->driver = &genphy_driver[GENPHY_DRV_1G].driver;
e1393456
AF
589
590 err = d->driver->probe(d);
b7a00ecd
JG
591 if (err >= 0)
592 err = device_bind_driver(d);
e1393456 593
b7a00ecd 594 if (err)
fa94f6d9 595 return err;
e1393456
AF
596 }
597
598 if (phydev->attached_dev) {
fa94f6d9
GL
599 dev_err(&dev->dev, "PHY already attached\n");
600 return -EBUSY;
e1393456
AF
601 }
602
b3565f27
EG
603 /* Increment the bus module reference count */
604 bus_module = phydev->bus->dev.driver ?
605 phydev->bus->dev.driver->owner : NULL;
606 if (!try_module_get(bus_module)) {
607 dev_err(&dev->dev, "failed to get the bus module\n");
608 return -EIO;
609 }
610
e1393456 611 phydev->attached_dev = dev;
c1f19b51 612 dev->phydev = phydev;
e1393456
AF
613
614 phydev->dev_flags = flags;
615
e8a2b6a4
AF
616 phydev->interface = interface;
617
ef24b16b
AV
618 phydev->state = PHY_READY;
619
e8a2b6a4
AF
620 /* Do initial configuration here, now that
621 * we have certain key parameters
2f53e904
SS
622 * (dev_flags and interface)
623 */
d005a09e
MKB
624 err = phy_init_hw(phydev);
625 if (err)
626 phy_detach(phydev);
b394745d
GR
627 else
628 phy_resume(phydev);
1211ce53 629
d005a09e 630 return err;
fa94f6d9 631}
257184d7 632EXPORT_SYMBOL(phy_attach_direct);
fa94f6d9
GL
633
634/**
635 * phy_attach - attach a network device to a particular PHY device
636 * @dev: network device to attach
637 * @bus_id: Bus ID of PHY device to attach
fa94f6d9
GL
638 * @interface: PHY device's interface
639 *
640 * Description: Same as phy_attach_direct() except that a PHY bus_id
641 * string is passed instead of a pointer to a struct phy_device.
642 */
2f53e904
SS
643struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
644 phy_interface_t interface)
fa94f6d9
GL
645{
646 struct bus_type *bus = &mdio_bus_type;
647 struct phy_device *phydev;
648 struct device *d;
649 int rc;
650
651 /* Search the list of PHY devices on the mdio bus for the
2f53e904
SS
652 * PHY with the requested name
653 */
fa94f6d9
GL
654 d = bus_find_device_by_name(bus, NULL, bus_id);
655 if (!d) {
656 pr_err("PHY %s not found\n", bus_id);
657 return ERR_PTR(-ENODEV);
e8a2b6a4 658 }
fa94f6d9
GL
659 phydev = to_phy_device(d);
660
f9a8f83b 661 rc = phy_attach_direct(dev, phydev, phydev->dev_flags, interface);
fa94f6d9
GL
662 if (rc)
663 return ERR_PTR(rc);
e8a2b6a4 664
e1393456
AF
665 return phydev;
666}
667EXPORT_SYMBOL(phy_attach);
668
b3df0da8
RD
669/**
670 * phy_detach - detach a PHY device from its network device
671 * @phydev: target phy_device struct
672 */
e1393456
AF
673void phy_detach(struct phy_device *phydev)
674{
ab2145ed 675 int i;
b3565f27
EG
676
677 if (phydev->bus->dev.driver)
678 module_put(phydev->bus->dev.driver->owner);
679
c1f19b51 680 phydev->attached_dev->phydev = NULL;
e1393456 681 phydev->attached_dev = NULL;
1211ce53 682 phy_suspend(phydev);
e1393456
AF
683
684 /* If the device had no specific driver before (i.e. - it
685 * was using the generic driver), we unbind the device
686 * from the generic driver so that there's a chance a
2f53e904
SS
687 * real driver could be loaded
688 */
ab2145ed
SX
689 for (i = 0; i < ARRAY_SIZE(genphy_driver); i++) {
690 if (phydev->dev.driver == &genphy_driver[i].driver) {
691 device_release_driver(&phydev->dev);
692 break;
693 }
694 }
e1393456
AF
695}
696EXPORT_SYMBOL(phy_detach);
697
481b5d93
SH
698int phy_suspend(struct phy_device *phydev)
699{
700 struct phy_driver *phydrv = to_phy_driver(phydev->dev.driver);
32fc3fd4 701 struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL };
481b5d93
SH
702
703 /* If the device has WOL enabled, we cannot suspend the PHY */
481b5d93
SH
704 phy_ethtool_get_wol(phydev, &wol);
705 if (wol.wolopts)
706 return -EBUSY;
707
708 if (phydrv->suspend)
709 return phydrv->suspend(phydev);
710 return 0;
711}
712
713int phy_resume(struct phy_device *phydev)
714{
715 struct phy_driver *phydrv = to_phy_driver(phydev->dev.driver);
716
717 if (phydrv->resume)
718 return phydrv->resume(phydev);
719 return 0;
720}
e1393456 721
00db8189
AF
722/* Generic PHY support and helper functions */
723
b3df0da8 724/**
25985edc 725 * genphy_config_advert - sanitize and advertise auto-negotiation parameters
b3df0da8 726 * @phydev: target phy_device struct
00db8189 727 *
b3df0da8 728 * Description: Writes MII_ADVERTISE with the appropriate values,
00db8189 729 * after sanitizing the values to make sure we only advertise
51e2a384
TP
730 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
731 * hasn't changed, and > 0 if it has changed.
00db8189 732 */
89ff05ec 733static int genphy_config_advert(struct phy_device *phydev)
00db8189
AF
734{
735 u32 advertise;
5273e3a5 736 int oldadv, adv, bmsr;
51e2a384 737 int err, changed = 0;
00db8189 738
2f53e904 739 /* Only allow advertising what this PHY supports */
00db8189
AF
740 phydev->advertising &= phydev->supported;
741 advertise = phydev->advertising;
742
743 /* Setup standard advertisement */
2f53e904 744 adv = phy_read(phydev, MII_ADVERTISE);
00db8189
AF
745 if (adv < 0)
746 return adv;
747
2f53e904 748 oldadv = adv;
28011cf1 749 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
00db8189 750 ADVERTISE_PAUSE_ASYM);
37f07023 751 adv |= ethtool_adv_to_mii_adv_t(advertise);
00db8189 752
51e2a384
TP
753 if (adv != oldadv) {
754 err = phy_write(phydev, MII_ADVERTISE, adv);
00db8189 755
51e2a384
TP
756 if (err < 0)
757 return err;
758 changed = 1;
759 }
00db8189 760
5273e3a5
FF
761 bmsr = phy_read(phydev, MII_BMSR);
762 if (bmsr < 0)
763 return bmsr;
764
765 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
766 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
767 * logical 1.
768 */
769 if (!(bmsr & BMSR_ESTATEN))
770 return changed;
771
00db8189 772 /* Configure gigabit if it's supported */
5273e3a5
FF
773 adv = phy_read(phydev, MII_CTRL1000);
774 if (adv < 0)
775 return adv;
776
777 oldadv = adv;
778 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
779
00db8189 780 if (phydev->supported & (SUPPORTED_1000baseT_Half |
2f53e904 781 SUPPORTED_1000baseT_Full)) {
37f07023 782 adv |= ethtool_adv_to_mii_ctrl1000_t(advertise);
5273e3a5 783 if (adv != oldadv)
51e2a384 784 changed = 1;
00db8189
AF
785 }
786
5273e3a5
FF
787 err = phy_write(phydev, MII_CTRL1000, adv);
788 if (err < 0)
789 return err;
790
51e2a384 791 return changed;
00db8189 792}
00db8189 793
b3df0da8
RD
794/**
795 * genphy_setup_forced - configures/forces speed/duplex from @phydev
796 * @phydev: target phy_device struct
00db8189 797 *
b3df0da8 798 * Description: Configures MII_BMCR to force speed/duplex
00db8189 799 * to the values in phydev. Assumes that the values are valid.
b3df0da8
RD
800 * Please see phy_sanitize_settings().
801 */
3fb69bca 802int genphy_setup_forced(struct phy_device *phydev)
00db8189 803{
bc1e0a09 804 int ctl = 0;
00db8189 805
2f53e904
SS
806 phydev->pause = 0;
807 phydev->asym_pause = 0;
00db8189
AF
808
809 if (SPEED_1000 == phydev->speed)
810 ctl |= BMCR_SPEED1000;
811 else if (SPEED_100 == phydev->speed)
812 ctl |= BMCR_SPEED100;
813
814 if (DUPLEX_FULL == phydev->duplex)
815 ctl |= BMCR_FULLDPLX;
e109374f 816
e62a768f 817 return phy_write(phydev, MII_BMCR, ctl);
00db8189 818}
3fb69bca 819EXPORT_SYMBOL(genphy_setup_forced);
00db8189 820
b3df0da8
RD
821/**
822 * genphy_restart_aneg - Enable and Restart Autonegotiation
823 * @phydev: target phy_device struct
824 */
00db8189
AF
825int genphy_restart_aneg(struct phy_device *phydev)
826{
553fe92b 827 int ctl = phy_read(phydev, MII_BMCR);
00db8189
AF
828
829 if (ctl < 0)
830 return ctl;
831
2f53e904 832 ctl |= BMCR_ANENABLE | BMCR_ANRESTART;
00db8189
AF
833
834 /* Don't isolate the PHY if we're negotiating */
2f53e904 835 ctl &= ~BMCR_ISOLATE;
00db8189 836
553fe92b 837 return phy_write(phydev, MII_BMCR, ctl);
00db8189 838}
892871dc 839EXPORT_SYMBOL(genphy_restart_aneg);
00db8189 840
b3df0da8
RD
841/**
842 * genphy_config_aneg - restart auto-negotiation or write BMCR
843 * @phydev: target phy_device struct
00db8189 844 *
b3df0da8 845 * Description: If auto-negotiation is enabled, we configure the
00db8189 846 * advertising, and then restart auto-negotiation. If it is not
b3df0da8 847 * enabled, then we write the BMCR.
00db8189
AF
848 */
849int genphy_config_aneg(struct phy_device *phydev)
850{
de339c2a 851 int result;
00db8189 852
de339c2a
TP
853 if (AUTONEG_ENABLE != phydev->autoneg)
854 return genphy_setup_forced(phydev);
00db8189 855
de339c2a 856 result = genphy_config_advert(phydev);
de339c2a
TP
857 if (result < 0) /* error */
858 return result;
de339c2a 859 if (result == 0) {
25985edc 860 /* Advertisement hasn't changed, but maybe aneg was never on to
2f53e904
SS
861 * begin with? Or maybe phy was isolated?
862 */
de339c2a
TP
863 int ctl = phy_read(phydev, MII_BMCR);
864
865 if (ctl < 0)
866 return ctl;
867
868 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
869 result = 1; /* do restart aneg */
870 }
871
872 /* Only restart aneg if we are advertising something different
2f53e904
SS
873 * than we were before.
874 */
de339c2a
TP
875 if (result > 0)
876 result = genphy_restart_aneg(phydev);
00db8189 877
51e2a384 878 return result;
00db8189
AF
879}
880EXPORT_SYMBOL(genphy_config_aneg);
881
a9fa6e6a
FF
882/**
883 * genphy_aneg_done - return auto-negotiation status
884 * @phydev: target phy_device struct
885 *
886 * Description: Reads the status register and returns 0 either if
887 * auto-negotiation is incomplete, or if there was an error.
888 * Returns BMSR_ANEGCOMPLETE if auto-negotiation is done.
889 */
890int genphy_aneg_done(struct phy_device *phydev)
891{
892 int retval = phy_read(phydev, MII_BMSR);
893
894 return (retval < 0) ? retval : (retval & BMSR_ANEGCOMPLETE);
895}
896EXPORT_SYMBOL(genphy_aneg_done);
897
395056ed 898static int gen10g_config_aneg(struct phy_device *phydev)
124059fd
AF
899{
900 return 0;
901}
124059fd 902
b3df0da8
RD
903/**
904 * genphy_update_link - update link status in @phydev
905 * @phydev: target phy_device struct
00db8189 906 *
b3df0da8 907 * Description: Update the value in phydev->link to reflect the
00db8189 908 * current link value. In order to do this, we need to read
b3df0da8 909 * the status register twice, keeping the second value.
00db8189
AF
910 */
911int genphy_update_link(struct phy_device *phydev)
912{
913 int status;
914
915 /* Do a fake read */
916 status = phy_read(phydev, MII_BMSR);
00db8189
AF
917 if (status < 0)
918 return status;
919
920 /* Read link and autonegotiation status */
921 status = phy_read(phydev, MII_BMSR);
00db8189
AF
922 if (status < 0)
923 return status;
924
925 if ((status & BMSR_LSTATUS) == 0)
926 phydev->link = 0;
927 else
928 phydev->link = 1;
929
930 return 0;
931}
6b655529 932EXPORT_SYMBOL(genphy_update_link);
00db8189 933
b3df0da8
RD
934/**
935 * genphy_read_status - check the link status and update current link state
936 * @phydev: target phy_device struct
00db8189 937 *
b3df0da8 938 * Description: Check the link, then figure out the current state
00db8189
AF
939 * by comparing what we advertise with what the link partner
940 * advertises. Start by checking the gigabit possibilities,
941 * then move on to 10/100.
942 */
943int genphy_read_status(struct phy_device *phydev)
944{
945 int adv;
946 int err;
947 int lpa;
948 int lpagb = 0;
a4572e0c
CB
949 int common_adv;
950 int common_adv_gb = 0;
00db8189 951
2f53e904 952 /* Update the link, but return if there was an error */
00db8189
AF
953 err = genphy_update_link(phydev);
954 if (err)
955 return err;
956
114002bc
FF
957 phydev->lp_advertising = 0;
958
00db8189
AF
959 if (AUTONEG_ENABLE == phydev->autoneg) {
960 if (phydev->supported & (SUPPORTED_1000baseT_Half
961 | SUPPORTED_1000baseT_Full)) {
962 lpagb = phy_read(phydev, MII_STAT1000);
00db8189
AF
963 if (lpagb < 0)
964 return lpagb;
965
966 adv = phy_read(phydev, MII_CTRL1000);
00db8189
AF
967 if (adv < 0)
968 return adv;
969
114002bc
FF
970 phydev->lp_advertising =
971 mii_stat1000_to_ethtool_lpa_t(lpagb);
a4572e0c 972 common_adv_gb = lpagb & adv << 2;
00db8189
AF
973 }
974
975 lpa = phy_read(phydev, MII_LPA);
00db8189
AF
976 if (lpa < 0)
977 return lpa;
978
114002bc
FF
979 phydev->lp_advertising |= mii_lpa_to_ethtool_lpa_t(lpa);
980
00db8189 981 adv = phy_read(phydev, MII_ADVERTISE);
00db8189
AF
982 if (adv < 0)
983 return adv;
984
a4572e0c 985 common_adv = lpa & adv;
00db8189
AF
986
987 phydev->speed = SPEED_10;
988 phydev->duplex = DUPLEX_HALF;
2f53e904
SS
989 phydev->pause = 0;
990 phydev->asym_pause = 0;
00db8189 991
a4572e0c 992 if (common_adv_gb & (LPA_1000FULL | LPA_1000HALF)) {
00db8189
AF
993 phydev->speed = SPEED_1000;
994
a4572e0c 995 if (common_adv_gb & LPA_1000FULL)
00db8189 996 phydev->duplex = DUPLEX_FULL;
a4572e0c 997 } else if (common_adv & (LPA_100FULL | LPA_100HALF)) {
00db8189 998 phydev->speed = SPEED_100;
e109374f 999
a4572e0c 1000 if (common_adv & LPA_100FULL)
00db8189
AF
1001 phydev->duplex = DUPLEX_FULL;
1002 } else
a4572e0c 1003 if (common_adv & LPA_10FULL)
00db8189
AF
1004 phydev->duplex = DUPLEX_FULL;
1005
e109374f 1006 if (phydev->duplex == DUPLEX_FULL) {
00db8189
AF
1007 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1008 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1009 }
1010 } else {
1011 int bmcr = phy_read(phydev, MII_BMCR);
2f53e904 1012
00db8189
AF
1013 if (bmcr < 0)
1014 return bmcr;
1015
1016 if (bmcr & BMCR_FULLDPLX)
1017 phydev->duplex = DUPLEX_FULL;
1018 else
1019 phydev->duplex = DUPLEX_HALF;
1020
1021 if (bmcr & BMCR_SPEED1000)
1022 phydev->speed = SPEED_1000;
1023 else if (bmcr & BMCR_SPEED100)
1024 phydev->speed = SPEED_100;
1025 else
1026 phydev->speed = SPEED_10;
1027
2f53e904
SS
1028 phydev->pause = 0;
1029 phydev->asym_pause = 0;
00db8189
AF
1030 }
1031
1032 return 0;
1033}
1034EXPORT_SYMBOL(genphy_read_status);
1035
395056ed 1036static int gen10g_read_status(struct phy_device *phydev)
124059fd
AF
1037{
1038 int devad, reg;
1039 u32 mmd_mask = phydev->c45_ids.devices_in_package;
1040
1041 phydev->link = 1;
1042
1043 /* For now just lie and say it's 10G all the time */
1044 phydev->speed = SPEED_10000;
1045 phydev->duplex = DUPLEX_FULL;
1046
1047 for (devad = 0; mmd_mask; devad++, mmd_mask = mmd_mask >> 1) {
1048 if (!(mmd_mask & 1))
1049 continue;
1050
1051 /* Read twice because link state is latched and a
1052 * read moves the current state into the register
1053 */
1054 phy_read_mmd(phydev, devad, MDIO_STAT1);
1055 reg = phy_read_mmd(phydev, devad, MDIO_STAT1);
1056 if (reg < 0 || !(reg & MDIO_STAT1_LSTATUS))
1057 phydev->link = 0;
1058 }
1059
1060 return 0;
1061}
124059fd 1062
797ac071
FF
1063/**
1064 * genphy_soft_reset - software reset the PHY via BMCR_RESET bit
1065 * @phydev: target phy_device struct
1066 *
1067 * Description: Perform a software PHY reset using the standard
1068 * BMCR_RESET bit and poll for the reset bit to be cleared.
1069 *
1070 * Returns: 0 on success, < 0 on failure
1071 */
1072int genphy_soft_reset(struct phy_device *phydev)
1073{
1074 int ret;
1075
1076 ret = phy_write(phydev, MII_BMCR, BMCR_RESET);
1077 if (ret < 0)
1078 return ret;
1079
1080 return phy_poll_reset(phydev);
1081}
1082EXPORT_SYMBOL(genphy_soft_reset);
1083
af6b6967 1084int genphy_config_init(struct phy_device *phydev)
00db8189 1085{
84c22d79 1086 int val;
00db8189
AF
1087 u32 features;
1088
00db8189
AF
1089 features = (SUPPORTED_TP | SUPPORTED_MII
1090 | SUPPORTED_AUI | SUPPORTED_FIBRE |
1091 SUPPORTED_BNC);
1092
1093 /* Do we support autonegotiation? */
1094 val = phy_read(phydev, MII_BMSR);
00db8189
AF
1095 if (val < 0)
1096 return val;
1097
1098 if (val & BMSR_ANEGCAPABLE)
1099 features |= SUPPORTED_Autoneg;
1100
1101 if (val & BMSR_100FULL)
1102 features |= SUPPORTED_100baseT_Full;
1103 if (val & BMSR_100HALF)
1104 features |= SUPPORTED_100baseT_Half;
1105 if (val & BMSR_10FULL)
1106 features |= SUPPORTED_10baseT_Full;
1107 if (val & BMSR_10HALF)
1108 features |= SUPPORTED_10baseT_Half;
1109
1110 if (val & BMSR_ESTATEN) {
1111 val = phy_read(phydev, MII_ESTATUS);
00db8189
AF
1112 if (val < 0)
1113 return val;
1114
1115 if (val & ESTATUS_1000_TFULL)
1116 features |= SUPPORTED_1000baseT_Full;
1117 if (val & ESTATUS_1000_THALF)
1118 features |= SUPPORTED_1000baseT_Half;
1119 }
1120
c242a472
SH
1121 phydev->supported &= features;
1122 phydev->advertising &= features;
00db8189
AF
1123
1124 return 0;
1125}
124059fd 1126
9df81dd7
FF
1127static int gen10g_soft_reset(struct phy_device *phydev)
1128{
1129 /* Do nothing for now */
1130 return 0;
1131}
af6b6967 1132EXPORT_SYMBOL(genphy_config_init);
9df81dd7 1133
124059fd
AF
1134static int gen10g_config_init(struct phy_device *phydev)
1135{
1136 /* Temporarily just say we support everything */
1137 phydev->supported = SUPPORTED_10000baseT_Full;
1138 phydev->advertising = SUPPORTED_10000baseT_Full;
1139
1140 return 0;
1141}
1142
0f0ca340
GC
1143int genphy_suspend(struct phy_device *phydev)
1144{
1145 int value;
1146
1147 mutex_lock(&phydev->lock);
1148
1149 value = phy_read(phydev, MII_BMCR);
2f53e904 1150 phy_write(phydev, MII_BMCR, value | BMCR_PDOWN);
0f0ca340
GC
1151
1152 mutex_unlock(&phydev->lock);
1153
1154 return 0;
1155}
1156EXPORT_SYMBOL(genphy_suspend);
00db8189 1157
395056ed 1158static int gen10g_suspend(struct phy_device *phydev)
124059fd
AF
1159{
1160 return 0;
1161}
124059fd 1162
0f0ca340
GC
1163int genphy_resume(struct phy_device *phydev)
1164{
1165 int value;
1166
1167 mutex_lock(&phydev->lock);
1168
1169 value = phy_read(phydev, MII_BMCR);
2f53e904 1170 phy_write(phydev, MII_BMCR, value & ~BMCR_PDOWN);
0f0ca340
GC
1171
1172 mutex_unlock(&phydev->lock);
1173
1174 return 0;
1175}
1176EXPORT_SYMBOL(genphy_resume);
00db8189 1177
395056ed 1178static int gen10g_resume(struct phy_device *phydev)
124059fd
AF
1179{
1180 return 0;
1181}
124059fd 1182
de906af1
SH
1183static void of_set_phy_supported(struct phy_device *phydev)
1184{
1185 struct device_node *node = phydev->dev.of_node;
1186 u32 max_speed;
1187
1188 if (!IS_ENABLED(CONFIG_OF_MDIO))
1189 return;
1190
1191 if (!node)
1192 return;
1193
1194 if (!of_property_read_u32(node, "max-speed", &max_speed)) {
1195 /* The default values for phydev->supported are provided by the PHY
1196 * driver "features" member, we want to reset to sane defaults fist
1197 * before supporting higher speeds.
1198 */
1199 phydev->supported &= PHY_DEFAULT_FEATURES;
1200
1201 switch (max_speed) {
1202 default:
1203 return;
1204
1205 case SPEED_1000:
1206 phydev->supported |= PHY_1000BT_FEATURES;
1207 case SPEED_100:
1208 phydev->supported |= PHY_100BT_FEATURES;
1209 case SPEED_10:
1210 phydev->supported |= PHY_10BT_FEATURES;
1211 }
1212 }
1213}
1214
b3df0da8
RD
1215/**
1216 * phy_probe - probe and init a PHY device
1217 * @dev: device to probe and init
00db8189 1218 *
b3df0da8 1219 * Description: Take care of setting up the phy_device structure,
00db8189
AF
1220 * set the state to READY (the driver's init function should
1221 * set it to STARTING if needed).
1222 */
1223static int phy_probe(struct device *dev)
1224{
553fe92b
SS
1225 struct phy_device *phydev = to_phy_device(dev);
1226 struct device_driver *drv = phydev->dev.driver;
1227 struct phy_driver *phydrv = to_phy_driver(drv);
00db8189
AF
1228 int err = 0;
1229
00db8189
AF
1230 phydev->drv = phydrv;
1231
2c7b4921
FF
1232 /* Disable the interrupt if the PHY doesn't support it
1233 * but the interrupt is still a valid one
1234 */
1235 if (!(phydrv->flags & PHY_HAS_INTERRUPT) &&
2f53e904 1236 phy_interrupt_is_valid(phydev))
00db8189
AF
1237 phydev->irq = PHY_POLL;
1238
4284b6a5
FF
1239 if (phydrv->flags & PHY_IS_INTERNAL)
1240 phydev->is_internal = true;
1241
35b5f6b1 1242 mutex_lock(&phydev->lock);
00db8189
AF
1243
1244 /* Start out supporting everything. Eventually,
1245 * a controller will attach, and may modify one
2f53e904
SS
1246 * or both of these values
1247 */
00db8189 1248 phydev->supported = phydrv->features;
de906af1
SH
1249 of_set_phy_supported(phydev);
1250 phydev->advertising = phydev->supported;
00db8189
AF
1251
1252 /* Set the state to READY by default */
1253 phydev->state = PHY_READY;
1254
1255 if (phydev->drv->probe)
1256 err = phydev->drv->probe(phydev);
1257
35b5f6b1 1258 mutex_unlock(&phydev->lock);
00db8189 1259
00db8189
AF
1260 return err;
1261}
1262
1263static int phy_remove(struct device *dev)
1264{
553fe92b 1265 struct phy_device *phydev = to_phy_device(dev);
00db8189 1266
35b5f6b1 1267 mutex_lock(&phydev->lock);
00db8189 1268 phydev->state = PHY_DOWN;
35b5f6b1 1269 mutex_unlock(&phydev->lock);
00db8189
AF
1270
1271 if (phydev->drv->remove)
1272 phydev->drv->remove(phydev);
00db8189
AF
1273 phydev->drv = NULL;
1274
1275 return 0;
1276}
1277
b3df0da8
RD
1278/**
1279 * phy_driver_register - register a phy_driver with the PHY layer
1280 * @new_driver: new phy_driver to register
1281 */
00db8189
AF
1282int phy_driver_register(struct phy_driver *new_driver)
1283{
1284 int retval;
1285
00db8189
AF
1286 new_driver->driver.name = new_driver->name;
1287 new_driver->driver.bus = &mdio_bus_type;
1288 new_driver->driver.probe = phy_probe;
1289 new_driver->driver.remove = phy_remove;
1290
1291 retval = driver_register(&new_driver->driver);
00db8189 1292 if (retval) {
8d242488
JP
1293 pr_err("%s: Error %d in registering driver\n",
1294 new_driver->name, retval);
00db8189
AF
1295
1296 return retval;
1297 }
1298
f2511f13 1299 pr_debug("%s: Registered new driver\n", new_driver->name);
00db8189
AF
1300
1301 return 0;
1302}
1303EXPORT_SYMBOL(phy_driver_register);
1304
d5bf9071
CH
1305int phy_drivers_register(struct phy_driver *new_driver, int n)
1306{
1307 int i, ret = 0;
1308
1309 for (i = 0; i < n; i++) {
1310 ret = phy_driver_register(new_driver + i);
1311 if (ret) {
1312 while (i-- > 0)
1313 phy_driver_unregister(new_driver + i);
1314 break;
1315 }
1316 }
1317 return ret;
1318}
1319EXPORT_SYMBOL(phy_drivers_register);
1320
00db8189
AF
1321void phy_driver_unregister(struct phy_driver *drv)
1322{
1323 driver_unregister(&drv->driver);
1324}
1325EXPORT_SYMBOL(phy_driver_unregister);
1326
d5bf9071
CH
1327void phy_drivers_unregister(struct phy_driver *drv, int n)
1328{
1329 int i;
2f53e904
SS
1330
1331 for (i = 0; i < n; i++)
d5bf9071 1332 phy_driver_unregister(drv + i);
d5bf9071
CH
1333}
1334EXPORT_SYMBOL(phy_drivers_unregister);
1335
ab2145ed
SX
1336static struct phy_driver genphy_driver[] = {
1337{
e1393456
AF
1338 .phy_id = 0xffffffff,
1339 .phy_id_mask = 0xffffffff,
1340 .name = "Generic PHY",
9df81dd7 1341 .soft_reset = genphy_soft_reset,
e1393456 1342 .config_init = genphy_config_init,
c242a472
SH
1343 .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
1344 SUPPORTED_AUI | SUPPORTED_FIBRE |
1345 SUPPORTED_BNC,
e1393456 1346 .config_aneg = genphy_config_aneg,
76a423a3 1347 .aneg_done = genphy_aneg_done,
e1393456 1348 .read_status = genphy_read_status,
0f0ca340
GC
1349 .suspend = genphy_suspend,
1350 .resume = genphy_resume,
e109374f 1351 .driver = { .owner = THIS_MODULE, },
124059fd
AF
1352}, {
1353 .phy_id = 0xffffffff,
1354 .phy_id_mask = 0xffffffff,
1355 .name = "Generic 10G PHY",
9df81dd7 1356 .soft_reset = gen10g_soft_reset,
124059fd
AF
1357 .config_init = gen10g_config_init,
1358 .features = 0,
1359 .config_aneg = gen10g_config_aneg,
1360 .read_status = gen10g_read_status,
1361 .suspend = gen10g_suspend,
1362 .resume = gen10g_resume,
1363 .driver = {.owner = THIS_MODULE, },
ab2145ed 1364} };
00db8189 1365
67c4f3fa 1366static int __init phy_init(void)
00db8189 1367{
67c4f3fa 1368 int rc;
67c4f3fa
JG
1369
1370 rc = mdio_bus_init();
1371 if (rc)
e1393456 1372 return rc;
00db8189 1373
ab2145ed
SX
1374 rc = phy_drivers_register(genphy_driver,
1375 ARRAY_SIZE(genphy_driver));
e1393456
AF
1376 if (rc)
1377 mdio_bus_exit();
67c4f3fa 1378
67c4f3fa 1379 return rc;
00db8189
AF
1380}
1381
67c4f3fa 1382static void __exit phy_exit(void)
00db8189 1383{
ab2145ed
SX
1384 phy_drivers_unregister(genphy_driver,
1385 ARRAY_SIZE(genphy_driver));
e1393456 1386 mdio_bus_exit();
00db8189
AF
1387}
1388
e1393456 1389subsys_initcall(phy_init);
67c4f3fa 1390module_exit(phy_exit);
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