net: phy: spi_ks8995: verify chip and determine revision
[deliverable/linux.git] / drivers / net / phy / spi_ks8995.c
CommitLineData
a8e510f6 1/*
240a12d5 2 * SPI driver for Micrel/Kendin KS8995M and KSZ8864RMN ethernet switches
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3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg at openwrt.org>
5 *
6 * This file was based on: drivers/spi/at25.c
7 * Copyright (C) 2006 David Brownell
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
8d242488
JP
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
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16#include <linux/types.h>
17#include <linux/kernel.h>
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18#include <linux/module.h>
19#include <linux/delay.h>
20#include <linux/device.h>
21
22#include <linux/spi/spi.h>
23
24#define DRV_VERSION "0.1.1"
25#define DRV_DESC "Micrel KS8995 Ethernet switch SPI driver"
26
27/* ------------------------------------------------------------------------ */
28
29#define KS8995_REG_ID0 0x00 /* Chip ID0 */
30#define KS8995_REG_ID1 0x01 /* Chip ID1 */
31
32#define KS8995_REG_GC0 0x02 /* Global Control 0 */
33#define KS8995_REG_GC1 0x03 /* Global Control 1 */
34#define KS8995_REG_GC2 0x04 /* Global Control 2 */
35#define KS8995_REG_GC3 0x05 /* Global Control 3 */
36#define KS8995_REG_GC4 0x06 /* Global Control 4 */
37#define KS8995_REG_GC5 0x07 /* Global Control 5 */
38#define KS8995_REG_GC6 0x08 /* Global Control 6 */
39#define KS8995_REG_GC7 0x09 /* Global Control 7 */
40#define KS8995_REG_GC8 0x0a /* Global Control 8 */
41#define KS8995_REG_GC9 0x0b /* Global Control 9 */
42
43#define KS8995_REG_PC(p, r) ((0x10 * p) + r) /* Port Control */
44#define KS8995_REG_PS(p, r) ((0x10 * p) + r + 0xe) /* Port Status */
45
46#define KS8995_REG_TPC0 0x60 /* TOS Priority Control 0 */
47#define KS8995_REG_TPC1 0x61 /* TOS Priority Control 1 */
48#define KS8995_REG_TPC2 0x62 /* TOS Priority Control 2 */
49#define KS8995_REG_TPC3 0x63 /* TOS Priority Control 3 */
50#define KS8995_REG_TPC4 0x64 /* TOS Priority Control 4 */
51#define KS8995_REG_TPC5 0x65 /* TOS Priority Control 5 */
52#define KS8995_REG_TPC6 0x66 /* TOS Priority Control 6 */
53#define KS8995_REG_TPC7 0x67 /* TOS Priority Control 7 */
54
55#define KS8995_REG_MAC0 0x68 /* MAC address 0 */
56#define KS8995_REG_MAC1 0x69 /* MAC address 1 */
57#define KS8995_REG_MAC2 0x6a /* MAC address 2 */
58#define KS8995_REG_MAC3 0x6b /* MAC address 3 */
59#define KS8995_REG_MAC4 0x6c /* MAC address 4 */
60#define KS8995_REG_MAC5 0x6d /* MAC address 5 */
61
62#define KS8995_REG_IAC0 0x6e /* Indirect Access Control 0 */
63#define KS8995_REG_IAC1 0x6f /* Indirect Access Control 0 */
64#define KS8995_REG_IAD7 0x70 /* Indirect Access Data 7 */
65#define KS8995_REG_IAD6 0x71 /* Indirect Access Data 6 */
66#define KS8995_REG_IAD5 0x72 /* Indirect Access Data 5 */
67#define KS8995_REG_IAD4 0x73 /* Indirect Access Data 4 */
68#define KS8995_REG_IAD3 0x74 /* Indirect Access Data 3 */
69#define KS8995_REG_IAD2 0x75 /* Indirect Access Data 2 */
70#define KS8995_REG_IAD1 0x76 /* Indirect Access Data 1 */
71#define KS8995_REG_IAD0 0x77 /* Indirect Access Data 0 */
72
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73#define KSZ8864_REG_ID1 0xfe /* Chip ID in bit 7 */
74
a8e510f6 75#define KS8995_REGS_SIZE 0x80
240a12d5 76#define KSZ8864_REGS_SIZE 0x100
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77
78#define ID1_CHIPID_M 0xf
79#define ID1_CHIPID_S 4
80#define ID1_REVISION_M 0x7
81#define ID1_REVISION_S 1
82#define ID1_START_SW 1 /* start the switch */
83
84#define FAMILY_KS8995 0x95
85#define CHIPID_M 0
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86#define KS8995_CHIP_ID 0x00
87#define KSZ8864_CHIP_ID 0x01
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88
89#define KS8995_CMD_WRITE 0x02U
90#define KS8995_CMD_READ 0x03U
91
92#define KS8995_RESET_DELAY 10 /* usec */
93
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94enum ks8995_chip_variant {
95 ks8995,
96 ksz8864,
97 max_variant
98};
99
100struct ks8995_chip_params {
101 char *name;
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102 int family_id;
103 int chip_id;
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104 int regs_size;
105};
106
107static const struct ks8995_chip_params ks8995_chip[] = {
108 [ks8995] = {
109 .name = "KS8995MA",
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110 .family_id = FAMILY_KS8995,
111 .chip_id = KS8995_CHIP_ID,
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112 .regs_size = KS8995_REGS_SIZE,
113 },
114 [ksz8864] = {
115 .name = "KSZ8864RMN",
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116 .family_id = FAMILY_KS8995,
117 .chip_id = KSZ8864_CHIP_ID,
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118 .regs_size = KSZ8864_REGS_SIZE,
119 },
120};
121
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122struct ks8995_pdata {
123 /* not yet implemented */
124};
125
126struct ks8995_switch {
127 struct spi_device *spi;
128 struct mutex lock;
129 struct ks8995_pdata *pdata;
240a12d5 130 struct bin_attribute regs_attr;
aa54c8da 131 const struct ks8995_chip_params *chip;
484e36ff 132 int revision_id;
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133};
134
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135static const struct spi_device_id ks8995_id[] = {
136 {"ks8995", ks8995},
137 {"ksz8864", ksz8864},
138 { }
139};
140MODULE_DEVICE_TABLE(spi, ks8995_id);
141
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142static inline u8 get_chip_id(u8 val)
143{
144 return (val >> ID1_CHIPID_S) & ID1_CHIPID_M;
145}
146
147static inline u8 get_chip_rev(u8 val)
148{
149 return (val >> ID1_REVISION_S) & ID1_REVISION_M;
150}
151
152/* ------------------------------------------------------------------------ */
153static int ks8995_read(struct ks8995_switch *ks, char *buf,
154 unsigned offset, size_t count)
155{
156 u8 cmd[2];
157 struct spi_transfer t[2];
158 struct spi_message m;
159 int err;
160
161 spi_message_init(&m);
162
163 memset(&t, 0, sizeof(t));
164
165 t[0].tx_buf = cmd;
166 t[0].len = sizeof(cmd);
167 spi_message_add_tail(&t[0], &m);
168
169 t[1].rx_buf = buf;
170 t[1].len = count;
171 spi_message_add_tail(&t[1], &m);
172
173 cmd[0] = KS8995_CMD_READ;
174 cmd[1] = offset;
175
176 mutex_lock(&ks->lock);
177 err = spi_sync(ks->spi, &m);
178 mutex_unlock(&ks->lock);
179
180 return err ? err : count;
181}
182
183
184static int ks8995_write(struct ks8995_switch *ks, char *buf,
185 unsigned offset, size_t count)
186{
187 u8 cmd[2];
188 struct spi_transfer t[2];
189 struct spi_message m;
190 int err;
191
192 spi_message_init(&m);
193
194 memset(&t, 0, sizeof(t));
195
196 t[0].tx_buf = cmd;
197 t[0].len = sizeof(cmd);
198 spi_message_add_tail(&t[0], &m);
199
200 t[1].tx_buf = buf;
201 t[1].len = count;
202 spi_message_add_tail(&t[1], &m);
203
204 cmd[0] = KS8995_CMD_WRITE;
205 cmd[1] = offset;
206
207 mutex_lock(&ks->lock);
208 err = spi_sync(ks->spi, &m);
209 mutex_unlock(&ks->lock);
210
211 return err ? err : count;
212}
213
214static inline int ks8995_read_reg(struct ks8995_switch *ks, u8 addr, u8 *buf)
215{
7aff9675 216 return ks8995_read(ks, buf, addr, 1) != 1;
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217}
218
219static inline int ks8995_write_reg(struct ks8995_switch *ks, u8 addr, u8 val)
220{
221 char buf = val;
222
7aff9675 223 return ks8995_write(ks, &buf, addr, 1) != 1;
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224}
225
226/* ------------------------------------------------------------------------ */
227
228static int ks8995_stop(struct ks8995_switch *ks)
229{
230 return ks8995_write_reg(ks, KS8995_REG_ID1, 0);
231}
232
233static int ks8995_start(struct ks8995_switch *ks)
234{
235 return ks8995_write_reg(ks, KS8995_REG_ID1, 1);
236}
237
238static int ks8995_reset(struct ks8995_switch *ks)
239{
240 int err;
241
242 err = ks8995_stop(ks);
243 if (err)
244 return err;
245
246 udelay(KS8995_RESET_DELAY);
247
248 return ks8995_start(ks);
249}
250
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251static ssize_t ks8995_registers_read(struct file *filp, struct kobject *kobj,
252 struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count)
253{
254 struct device *dev;
255 struct ks8995_switch *ks8995;
256
257 dev = container_of(kobj, struct device, kobj);
258 ks8995 = dev_get_drvdata(dev);
259
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260 return ks8995_read(ks8995, buf, off, count);
261}
262
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263static ssize_t ks8995_registers_write(struct file *filp, struct kobject *kobj,
264 struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count)
265{
266 struct device *dev;
267 struct ks8995_switch *ks8995;
268
269 dev = container_of(kobj, struct device, kobj);
270 ks8995 = dev_get_drvdata(dev);
271
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272 return ks8995_write(ks8995, buf, off, count);
273}
274
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275/* ks8995_get_revision - get chip revision
276 * @ks: pointer to switch instance
277 *
278 * Verify chip family and id and get chip revision.
279 */
280static int ks8995_get_revision(struct ks8995_switch *ks)
281{
282 int err;
283 u8 id0, id1, ksz8864_id;
284
285 /* read family id */
286 err = ks8995_read_reg(ks, KS8995_REG_ID0, &id0);
287 if (err) {
288 err = -EIO;
289 goto err_out;
290 }
291
292 /* verify family id */
293 if (id0 != ks->chip->family_id) {
294 dev_err(&ks->spi->dev, "chip family id mismatch: expected 0x%02x but 0x%02x read\n",
295 ks->chip->family_id, id0);
296 err = -ENODEV;
297 goto err_out;
298 }
299
300 switch (ks->chip->family_id) {
301 case FAMILY_KS8995:
302 /* try reading chip id at CHIP ID1 */
303 err = ks8995_read_reg(ks, KS8995_REG_ID1, &id1);
304 if (err) {
305 err = -EIO;
306 goto err_out;
307 }
308
309 /* verify chip id */
310 if ((get_chip_id(id1) == CHIPID_M) &&
311 (get_chip_id(id1) == ks->chip->chip_id)) {
312 /* KS8995MA */
313 ks->revision_id = get_chip_rev(id1);
314 } else if (get_chip_id(id1) != CHIPID_M) {
315 /* KSZ8864RMN */
316 err = ks8995_read_reg(ks, KS8995_REG_ID1, &ksz8864_id);
317 if (err) {
318 err = -EIO;
319 goto err_out;
320 }
321
322 if ((ksz8864_id & 0x80) &&
323 (ks->chip->chip_id == KSZ8864_CHIP_ID)) {
324 ks->revision_id = get_chip_rev(id1);
325 }
326
327 } else {
328 dev_err(&ks->spi->dev, "unsupported chip id for KS8995 family: 0x%02x\n",
329 id1);
330 err = -ENODEV;
331 }
332 break;
333 default:
334 dev_err(&ks->spi->dev, "unsupported family id: 0x%02x\n", id0);
335 err = -ENODEV;
336 break;
337 }
338err_out:
339 return err;
340}
341
240a12d5 342static const struct bin_attribute ks8995_registers_attr = {
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343 .attr = {
344 .name = "registers",
345 .mode = S_IRUSR | S_IWUSR,
346 },
347 .size = KS8995_REGS_SIZE,
348 .read = ks8995_registers_read,
349 .write = ks8995_registers_write,
350};
351
352/* ------------------------------------------------------------------------ */
633d1594 353static int ks8995_probe(struct spi_device *spi)
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354{
355 struct ks8995_switch *ks;
356 struct ks8995_pdata *pdata;
a8e510f6 357 int err;
aa54c8da 358 int variant = spi_get_device_id(spi)->driver_data;
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359
360 /* Chip description */
361 pdata = spi->dev.platform_data;
362
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363 if (variant >= max_variant) {
364 dev_err(&spi->dev, "bad chip variant %d\n", variant);
365 return -ENODEV;
366 }
367
b32a8b64 368 ks = devm_kzalloc(&spi->dev, sizeof(*ks), GFP_KERNEL);
e68ed8f0 369 if (!ks)
a8e510f6 370 return -ENOMEM;
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371
372 mutex_init(&ks->lock);
373 ks->pdata = pdata;
374 ks->spi = spi_dev_get(spi);
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375 ks->chip = &ks8995_chip[variant];
376
5d5f1846 377 spi_set_drvdata(spi, ks);
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378
379 spi->mode = SPI_MODE_0;
380 spi->bits_per_word = 8;
381 err = spi_setup(spi);
382 if (err) {
383 dev_err(&spi->dev, "spi_setup failed, err=%d\n", err);
b32a8b64 384 return err;
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385 }
386
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387 err = ks8995_get_revision(ks);
388 if (err)
b32a8b64 389 return err;
a8e510f6 390
aa54c8da 391 ks->regs_attr.size = ks->chip->regs_size;
240a12d5 392 memcpy(&ks->regs_attr, &ks8995_registers_attr, sizeof(ks->regs_attr));
240a12d5 393
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FL
394 err = ks8995_reset(ks);
395 if (err)
b32a8b64 396 return err;
a8e510f6 397
240a12d5 398 err = sysfs_create_bin_file(&spi->dev.kobj, &ks->regs_attr);
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399 if (err) {
400 dev_err(&spi->dev, "unable to create sysfs file, err=%d\n",
401 err);
b32a8b64 402 return err;
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FL
403 }
404
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405 dev_info(&spi->dev, "%s device found, Chip ID:%x, Revision:%x\n",
406 ks->chip->name, ks->chip->chip_id, ks->revision_id);
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407
408 return 0;
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409}
410
633d1594 411static int ks8995_remove(struct spi_device *spi)
a8e510f6 412{
30349bdb
VZ
413 struct ks8995_switch *ks = spi_get_drvdata(spi);
414
415 sysfs_remove_bin_file(&spi->dev.kobj, &ks->regs_attr);
a8e510f6 416
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FL
417 return 0;
418}
419
420/* ------------------------------------------------------------------------ */
421
422static struct spi_driver ks8995_driver = {
423 .driver = {
424 .name = "spi-ks8995",
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425 },
426 .probe = ks8995_probe,
633d1594 427 .remove = ks8995_remove,
aa54c8da 428 .id_table = ks8995_id,
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429};
430
1a9561a3 431module_spi_driver(ks8995_driver);
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432
433MODULE_DESCRIPTION(DRV_DESC);
434MODULE_VERSION(DRV_VERSION);
435MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>");
436MODULE_LICENSE("GPL v2");
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