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ef82a306 JL |
1 | /* |
2 | * Driver for Vitesse PHYs | |
3 | * | |
4 | * Author: Kriston Carson | |
5 | * | |
6 | * Copyright (c) 2005 Freescale Semiconductor, Inc. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
ef82a306 JL |
15 | #include <linux/kernel.h> |
16 | #include <linux/module.h> | |
17 | #include <linux/mii.h> | |
18 | #include <linux/ethtool.h> | |
19 | #include <linux/phy.h> | |
20 | ||
21 | /* Vitesse Extended Control Register 1 */ | |
22 | #define MII_VSC8244_EXT_CON1 0x17 | |
23 | #define MII_VSC8244_EXTCON1_INIT 0x0000 | |
24 | ||
25 | /* Vitesse Interrupt Mask Register */ | |
26 | #define MII_VSC8244_IMASK 0x19 | |
27 | #define MII_VSC8244_IMASK_IEN 0x8000 | |
28 | #define MII_VSC8244_IMASK_SPEED 0x4000 | |
29 | #define MII_VSC8244_IMASK_LINK 0x2000 | |
30 | #define MII_VSC8244_IMASK_DUPLEX 0x1000 | |
31 | #define MII_VSC8244_IMASK_MASK 0xf000 | |
32 | ||
33 | /* Vitesse Interrupt Status Register */ | |
34 | #define MII_VSC8244_ISTAT 0x1a | |
35 | #define MII_VSC8244_ISTAT_STATUS 0x8000 | |
36 | #define MII_VSC8244_ISTAT_SPEED 0x4000 | |
37 | #define MII_VSC8244_ISTAT_LINK 0x2000 | |
38 | #define MII_VSC8244_ISTAT_DUPLEX 0x1000 | |
39 | ||
40 | /* Vitesse Auxiliary Control/Status Register */ | |
41 | #define MII_VSC8244_AUX_CONSTAT 0x1c | |
42 | #define MII_VSC8244_AUXCONSTAT_INIT 0x0004 | |
43 | #define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020 | |
44 | #define MII_VSC8244_AUXCONSTAT_SPEED 0x0018 | |
45 | #define MII_VSC8244_AUXCONSTAT_GBIT 0x0010 | |
46 | #define MII_VSC8244_AUXCONSTAT_100 0x0008 | |
47 | ||
48 | MODULE_DESCRIPTION("Vitesse PHY driver"); | |
49 | MODULE_AUTHOR("Kriston Carson"); | |
50 | MODULE_LICENSE("GPL"); | |
51 | ||
52 | static int vsc824x_config_init(struct phy_device *phydev) | |
53 | { | |
54 | int err; | |
55 | ||
56 | err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT, | |
57 | MII_VSC8244_AUXCONSTAT_INIT); | |
58 | if (err < 0) | |
59 | return err; | |
60 | ||
61 | err = phy_write(phydev, MII_VSC8244_EXT_CON1, | |
62 | MII_VSC8244_EXTCON1_INIT); | |
63 | return err; | |
64 | } | |
65 | ||
66 | static int vsc824x_ack_interrupt(struct phy_device *phydev) | |
67 | { | |
68 | int err = phy_read(phydev, MII_VSC8244_ISTAT); | |
69 | ||
70 | return (err < 0) ? err : 0; | |
71 | } | |
72 | ||
73 | static int vsc824x_config_intr(struct phy_device *phydev) | |
74 | { | |
75 | int err; | |
76 | ||
77 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) | |
78 | err = phy_write(phydev, MII_VSC8244_IMASK, | |
79 | MII_VSC8244_IMASK_MASK); | |
80 | else | |
81 | err = phy_write(phydev, MII_VSC8244_IMASK, 0); | |
82 | return err; | |
83 | } | |
84 | ||
85 | /* Vitesse 824x */ | |
86 | static struct phy_driver vsc8244_driver = { | |
87 | .phy_id = 0x000fc6c2, | |
88 | .name = "Vitesse VSC8244", | |
89 | .phy_id_mask = 0x000fffc0, | |
90 | .features = PHY_GBIT_FEATURES, | |
91 | .flags = PHY_HAS_INTERRUPT, | |
92 | .config_init = &vsc824x_config_init, | |
93 | .config_aneg = &genphy_config_aneg, | |
94 | .read_status = &genphy_read_status, | |
95 | .ack_interrupt = &vsc824x_ack_interrupt, | |
96 | .config_intr = &vsc824x_config_intr, | |
97 | .driver = { .owner = THIS_MODULE,}, | |
98 | }; | |
99 | ||
100 | static int __init vsc8244_init(void) | |
101 | { | |
102 | return phy_driver_register(&vsc8244_driver); | |
103 | } | |
104 | ||
105 | static void __exit vsc8244_exit(void) | |
106 | { | |
107 | phy_driver_unregister(&vsc8244_driver); | |
108 | } | |
109 | ||
110 | module_init(vsc8244_init); | |
111 | module_exit(vsc8244_exit); |