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sfc: Rename register I/O header and functions used by both Falcon and Siena
[deliverable/linux.git] / drivers / net / sfc / falcon_boards.c
CommitLineData
8ceee660
BH		 1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
04300d24 3 * Copyright 2007-2008 Solarflare Communications Inc.
8ceee660
BH		 4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
c9597d4f
BH		 10#include <linux/rtnetlink.h>
11
8ceee660
BH		 12#include "net_driver.h"
13#include "phy.h"
8ceee660 14#include "efx.h"
c9597d4f 15#include "falcon.h"
3e6c4538 16#include "regs.h"
12d00cad 17#include "io.h"
3e133c44 18#include "workarounds.h"
8ceee660
BH		 19
20/* Macros for unpacking the board revision */
21/* The revision info is in host byte order. */
3473a5b1
BH		 22#define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
23#define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
24#define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
25
26/* Board types */
c9597d4f 27#define FALCON_BOARD_SFE4001 0x01
3473a5b1
BH		 28#define FALCON_BOARD_SFE4002 0x02
29#define FALCON_BOARD_SFN4111T 0x51
30#define FALCON_BOARD_SFN4112F 0x52
8ceee660
BH		 31
32/* Blink support. If the PHY has no auto-blink mode so we hang it off a timer */
33#define BLINK_INTERVAL (HZ/2)
34
35static void blink_led_timer(unsigned long context)
36{
37 struct efx_nic *efx = (struct efx_nic *)context;
38 struct efx_blinker *bl = &efx->board_info.blinker;
8129d217 39 efx->board_info.set_id_led(efx, bl->state);
8ceee660 40 bl->state = !bl->state;
4cc58bde
BH		 41 if (bl->resubmit)
42 mod_timer(&bl->timer, jiffies + BLINK_INTERVAL);
8ceee660
BH		 43}
44
dc8cfa55 45static void board_blink(struct efx_nic *efx, bool blink)
8ceee660
BH		 46{
47 struct efx_blinker *blinker = &efx->board_info.blinker;
48
49 /* The rtnl mutex serialises all ethtool ioctls, so
50 * nothing special needs doing here. */
51 if (blink) {
dc8cfa55
BH		 52 blinker->resubmit = true;
53 blinker->state = false;
8ceee660
BH		 54 setup_timer(&blinker->timer, blink_led_timer,
55 (unsigned long)efx);
4cc58bde 56 mod_timer(&blinker->timer, jiffies + BLINK_INTERVAL);
8ceee660 57 } else {
dc8cfa55 58 blinker->resubmit = false;
8ceee660
BH		 59 if (blinker->timer.function)
60 del_timer_sync(&blinker->timer);
8129d217 61 efx->board_info.init_leds(efx);
8ceee660
BH		 62 }
63}
64
3e133c44
BH		 65/*****************************************************************************
66 * Support for LM87 sensor chip used on several boards
67 */
68#define LM87_REG_ALARMS1 0x41
69#define LM87_REG_ALARMS2 0x42
70#define LM87_IN_LIMITS(nr, _min, _max) \
71 0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
72#define LM87_AIN_LIMITS(nr, _min, _max) \
73 0x3B + (nr), _max, 0x1A + (nr), _min
74#define LM87_TEMP_INT_LIMITS(_min, _max) \
75 0x39, _max, 0x3A, _min
76#define LM87_TEMP_EXT1_LIMITS(_min, _max) \
77 0x37, _max, 0x38, _min
78
79#define LM87_ALARM_TEMP_INT 0x10
80#define LM87_ALARM_TEMP_EXT1 0x20
81
82#if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
83
84static int efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
85 const u8 *reg_values)
86{
87 struct i2c_client *client = i2c_new_device(&efx->i2c_adap, info);
88 int rc;
89
90 if (!client)
91 return -EIO;
92
93 while (*reg_values) {
94 u8 reg = *reg_values++;
95 u8 value = *reg_values++;
96 rc = i2c_smbus_write_byte_data(client, reg, value);
97 if (rc)
98 goto err;
99 }
100
101 efx->board_info.hwmon_client = client;
102 return 0;
103
104err:
105 i2c_unregister_device(client);
106 return rc;
107}
108
109static void efx_fini_lm87(struct efx_nic *efx)
110{
111 i2c_unregister_device(efx->board_info.hwmon_client);
112}
113
114static int efx_check_lm87(struct efx_nic *efx, unsigned mask)
115{
116 struct i2c_client *client = efx->board_info.hwmon_client;
117 s32 alarms1, alarms2;
118
119 /* If link is up then do not monitor temperature */
120 if (EFX_WORKAROUND_7884(efx) && efx->link_up)
121 return 0;
122
123 alarms1 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
124 alarms2 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
125 if (alarms1 < 0)
126 return alarms1;
127 if (alarms2 < 0)
128 return alarms2;
129 alarms1 &= mask;
130 alarms2 &= mask >> 8;
131 if (alarms1 || alarms2) {
132 EFX_ERR(efx,
133 "LM87 detected a hardware failure (status %02x:%02x)"
134 "%s%s\n",
135 alarms1, alarms2,
136 (alarms1 & LM87_ALARM_TEMP_INT) ? " INTERNAL" : "",
137 (alarms1 & LM87_ALARM_TEMP_EXT1) ? " EXTERNAL" : "");
138 return -ERANGE;
139 }
140
141 return 0;
142}
143
144#else /* !CONFIG_SENSORS_LM87 */
145
146static inline int
147efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
148 const u8 *reg_values)
149{
150 return 0;
151}
152static inline void efx_fini_lm87(struct efx_nic *efx)
153{
154}
155static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
156{
157 return 0;
158}
159
160#endif /* CONFIG_SENSORS_LM87 */
161
c9597d4f
BH		 162/*****************************************************************************
163 * Support for the SFE4001 and SFN4111T NICs.
164 *
165 * The SFE4001 does not power-up fully at reset due to its high power
166 * consumption. We control its power via a PCA9539 I/O expander.
167 * Both boards have a MAX6647 temperature monitor which we expose to
168 * the lm90 driver.
169 *
170 * This also provides minimal support for reflashing the PHY, which is
171 * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
172 * On SFE4001 rev A2 and later this is connected to the 3V3X output of
173 * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
174 * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
175 * exclusive with the network device being open.
176 */
177
178/**************************************************************************
179 * Support for I2C IO Expander device on SFE40001
180 */
181#define PCA9539 0x74
182
183#define P0_IN 0x00
184#define P0_OUT 0x02
185#define P0_INVERT 0x04
186#define P0_CONFIG 0x06
187
188#define P0_EN_1V0X_LBN 0
189#define P0_EN_1V0X_WIDTH 1
190#define P0_EN_1V2_LBN 1
191#define P0_EN_1V2_WIDTH 1
192#define P0_EN_2V5_LBN 2
193#define P0_EN_2V5_WIDTH 1
194#define P0_EN_3V3X_LBN 3
195#define P0_EN_3V3X_WIDTH 1
196#define P0_EN_5V_LBN 4
197#define P0_EN_5V_WIDTH 1
198#define P0_SHORTEN_JTAG_LBN 5
199#define P0_SHORTEN_JTAG_WIDTH 1
200#define P0_X_TRST_LBN 6
201#define P0_X_TRST_WIDTH 1
202#define P0_DSP_RESET_LBN 7
203#define P0_DSP_RESET_WIDTH 1
204
205#define P1_IN 0x01
206#define P1_OUT 0x03
207#define P1_INVERT 0x05
208#define P1_CONFIG 0x07
209
210#define P1_AFE_PWD_LBN 0
211#define P1_AFE_PWD_WIDTH 1
212#define P1_DSP_PWD25_LBN 1
213#define P1_DSP_PWD25_WIDTH 1
214#define P1_RESERVED_LBN 2
215#define P1_RESERVED_WIDTH 2
216#define P1_SPARE_LBN 4
217#define P1_SPARE_WIDTH 4
218
219/* Temperature Sensor */
220#define MAX664X_REG_RSL 0x02
221#define MAX664X_REG_WLHO 0x0B
222
223static void sfe4001_poweroff(struct efx_nic *efx)
224{
225 struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
226 struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
227
228 /* Turn off all power rails and disable outputs */
229 i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
230 i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
231 i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
232
233 /* Clear any over-temperature alert */
234 i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
235}
236
237static int sfe4001_poweron(struct efx_nic *efx)
238{
239 struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
240 struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
241 unsigned int i, j;
242 int rc;
243 u8 out;
244
245 /* Clear any previous over-temperature alert */
246 rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
247 if (rc < 0)
248 return rc;
249
250 /* Enable port 0 and port 1 outputs on IO expander */
251 rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
252 if (rc)
253 return rc;
254 rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
255 0xff & ~(1 << P1_SPARE_LBN));
256 if (rc)
257 goto fail_on;
258
259 /* If PHY power is on, turn it all off and wait 1 second to
260 * ensure a full reset.
261 */
262 rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
263 if (rc < 0)
264 goto fail_on;
265 out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
266 (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
267 (0 << P0_EN_1V0X_LBN));
268 if (rc != out) {
269 EFX_INFO(efx, "power-cycling PHY\n");
270 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
271 if (rc)
272 goto fail_on;
273 schedule_timeout_uninterruptible(HZ);
274 }
275
276 for (i = 0; i < 20; ++i) {
277 /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
278 out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
279 (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
280 (1 << P0_X_TRST_LBN));
281 if (efx->phy_mode & PHY_MODE_SPECIAL)
282 out |= 1 << P0_EN_3V3X_LBN;
283
284 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
285 if (rc)
286 goto fail_on;
287 msleep(10);
288
289 /* Turn on 1V power rail */
290 out &= ~(1 << P0_EN_1V0X_LBN);
291 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
292 if (rc)
293 goto fail_on;
294
295 EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
296
297 /* In flash config mode, DSP does not turn on AFE, so
298 * just wait 1 second.
299 */
300 if (efx->phy_mode & PHY_MODE_SPECIAL) {
301 schedule_timeout_uninterruptible(HZ);
302 return 0;
303 }
304
305 for (j = 0; j < 10; ++j) {
306 msleep(100);
307
308 /* Check DSP has asserted AFE power line */
309 rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
310 if (rc < 0)
311 goto fail_on;
312 if (rc & (1 << P1_AFE_PWD_LBN))
313 return 0;
314 }
315 }
316
317 EFX_INFO(efx, "timed out waiting for DSP boot\n");
318 rc = -ETIMEDOUT;
319fail_on:
320 sfe4001_poweroff(efx);
321 return rc;
322}
323
324static int sfn4111t_reset(struct efx_nic *efx)
325{
326 efx_oword_t reg;
327
328 /* GPIO 3 and the GPIO register are shared with I2C, so block that */
329 mutex_lock(&efx->i2c_adap.bus_lock);
330
331 /* Pull RST_N (GPIO 2) low then let it up again, setting the
332 * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
333 * output enables; the output levels should always be 0 (low)
334 * and we rely on external pull-ups. */
12d00cad 335 efx_reado(efx, &reg, FR_AB_GPIO_CTL);
3e6c4538 336 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, true);
12d00cad 337 efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
c9597d4f 338 msleep(1000);
3e6c4538
BH		 339 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, false);
340 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN,
c9597d4f 341 !!(efx->phy_mode & PHY_MODE_SPECIAL));
12d00cad 342 efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
c9597d4f
BH		 343 msleep(1);
344
345 mutex_unlock(&efx->i2c_adap.bus_lock);
346
347 ssleep(1);
348 return 0;
349}
350
351static ssize_t show_phy_flash_cfg(struct device *dev,
352 struct device_attribute *attr, char *buf)
353{
354 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
355 return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
356}
357
358static ssize_t set_phy_flash_cfg(struct device *dev,
359 struct device_attribute *attr,
360 const char *buf, size_t count)
361{
362 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
363 enum efx_phy_mode old_mode, new_mode;
364 int err;
365
366 rtnl_lock();
367 old_mode = efx->phy_mode;
368 if (count == 0 || *buf == '0')
369 new_mode = old_mode & ~PHY_MODE_SPECIAL;
370 else
371 new_mode = PHY_MODE_SPECIAL;
372 if (old_mode == new_mode) {
373 err = 0;
374 } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
375 err = -EBUSY;
376 } else {
377 /* Reset the PHY, reconfigure the MAC and enable/disable
378 * MAC stats accordingly. */
379 efx->phy_mode = new_mode;
380 if (new_mode & PHY_MODE_SPECIAL)
381 efx_stats_disable(efx);
382 if (efx->board_info.type == FALCON_BOARD_SFE4001)
383 err = sfe4001_poweron(efx);
384 else
385 err = sfn4111t_reset(efx);
386 efx_reconfigure_port(efx);
387 if (!(new_mode & PHY_MODE_SPECIAL))
388 efx_stats_enable(efx);
389 }
390 rtnl_unlock();
391
392 return err ? err : count;
393}
394
395static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
396
397static void sfe4001_fini(struct efx_nic *efx)
398{
399 EFX_INFO(efx, "%s\n", __func__);
400
401 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
402 sfe4001_poweroff(efx);
403 i2c_unregister_device(efx->board_info.ioexp_client);
404 i2c_unregister_device(efx->board_info.hwmon_client);
405}
406
407static int sfe4001_check_hw(struct efx_nic *efx)
408{
409 s32 status;
410
411 /* If XAUI link is up then do not monitor */
412 if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
413 return 0;
414
415 /* Check the powered status of the PHY. Lack of power implies that
416 * the MAX6647 has shut down power to it, probably due to a temp.
417 * alarm. Reading the power status rather than the MAX6647 status
418 * directly because the later is read-to-clear and would thus
419 * start to power up the PHY again when polled, causing us to blip
420 * the power undesirably.
421 * We know we can read from the IO expander because we did
422 * it during power-on. Assume failure now is bad news. */
423 status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN);
424 if (status >= 0 &&
425 (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
426 return 0;
427
428 /* Use board power control, not PHY power control */
429 sfe4001_poweroff(efx);
430 efx->phy_mode = PHY_MODE_OFF;
431
432 return (status < 0) ? -EIO : -ERANGE;
433}
434
435static struct i2c_board_info sfe4001_hwmon_info = {
436 I2C_BOARD_INFO("max6647", 0x4e),
437};
438
439/* This board uses an I2C expander to provider power to the PHY, which needs to
440 * be turned on before the PHY can be used.
441 * Context: Process context, rtnl lock held
442 */
443static int sfe4001_init(struct efx_nic *efx)
444{
445 int rc;
446
447#if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
448 efx->board_info.hwmon_client =
449 i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info);
450#else
451 efx->board_info.hwmon_client =
452 i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr);
453#endif
454 if (!efx->board_info.hwmon_client)
455 return -EIO;
456
457 /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
458 rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client,
459 MAX664X_REG_WLHO, 90);
460 if (rc)
461 goto fail_hwmon;
462
463 efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);
464 if (!efx->board_info.ioexp_client) {
465 rc = -EIO;
466 goto fail_hwmon;
467 }
468
469 /* 10Xpress has fixed-function LED pins, so there is no board-specific
470 * blink code. */
471 efx->board_info.blink = tenxpress_phy_blink;
472
473 efx->board_info.monitor = sfe4001_check_hw;
474 efx->board_info.fini = sfe4001_fini;
475
476 if (efx->phy_mode & PHY_MODE_SPECIAL) {
477 /* PHY won't generate a 156.25 MHz clock and MAC stats fetch
478 * will fail. */
479 efx_stats_disable(efx);
480 }
481 rc = sfe4001_poweron(efx);
482 if (rc)
483 goto fail_ioexp;
484
485 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
486 if (rc)
487 goto fail_on;
488
489 EFX_INFO(efx, "PHY is powered on\n");
490 return 0;
491
492fail_on:
493 sfe4001_poweroff(efx);
494fail_ioexp:
495 i2c_unregister_device(efx->board_info.ioexp_client);
496fail_hwmon:
497 i2c_unregister_device(efx->board_info.hwmon_client);
498 return rc;
499}
500
501static int sfn4111t_check_hw(struct efx_nic *efx)
502{
503 s32 status;
504
505 /* If XAUI link is up then do not monitor */
506 if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
507 return 0;
508
509 /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
510 status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client,
511 MAX664X_REG_RSL);
512 if (status < 0)
513 return -EIO;
514 if (status & 0x57)
515 return -ERANGE;
516 return 0;
517}
518
519static void sfn4111t_fini(struct efx_nic *efx)
520{
521 EFX_INFO(efx, "%s\n", __func__);
522
523 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
524 i2c_unregister_device(efx->board_info.hwmon_client);
525}
526
527static struct i2c_board_info sfn4111t_a0_hwmon_info = {
528 I2C_BOARD_INFO("max6647", 0x4e),
529};
530
531static struct i2c_board_info sfn4111t_r5_hwmon_info = {
532 I2C_BOARD_INFO("max6646", 0x4d),
533};
534
535static int sfn4111t_init(struct efx_nic *efx)
536{
537 int i = 0;
538 int rc;
539
540 efx->board_info.hwmon_client =
541 i2c_new_device(&efx->i2c_adap,
542 (efx->board_info.minor < 5) ?
543 &sfn4111t_a0_hwmon_info :
544 &sfn4111t_r5_hwmon_info);
545 if (!efx->board_info.hwmon_client)
546 return -EIO;
547
548 efx->board_info.blink = tenxpress_phy_blink;
549 efx->board_info.monitor = sfn4111t_check_hw;
550 efx->board_info.fini = sfn4111t_fini;
551
552 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
553 if (rc)
554 goto fail_hwmon;
555
556 do {
557 if (efx->phy_mode & PHY_MODE_SPECIAL) {
558 /* PHY may not generate a 156.25 MHz clock and MAC
559 * stats fetch will fail. */
560 efx_stats_disable(efx);
561 sfn4111t_reset(efx);
562 }
563 rc = sft9001_wait_boot(efx);
564 if (rc == 0)
565 return 0;
566 efx->phy_mode = PHY_MODE_SPECIAL;
567 } while (rc == -EINVAL && ++i < 2);
568
569 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
570fail_hwmon:
571 i2c_unregister_device(efx->board_info.hwmon_client);
572 return rc;
573}
574
8ceee660
BH		 575/*****************************************************************************
576 * Support for the SFE4002
577 *
578 */
3e133c44
BH		 579static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
580
581static const u8 sfe4002_lm87_regs[] = {
582 LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
583 LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
584 LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
585 LM87_IN_LIMITS(3, 0xb0, 0xc9), /* 5V: 4.6-5.2V */
586 LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
587 LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
588 LM87_AIN_LIMITS(0, 0xa0, 0xb2), /* AIN1: 1.66V +/- 5% */
589 LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
590 LM87_TEMP_INT_LIMITS(10, 60), /* board */
591 LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
592 0
593};
594
595static struct i2c_board_info sfe4002_hwmon_info = {
596 I2C_BOARD_INFO("lm87", 0x2e),
597 .platform_data = &sfe4002_lm87_channel,
3e133c44
BH		 598};
599
8ceee660
BH		 600/****************************************************************************/
601/* LED allocations. Note that on rev A0 boards the schematic and the reality
602 * differ: red and green are swapped. Below is the fixed (A1) layout (there
603 * are only 3 A0 boards in existence, so no real reason to make this
604 * conditional).
605 */
606#define SFE4002_FAULT_LED (2) /* Red */
607#define SFE4002_RX_LED (0) /* Green */
608#define SFE4002_TX_LED (1) /* Amber */
609
8129d217 610static void sfe4002_init_leds(struct efx_nic *efx)
8ceee660
BH		 611{
612 /* Set the TX and RX LEDs to reflect status and activity, and the
613 * fault LED off */
614 xfp_set_led(efx, SFE4002_TX_LED,
615 QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
616 xfp_set_led(efx, SFE4002_RX_LED,
617 QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
618 xfp_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
8ceee660
BH		 619}
620
8129d217 621static void sfe4002_set_id_led(struct efx_nic *efx, bool state)
8ceee660
BH		 622{
623 xfp_set_led(efx, SFE4002_FAULT_LED, state ? QUAKE_LED_ON :
624 QUAKE_LED_OFF);
625}
626
3e133c44
BH		 627static int sfe4002_check_hw(struct efx_nic *efx)
628{
629 /* A0 board rev. 4002s report a temperature fault the whole time
630 * (bad sensor) so we mask it out. */
631 unsigned alarm_mask =
632 (efx->board_info.major == 0 && efx->board_info.minor == 0) ?
633 ~LM87_ALARM_TEMP_EXT1 : ~0;
634
635 return efx_check_lm87(efx, alarm_mask);
636}
637
8ceee660
BH		 638static int sfe4002_init(struct efx_nic *efx)
639{
3e133c44
BH		 640 int rc = efx_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
641 if (rc)
642 return rc;
643 efx->board_info.monitor = sfe4002_check_hw;
8ceee660 644 efx->board_info.init_leds = sfe4002_init_leds;
8129d217 645 efx->board_info.set_id_led = sfe4002_set_id_led;
8ceee660 646 efx->board_info.blink = board_blink;
3e133c44 647 efx->board_info.fini = efx_fini_lm87;
8ceee660
BH		 648 return 0;
649}
650
94f52cd1
BH		 651/*****************************************************************************
652 * Support for the SFN4112F
653 *
654 */
655static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
656
657static const u8 sfn4112f_lm87_regs[] = {
658 LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
659 LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
660 LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
661 LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
662 LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
663 LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
664 LM87_TEMP_INT_LIMITS(10, 60), /* board */
665 LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
666 0
667};
668
669static struct i2c_board_info sfn4112f_hwmon_info = {
670 I2C_BOARD_INFO("lm87", 0x2e),
671 .platform_data = &sfn4112f_lm87_channel,
94f52cd1
BH		 672};
673
674#define SFN4112F_ACT_LED 0
675#define SFN4112F_LINK_LED 1
676
677static void sfn4112f_init_leds(struct efx_nic *efx)
678{
679 xfp_set_led(efx, SFN4112F_ACT_LED,
680 QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
681 xfp_set_led(efx, SFN4112F_LINK_LED,
682 QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
683}
684
685static void sfn4112f_set_id_led(struct efx_nic *efx, bool state)
686{
687 xfp_set_led(efx, SFN4112F_LINK_LED,
688 state ? QUAKE_LED_ON : QUAKE_LED_OFF);
689}
690
691static int sfn4112f_check_hw(struct efx_nic *efx)
692{
693 /* Mask out unused sensors */
694 return efx_check_lm87(efx, ~0x48);
695}
696
697static int sfn4112f_init(struct efx_nic *efx)
698{
699 int rc = efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
700 if (rc)
701 return rc;
702 efx->board_info.monitor = sfn4112f_check_hw;
703 efx->board_info.init_leds = sfn4112f_init_leds;
704 efx->board_info.set_id_led = sfn4112f_set_id_led;
705 efx->board_info.blink = board_blink;
706 efx->board_info.fini = efx_fini_lm87;
707 return 0;
708}
709
8ceee660
BH		 710/* This will get expanded as board-specific details get moved out of the
711 * PHY drivers. */
3473a5b1
BH		 712struct falcon_board_data {
713 u8 type;
8ceee660
BH		 714 const char *ref_model;
715 const char *gen_type;
716 int (*init) (struct efx_nic *nic);
717};
718
8ceee660 719
3473a5b1
BH		 720static struct falcon_board_data board_data[] = {
721 { FALCON_BOARD_SFE4001, "SFE4001", "10GBASE-T adapter", sfe4001_init },
722 { FALCON_BOARD_SFE4002, "SFE4002", "XFP adapter", sfe4002_init },
723 { FALCON_BOARD_SFN4111T, "SFN4111T", "100/1000/10GBASE-T adapter",
6f158d5f 724 sfn4111t_init },
3473a5b1 725 { FALCON_BOARD_SFN4112F, "SFN4112F", "SFP+ adapter",
94f52cd1 726 sfn4112f_init },
8ceee660
BH		 727};
728
3473a5b1 729void falcon_probe_board(struct efx_nic *efx, u16 revision_info)
8ceee660 730{
3473a5b1 731 struct falcon_board_data *data = NULL;
04300d24 732 int i;
8ceee660 733
3473a5b1
BH		 734 efx->board_info.type = FALCON_BOARD_TYPE(revision_info);
735 efx->board_info.major = FALCON_BOARD_MAJOR(revision_info);
736 efx->board_info.minor = FALCON_BOARD_MINOR(revision_info);
8ceee660 737
04300d24
BH		 738 for (i = 0; i < ARRAY_SIZE(board_data); i++)
739 if (board_data[i].type == efx->board_info.type)
740 data = &board_data[i];
8ceee660 741
04300d24 742 if (data) {
8ceee660
BH		 743 EFX_INFO(efx, "board is %s rev %c%d\n",
744 (efx->pci_dev->subsystem_vendor == EFX_VENDID_SFC)
745 ? data->ref_model : data->gen_type,
746 'A' + efx->board_info.major, efx->board_info.minor);
04300d24
BH		 747 efx->board_info.init = data->init;
748 } else {
749 EFX_ERR(efx, "unknown board type %d\n", efx->board_info.type);
750 }
8ceee660 751}
Linux kernel - Deliverables
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