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sfc: Rename 'xfp' file and functions to reflect reality
[deliverable/linux.git] / drivers / net / sfc / falcon_boards.c
CommitLineData
8ceee660
BH		 1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
04300d24 3 * Copyright 2007-2008 Solarflare Communications Inc.
8ceee660
BH		 4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
c9597d4f
BH		 10#include <linux/rtnetlink.h>
11
8ceee660
BH		 12#include "net_driver.h"
13#include "phy.h"
8ceee660 14#include "efx.h"
c9597d4f 15#include "falcon.h"
3e6c4538 16#include "regs.h"
12d00cad 17#include "io.h"
3e133c44 18#include "workarounds.h"
8ceee660
BH		 19
20/* Macros for unpacking the board revision */
21/* The revision info is in host byte order. */
3473a5b1
BH		 22#define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
23#define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
24#define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
25
26/* Board types */
c9597d4f 27#define FALCON_BOARD_SFE4001 0x01
3473a5b1
BH		 28#define FALCON_BOARD_SFE4002 0x02
29#define FALCON_BOARD_SFN4111T 0x51
30#define FALCON_BOARD_SFN4112F 0x52
8ceee660
BH		 31
32/* Blink support. If the PHY has no auto-blink mode so we hang it off a timer */
33#define BLINK_INTERVAL (HZ/2)
34
35static void blink_led_timer(unsigned long context)
36{
37 struct efx_nic *efx = (struct efx_nic *)context;
7d4cdb5a
BH		 38 struct efx_board *board = &efx->board_info;
39
40 board->set_id_led(efx, board->blink_state);
41 board->blink_state = !board->blink_state;
42 if (board->blink_resubmit)
43 mod_timer(&board->blink_timer, jiffies + BLINK_INTERVAL);
8ceee660
BH		 44}
45
dc8cfa55 46static void board_blink(struct efx_nic *efx, bool blink)
8ceee660 47{
7d4cdb5a 48 struct efx_board *board = &efx->board_info;
8ceee660
BH		 49
50 /* The rtnl mutex serialises all ethtool ioctls, so
51 * nothing special needs doing here. */
52 if (blink) {
7d4cdb5a
BH		 53 board->blink_resubmit = true;
54 board->blink_state = false;
55 setup_timer(&board->blink_timer, blink_led_timer,
8ceee660 56 (unsigned long)efx);
7d4cdb5a 57 mod_timer(&board->blink_timer, jiffies + BLINK_INTERVAL);
8ceee660 58 } else {
7d4cdb5a
BH		 59 board->blink_resubmit = false;
60 if (board->blink_timer.function)
61 del_timer_sync(&board->blink_timer);
62 board->init_leds(efx);
8ceee660
BH		 63 }
64}
65
3e133c44
BH		 66/*****************************************************************************
67 * Support for LM87 sensor chip used on several boards
68 */
69#define LM87_REG_ALARMS1 0x41
70#define LM87_REG_ALARMS2 0x42
71#define LM87_IN_LIMITS(nr, _min, _max) \
72 0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
73#define LM87_AIN_LIMITS(nr, _min, _max) \
74 0x3B + (nr), _max, 0x1A + (nr), _min
75#define LM87_TEMP_INT_LIMITS(_min, _max) \
76 0x39, _max, 0x3A, _min
77#define LM87_TEMP_EXT1_LIMITS(_min, _max) \
78 0x37, _max, 0x38, _min
79
80#define LM87_ALARM_TEMP_INT 0x10
81#define LM87_ALARM_TEMP_EXT1 0x20
82
83#if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
84
85static int efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
86 const u8 *reg_values)
87{
88 struct i2c_client *client = i2c_new_device(&efx->i2c_adap, info);
89 int rc;
90
91 if (!client)
92 return -EIO;
93
94 while (*reg_values) {
95 u8 reg = *reg_values++;
96 u8 value = *reg_values++;
97 rc = i2c_smbus_write_byte_data(client, reg, value);
98 if (rc)
99 goto err;
100 }
101
102 efx->board_info.hwmon_client = client;
103 return 0;
104
105err:
106 i2c_unregister_device(client);
107 return rc;
108}
109
110static void efx_fini_lm87(struct efx_nic *efx)
111{
112 i2c_unregister_device(efx->board_info.hwmon_client);
113}
114
115static int efx_check_lm87(struct efx_nic *efx, unsigned mask)
116{
117 struct i2c_client *client = efx->board_info.hwmon_client;
118 s32 alarms1, alarms2;
119
120 /* If link is up then do not monitor temperature */
121 if (EFX_WORKAROUND_7884(efx) && efx->link_up)
122 return 0;
123
124 alarms1 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
125 alarms2 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
126 if (alarms1 < 0)
127 return alarms1;
128 if (alarms2 < 0)
129 return alarms2;
130 alarms1 &= mask;
131 alarms2 &= mask >> 8;
132 if (alarms1 || alarms2) {
133 EFX_ERR(efx,
134 "LM87 detected a hardware failure (status %02x:%02x)"
135 "%s%s\n",
136 alarms1, alarms2,
137 (alarms1 & LM87_ALARM_TEMP_INT) ? " INTERNAL" : "",
138 (alarms1 & LM87_ALARM_TEMP_EXT1) ? " EXTERNAL" : "");
139 return -ERANGE;
140 }
141
142 return 0;
143}
144
145#else /* !CONFIG_SENSORS_LM87 */
146
147static inline int
148efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
149 const u8 *reg_values)
150{
151 return 0;
152}
153static inline void efx_fini_lm87(struct efx_nic *efx)
154{
155}
156static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
157{
158 return 0;
159}
160
161#endif /* CONFIG_SENSORS_LM87 */
162
c9597d4f
BH		 163/*****************************************************************************
164 * Support for the SFE4001 and SFN4111T NICs.
165 *
166 * The SFE4001 does not power-up fully at reset due to its high power
167 * consumption. We control its power via a PCA9539 I/O expander.
168 * Both boards have a MAX6647 temperature monitor which we expose to
169 * the lm90 driver.
170 *
171 * This also provides minimal support for reflashing the PHY, which is
172 * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
173 * On SFE4001 rev A2 and later this is connected to the 3V3X output of
174 * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
175 * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
176 * exclusive with the network device being open.
177 */
178
179/**************************************************************************
180 * Support for I2C IO Expander device on SFE40001
181 */
182#define PCA9539 0x74
183
184#define P0_IN 0x00
185#define P0_OUT 0x02
186#define P0_INVERT 0x04
187#define P0_CONFIG 0x06
188
189#define P0_EN_1V0X_LBN 0
190#define P0_EN_1V0X_WIDTH 1
191#define P0_EN_1V2_LBN 1
192#define P0_EN_1V2_WIDTH 1
193#define P0_EN_2V5_LBN 2
194#define P0_EN_2V5_WIDTH 1
195#define P0_EN_3V3X_LBN 3
196#define P0_EN_3V3X_WIDTH 1
197#define P0_EN_5V_LBN 4
198#define P0_EN_5V_WIDTH 1
199#define P0_SHORTEN_JTAG_LBN 5
200#define P0_SHORTEN_JTAG_WIDTH 1
201#define P0_X_TRST_LBN 6
202#define P0_X_TRST_WIDTH 1
203#define P0_DSP_RESET_LBN 7
204#define P0_DSP_RESET_WIDTH 1
205
206#define P1_IN 0x01
207#define P1_OUT 0x03
208#define P1_INVERT 0x05
209#define P1_CONFIG 0x07
210
211#define P1_AFE_PWD_LBN 0
212#define P1_AFE_PWD_WIDTH 1
213#define P1_DSP_PWD25_LBN 1
214#define P1_DSP_PWD25_WIDTH 1
215#define P1_RESERVED_LBN 2
216#define P1_RESERVED_WIDTH 2
217#define P1_SPARE_LBN 4
218#define P1_SPARE_WIDTH 4
219
220/* Temperature Sensor */
221#define MAX664X_REG_RSL 0x02
222#define MAX664X_REG_WLHO 0x0B
223
224static void sfe4001_poweroff(struct efx_nic *efx)
225{
226 struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
227 struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
228
229 /* Turn off all power rails and disable outputs */
230 i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
231 i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
232 i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
233
234 /* Clear any over-temperature alert */
235 i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
236}
237
238static int sfe4001_poweron(struct efx_nic *efx)
239{
240 struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
241 struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
242 unsigned int i, j;
243 int rc;
244 u8 out;
245
246 /* Clear any previous over-temperature alert */
247 rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
248 if (rc < 0)
249 return rc;
250
251 /* Enable port 0 and port 1 outputs on IO expander */
252 rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
253 if (rc)
254 return rc;
255 rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
256 0xff & ~(1 << P1_SPARE_LBN));
257 if (rc)
258 goto fail_on;
259
260 /* If PHY power is on, turn it all off and wait 1 second to
261 * ensure a full reset.
262 */
263 rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
264 if (rc < 0)
265 goto fail_on;
266 out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
267 (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
268 (0 << P0_EN_1V0X_LBN));
269 if (rc != out) {
270 EFX_INFO(efx, "power-cycling PHY\n");
271 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
272 if (rc)
273 goto fail_on;
274 schedule_timeout_uninterruptible(HZ);
275 }
276
277 for (i = 0; i < 20; ++i) {
278 /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
279 out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
280 (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
281 (1 << P0_X_TRST_LBN));
282 if (efx->phy_mode & PHY_MODE_SPECIAL)
283 out |= 1 << P0_EN_3V3X_LBN;
284
285 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
286 if (rc)
287 goto fail_on;
288 msleep(10);
289
290 /* Turn on 1V power rail */
291 out &= ~(1 << P0_EN_1V0X_LBN);
292 rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
293 if (rc)
294 goto fail_on;
295
296 EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
297
298 /* In flash config mode, DSP does not turn on AFE, so
299 * just wait 1 second.
300 */
301 if (efx->phy_mode & PHY_MODE_SPECIAL) {
302 schedule_timeout_uninterruptible(HZ);
303 return 0;
304 }
305
306 for (j = 0; j < 10; ++j) {
307 msleep(100);
308
309 /* Check DSP has asserted AFE power line */
310 rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
311 if (rc < 0)
312 goto fail_on;
313 if (rc & (1 << P1_AFE_PWD_LBN))
314 return 0;
315 }
316 }
317
318 EFX_INFO(efx, "timed out waiting for DSP boot\n");
319 rc = -ETIMEDOUT;
320fail_on:
321 sfe4001_poweroff(efx);
322 return rc;
323}
324
325static int sfn4111t_reset(struct efx_nic *efx)
326{
327 efx_oword_t reg;
328
329 /* GPIO 3 and the GPIO register are shared with I2C, so block that */
330 mutex_lock(&efx->i2c_adap.bus_lock);
331
332 /* Pull RST_N (GPIO 2) low then let it up again, setting the
333 * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
334 * output enables; the output levels should always be 0 (low)
335 * and we rely on external pull-ups. */
12d00cad 336 efx_reado(efx, &reg, FR_AB_GPIO_CTL);
3e6c4538 337 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, true);
12d00cad 338 efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
c9597d4f 339 msleep(1000);
3e6c4538
BH		 340 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, false);
341 EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN,
c9597d4f 342 !!(efx->phy_mode & PHY_MODE_SPECIAL));
12d00cad 343 efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
c9597d4f
BH		 344 msleep(1);
345
346 mutex_unlock(&efx->i2c_adap.bus_lock);
347
348 ssleep(1);
349 return 0;
350}
351
352static ssize_t show_phy_flash_cfg(struct device *dev,
353 struct device_attribute *attr, char *buf)
354{
355 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
356 return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
357}
358
359static ssize_t set_phy_flash_cfg(struct device *dev,
360 struct device_attribute *attr,
361 const char *buf, size_t count)
362{
363 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
364 enum efx_phy_mode old_mode, new_mode;
365 int err;
366
367 rtnl_lock();
368 old_mode = efx->phy_mode;
369 if (count == 0 || *buf == '0')
370 new_mode = old_mode & ~PHY_MODE_SPECIAL;
371 else
372 new_mode = PHY_MODE_SPECIAL;
373 if (old_mode == new_mode) {
374 err = 0;
375 } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
376 err = -EBUSY;
377 } else {
378 /* Reset the PHY, reconfigure the MAC and enable/disable
379 * MAC stats accordingly. */
380 efx->phy_mode = new_mode;
381 if (new_mode & PHY_MODE_SPECIAL)
382 efx_stats_disable(efx);
383 if (efx->board_info.type == FALCON_BOARD_SFE4001)
384 err = sfe4001_poweron(efx);
385 else
386 err = sfn4111t_reset(efx);
387 efx_reconfigure_port(efx);
388 if (!(new_mode & PHY_MODE_SPECIAL))
389 efx_stats_enable(efx);
390 }
391 rtnl_unlock();
392
393 return err ? err : count;
394}
395
396static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
397
398static void sfe4001_fini(struct efx_nic *efx)
399{
400 EFX_INFO(efx, "%s\n", __func__);
401
402 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
403 sfe4001_poweroff(efx);
404 i2c_unregister_device(efx->board_info.ioexp_client);
405 i2c_unregister_device(efx->board_info.hwmon_client);
406}
407
408static int sfe4001_check_hw(struct efx_nic *efx)
409{
410 s32 status;
411
412 /* If XAUI link is up then do not monitor */
413 if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
414 return 0;
415
416 /* Check the powered status of the PHY. Lack of power implies that
417 * the MAX6647 has shut down power to it, probably due to a temp.
418 * alarm. Reading the power status rather than the MAX6647 status
419 * directly because the later is read-to-clear and would thus
420 * start to power up the PHY again when polled, causing us to blip
421 * the power undesirably.
422 * We know we can read from the IO expander because we did
423 * it during power-on. Assume failure now is bad news. */
424 status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN);
425 if (status >= 0 &&
426 (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
427 return 0;
428
429 /* Use board power control, not PHY power control */
430 sfe4001_poweroff(efx);
431 efx->phy_mode = PHY_MODE_OFF;
432
433 return (status < 0) ? -EIO : -ERANGE;
434}
435
436static struct i2c_board_info sfe4001_hwmon_info = {
437 I2C_BOARD_INFO("max6647", 0x4e),
438};
439
440/* This board uses an I2C expander to provider power to the PHY, which needs to
441 * be turned on before the PHY can be used.
442 * Context: Process context, rtnl lock held
443 */
444static int sfe4001_init(struct efx_nic *efx)
445{
446 int rc;
447
448#if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
449 efx->board_info.hwmon_client =
450 i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info);
451#else
452 efx->board_info.hwmon_client =
453 i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr);
454#endif
455 if (!efx->board_info.hwmon_client)
456 return -EIO;
457
458 /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
459 rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client,
460 MAX664X_REG_WLHO, 90);
461 if (rc)
462 goto fail_hwmon;
463
464 efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);
465 if (!efx->board_info.ioexp_client) {
466 rc = -EIO;
467 goto fail_hwmon;
468 }
469
470 /* 10Xpress has fixed-function LED pins, so there is no board-specific
471 * blink code. */
472 efx->board_info.blink = tenxpress_phy_blink;
473
474 efx->board_info.monitor = sfe4001_check_hw;
475 efx->board_info.fini = sfe4001_fini;
476
477 if (efx->phy_mode & PHY_MODE_SPECIAL) {
478 /* PHY won't generate a 156.25 MHz clock and MAC stats fetch
479 * will fail. */
480 efx_stats_disable(efx);
481 }
482 rc = sfe4001_poweron(efx);
483 if (rc)
484 goto fail_ioexp;
485
486 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
487 if (rc)
488 goto fail_on;
489
490 EFX_INFO(efx, "PHY is powered on\n");
491 return 0;
492
493fail_on:
494 sfe4001_poweroff(efx);
495fail_ioexp:
496 i2c_unregister_device(efx->board_info.ioexp_client);
497fail_hwmon:
498 i2c_unregister_device(efx->board_info.hwmon_client);
499 return rc;
500}
501
502static int sfn4111t_check_hw(struct efx_nic *efx)
503{
504 s32 status;
505
506 /* If XAUI link is up then do not monitor */
507 if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
508 return 0;
509
510 /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
511 status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client,
512 MAX664X_REG_RSL);
513 if (status < 0)
514 return -EIO;
515 if (status & 0x57)
516 return -ERANGE;
517 return 0;
518}
519
520static void sfn4111t_fini(struct efx_nic *efx)
521{
522 EFX_INFO(efx, "%s\n", __func__);
523
524 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
525 i2c_unregister_device(efx->board_info.hwmon_client);
526}
527
528static struct i2c_board_info sfn4111t_a0_hwmon_info = {
529 I2C_BOARD_INFO("max6647", 0x4e),
530};
531
532static struct i2c_board_info sfn4111t_r5_hwmon_info = {
533 I2C_BOARD_INFO("max6646", 0x4d),
534};
535
536static int sfn4111t_init(struct efx_nic *efx)
537{
538 int i = 0;
539 int rc;
540
541 efx->board_info.hwmon_client =
542 i2c_new_device(&efx->i2c_adap,
543 (efx->board_info.minor < 5) ?
544 &sfn4111t_a0_hwmon_info :
545 &sfn4111t_r5_hwmon_info);
546 if (!efx->board_info.hwmon_client)
547 return -EIO;
548
549 efx->board_info.blink = tenxpress_phy_blink;
550 efx->board_info.monitor = sfn4111t_check_hw;
551 efx->board_info.fini = sfn4111t_fini;
552
553 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
554 if (rc)
555 goto fail_hwmon;
556
557 do {
558 if (efx->phy_mode & PHY_MODE_SPECIAL) {
559 /* PHY may not generate a 156.25 MHz clock and MAC
560 * stats fetch will fail. */
561 efx_stats_disable(efx);
562 sfn4111t_reset(efx);
563 }
564 rc = sft9001_wait_boot(efx);
565 if (rc == 0)
566 return 0;
567 efx->phy_mode = PHY_MODE_SPECIAL;
568 } while (rc == -EINVAL && ++i < 2);
569
570 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
571fail_hwmon:
572 i2c_unregister_device(efx->board_info.hwmon_client);
573 return rc;
574}
575
8ceee660
BH		 576/*****************************************************************************
577 * Support for the SFE4002
578 *
579 */
3e133c44
BH		 580static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
581
582static const u8 sfe4002_lm87_regs[] = {
583 LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
584 LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
585 LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
586 LM87_IN_LIMITS(3, 0xb0, 0xc9), /* 5V: 4.6-5.2V */
587 LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
588 LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
589 LM87_AIN_LIMITS(0, 0xa0, 0xb2), /* AIN1: 1.66V +/- 5% */
590 LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
591 LM87_TEMP_INT_LIMITS(10, 60), /* board */
592 LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
593 0
594};
595
596static struct i2c_board_info sfe4002_hwmon_info = {
597 I2C_BOARD_INFO("lm87", 0x2e),
598 .platform_data = &sfe4002_lm87_channel,
3e133c44
BH		 599};
600
8ceee660
BH		 601/****************************************************************************/
602/* LED allocations. Note that on rev A0 boards the schematic and the reality
603 * differ: red and green are swapped. Below is the fixed (A1) layout (there
604 * are only 3 A0 boards in existence, so no real reason to make this
605 * conditional).
606 */
607#define SFE4002_FAULT_LED (2) /* Red */
608#define SFE4002_RX_LED (0) /* Green */
609#define SFE4002_TX_LED (1) /* Amber */
610
8129d217 611static void sfe4002_init_leds(struct efx_nic *efx)
8ceee660
BH		 612{
613 /* Set the TX and RX LEDs to reflect status and activity, and the
614 * fault LED off */
b37b62fe
BH		 615 falcon_qt202x_set_led(efx, SFE4002_TX_LED,
616 QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
617 falcon_qt202x_set_led(efx, SFE4002_RX_LED,
618 QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
619 falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
8ceee660
BH		 620}
621
8129d217 622static void sfe4002_set_id_led(struct efx_nic *efx, bool state)
8ceee660 623{
b37b62fe
BH		 624 falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, state ? QUAKE_LED_ON :
625 QUAKE_LED_OFF);
8ceee660
BH		 626}
627
3e133c44
BH		 628static int sfe4002_check_hw(struct efx_nic *efx)
629{
630 /* A0 board rev. 4002s report a temperature fault the whole time
631 * (bad sensor) so we mask it out. */
632 unsigned alarm_mask =
633 (efx->board_info.major == 0 && efx->board_info.minor == 0) ?
634 ~LM87_ALARM_TEMP_EXT1 : ~0;
635
636 return efx_check_lm87(efx, alarm_mask);
637}
638
8ceee660
BH		 639static int sfe4002_init(struct efx_nic *efx)
640{
3e133c44
BH		 641 int rc = efx_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
642 if (rc)
643 return rc;
644 efx->board_info.monitor = sfe4002_check_hw;
8ceee660 645 efx->board_info.init_leds = sfe4002_init_leds;
8129d217 646 efx->board_info.set_id_led = sfe4002_set_id_led;
8ceee660 647 efx->board_info.blink = board_blink;
3e133c44 648 efx->board_info.fini = efx_fini_lm87;
8ceee660
BH		 649 return 0;
650}
651
94f52cd1
BH		 652/*****************************************************************************
653 * Support for the SFN4112F
654 *
655 */
656static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
657
658static const u8 sfn4112f_lm87_regs[] = {
659 LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */
660 LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */
661 LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */
662 LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */
663 LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */
664 LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */
665 LM87_TEMP_INT_LIMITS(10, 60), /* board */
666 LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */
667 0
668};
669
670static struct i2c_board_info sfn4112f_hwmon_info = {
671 I2C_BOARD_INFO("lm87", 0x2e),
672 .platform_data = &sfn4112f_lm87_channel,
94f52cd1
BH		 673};
674
675#define SFN4112F_ACT_LED 0
676#define SFN4112F_LINK_LED 1
677
678static void sfn4112f_init_leds(struct efx_nic *efx)
679{
b37b62fe
BH		 680 falcon_qt202x_set_led(efx, SFN4112F_ACT_LED,
681 QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
682 falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
683 QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
94f52cd1
BH		 684}
685
686static void sfn4112f_set_id_led(struct efx_nic *efx, bool state)
687{
b37b62fe
BH		 688 falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
689 state ? QUAKE_LED_ON : QUAKE_LED_OFF);
94f52cd1
BH		 690}
691
692static int sfn4112f_check_hw(struct efx_nic *efx)
693{
694 /* Mask out unused sensors */
695 return efx_check_lm87(efx, ~0x48);
696}
697
698static int sfn4112f_init(struct efx_nic *efx)
699{
700 int rc = efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
701 if (rc)
702 return rc;
703 efx->board_info.monitor = sfn4112f_check_hw;
704 efx->board_info.init_leds = sfn4112f_init_leds;
705 efx->board_info.set_id_led = sfn4112f_set_id_led;
706 efx->board_info.blink = board_blink;
707 efx->board_info.fini = efx_fini_lm87;
708 return 0;
709}
710
8ceee660
BH		 711/* This will get expanded as board-specific details get moved out of the
712 * PHY drivers. */
3473a5b1
BH		 713struct falcon_board_data {
714 u8 type;
8ceee660
BH		 715 const char *ref_model;
716 const char *gen_type;
717 int (*init) (struct efx_nic *nic);
718};
719
8ceee660 720
3473a5b1
BH		 721static struct falcon_board_data board_data[] = {
722 { FALCON_BOARD_SFE4001, "SFE4001", "10GBASE-T adapter", sfe4001_init },
723 { FALCON_BOARD_SFE4002, "SFE4002", "XFP adapter", sfe4002_init },
724 { FALCON_BOARD_SFN4111T, "SFN4111T", "100/1000/10GBASE-T adapter",
6f158d5f 725 sfn4111t_init },
3473a5b1 726 { FALCON_BOARD_SFN4112F, "SFN4112F", "SFP+ adapter",
94f52cd1 727 sfn4112f_init },
8ceee660
BH		 728};
729
3473a5b1 730void falcon_probe_board(struct efx_nic *efx, u16 revision_info)
8ceee660 731{
3473a5b1 732 struct falcon_board_data *data = NULL;
04300d24 733 int i;
8ceee660 734
3473a5b1
BH		 735 efx->board_info.type = FALCON_BOARD_TYPE(revision_info);
736 efx->board_info.major = FALCON_BOARD_MAJOR(revision_info);
737 efx->board_info.minor = FALCON_BOARD_MINOR(revision_info);
8ceee660 738
04300d24
BH		 739 for (i = 0; i < ARRAY_SIZE(board_data); i++)
740 if (board_data[i].type == efx->board_info.type)
741 data = &board_data[i];
8ceee660 742
04300d24 743 if (data) {
8ceee660
BH		 744 EFX_INFO(efx, "board is %s rev %c%d\n",
745 (efx->pci_dev->subsystem_vendor == EFX_VENDID_SFC)
746 ? data->ref_model : data->gen_type,
747 'A' + efx->board_info.major, efx->board_info.minor);
04300d24
BH		 748 efx->board_info.init = data->init;
749 } else {
750 EFX_ERR(efx, "unknown board type %d\n", efx->board_info.type);
751 }
8ceee660 752}
Linux kernel - Deliverables
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