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Massive net driver const-ification.
[deliverable/linux.git] / drivers / net / sis900.c
CommitLineData
1da177e4
LT		 1/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
ea37ccea 3 Revision: 1.08.09 Sep. 19 2005
1da177e4
LT		 4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
ea37ccea 20 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
1da177e4
LT		 21 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
22 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <webvenza@libero.it> add suspend/resume support
23 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
24 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
25 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
26 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
27 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
28 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
29 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
30 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
31 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
32 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
33 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
34 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
35 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
36 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
37 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
38 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
39 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
40 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
41 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
42 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
43 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
44 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
45 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
46 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
47 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
48 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
49*/
50
51#include <linux/module.h>
52#include <linux/moduleparam.h>
53#include <linux/kernel.h>
54#include <linux/string.h>
55#include <linux/timer.h>
56#include <linux/errno.h>
57#include <linux/ioport.h>
58#include <linux/slab.h>
59#include <linux/interrupt.h>
60#include <linux/pci.h>
61#include <linux/netdevice.h>
62#include <linux/init.h>
63#include <linux/mii.h>
64#include <linux/etherdevice.h>
65#include <linux/skbuff.h>
66#include <linux/delay.h>
67#include <linux/ethtool.h>
68#include <linux/crc32.h>
69#include <linux/bitops.h>
12b279f9 70#include <linux/dma-mapping.h>
1da177e4
LT		 71
72#include <asm/processor.h> /* Processor type for cache alignment. */
73#include <asm/io.h>
74#include <asm/irq.h>
75#include <asm/uaccess.h> /* User space memory access functions */
76
77#include "sis900.h"
78
79#define SIS900_MODULE_NAME "sis900"
ea37ccea 80#define SIS900_DRV_VERSION "v1.08.09 Sep. 19 2005"
1da177e4
LT		 81
82static char version[] __devinitdata =
83KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
84
85static int max_interrupt_work = 40;
86static int multicast_filter_limit = 128;
87
88static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
89
90#define SIS900_DEF_MSG \
91 (NETIF_MSG_DRV | \
92 NETIF_MSG_LINK | \
93 NETIF_MSG_RX_ERR | \
94 NETIF_MSG_TX_ERR)
95
96/* Time in jiffies before concluding the transmitter is hung. */
97#define TX_TIMEOUT (4*HZ)
1da177e4
LT		 98
99enum {
100 SIS_900 = 0,
101 SIS_7016
102};
f71e1309 103static const char * card_names[] = {
1da177e4
LT		 104 "SiS 900 PCI Fast Ethernet",
105 "SiS 7016 PCI Fast Ethernet"
106};
107static struct pci_device_id sis900_pci_tbl [] = {
108 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
109 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
110 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
111 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
112 {0,}
113};
114MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
115
116static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
117
f71e1309 118static const struct mii_chip_info {
1da177e4
LT		 119 const char * name;
120 u16 phy_id0;
121 u16 phy_id1;
122 u8 phy_types;
123#define HOME 0x0001
124#define LAN 0x0002
125#define MIX 0x0003
126#define UNKNOWN 0x0
127} mii_chip_table[] = {
128 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
129 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
130 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
131 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
132 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
133 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
134 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
135 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
136 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
137 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
138 {NULL,},
139};
140
141struct mii_phy {
142 struct mii_phy * next;
143 int phy_addr;
144 u16 phy_id0;
145 u16 phy_id1;
146 u16 status;
147 u8 phy_types;
148};
149
150typedef struct _BufferDesc {
151 u32 link;
152 u32 cmdsts;
153 u32 bufptr;
154} BufferDesc;
155
156struct sis900_private {
157 struct net_device_stats stats;
158 struct pci_dev * pci_dev;
159
160 spinlock_t lock;
161
162 struct mii_phy * mii;
163 struct mii_phy * first_mii; /* record the first mii structure */
164 unsigned int cur_phy;
da369b01 165 struct mii_if_info mii_info;
1da177e4
LT		 166
167 struct timer_list timer; /* Link status detection timer. */
168 u8 autong_complete; /* 1: auto-negotiate complete */
169
170 u32 msg_enable;
171
172 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
173 unsigned int cur_tx, dirty_tx;
174
175 /* The saved address of a sent/receive-in-place packet buffer */
176 struct sk_buff *tx_skbuff[NUM_TX_DESC];
177 struct sk_buff *rx_skbuff[NUM_RX_DESC];
178 BufferDesc *tx_ring;
179 BufferDesc *rx_ring;
180
181 dma_addr_t tx_ring_dma;
182 dma_addr_t rx_ring_dma;
183
184 unsigned int tx_full; /* The Tx queue is full. */
185 u8 host_bridge_rev;
186 u8 chipset_rev;
187};
188
189MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
190MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
191MODULE_LICENSE("GPL");
192
193module_param(multicast_filter_limit, int, 0444);
194module_param(max_interrupt_work, int, 0444);
195module_param(sis900_debug, int, 0444);
196MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
197MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
198MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
199
200#ifdef CONFIG_NET_POLL_CONTROLLER
201static void sis900_poll(struct net_device *dev);
202#endif
203static int sis900_open(struct net_device *net_dev);
204static int sis900_mii_probe (struct net_device * net_dev);
205static void sis900_init_rxfilter (struct net_device * net_dev);
206static u16 read_eeprom(long ioaddr, int location);
da369b01 207static int mdio_read(struct net_device *net_dev, int phy_id, int location);
1da177e4
LT		 208static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
209static void sis900_timer(unsigned long data);
210static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
211static void sis900_tx_timeout(struct net_device *net_dev);
212static void sis900_init_tx_ring(struct net_device *net_dev);
213static void sis900_init_rx_ring(struct net_device *net_dev);
214static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
215static int sis900_rx(struct net_device *net_dev);
216static void sis900_finish_xmit (struct net_device *net_dev);
217static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
218static int sis900_close(struct net_device *net_dev);
219static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
220static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
221static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
222static void set_rx_mode(struct net_device *net_dev);
223static void sis900_reset(struct net_device *net_dev);
224static void sis630_set_eq(struct net_device *net_dev, u8 revision);
225static int sis900_set_config(struct net_device *dev, struct ifmap *map);
226static u16 sis900_default_phy(struct net_device * net_dev);
227static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
228static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
229static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
230static void sis900_set_mode (long ioaddr, int speed, int duplex);
231static struct ethtool_ops sis900_ethtool_ops;
232
233/**
234 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
235 * @pci_dev: the sis900 pci device
236 * @net_dev: the net device to get address for
237 *
238 * Older SiS900 and friends, use EEPROM to store MAC address.
239 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
240 */
241
242static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
243{
244 long ioaddr = pci_resource_start(pci_dev, 0);
245 u16 signature;
246 int i;
247
248 /* check to see if we have sane EEPROM */
249 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
250 if (signature == 0xffff || signature == 0x0000) {
251 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
252 pci_name(pci_dev), signature);
253 return 0;
254 }
255
256 /* get MAC address from EEPROM */
257 for (i = 0; i < 3; i++)
258 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
259
260 return 1;
261}
262
263/**
264 * sis630e_get_mac_addr - Get MAC address for SiS630E model
265 * @pci_dev: the sis900 pci device
266 * @net_dev: the net device to get address for
267 *
268 * SiS630E model, use APC CMOS RAM to store MAC address.
269 * APC CMOS RAM is accessed through ISA bridge.
270 * MAC address is read into @net_dev->dev_addr.
271 */
272
273static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
274 struct net_device *net_dev)
275{
276 struct pci_dev *isa_bridge = NULL;
277 u8 reg;
278 int i;
279
280 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
281 if (!isa_bridge)
282 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
283 if (!isa_bridge) {
284 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
285 pci_name(pci_dev));
286 return 0;
287 }
288 pci_read_config_byte(isa_bridge, 0x48, &reg);
289 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
290
291 for (i = 0; i < 6; i++) {
292 outb(0x09 + i, 0x70);
293 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
294 }
295 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
296 pci_dev_put(isa_bridge);
297
298 return 1;
299}
300
301
302/**
303 * sis635_get_mac_addr - Get MAC address for SIS635 model
304 * @pci_dev: the sis900 pci device
305 * @net_dev: the net device to get address for
306 *
307 * SiS635 model, set MAC Reload Bit to load Mac address from APC
308 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
309 * @net_dev->dev_addr.
310 */
311
312static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
313 struct net_device *net_dev)
314{
315 long ioaddr = net_dev->base_addr;
316 u32 rfcrSave;
317 u32 i;
318
319 rfcrSave = inl(rfcr + ioaddr);
320
321 outl(rfcrSave | RELOAD, ioaddr + cr);
322 outl(0, ioaddr + cr);
323
324 /* disable packet filtering before setting filter */
325 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
326
327 /* load MAC addr to filter data register */
328 for (i = 0 ; i < 3 ; i++) {
329 outl((i << RFADDR_shift), ioaddr + rfcr);
330 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
331 }
332
333 /* enable packet filtering */
334 outl(rfcrSave | RFEN, rfcr + ioaddr);
335
336 return 1;
337}
338
339/**
340 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
341 * @pci_dev: the sis900 pci device
342 * @net_dev: the net device to get address for
343 *
344 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
345 * is shared by
346 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
347 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
348 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
349 * EEDONE signal to refuse EEPROM access by LAN.
350 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
351 * The signature field in SiS962 or SiS963 spec is meaningless.
352 * MAC address is read into @net_dev->dev_addr.
353 */
354
355static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
356 struct net_device *net_dev)
357{
358 long ioaddr = net_dev->base_addr;
359 long ee_addr = ioaddr + mear;
360 u32 waittime = 0;
361 int i;
362
363 outl(EEREQ, ee_addr);
364 while(waittime < 2000) {
365 if(inl(ee_addr) & EEGNT) {
366
367 /* get MAC address from EEPROM */
368 for (i = 0; i < 3; i++)
369 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
370
371 outl(EEDONE, ee_addr);
372 return 1;
373 } else {
374 udelay(1);
375 waittime ++;
376 }
377 }
378 outl(EEDONE, ee_addr);
379 return 0;
380}
381
382/**
383 * sis900_probe - Probe for sis900 device
384 * @pci_dev: the sis900 pci device
385 * @pci_id: the pci device ID
386 *
387 * Check and probe sis900 net device for @pci_dev.
388 * Get mac address according to the chip revision,
389 * and assign SiS900-specific entries in the device structure.
390 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
391 */
392
393static int __devinit sis900_probe(struct pci_dev *pci_dev,
394 const struct pci_device_id *pci_id)
395{
396 struct sis900_private *sis_priv;
397 struct net_device *net_dev;
398 struct pci_dev *dev;
399 dma_addr_t ring_dma;
400 void *ring_space;
401 long ioaddr;
402 int i, ret;
f71e1309 403 const char *card_name = card_names[pci_id->driver_data];
1da177e4
LT		 404 const char *dev_name = pci_name(pci_dev);
405
406/* when built into the kernel, we only print version if device is found */
407#ifndef MODULE
408 static int printed_version;
409 if (!printed_version++)
410 printk(version);
411#endif
412
413 /* setup various bits in PCI command register */
414 ret = pci_enable_device(pci_dev);
415 if(ret) return ret;
416
12b279f9 417 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
1da177e4
LT		 418 if(i){
419 printk(KERN_ERR "sis900.c: architecture does not support"
420 "32bit PCI busmaster DMA\n");
421 return i;
422 }
423
424 pci_set_master(pci_dev);
425
426 net_dev = alloc_etherdev(sizeof(struct sis900_private));
427 if (!net_dev)
428 return -ENOMEM;
429 SET_MODULE_OWNER(net_dev);
430 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
431
432 /* We do a request_region() to register /proc/ioports info. */
433 ioaddr = pci_resource_start(pci_dev, 0);
434 ret = pci_request_regions(pci_dev, "sis900");
435 if (ret)
436 goto err_out;
437
438 sis_priv = net_dev->priv;
439 net_dev->base_addr = ioaddr;
440 net_dev->irq = pci_dev->irq;
441 sis_priv->pci_dev = pci_dev;
442 spin_lock_init(&sis_priv->lock);
443
444 pci_set_drvdata(pci_dev, net_dev);
445
446 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
447 if (!ring_space) {
448 ret = -ENOMEM;
449 goto err_out_cleardev;
450 }
451 sis_priv->tx_ring = (BufferDesc *)ring_space;
452 sis_priv->tx_ring_dma = ring_dma;
453
454 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
455 if (!ring_space) {
456 ret = -ENOMEM;
457 goto err_unmap_tx;
458 }
459 sis_priv->rx_ring = (BufferDesc *)ring_space;
460 sis_priv->rx_ring_dma = ring_dma;
461
462 /* The SiS900-specific entries in the device structure. */
463 net_dev->open = &sis900_open;
464 net_dev->hard_start_xmit = &sis900_start_xmit;
465 net_dev->stop = &sis900_close;
466 net_dev->get_stats = &sis900_get_stats;
467 net_dev->set_config = &sis900_set_config;
468 net_dev->set_multicast_list = &set_rx_mode;
469 net_dev->do_ioctl = &mii_ioctl;
470 net_dev->tx_timeout = sis900_tx_timeout;
471 net_dev->watchdog_timeo = TX_TIMEOUT;
472 net_dev->ethtool_ops = &sis900_ethtool_ops;
473
474#ifdef CONFIG_NET_POLL_CONTROLLER
475 net_dev->poll_controller = &sis900_poll;
476#endif
477
478 if (sis900_debug > 0)
479 sis_priv->msg_enable = sis900_debug;
480 else
481 sis_priv->msg_enable = SIS900_DEF_MSG;
da369b01
DV		 482
483 sis_priv->mii_info.dev = net_dev;
484 sis_priv->mii_info.mdio_read = mdio_read;
485 sis_priv->mii_info.mdio_write = mdio_write;
486 sis_priv->mii_info.phy_id_mask = 0x1f;
487 sis_priv->mii_info.reg_num_mask = 0x1f;
488
1da177e4
LT		 489 /* Get Mac address according to the chip revision */
490 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
491 if(netif_msg_probe(sis_priv))
492 printk(KERN_DEBUG "%s: detected revision %2.2x, "
493 "trying to get MAC address...\n",
494 dev_name, sis_priv->chipset_rev);
495
496 ret = 0;
497 if (sis_priv->chipset_rev == SIS630E_900_REV)
498 ret = sis630e_get_mac_addr(pci_dev, net_dev);
499 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
500 ret = sis635_get_mac_addr(pci_dev, net_dev);
501 else if (sis_priv->chipset_rev == SIS96x_900_REV)
502 ret = sis96x_get_mac_addr(pci_dev, net_dev);
503 else
504 ret = sis900_get_mac_addr(pci_dev, net_dev);
505
506 if (ret == 0) {
507 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
508 ret = -ENODEV;
509 goto err_unmap_rx;
510 }
511
512 /* 630ET : set the mii access mode as software-mode */
513 if (sis_priv->chipset_rev == SIS630ET_900_REV)
514 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
515
516 /* probe for mii transceiver */
517 if (sis900_mii_probe(net_dev) == 0) {
518 printk(KERN_WARNING "%s: Error probing MII device.\n",
519 dev_name);
520 ret = -ENODEV;
521 goto err_unmap_rx;
522 }
523
524 /* save our host bridge revision */
525 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
526 if (dev) {
527 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
528 pci_dev_put(dev);
529 }
530
531 ret = register_netdev(net_dev);
532 if (ret)
533 goto err_unmap_rx;
534
535 /* print some information about our NIC */
536 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
537 card_name, ioaddr, net_dev->irq);
538 for (i = 0; i < 5; i++)
539 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
540 printk("%2.2x.\n", net_dev->dev_addr[i]);
541
ea37ccea 542 /* Detect Wake on Lan support */
7bef4b39 543 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
ea37ccea
DV		 544 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
545 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
546
1da177e4
LT		 547 return 0;
548
549 err_unmap_rx:
550 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
551 sis_priv->rx_ring_dma);
552 err_unmap_tx:
553 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
554 sis_priv->tx_ring_dma);
555 err_out_cleardev:
556 pci_set_drvdata(pci_dev, NULL);
557 pci_release_regions(pci_dev);
558 err_out:
559 free_netdev(net_dev);
560 return ret;
561}
562
563/**
564 * sis900_mii_probe - Probe MII PHY for sis900
565 * @net_dev: the net device to probe for
566 *
567 * Search for total of 32 possible mii phy addresses.
568 * Identify and set current phy if found one,
569 * return error if it failed to found.
570 */
571
572static int __init sis900_mii_probe(struct net_device * net_dev)
573{
574 struct sis900_private * sis_priv = net_dev->priv;
575 const char *dev_name = pci_name(sis_priv->pci_dev);
576 u16 poll_bit = MII_STAT_LINK, status = 0;
577 unsigned long timeout = jiffies + 5 * HZ;
578 int phy_addr;
579
580 sis_priv->mii = NULL;
581
582 /* search for total of 32 possible mii phy addresses */
583 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
584 struct mii_phy * mii_phy = NULL;
585 u16 mii_status;
586 int i;
587
588 mii_phy = NULL;
589 for(i = 0; i < 2; i++)
590 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
591
592 if (mii_status == 0xffff || mii_status == 0x0000) {
593 if (netif_msg_probe(sis_priv))
594 printk(KERN_DEBUG "%s: MII at address %d"
595 " not accessible\n",
596 dev_name, phy_addr);
597 continue;
598 }
599
600 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
601 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
602 mii_phy = sis_priv->first_mii;
603 while (mii_phy) {
604 struct mii_phy *phy;
605 phy = mii_phy;
606 mii_phy = mii_phy->next;
607 kfree(phy);
608 }
609 return 0;
610 }
611
612 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
613 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
614 mii_phy->phy_addr = phy_addr;
615 mii_phy->status = mii_status;
616 mii_phy->next = sis_priv->mii;
617 sis_priv->mii = mii_phy;
618 sis_priv->first_mii = mii_phy;
619
620 for (i = 0; mii_chip_table[i].phy_id1; i++)
621 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
622 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
623 mii_phy->phy_types = mii_chip_table[i].phy_types;
624 if (mii_chip_table[i].phy_types == MIX)
625 mii_phy->phy_types =
626 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
627 printk(KERN_INFO "%s: %s transceiver found "
628 "at address %d.\n",
629 dev_name,
630 mii_chip_table[i].name,
631 phy_addr);
632 break;
633 }
634
635 if( !mii_chip_table[i].phy_id1 ) {
636 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
637 dev_name, phy_addr);
638 mii_phy->phy_types = UNKNOWN;
639 }
640 }
641
642 if (sis_priv->mii == NULL) {
643 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
644 return 0;
645 }
646
647 /* select default PHY for mac */
648 sis_priv->mii = NULL;
649 sis900_default_phy( net_dev );
650
651 /* Reset phy if default phy is internal sis900 */
652 if ((sis_priv->mii->phy_id0 == 0x001D) &&
653 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
654 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
655
656 /* workaround for ICS1893 PHY */
657 if ((sis_priv->mii->phy_id0 == 0x0015) &&
658 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
659 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
660
661 if(status & MII_STAT_LINK){
662 while (poll_bit) {
663 yield();
664
665 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
666 if (time_after_eq(jiffies, timeout)) {
667 printk(KERN_WARNING "%s: reset phy and link down now\n",
668 dev_name);
669 return -ETIME;
670 }
671 }
672 }
673
674 if (sis_priv->chipset_rev == SIS630E_900_REV) {
675 /* SiS 630E has some bugs on default value of PHY registers */
676 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
677 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
678 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
679 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
680 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
681 }
682
683 if (sis_priv->mii->status & MII_STAT_LINK)
684 netif_carrier_on(net_dev);
685 else
686 netif_carrier_off(net_dev);
687
688 return 1;
689}
690
691/**
692 * sis900_default_phy - Select default PHY for sis900 mac.
693 * @net_dev: the net device to probe for
694 *
695 * Select first detected PHY with link as default.
696 * If no one is link on, select PHY whose types is HOME as default.
697 * If HOME doesn't exist, select LAN.
698 */
699
700static u16 sis900_default_phy(struct net_device * net_dev)
701{
702 struct sis900_private * sis_priv = net_dev->priv;
703 struct mii_phy *phy = NULL, *phy_home = NULL,
704 *default_phy = NULL, *phy_lan = NULL;
705 u16 status;
706
707 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
708 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
709 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
710
711 /* Link ON & Not select default PHY & not ghost PHY */
712 if ((status & MII_STAT_LINK) && !default_phy &&
713 (phy->phy_types != UNKNOWN))
714 default_phy = phy;
715 else {
716 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
717 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
718 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
719 if (phy->phy_types == HOME)
720 phy_home = phy;
721 else if(phy->phy_types == LAN)
722 phy_lan = phy;
723 }
724 }
725
726 if (!default_phy && phy_home)
727 default_phy = phy_home;
728 else if (!default_phy && phy_lan)
729 default_phy = phy_lan;
730 else if (!default_phy)
731 default_phy = sis_priv->first_mii;
732
733 if (sis_priv->mii != default_phy) {
734 sis_priv->mii = default_phy;
735 sis_priv->cur_phy = default_phy->phy_addr;
736 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
737 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
738 }
739
da369b01
DV		 740 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
741
1da177e4
LT		 742 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
743 status &= (~MII_CNTL_ISOLATE);
744
745 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
746 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
747 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
748
749 return status;
750}
751
752
753/**
754 * sis900_set_capability - set the media capability of network adapter.
755 * @net_dev : the net device to probe for
756 * @phy : default PHY
757 *
758 * Set the media capability of network adapter according to
759 * mii status register. It's necessary before auto-negotiate.
760 */
761
762static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
763{
764 u16 cap;
765 u16 status;
766
767 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
768 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
769
770 cap = MII_NWAY_CSMA_CD |
771 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
772 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
773 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
774 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
775
776 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
777}
778
779
780/* Delay between EEPROM clock transitions. */
781#define eeprom_delay() inl(ee_addr)
782
783/**
784 * read_eeprom - Read Serial EEPROM
785 * @ioaddr: base i/o address
786 * @location: the EEPROM location to read
787 *
788 * Read Serial EEPROM through EEPROM Access Register.
789 * Note that location is in word (16 bits) unit
790 */
791
792static u16 __devinit read_eeprom(long ioaddr, int location)
793{
794 int i;
795 u16 retval = 0;
796 long ee_addr = ioaddr + mear;
797 u32 read_cmd = location | EEread;
798
799 outl(0, ee_addr);
800 eeprom_delay();
801 outl(EECS, ee_addr);
802 eeprom_delay();
803
804 /* Shift the read command (9) bits out. */
805 for (i = 8; i >= 0; i--) {
806 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
807 outl(dataval, ee_addr);
808 eeprom_delay();
809 outl(dataval | EECLK, ee_addr);
810 eeprom_delay();
811 }
812 outl(EECS, ee_addr);
813 eeprom_delay();
814
815 /* read the 16-bits data in */
816 for (i = 16; i > 0; i--) {
817 outl(EECS, ee_addr);
818 eeprom_delay();
819 outl(EECS | EECLK, ee_addr);
820 eeprom_delay();
821 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
822 eeprom_delay();
823 }
824
825 /* Terminate the EEPROM access. */
826 outl(0, ee_addr);
827 eeprom_delay();
828
829 return (retval);
830}
831
832/* Read and write the MII management registers using software-generated
833 serial MDIO protocol. Note that the command bits and data bits are
834 send out separately */
835#define mdio_delay() inl(mdio_addr)
836
837static void mdio_idle(long mdio_addr)
838{
839 outl(MDIO | MDDIR, mdio_addr);
840 mdio_delay();
841 outl(MDIO | MDDIR | MDC, mdio_addr);
842}
843
844/* Syncronize the MII management interface by shifting 32 one bits out. */
845static void mdio_reset(long mdio_addr)
846{
847 int i;
848
849 for (i = 31; i >= 0; i--) {
850 outl(MDDIR | MDIO, mdio_addr);
851 mdio_delay();
852 outl(MDDIR | MDIO | MDC, mdio_addr);
853 mdio_delay();
854 }
855 return;
856}
857
858/**
859 * mdio_read - read MII PHY register
860 * @net_dev: the net device to read
861 * @phy_id: the phy address to read
862 * @location: the phy regiester id to read
863 *
864 * Read MII registers through MDIO and MDC
865 * using MDIO management frame structure and protocol(defined by ISO/IEC).
866 * Please see SiS7014 or ICS spec
867 */
868
da369b01 869static int mdio_read(struct net_device *net_dev, int phy_id, int location)
1da177e4
LT		 870{
871 long mdio_addr = net_dev->base_addr + mear;
872 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
873 u16 retval = 0;
874 int i;
875
876 mdio_reset(mdio_addr);
877 mdio_idle(mdio_addr);
878
879 for (i = 15; i >= 0; i--) {
880 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
881 outl(dataval, mdio_addr);
882 mdio_delay();
883 outl(dataval | MDC, mdio_addr);
884 mdio_delay();
885 }
886
887 /* Read the 16 data bits. */
888 for (i = 16; i > 0; i--) {
889 outl(0, mdio_addr);
890 mdio_delay();
891 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
892 outl(MDC, mdio_addr);
893 mdio_delay();
894 }
895 outl(0x00, mdio_addr);
896
897 return retval;
898}
899
900/**
901 * mdio_write - write MII PHY register
902 * @net_dev: the net device to write
903 * @phy_id: the phy address to write
904 * @location: the phy regiester id to write
905 * @value: the register value to write with
906 *
907 * Write MII registers with @value through MDIO and MDC
908 * using MDIO management frame structure and protocol(defined by ISO/IEC)
909 * please see SiS7014 or ICS spec
910 */
911
912static void mdio_write(struct net_device *net_dev, int phy_id, int location,
913 int value)
914{
915 long mdio_addr = net_dev->base_addr + mear;
916 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
917 int i;
918
919 mdio_reset(mdio_addr);
920 mdio_idle(mdio_addr);
921
922 /* Shift the command bits out. */
923 for (i = 15; i >= 0; i--) {
924 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
925 outb(dataval, mdio_addr);
926 mdio_delay();
927 outb(dataval | MDC, mdio_addr);
928 mdio_delay();
929 }
930 mdio_delay();
931
932 /* Shift the value bits out. */
933 for (i = 15; i >= 0; i--) {
934 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
935 outl(dataval, mdio_addr);
936 mdio_delay();
937 outl(dataval | MDC, mdio_addr);
938 mdio_delay();
939 }
940 mdio_delay();
941
942 /* Clear out extra bits. */
943 for (i = 2; i > 0; i--) {
944 outb(0, mdio_addr);
945 mdio_delay();
946 outb(MDC, mdio_addr);
947 mdio_delay();
948 }
949 outl(0x00, mdio_addr);
950
951 return;
952}
953
954
955/**
956 * sis900_reset_phy - reset sis900 mii phy.
957 * @net_dev: the net device to write
958 * @phy_addr: default phy address
959 *
960 * Some specific phy can't work properly without reset.
961 * This function will be called during initialization and
962 * link status change from ON to DOWN.
963 */
964
965static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
966{
967 int i = 0;
968 u16 status;
969
970 while (i++ < 2)
971 status = mdio_read(net_dev, phy_addr, MII_STATUS);
972
973 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
974
975 return status;
976}
977
978#ifdef CONFIG_NET_POLL_CONTROLLER
979/*
980 * Polling 'interrupt' - used by things like netconsole to send skbs
981 * without having to re-enable interrupts. It's not called while
982 * the interrupt routine is executing.
983*/
984static void sis900_poll(struct net_device *dev)
985{
986 disable_irq(dev->irq);
987 sis900_interrupt(dev->irq, dev, NULL);
988 enable_irq(dev->irq);
989}
990#endif
991
992/**
993 * sis900_open - open sis900 device
994 * @net_dev: the net device to open
995 *
996 * Do some initialization and start net interface.
997 * enable interrupts and set sis900 timer.
998 */
999
1000static int
1001sis900_open(struct net_device *net_dev)
1002{
1003 struct sis900_private *sis_priv = net_dev->priv;
1004 long ioaddr = net_dev->base_addr;
1005 int ret;
1006
1007 /* Soft reset the chip. */
1008 sis900_reset(net_dev);
1009
1010 /* Equalizer workaround Rule */
1011 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1012
1013 ret = request_irq(net_dev->irq, &sis900_interrupt, SA_SHIRQ,
1014 net_dev->name, net_dev);
1015 if (ret)
1016 return ret;
1017
1018 sis900_init_rxfilter(net_dev);
1019
1020 sis900_init_tx_ring(net_dev);
1021 sis900_init_rx_ring(net_dev);
1022
1023 set_rx_mode(net_dev);
1024
1025 netif_start_queue(net_dev);
1026
1027 /* Workaround for EDB */
1028 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1029
1030 /* Enable all known interrupts by setting the interrupt mask. */
1031 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1032 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1033 outl(IE, ioaddr + ier);
1034
1035 sis900_check_mode(net_dev, sis_priv->mii);
1036
1037 /* Set the timer to switch to check for link beat and perhaps switch
1038 to an alternate media type. */
1039 init_timer(&sis_priv->timer);
1040 sis_priv->timer.expires = jiffies + HZ;
1041 sis_priv->timer.data = (unsigned long)net_dev;
1042 sis_priv->timer.function = &sis900_timer;
1043 add_timer(&sis_priv->timer);
1044
1045 return 0;
1046}
1047
1048/**
1049 * sis900_init_rxfilter - Initialize the Rx filter
1050 * @net_dev: the net device to initialize for
1051 *
1052 * Set receive filter address to our MAC address
1053 * and enable packet filtering.
1054 */
1055
1056static void
1057sis900_init_rxfilter (struct net_device * net_dev)
1058{
1059 struct sis900_private *sis_priv = net_dev->priv;
1060 long ioaddr = net_dev->base_addr;
1061 u32 rfcrSave;
1062 u32 i;
1063
1064 rfcrSave = inl(rfcr + ioaddr);
1065
1066 /* disable packet filtering before setting filter */
1067 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1068
1069 /* load MAC addr to filter data register */
1070 for (i = 0 ; i < 3 ; i++) {
1071 u32 w;
1072
1073 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1074 outl((i << RFADDR_shift), ioaddr + rfcr);
1075 outl(w, ioaddr + rfdr);
1076
1077 if (netif_msg_hw(sis_priv)) {
1078 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1079 net_dev->name, i, inl(ioaddr + rfdr));
1080 }
1081 }
1082
1083 /* enable packet filtering */
1084 outl(rfcrSave | RFEN, rfcr + ioaddr);
1085}
1086
1087/**
1088 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1089 * @net_dev: the net device to initialize for
1090 *
1091 * Initialize the Tx descriptor ring,
1092 */
1093
1094static void
1095sis900_init_tx_ring(struct net_device *net_dev)
1096{
1097 struct sis900_private *sis_priv = net_dev->priv;
1098 long ioaddr = net_dev->base_addr;
1099 int i;
1100
1101 sis_priv->tx_full = 0;
1102 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1103
1104 for (i = 0; i < NUM_TX_DESC; i++) {
1105 sis_priv->tx_skbuff[i] = NULL;
1106
1107 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1108 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1109 sis_priv->tx_ring[i].cmdsts = 0;
1110 sis_priv->tx_ring[i].bufptr = 0;
1111 }
1112
1113 /* load Transmit Descriptor Register */
1114 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1115 if (netif_msg_hw(sis_priv))
1116 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1117 net_dev->name, inl(ioaddr + txdp));
1118}
1119
1120/**
1121 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1122 * @net_dev: the net device to initialize for
1123 *
1124 * Initialize the Rx descriptor ring,
1125 * and pre-allocate recevie buffers (socket buffer)
1126 */
1127
1128static void
1129sis900_init_rx_ring(struct net_device *net_dev)
1130{
1131 struct sis900_private *sis_priv = net_dev->priv;
1132 long ioaddr = net_dev->base_addr;
1133 int i;
1134
1135 sis_priv->cur_rx = 0;
1136 sis_priv->dirty_rx = 0;
1137
1138 /* init RX descriptor */
1139 for (i = 0; i < NUM_RX_DESC; i++) {
1140 sis_priv->rx_skbuff[i] = NULL;
1141
1142 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1143 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1144 sis_priv->rx_ring[i].cmdsts = 0;
1145 sis_priv->rx_ring[i].bufptr = 0;
1146 }
1147
1148 /* allocate sock buffers */
1149 for (i = 0; i < NUM_RX_DESC; i++) {
1150 struct sk_buff *skb;
1151
1152 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1153 /* not enough memory for skbuff, this makes a "hole"
1154 on the buffer ring, it is not clear how the
1155 hardware will react to this kind of degenerated
1156 buffer */
1157 break;
1158 }
1159 skb->dev = net_dev;
1160 sis_priv->rx_skbuff[i] = skb;
1161 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1162 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
689be439 1163 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1da177e4
LT		 1164 }
1165 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1166
1167 /* load Receive Descriptor Register */
1168 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1169 if (netif_msg_hw(sis_priv))
1170 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1171 net_dev->name, inl(ioaddr + rxdp));
1172}
1173
1174/**
1175 * sis630_set_eq - set phy equalizer value for 630 LAN
1176 * @net_dev: the net device to set equalizer value
1177 * @revision: 630 LAN revision number
1178 *
1179 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1180 * PHY register 14h(Test)
1181 * Bit 14: 0 -- Automatically dectect (default)
1182 * 1 -- Manually set Equalizer filter
1183 * Bit 13: 0 -- (Default)
1184 * 1 -- Speed up convergence of equalizer setting
1185 * Bit 9 : 0 -- (Default)
1186 * 1 -- Disable Baseline Wander
1187 * Bit 3~7 -- Equalizer filter setting
1188 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1189 * Then calculate equalizer value
1190 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1191 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1192 * Calculate Equalizer value:
1193 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1194 * When the equalizer is stable, this value is not a fixed value. It will be within
1195 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1196 * 0 <= max <= 4 --> set equalizer to max
1197 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1198 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1199 */
1200
1201static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1202{
1203 struct sis900_private *sis_priv = net_dev->priv;
1204 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1205 int i, maxcount=10;
1206
1207 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1208 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1209 return;
1210
1211 if (netif_carrier_ok(net_dev)) {
1212 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1213 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1214 (0x2200 | reg14h) & 0xBFFF);
1215 for (i=0; i < maxcount; i++) {
1216 eq_value = (0x00F8 & mdio_read(net_dev,
1217 sis_priv->cur_phy, MII_RESV)) >> 3;
1218 if (i == 0)
1219 max_value=min_value=eq_value;
1220 max_value = (eq_value > max_value) ?
1221 eq_value : max_value;
1222 min_value = (eq_value < min_value) ?
1223 eq_value : min_value;
1224 }
1225 /* 630E rule to determine the equalizer value */
1226 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1227 revision == SIS630ET_900_REV) {
1228 if (max_value < 5)
1229 eq_value = max_value;
1230 else if (max_value >= 5 && max_value < 15)
1231 eq_value = (max_value == min_value) ?
1232 max_value+2 : max_value+1;
1233 else if (max_value >= 15)
1234 eq_value=(max_value == min_value) ?
1235 max_value+6 : max_value+5;
1236 }
1237 /* 630B0&B1 rule to determine the equalizer value */
1238 if (revision == SIS630A_900_REV &&
1239 (sis_priv->host_bridge_rev == SIS630B0 ||
1240 sis_priv->host_bridge_rev == SIS630B1)) {
1241 if (max_value == 0)
1242 eq_value = 3;
1243 else
1244 eq_value = (max_value + min_value + 1)/2;
1245 }
1246 /* write equalizer value and setting */
1247 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1248 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1249 reg14h = (reg14h | 0x6000) & 0xFDFF;
1250 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1251 } else {
1252 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1253 if (revision == SIS630A_900_REV &&
1254 (sis_priv->host_bridge_rev == SIS630B0 ||
1255 sis_priv->host_bridge_rev == SIS630B1))
1256 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1257 (reg14h | 0x2200) & 0xBFFF);
1258 else
1259 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1260 (reg14h | 0x2000) & 0xBFFF);
1261 }
1262 return;
1263}
1264
1265/**
1266 * sis900_timer - sis900 timer routine
1267 * @data: pointer to sis900 net device
1268 *
1269 * On each timer ticks we check two things,
1270 * link status (ON/OFF) and link mode (10/100/Full/Half)
1271 */
1272
1273static void sis900_timer(unsigned long data)
1274{
1275 struct net_device *net_dev = (struct net_device *)data;
1276 struct sis900_private *sis_priv = net_dev->priv;
1277 struct mii_phy *mii_phy = sis_priv->mii;
f71e1309 1278 static const int next_tick = 5*HZ;
1da177e4
LT		 1279 u16 status;
1280
1281 if (!sis_priv->autong_complete){
1282 int speed, duplex = 0;
1283
1284 sis900_read_mode(net_dev, &speed, &duplex);
1285 if (duplex){
1286 sis900_set_mode(net_dev->base_addr, speed, duplex);
1287 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1288 netif_start_queue(net_dev);
1289 }
1290
1291 sis_priv->timer.expires = jiffies + HZ;
1292 add_timer(&sis_priv->timer);
1293 return;
1294 }
1295
1296 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1297 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1298
1299 /* Link OFF -> ON */
1300 if (!netif_carrier_ok(net_dev)) {
1301 LookForLink:
1302 /* Search for new PHY */
1303 status = sis900_default_phy(net_dev);
1304 mii_phy = sis_priv->mii;
1305
1306 if (status & MII_STAT_LINK){
1307 sis900_check_mode(net_dev, mii_phy);
1308 netif_carrier_on(net_dev);
1309 }
1310 } else {
1311 /* Link ON -> OFF */
1312 if (!(status & MII_STAT_LINK)){
1313 netif_carrier_off(net_dev);
1314 if(netif_msg_link(sis_priv))
1315 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1316
1317 /* Change mode issue */
1318 if ((mii_phy->phy_id0 == 0x001D) &&
1319 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1320 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1321
1322 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1323
1324 goto LookForLink;
1325 }
1326 }
1327
1328 sis_priv->timer.expires = jiffies + next_tick;
1329 add_timer(&sis_priv->timer);
1330}
1331
1332/**
1333 * sis900_check_mode - check the media mode for sis900
1334 * @net_dev: the net device to be checked
1335 * @mii_phy: the mii phy
1336 *
1337 * Older driver gets the media mode from mii status output
1338 * register. Now we set our media capability and auto-negotiate
1339 * to get the upper bound of speed and duplex between two ends.
1340 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1341 * and autong_complete should be set to 1.
1342 */
1343
1344static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1345{
1346 struct sis900_private *sis_priv = net_dev->priv;
1347 long ioaddr = net_dev->base_addr;
1348 int speed, duplex;
1349
1350 if (mii_phy->phy_types == LAN) {
1351 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1352 sis900_set_capability(net_dev , mii_phy);
1353 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1354 } else {
1355 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1356 speed = HW_SPEED_HOME;
1357 duplex = FDX_CAPABLE_HALF_SELECTED;
1358 sis900_set_mode(ioaddr, speed, duplex);
1359 sis_priv->autong_complete = 1;
1360 }
1361}
1362
1363/**
1364 * sis900_set_mode - Set the media mode of mac register.
1365 * @ioaddr: the address of the device
1366 * @speed : the transmit speed to be determined
1367 * @duplex: the duplex mode to be determined
1368 *
1369 * Set the media mode of mac register txcfg/rxcfg according to
1370 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1371 * bus is used instead of PCI bus. When this bit is set 1, the
1372 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1373 * double words.
1374 */
1375
1376static void sis900_set_mode (long ioaddr, int speed, int duplex)
1377{
1378 u32 tx_flags = 0, rx_flags = 0;
1379
1380 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1381 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1382 (TX_FILL_THRESH << TxFILLT_shift);
1383 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1384 } else {
1385 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1386 (TX_FILL_THRESH << TxFILLT_shift);
1387 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1388 }
1389
1390 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1391 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1392 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1393 } else {
1394 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1395 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1396 }
1397
1398 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1399 tx_flags |= (TxCSI | TxHBI);
1400 rx_flags |= RxATX;
1401 }
1402
1403 outl (tx_flags, ioaddr + txcfg);
1404 outl (rx_flags, ioaddr + rxcfg);
1405}
1406
1407/**
1408 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1409 * @net_dev: the net device to read mode for
1410 * @phy_addr: mii phy address
1411 *
1412 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1413 * autong_complete should be set to 0 when starting auto-negotiation.
1414 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1415 * sis900_timer will wait for link on again if autong_complete = 0.
1416 */
1417
1418static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1419{
1420 struct sis900_private *sis_priv = net_dev->priv;
1421 int i = 0;
1422 u32 status;
1423
1424 while (i++ < 2)
1425 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1426
1427 if (!(status & MII_STAT_LINK)){
1428 if(netif_msg_link(sis_priv))
1429 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1430 sis_priv->autong_complete = 1;
1431 netif_carrier_off(net_dev);
1432 return;
1433 }
1434
1435 /* (Re)start AutoNegotiate */
1436 mdio_write(net_dev, phy_addr, MII_CONTROL,
1437 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1438 sis_priv->autong_complete = 0;
1439}
1440
1441
1442/**
1443 * sis900_read_mode - read media mode for sis900 internal phy
1444 * @net_dev: the net device to read mode for
1445 * @speed : the transmit speed to be determined
1446 * @duplex : the duplex mode to be determined
1447 *
1448 * The capability of remote end will be put in mii register autorec
1449 * after auto-negotiation. Use AND operation to get the upper bound
1450 * of speed and duplex between two ends.
1451 */
1452
1453static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1454{
1455 struct sis900_private *sis_priv = net_dev->priv;
1456 struct mii_phy *phy = sis_priv->mii;
1457 int phy_addr = sis_priv->cur_phy;
1458 u32 status;
1459 u16 autoadv, autorec;
1460 int i = 0;
1461
1462 while (i++ < 2)
1463 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1464
1465 if (!(status & MII_STAT_LINK))
1466 return;
1467
1468 /* AutoNegotiate completed */
1469 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1470 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1471 status = autoadv & autorec;
1472
1473 *speed = HW_SPEED_10_MBPS;
1474 *duplex = FDX_CAPABLE_HALF_SELECTED;
1475
1476 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1477 *speed = HW_SPEED_100_MBPS;
1478 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1479 *duplex = FDX_CAPABLE_FULL_SELECTED;
1480
1481 sis_priv->autong_complete = 1;
1482
1483 /* Workaround for Realtek RTL8201 PHY issue */
1484 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1485 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1486 *duplex = FDX_CAPABLE_FULL_SELECTED;
1487 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1488 *speed = HW_SPEED_100_MBPS;
1489 }
1490
1491 if(netif_msg_link(sis_priv))
1492 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1493 net_dev->name,
1494 *speed == HW_SPEED_100_MBPS ?
1495 "100mbps" : "10mbps",
1496 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1497 "full" : "half");
1498}
1499
1500/**
1501 * sis900_tx_timeout - sis900 transmit timeout routine
1502 * @net_dev: the net device to transmit
1503 *
1504 * print transmit timeout status
1505 * disable interrupts and do some tasks
1506 */
1507
1508static void sis900_tx_timeout(struct net_device *net_dev)
1509{
1510 struct sis900_private *sis_priv = net_dev->priv;
1511 long ioaddr = net_dev->base_addr;
1512 unsigned long flags;
1513 int i;
1514
1515 if(netif_msg_tx_err(sis_priv))
1516 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1517 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1518
1519 /* Disable interrupts by clearing the interrupt mask. */
1520 outl(0x0000, ioaddr + imr);
1521
1522 /* use spinlock to prevent interrupt handler accessing buffer ring */
1523 spin_lock_irqsave(&sis_priv->lock, flags);
1524
1525 /* discard unsent packets */
1526 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1527 for (i = 0; i < NUM_TX_DESC; i++) {
1528 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1529
1530 if (skb) {
1531 pci_unmap_single(sis_priv->pci_dev,
1532 sis_priv->tx_ring[i].bufptr, skb->len,
1533 PCI_DMA_TODEVICE);
1534 dev_kfree_skb_irq(skb);
1535 sis_priv->tx_skbuff[i] = NULL;
1536 sis_priv->tx_ring[i].cmdsts = 0;
1537 sis_priv->tx_ring[i].bufptr = 0;
1538 sis_priv->stats.tx_dropped++;
1539 }
1540 }
1541 sis_priv->tx_full = 0;
1542 netif_wake_queue(net_dev);
1543
1544 spin_unlock_irqrestore(&sis_priv->lock, flags);
1545
1546 net_dev->trans_start = jiffies;
1547
1548 /* load Transmit Descriptor Register */
1549 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1550
1551 /* Enable all known interrupts by setting the interrupt mask. */
1552 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1553 return;
1554}
1555
1556/**
1557 * sis900_start_xmit - sis900 start transmit routine
1558 * @skb: socket buffer pointer to put the data being transmitted
1559 * @net_dev: the net device to transmit with
1560 *
1561 * Set the transmit buffer descriptor,
1562 * and write TxENA to enable transmit state machine.
1563 * tell upper layer if the buffer is full
1564 */
1565
1566static int
1567sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1568{
1569 struct sis900_private *sis_priv = net_dev->priv;
1570 long ioaddr = net_dev->base_addr;
1571 unsigned int entry;
1572 unsigned long flags;
1573 unsigned int index_cur_tx, index_dirty_tx;
1574 unsigned int count_dirty_tx;
1575
1576 /* Don't transmit data before the complete of auto-negotiation */
1577 if(!sis_priv->autong_complete){
1578 netif_stop_queue(net_dev);
1579 return 1;
1580 }
1581
1582 spin_lock_irqsave(&sis_priv->lock, flags);
1583
1584 /* Calculate the next Tx descriptor entry. */
1585 entry = sis_priv->cur_tx % NUM_TX_DESC;
1586 sis_priv->tx_skbuff[entry] = skb;
1587
1588 /* set the transmit buffer descriptor and enable Transmit State Machine */
1589 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1590 skb->data, skb->len, PCI_DMA_TODEVICE);
1591 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1592 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1593
1594 sis_priv->cur_tx ++;
1595 index_cur_tx = sis_priv->cur_tx;
1596 index_dirty_tx = sis_priv->dirty_tx;
1597
1598 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1599 count_dirty_tx ++;
1600
1601 if (index_cur_tx == index_dirty_tx) {
1602 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1603 sis_priv->tx_full = 1;
1604 netif_stop_queue(net_dev);
1605 } else if (count_dirty_tx < NUM_TX_DESC) {
1606 /* Typical path, tell upper layer that more transmission is possible */
1607 netif_start_queue(net_dev);
1608 } else {
1609 /* buffer full, tell upper layer no more transmission */
1610 sis_priv->tx_full = 1;
1611 netif_stop_queue(net_dev);
1612 }
1613
1614 spin_unlock_irqrestore(&sis_priv->lock, flags);
1615
1616 net_dev->trans_start = jiffies;
1617
1618 if (netif_msg_tx_queued(sis_priv))
1619 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1620 "to slot %d.\n",
1621 net_dev->name, skb->data, (int)skb->len, entry);
1622
1623 return 0;
1624}
1625
1626/**
1627 * sis900_interrupt - sis900 interrupt handler
1628 * @irq: the irq number
1629 * @dev_instance: the client data object
1630 * @regs: snapshot of processor context
1631 *
1632 * The interrupt handler does all of the Rx thread work,
1633 * and cleans up after the Tx thread
1634 */
1635
1636static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1637{
1638 struct net_device *net_dev = dev_instance;
1639 struct sis900_private *sis_priv = net_dev->priv;
1640 int boguscnt = max_interrupt_work;
1641 long ioaddr = net_dev->base_addr;
1642 u32 status;
1643 unsigned int handled = 0;
1644
1645 spin_lock (&sis_priv->lock);
1646
1647 do {
1648 status = inl(ioaddr + isr);
1649
1650 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1651 /* nothing intresting happened */
1652 break;
1653 handled = 1;
1654
1655 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1656 if (status & (RxORN | RxERR | RxOK))
1657 /* Rx interrupt */
1658 sis900_rx(net_dev);
1659
1660 if (status & (TxURN | TxERR | TxIDLE))
1661 /* Tx interrupt */
1662 sis900_finish_xmit(net_dev);
1663
1664 /* something strange happened !!! */
1665 if (status & HIBERR) {
1666 if(netif_msg_intr(sis_priv))
1667 printk(KERN_INFO "%s: Abnormal interrupt,"
1668 "status %#8.8x.\n", net_dev->name, status);
1669 break;
1670 }
1671 if (--boguscnt < 0) {
1672 if(netif_msg_intr(sis_priv))
1673 printk(KERN_INFO "%s: Too much work at interrupt, "
1674 "interrupt status = %#8.8x.\n",
1675 net_dev->name, status);
1676 break;
1677 }
1678 } while (1);
1679
1680 if(netif_msg_intr(sis_priv))
1681 printk(KERN_DEBUG "%s: exiting interrupt, "
1682 "interrupt status = 0x%#8.8x.\n",
1683 net_dev->name, inl(ioaddr + isr));
1684
1685 spin_unlock (&sis_priv->lock);
1686 return IRQ_RETVAL(handled);
1687}
1688
1689/**
1690 * sis900_rx - sis900 receive routine
1691 * @net_dev: the net device which receives data
1692 *
1693 * Process receive interrupt events,
1694 * put buffer to higher layer and refill buffer pool
1695 * Note: This fucntion is called by interrupt handler,
1696 * don't do "too much" work here
1697 */
1698
1699static int sis900_rx(struct net_device *net_dev)
1700{
1701 struct sis900_private *sis_priv = net_dev->priv;
1702 long ioaddr = net_dev->base_addr;
1703 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1704 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
7380a78a 1705 int rx_work_limit;
1da177e4
LT		 1706
1707 if (netif_msg_rx_status(sis_priv))
1708 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1709 "status:0x%8.8x\n",
1710 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
7380a78a 1711 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1da177e4
LT		 1712
1713 while (rx_status & OWN) {
1714 unsigned int rx_size;
1715
7380a78a
VA		 1716 if (--rx_work_limit < 0)
1717 break;
1718
1da177e4
LT		 1719 rx_size = (rx_status & DSIZE) - CRC_SIZE;
1720
1721 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1722 /* corrupted packet received */
1723 if (netif_msg_rx_err(sis_priv))
1724 printk(KERN_DEBUG "%s: Corrupted packet "
1725 "received, buffer status = 0x%8.8x.\n",
1726 net_dev->name, rx_status);
1727 sis_priv->stats.rx_errors++;
1728 if (rx_status & OVERRUN)
1729 sis_priv->stats.rx_over_errors++;
1730 if (rx_status & (TOOLONG|RUNT))
1731 sis_priv->stats.rx_length_errors++;
1732 if (rx_status & (RXISERR | FAERR))
1733 sis_priv->stats.rx_frame_errors++;
1734 if (rx_status & CRCERR)
1735 sis_priv->stats.rx_crc_errors++;
1736 /* reset buffer descriptor state */
1737 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1738 } else {
1739 struct sk_buff * skb;
1740
1741 /* This situation should never happen, but due to
1742 some unknow bugs, it is possible that
1743 we are working on NULL sk_buff :-( */
1744 if (sis_priv->rx_skbuff[entry] == NULL) {
1745 if (netif_msg_rx_err(sis_priv))
7380a78a
VA		 1746 printk(KERN_WARNING "%s: NULL pointer "
1747 "encountered in Rx ring\n"
1748 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1749 net_dev->name, sis_priv->cur_rx,
1750 sis_priv->dirty_rx);
1da177e4
LT		 1751 break;
1752 }
1753
1754 pci_unmap_single(sis_priv->pci_dev,
1755 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1756 PCI_DMA_FROMDEVICE);
1757 /* give the socket buffer to upper layers */
1758 skb = sis_priv->rx_skbuff[entry];
1759 skb_put(skb, rx_size);
1760 skb->protocol = eth_type_trans(skb, net_dev);
1761 netif_rx(skb);
1762
1763 /* some network statistics */
1764 if ((rx_status & BCAST) == MCAST)
1765 sis_priv->stats.multicast++;
1766 net_dev->last_rx = jiffies;
1767 sis_priv->stats.rx_bytes += rx_size;
1768 sis_priv->stats.rx_packets++;
1769
1770 /* refill the Rx buffer, what if there is not enought
1771 * memory for new socket buffer ?? */
1772 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1773 /* not enough memory for skbuff, this makes a
1774 * "hole" on the buffer ring, it is not clear
1775 * how the hardware will react to this kind
1776 * of degenerated buffer */
1777 if (netif_msg_rx_status(sis_priv))
1778 printk(KERN_INFO "%s: Memory squeeze,"
1779 "deferring packet.\n",
1780 net_dev->name);
1781 sis_priv->rx_skbuff[entry] = NULL;
1782 /* reset buffer descriptor state */
1783 sis_priv->rx_ring[entry].cmdsts = 0;
1784 sis_priv->rx_ring[entry].bufptr = 0;
1785 sis_priv->stats.rx_dropped++;
7380a78a 1786 sis_priv->cur_rx++;
1da177e4
LT		 1787 break;
1788 }
1789 skb->dev = net_dev;
1790 sis_priv->rx_skbuff[entry] = skb;
1791 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1792 sis_priv->rx_ring[entry].bufptr =
689be439 1793 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4
LT		 1794 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1795 sis_priv->dirty_rx++;
1796 }
1797 sis_priv->cur_rx++;
1798 entry = sis_priv->cur_rx % NUM_RX_DESC;
1799 rx_status = sis_priv->rx_ring[entry].cmdsts;
1800 } // while
1801
1802 /* refill the Rx buffer, what if the rate of refilling is slower
1803 * than consuming ?? */
7380a78a 1804 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1da177e4
LT		 1805 struct sk_buff *skb;
1806
1807 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1808
1809 if (sis_priv->rx_skbuff[entry] == NULL) {
1810 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1811 /* not enough memory for skbuff, this makes a
1812 * "hole" on the buffer ring, it is not clear
1813 * how the hardware will react to this kind
1814 * of degenerated buffer */
1815 if (netif_msg_rx_err(sis_priv))
1816 printk(KERN_INFO "%s: Memory squeeze,"
1817 "deferring packet.\n",
1818 net_dev->name);
1819 sis_priv->stats.rx_dropped++;
1820 break;
1821 }
1822 skb->dev = net_dev;
1823 sis_priv->rx_skbuff[entry] = skb;
1824 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1825 sis_priv->rx_ring[entry].bufptr =
689be439 1826 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4
LT		 1827 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1828 }
1829 }
1830 /* re-enable the potentially idle receive state matchine */
1831 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1832
1833 return 0;
1834}
1835
1836/**
1837 * sis900_finish_xmit - finish up transmission of packets
1838 * @net_dev: the net device to be transmitted on
1839 *
1840 * Check for error condition and free socket buffer etc
1841 * schedule for more transmission as needed
1842 * Note: This fucntion is called by interrupt handler,
1843 * don't do "too much" work here
1844 */
1845
1846static void sis900_finish_xmit (struct net_device *net_dev)
1847{
1848 struct sis900_private *sis_priv = net_dev->priv;
1849
1850 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1851 struct sk_buff *skb;
1852 unsigned int entry;
1853 u32 tx_status;
1854
1855 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1856 tx_status = sis_priv->tx_ring[entry].cmdsts;
1857
1858 if (tx_status & OWN) {
1859 /* The packet is not transmitted yet (owned by hardware) !
1860 * Note: the interrupt is generated only when Tx Machine
1861 * is idle, so this is an almost impossible case */
1862 break;
1863 }
1864
1865 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1866 /* packet unsuccessfully transmitted */
1867 if (netif_msg_tx_err(sis_priv))
1868 printk(KERN_DEBUG "%s: Transmit "
1869 "error, Tx status %8.8x.\n",
1870 net_dev->name, tx_status);
1871 sis_priv->stats.tx_errors++;
1872 if (tx_status & UNDERRUN)
1873 sis_priv->stats.tx_fifo_errors++;
1874 if (tx_status & ABORT)
1875 sis_priv->stats.tx_aborted_errors++;
1876 if (tx_status & NOCARRIER)
1877 sis_priv->stats.tx_carrier_errors++;
1878 if (tx_status & OWCOLL)
1879 sis_priv->stats.tx_window_errors++;
1880 } else {
1881 /* packet successfully transmitted */
1882 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1883 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1884 sis_priv->stats.tx_packets++;
1885 }
1886 /* Free the original skb. */
1887 skb = sis_priv->tx_skbuff[entry];
1888 pci_unmap_single(sis_priv->pci_dev,
1889 sis_priv->tx_ring[entry].bufptr, skb->len,
1890 PCI_DMA_TODEVICE);
1891 dev_kfree_skb_irq(skb);
1892 sis_priv->tx_skbuff[entry] = NULL;
1893 sis_priv->tx_ring[entry].bufptr = 0;
1894 sis_priv->tx_ring[entry].cmdsts = 0;
1895 }
1896
1897 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1898 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1899 /* The ring is no longer full, clear tx_full and schedule
1900 * more transmission by netif_wake_queue(net_dev) */
1901 sis_priv->tx_full = 0;
1902 netif_wake_queue (net_dev);
1903 }
1904}
1905
1906/**
1907 * sis900_close - close sis900 device
1908 * @net_dev: the net device to be closed
1909 *
1910 * Disable interrupts, stop the Tx and Rx Status Machine
1911 * free Tx and RX socket buffer
1912 */
1913
1914static int sis900_close(struct net_device *net_dev)
1915{
1916 long ioaddr = net_dev->base_addr;
1917 struct sis900_private *sis_priv = net_dev->priv;
1918 struct sk_buff *skb;
1919 int i;
1920
1921 netif_stop_queue(net_dev);
1922
1923 /* Disable interrupts by clearing the interrupt mask. */
1924 outl(0x0000, ioaddr + imr);
1925 outl(0x0000, ioaddr + ier);
1926
1927 /* Stop the chip's Tx and Rx Status Machine */
1928 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1929
1930 del_timer(&sis_priv->timer);
1931
1932 free_irq(net_dev->irq, net_dev);
1933
1934 /* Free Tx and RX skbuff */
1935 for (i = 0; i < NUM_RX_DESC; i++) {
1936 skb = sis_priv->rx_skbuff[i];
1937 if (skb) {
1938 pci_unmap_single(sis_priv->pci_dev,
1939 sis_priv->rx_ring[i].bufptr,
1940 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1941 dev_kfree_skb(skb);
1942 sis_priv->rx_skbuff[i] = NULL;
1943 }
1944 }
1945 for (i = 0; i < NUM_TX_DESC; i++) {
1946 skb = sis_priv->tx_skbuff[i];
1947 if (skb) {
1948 pci_unmap_single(sis_priv->pci_dev,
1949 sis_priv->tx_ring[i].bufptr, skb->len,
1950 PCI_DMA_TODEVICE);
1951 dev_kfree_skb(skb);
1952 sis_priv->tx_skbuff[i] = NULL;
1953 }
1954 }
1955
1956 /* Green! Put the chip in low-power mode. */
1957
1958 return 0;
1959}
1960
1961/**
1962 * sis900_get_drvinfo - Return information about driver
1963 * @net_dev: the net device to probe
1964 * @info: container for info returned
1965 *
1966 * Process ethtool command such as "ehtool -i" to show information
1967 */
1968
1969static void sis900_get_drvinfo(struct net_device *net_dev,
1970 struct ethtool_drvinfo *info)
1971{
1972 struct sis900_private *sis_priv = net_dev->priv;
1973
1974 strcpy (info->driver, SIS900_MODULE_NAME);
1975 strcpy (info->version, SIS900_DRV_VERSION);
1976 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1977}
1978
1979static u32 sis900_get_msglevel(struct net_device *net_dev)
1980{
1981 struct sis900_private *sis_priv = net_dev->priv;
1982 return sis_priv->msg_enable;
1983}
1984
1985static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1986{
1987 struct sis900_private *sis_priv = net_dev->priv;
1988 sis_priv->msg_enable = value;
1989}
1990
da369b01
DV		 1991static u32 sis900_get_link(struct net_device *net_dev)
1992{
1993 struct sis900_private *sis_priv = net_dev->priv;
1994 return mii_link_ok(&sis_priv->mii_info);
1995}
1996
1997static int sis900_get_settings(struct net_device *net_dev,
1998 struct ethtool_cmd *cmd)
1999{
2000 struct sis900_private *sis_priv = net_dev->priv;
2001 spin_lock_irq(&sis_priv->lock);
2002 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2003 spin_unlock_irq(&sis_priv->lock);
2004 return 0;
2005}
2006
2007static int sis900_set_settings(struct net_device *net_dev,
2008 struct ethtool_cmd *cmd)
2009{
2010 struct sis900_private *sis_priv = net_dev->priv;
2011 int rt;
2012 spin_lock_irq(&sis_priv->lock);
2013 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2014 spin_unlock_irq(&sis_priv->lock);
2015 return rt;
2016}
2017
2018static int sis900_nway_reset(struct net_device *net_dev)
2019{
2020 struct sis900_private *sis_priv = net_dev->priv;
2021 return mii_nway_restart(&sis_priv->mii_info);
2022}
2023
ea37ccea
DV		 2024/**
2025 * sis900_set_wol - Set up Wake on Lan registers
2026 * @net_dev: the net device to probe
2027 * @wol: container for info passed to the driver
2028 *
2029 * Process ethtool command "wol" to setup wake on lan features.
2030 * SiS900 supports sending WoL events if a correct packet is received,
2031 * but there is no simple way to filter them to only a subset (broadcast,
2032 * multicast, unicast or arp).
2033 */
2034
2035static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2036{
2037 struct sis900_private *sis_priv = net_dev->priv;
2038 long pmctrl_addr = net_dev->base_addr + pmctrl;
2039 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2040
2041 if (wol->wolopts == 0) {
2042 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
7bef4b39 2043 cfgpmcsr &= ~PME_EN;
ea37ccea
DV		 2044 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2045 outl(pmctrl_bits, pmctrl_addr);
2046 if (netif_msg_wol(sis_priv))
2047 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2048 return 0;
2049 }
2050
2051 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2052 | WAKE_BCAST | WAKE_ARP))
2053 return -EINVAL;
2054
2055 if (wol->wolopts & WAKE_MAGIC)
2056 pmctrl_bits |= MAGICPKT;
2057 if (wol->wolopts & WAKE_PHY)
2058 pmctrl_bits |= LINKON;
2059
2060 outl(pmctrl_bits, pmctrl_addr);
2061
2062 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2063 cfgpmcsr |= PME_EN;
2064 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2065 if (netif_msg_wol(sis_priv))
2066 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2067
2068 return 0;
2069}
2070
2071static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2072{
2073 long pmctrl_addr = net_dev->base_addr + pmctrl;
2074 u32 pmctrl_bits;
2075
2076 pmctrl_bits = inl(pmctrl_addr);
2077 if (pmctrl_bits & MAGICPKT)
2078 wol->wolopts |= WAKE_MAGIC;
2079 if (pmctrl_bits & LINKON)
2080 wol->wolopts |= WAKE_PHY;
2081
2082 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2083}
2084
1da177e4
LT		 2085static struct ethtool_ops sis900_ethtool_ops = {
2086 .get_drvinfo = sis900_get_drvinfo,
2087 .get_msglevel = sis900_get_msglevel,
2088 .set_msglevel = sis900_set_msglevel,
da369b01
DV		 2089 .get_link = sis900_get_link,
2090 .get_settings = sis900_get_settings,
2091 .set_settings = sis900_set_settings,
2092 .nway_reset = sis900_nway_reset,
ea37ccea
DV		 2093 .get_wol = sis900_get_wol,
2094 .set_wol = sis900_set_wol
1da177e4
LT		 2095};
2096
2097/**
2098 * mii_ioctl - process MII i/o control command
2099 * @net_dev: the net device to command for
2100 * @rq: parameter for command
2101 * @cmd: the i/o command
2102 *
2103 * Process MII command like read/write MII register
2104 */
2105
2106static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2107{
2108 struct sis900_private *sis_priv = net_dev->priv;
2109 struct mii_ioctl_data *data = if_mii(rq);
2110
2111 switch(cmd) {
2112 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2113 data->phy_id = sis_priv->mii->phy_addr;
2114 /* Fall Through */
2115
2116 case SIOCGMIIREG: /* Read MII PHY register. */
2117 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2118 return 0;
2119
2120 case SIOCSMIIREG: /* Write MII PHY register. */
2121 if (!capable(CAP_NET_ADMIN))
2122 return -EPERM;
2123 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2124 return 0;
2125 default:
2126 return -EOPNOTSUPP;
2127 }
2128}
2129
2130/**
2131 * sis900_get_stats - Get sis900 read/write statistics
2132 * @net_dev: the net device to get statistics for
2133 *
2134 * get tx/rx statistics for sis900
2135 */
2136
2137static struct net_device_stats *
2138sis900_get_stats(struct net_device *net_dev)
2139{
2140 struct sis900_private *sis_priv = net_dev->priv;
2141
2142 return &sis_priv->stats;
2143}
2144
2145/**
2146 * sis900_set_config - Set media type by net_device.set_config
2147 * @dev: the net device for media type change
2148 * @map: ifmap passed by ifconfig
2149 *
2150 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2151 * we support only port changes. All other runtime configuration
2152 * changes will be ignored
2153 */
2154
2155static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2156{
2157 struct sis900_private *sis_priv = dev->priv;
2158 struct mii_phy *mii_phy = sis_priv->mii;
2159
2160 u16 status;
2161
2162 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2163 /* we switch on the ifmap->port field. I couldn't find anything
2164 * like a definition or standard for the values of that field.
2165 * I think the meaning of those values is device specific. But
2166 * since I would like to change the media type via the ifconfig
2167 * command I use the definition from linux/netdevice.h
2168 * (which seems to be different from the ifport(pcmcia) definition) */
2169 switch(map->port){
2170 case IF_PORT_UNKNOWN: /* use auto here */
2171 dev->if_port = map->port;
2172 /* we are going to change the media type, so the Link
2173 * will be temporary down and we need to reflect that
2174 * here. When the Link comes up again, it will be
2175 * sensed by the sis_timer procedure, which also does
2176 * all the rest for us */
2177 netif_carrier_off(dev);
2178
2179 /* read current state */
2180 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2181
2182 /* enable auto negotiation and reset the negotioation
2183 * (I don't really know what the auto negatiotiation
2184 * reset really means, but it sounds for me right to
2185 * do one here) */
2186 mdio_write(dev, mii_phy->phy_addr,
2187 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2188
2189 break;
2190
2191 case IF_PORT_10BASET: /* 10BaseT */
2192 dev->if_port = map->port;
2193
2194 /* we are going to change the media type, so the Link
2195 * will be temporary down and we need to reflect that
2196 * here. When the Link comes up again, it will be
2197 * sensed by the sis_timer procedure, which also does
2198 * all the rest for us */
2199 netif_carrier_off(dev);
2200
2201 /* set Speed to 10Mbps */
2202 /* read current state */
2203 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2204
2205 /* disable auto negotiation and force 10MBit mode*/
2206 mdio_write(dev, mii_phy->phy_addr,
2207 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2208 MII_CNTL_AUTO));
2209 break;
2210
2211 case IF_PORT_100BASET: /* 100BaseT */
2212 case IF_PORT_100BASETX: /* 100BaseTx */
2213 dev->if_port = map->port;
2214
2215 /* we are going to change the media type, so the Link
2216 * will be temporary down and we need to reflect that
2217 * here. When the Link comes up again, it will be
2218 * sensed by the sis_timer procedure, which also does
2219 * all the rest for us */
2220 netif_carrier_off(dev);
2221
2222 /* set Speed to 100Mbps */
2223 /* disable auto negotiation and enable 100MBit Mode */
2224 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2225 mdio_write(dev, mii_phy->phy_addr,
2226 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2227 MII_CNTL_SPEED);
2228
2229 break;
2230
2231 case IF_PORT_10BASE2: /* 10Base2 */
2232 case IF_PORT_AUI: /* AUI */
2233 case IF_PORT_100BASEFX: /* 100BaseFx */
2234 /* These Modes are not supported (are they?)*/
2235 return -EOPNOTSUPP;
2236 break;
2237
2238 default:
2239 return -EINVAL;
2240 }
2241 }
2242 return 0;
2243}
2244
2245/**
2246 * sis900_mcast_bitnr - compute hashtable index
2247 * @addr: multicast address
2248 * @revision: revision id of chip
2249 *
2250 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2251 * hash table, which makes this function a little bit different from other drivers
2252 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2253 * multicast hash table.
2254 */
2255
2256static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2257{
2258
2259 u32 crc = ether_crc(6, addr);
2260
2261 /* leave 8 or 7 most siginifant bits */
2262 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2263 return ((int)(crc >> 24));
2264 else
2265 return ((int)(crc >> 25));
2266}
2267
2268/**
2269 * set_rx_mode - Set SiS900 receive mode
2270 * @net_dev: the net device to be set
2271 *
2272 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2273 * And set the appropriate multicast filter.
2274 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2275 */
2276
2277static void set_rx_mode(struct net_device *net_dev)
2278{
2279 long ioaddr = net_dev->base_addr;
2280 struct sis900_private * sis_priv = net_dev->priv;
2281 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2282 int i, table_entries;
2283 u32 rx_mode;
2284
2285 /* 635 Hash Table entires = 256(2^16) */
2286 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2287 (sis_priv->chipset_rev == SIS900B_900_REV))
2288 table_entries = 16;
2289 else
2290 table_entries = 8;
2291
2292 if (net_dev->flags & IFF_PROMISC) {
2293 /* Accept any kinds of packets */
2294 rx_mode = RFPromiscuous;
2295 for (i = 0; i < table_entries; i++)
2296 mc_filter[i] = 0xffff;
2297 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2298 (net_dev->flags & IFF_ALLMULTI)) {
2299 /* too many multicast addresses or accept all multicast packet */
2300 rx_mode = RFAAB | RFAAM;
2301 for (i = 0; i < table_entries; i++)
2302 mc_filter[i] = 0xffff;
2303 } else {
2304 /* Accept Broadcast packet, destination address matchs our
2305 * MAC address, use Receive Filter to reject unwanted MCAST
2306 * packets */
2307 struct dev_mc_list *mclist;
2308 rx_mode = RFAAB;
2309 for (i = 0, mclist = net_dev->mc_list;
2310 mclist && i < net_dev->mc_count;
2311 i++, mclist = mclist->next) {
2312 unsigned int bit_nr =
2313 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2314 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2315 }
2316 }
2317
2318 /* update Multicast Hash Table in Receive Filter */
2319 for (i = 0; i < table_entries; i++) {
2320 /* why plus 0x04 ??, That makes the correct value for hash table. */
2321 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2322 outl(mc_filter[i], ioaddr + rfdr);
2323 }
2324
2325 outl(RFEN | rx_mode, ioaddr + rfcr);
2326
2327 /* sis900 is capable of looping back packets at MAC level for
2328 * debugging purpose */
2329 if (net_dev->flags & IFF_LOOPBACK) {
2330 u32 cr_saved;
2331 /* We must disable Tx/Rx before setting loopback mode */
2332 cr_saved = inl(ioaddr + cr);
2333 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2334 /* enable loopback */
2335 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2336 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2337 /* restore cr */
2338 outl(cr_saved, ioaddr + cr);
2339 }
2340
2341 return;
2342}
2343
2344/**
2345 * sis900_reset - Reset sis900 MAC
2346 * @net_dev: the net device to reset
2347 *
2348 * reset sis900 MAC and wait until finished
2349 * reset through command register
2350 * change backoff algorithm for 900B0 & 635 M/B
2351 */
2352
2353static void sis900_reset(struct net_device *net_dev)
2354{
2355 struct sis900_private * sis_priv = net_dev->priv;
2356 long ioaddr = net_dev->base_addr;
2357 int i = 0;
2358 u32 status = TxRCMP | RxRCMP;
2359
2360 outl(0, ioaddr + ier);
2361 outl(0, ioaddr + imr);
2362 outl(0, ioaddr + rfcr);
2363
2364 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2365
2366 /* Check that the chip has finished the reset. */
2367 while (status && (i++ < 1000)) {
2368 status ^= (inl(isr + ioaddr) & status);
2369 }
2370
2371 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2372 (sis_priv->chipset_rev == SIS900B_900_REV) )
2373 outl(PESEL | RND_CNT, ioaddr + cfg);
2374 else
2375 outl(PESEL, ioaddr + cfg);
2376}
2377
2378/**
2379 * sis900_remove - Remove sis900 device
2380 * @pci_dev: the pci device to be removed
2381 *
2382 * remove and release SiS900 net device
2383 */
2384
2385static void __devexit sis900_remove(struct pci_dev *pci_dev)
2386{
2387 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2388 struct sis900_private * sis_priv = net_dev->priv;
2389 struct mii_phy *phy = NULL;
2390
2391 while (sis_priv->first_mii) {
2392 phy = sis_priv->first_mii;
2393 sis_priv->first_mii = phy->next;
2394 kfree(phy);
2395 }
2396
2397 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2398 sis_priv->rx_ring_dma);
2399 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2400 sis_priv->tx_ring_dma);
2401 unregister_netdev(net_dev);
2402 free_netdev(net_dev);
2403 pci_release_regions(pci_dev);
2404 pci_set_drvdata(pci_dev, NULL);
2405}
2406
2407#ifdef CONFIG_PM
2408
2409static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2410{
2411 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2412 long ioaddr = net_dev->base_addr;
2413
2414 if(!netif_running(net_dev))
2415 return 0;
2416
2417 netif_stop_queue(net_dev);
2418 netif_device_detach(net_dev);
2419
2420 /* Stop the chip's Tx and Rx Status Machine */
2421 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2422
2423 pci_set_power_state(pci_dev, PCI_D3hot);
2424 pci_save_state(pci_dev);
2425
2426 return 0;
2427}
2428
2429static int sis900_resume(struct pci_dev *pci_dev)
2430{
2431 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2432 struct sis900_private *sis_priv = net_dev->priv;
2433 long ioaddr = net_dev->base_addr;
2434
2435 if(!netif_running(net_dev))
2436 return 0;
2437 pci_restore_state(pci_dev);
2438 pci_set_power_state(pci_dev, PCI_D0);
2439
2440 sis900_init_rxfilter(net_dev);
2441
2442 sis900_init_tx_ring(net_dev);
2443 sis900_init_rx_ring(net_dev);
2444
2445 set_rx_mode(net_dev);
2446
2447 netif_device_attach(net_dev);
2448 netif_start_queue(net_dev);
2449
2450 /* Workaround for EDB */
2451 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2452
2453 /* Enable all known interrupts by setting the interrupt mask. */
2454 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2455 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2456 outl(IE, ioaddr + ier);
2457
2458 sis900_check_mode(net_dev, sis_priv->mii);
2459
2460 return 0;
2461}
2462#endif /* CONFIG_PM */
2463
2464static struct pci_driver sis900_pci_driver = {
2465 .name = SIS900_MODULE_NAME,
2466 .id_table = sis900_pci_tbl,
2467 .probe = sis900_probe,
2468 .remove = __devexit_p(sis900_remove),
2469#ifdef CONFIG_PM
2470 .suspend = sis900_suspend,
2471 .resume = sis900_resume,
2472#endif /* CONFIG_PM */
2473};
2474
2475static int __init sis900_init_module(void)
2476{
2477/* when a module, this is printed whether or not devices are found in probe */
2478#ifdef MODULE
2479 printk(version);
2480#endif
2481
2482 return pci_module_init(&sis900_pci_driver);
2483}
2484
2485static void __exit sis900_cleanup_module(void)
2486{
2487 pci_unregister_driver(&sis900_pci_driver);
2488}
2489
2490module_init(sis900_init_module);
2491module_exit(sis900_cleanup_module);
2492
Linux kernel - Deliverables
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