x86: make 32bit support per_cpu vector
[deliverable/linux.git] / drivers / net / smc911x.c
CommitLineData
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1/*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4 *
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
d5498bef 7 * and the smsc911x.c reference driver by SMSC
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8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Arguments:
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
26 *
27 * History:
28 * 04/16/05 Dustin McIntire Initial version
29 */
30static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32
33/* Debugging options */
34#define ENABLE_SMC_DEBUG_RX 0
35#define ENABLE_SMC_DEBUG_TX 0
36#define ENABLE_SMC_DEBUG_DMA 0
37#define ENABLE_SMC_DEBUG_PKTS 0
38#define ENABLE_SMC_DEBUG_MISC 0
39#define ENABLE_SMC_DEBUG_FUNC 0
40
41#define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42#define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43#define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44#define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45#define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46#define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
47
48#ifndef SMC_DEBUG
49#define SMC_DEBUG ( SMC_DEBUG_RX | \
50 SMC_DEBUG_TX | \
51 SMC_DEBUG_DMA | \
52 SMC_DEBUG_PKTS | \
53 SMC_DEBUG_MISC | \
54 SMC_DEBUG_FUNC \
55 )
56#endif
57
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58#include <linux/init.h>
59#include <linux/module.h>
60#include <linux/kernel.h>
61#include <linux/sched.h>
62#include <linux/slab.h>
63#include <linux/delay.h>
64#include <linux/interrupt.h>
65#include <linux/errno.h>
66#include <linux/ioport.h>
67#include <linux/crc32.h>
68#include <linux/device.h>
69#include <linux/platform_device.h>
70#include <linux/spinlock.h>
71#include <linux/ethtool.h>
72#include <linux/mii.h>
73#include <linux/workqueue.h>
74
75#include <linux/netdevice.h>
76#include <linux/etherdevice.h>
77#include <linux/skbuff.h>
78
79#include <asm/io.h>
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80
81#include "smc911x.h"
82
83/*
84 * Transmit timeout, default 5 seconds.
85 */
86static int watchdog = 5000;
87module_param(watchdog, int, 0400);
88MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
89
90static int tx_fifo_kb=8;
91module_param(tx_fifo_kb, int, 0400);
92MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
93
94MODULE_LICENSE("GPL");
72abb461 95MODULE_ALIAS("platform:smc911x");
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96
97/*
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
101 */
102#define CARDNAME "smc911x"
103
104/*
105 * Use power-down feature of the chip
106 */
107#define POWER_DOWN 1
108
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109#if SMC_DEBUG > 0
110#define DBG(n, args...) \
111 do { \
112 if (SMC_DEBUG & (n)) \
113 printk(args); \
114 } while (0)
115
116#define PRINTK(args...) printk(args)
117#else
118#define DBG(n, args...) do { } while (0)
119#define PRINTK(args...) printk(KERN_DEBUG args)
120#endif
121
122#if SMC_DEBUG_PKTS > 0
123static void PRINT_PKT(u_char *buf, int length)
124{
125 int i;
126 int remainder;
127 int lines;
128
129 lines = length / 16;
130 remainder = length % 16;
131
132 for (i = 0; i < lines ; i ++) {
133 int cur;
134 for (cur = 0; cur < 8; cur++) {
135 u_char a, b;
136 a = *buf++;
137 b = *buf++;
138 printk("%02x%02x ", a, b);
139 }
140 printk("\n");
141 }
142 for (i = 0; i < remainder/2 ; i++) {
143 u_char a, b;
144 a = *buf++;
145 b = *buf++;
146 printk("%02x%02x ", a, b);
147 }
148 printk("\n");
149}
150#else
151#define PRINT_PKT(x...) do { } while (0)
152#endif
153
154
155/* this enables an interrupt in the interrupt mask register */
699559f8 156#define SMC_ENABLE_INT(lp, x) do { \
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157 unsigned int __mask; \
158 unsigned long __flags; \
159 spin_lock_irqsave(&lp->lock, __flags); \
699559f8 160 __mask = SMC_GET_INT_EN((lp)); \
0a0c72c9 161 __mask |= (x); \
699559f8 162 SMC_SET_INT_EN((lp), __mask); \
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163 spin_unlock_irqrestore(&lp->lock, __flags); \
164} while (0)
165
166/* this disables an interrupt from the interrupt mask register */
699559f8 167#define SMC_DISABLE_INT(lp, x) do { \
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168 unsigned int __mask; \
169 unsigned long __flags; \
170 spin_lock_irqsave(&lp->lock, __flags); \
699559f8 171 __mask = SMC_GET_INT_EN((lp)); \
0a0c72c9 172 __mask &= ~(x); \
699559f8 173 SMC_SET_INT_EN((lp), __mask); \
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174 spin_unlock_irqrestore(&lp->lock, __flags); \
175} while (0)
176
177/*
178 * this does a soft reset on the device
179 */
180static void smc911x_reset(struct net_device *dev)
181{
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182 struct smc911x_local *lp = netdev_priv(dev);
183 unsigned int reg, timeout=0, resets=1;
184 unsigned long flags;
185
b39d66a8 186 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
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187
188 /* Take out of PM setting first */
699559f8 189 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
0a0c72c9 190 /* Write to the bytetest will take out of powerdown */
699559f8 191 SMC_SET_BYTE_TEST(lp, 0);
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192 timeout=10;
193 do {
194 udelay(10);
699559f8 195 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
db2961c5 196 } while (--timeout && !reg);
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197 if (timeout == 0) {
198 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
199 return;
200 }
201 }
202
203 /* Disable all interrupts */
204 spin_lock_irqsave(&lp->lock, flags);
699559f8 205 SMC_SET_INT_EN(lp, 0);
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206 spin_unlock_irqrestore(&lp->lock, flags);
207
208 while (resets--) {
699559f8 209 SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
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210 timeout=10;
211 do {
212 udelay(10);
699559f8 213 reg = SMC_GET_HW_CFG(lp);
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214 /* If chip indicates reset timeout then try again */
215 if (reg & HW_CFG_SRST_TO_) {
216 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
217 resets++;
218 break;
219 }
db2961c5 220 } while (--timeout && (reg & HW_CFG_SRST_));
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221 }
222 if (timeout == 0) {
223 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
224 return;
225 }
226
227 /* make sure EEPROM has finished loading before setting GPIO_CFG */
228 timeout=1000;
699559f8 229 while ( timeout-- && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_)) {
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230 udelay(10);
231 }
232 if (timeout == 0){
233 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
234 return;
235 }
236
237 /* Initialize interrupts */
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238 SMC_SET_INT_EN(lp, 0);
239 SMC_ACK_INT(lp, -1);
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240
241 /* Reset the FIFO level and flow control settings */
699559f8 242 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
0a0c72c9 243//TODO: Figure out what appropriate pause time is
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244 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
245 SMC_SET_AFC_CFG(lp, lp->afc_cfg);
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246
247
248 /* Set to LED outputs */
699559f8 249 SMC_SET_GPIO_CFG(lp, 0x70070000);
0a0c72c9 250
d5498bef 251 /*
0a0c72c9 252 * Deassert IRQ for 1*10us for edge type interrupts
d5498bef 253 * and drive IRQ pin push-pull
0a0c72c9 254 */
699559f8 255 SMC_SET_IRQ_CFG(lp, (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_);
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256
257 /* clear anything saved */
258 if (lp->pending_tx_skb != NULL) {
259 dev_kfree_skb (lp->pending_tx_skb);
260 lp->pending_tx_skb = NULL;
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261 dev->stats.tx_errors++;
262 dev->stats.tx_aborted_errors++;
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263 }
264}
265
266/*
267 * Enable Interrupts, Receive, and Transmit
268 */
269static void smc911x_enable(struct net_device *dev)
270{
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271 struct smc911x_local *lp = netdev_priv(dev);
272 unsigned mask, cfg, cr;
273 unsigned long flags;
274
b39d66a8 275 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9 276
699559f8 277 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
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278
279 /* Enable TX */
699559f8 280 cfg = SMC_GET_HW_CFG(lp);
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281 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
282 cfg |= HW_CFG_SF_;
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283 SMC_SET_HW_CFG(lp, cfg);
284 SMC_SET_FIFO_TDA(lp, 0xFF);
0a0c72c9 285 /* Update TX stats on every 64 packets received or every 1 sec */
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286 SMC_SET_FIFO_TSL(lp, 64);
287 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
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288
289 spin_lock_irqsave(&lp->lock, flags);
699559f8 290 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 291 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
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292 SMC_SET_MAC_CR(lp, cr);
293 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
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294 spin_unlock_irqrestore(&lp->lock, flags);
295
296 /* Add 2 byte padding to start of packets */
699559f8 297 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
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298
299 /* Turn on receiver and enable RX */
300 if (cr & MAC_CR_RXEN_)
301 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
302
303 spin_lock_irqsave(&lp->lock, flags);
699559f8 304 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
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305 spin_unlock_irqrestore(&lp->lock, flags);
306
307 /* Interrupt on every received packet */
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308 SMC_SET_FIFO_RSA(lp, 0x01);
309 SMC_SET_FIFO_RSL(lp, 0x00);
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310
311 /* now, enable interrupts */
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312 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
313 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
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314 INT_EN_PHY_INT_EN_;
315 if (IS_REV_A(lp->revision))
316 mask|=INT_EN_RDFL_EN_;
317 else {
318 mask|=INT_EN_RDFO_EN_;
319 }
699559f8 320 SMC_ENABLE_INT(lp, mask);
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321}
322
323/*
324 * this puts the device in an inactive state
325 */
326static void smc911x_shutdown(struct net_device *dev)
327{
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328 struct smc911x_local *lp = netdev_priv(dev);
329 unsigned cr;
330 unsigned long flags;
331
b39d66a8 332 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __func__);
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333
334 /* Disable IRQ's */
699559f8 335 SMC_SET_INT_EN(lp, 0);
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336
337 /* Turn of Rx and TX */
338 spin_lock_irqsave(&lp->lock, flags);
699559f8 339 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 340 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
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341 SMC_SET_MAC_CR(lp, cr);
342 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
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343 spin_unlock_irqrestore(&lp->lock, flags);
344}
345
346static inline void smc911x_drop_pkt(struct net_device *dev)
d5498bef 347{
699559f8 348 struct smc911x_local *lp = netdev_priv(dev);
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349 unsigned int fifo_count, timeout, reg;
350
b39d66a8 351 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __func__);
699559f8 352 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
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353 if (fifo_count <= 4) {
354 /* Manually dump the packet data */
355 while (fifo_count--)
699559f8 356 SMC_GET_RX_FIFO(lp);
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357 } else {
358 /* Fast forward through the bad packet */
699559f8 359 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
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360 timeout=50;
361 do {
362 udelay(10);
699559f8 363 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
db2961c5 364 } while (--timeout && reg);
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365 if (timeout == 0) {
366 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
367 }
368 }
369}
370
371/*
372 * This is the procedure to handle the receipt of a packet.
373 * It should be called after checking for packet presence in
d5498bef 374 * the RX status FIFO. It must be called with the spin lock
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375 * already held.
376 */
377static inline void smc911x_rcv(struct net_device *dev)
378{
699559f8 379 struct smc911x_local *lp = netdev_priv(dev);
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380 unsigned int pkt_len, status;
381 struct sk_buff *skb;
382 unsigned char *data;
383
d5498bef 384 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
b39d66a8 385 dev->name, __func__);
699559f8 386 status = SMC_GET_RX_STS_FIFO(lp);
d5498bef 387 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
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388 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
389 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
d5498bef 390 if (status & RX_STS_ES_) {
0a0c72c9 391 /* Deal with a bad packet */
09f75cd7 392 dev->stats.rx_errors++;
d5498bef 393 if (status & RX_STS_CRC_ERR_)
09f75cd7 394 dev->stats.rx_crc_errors++;
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395 else {
396 if (status & RX_STS_LEN_ERR_)
09f75cd7 397 dev->stats.rx_length_errors++;
d5498bef 398 if (status & RX_STS_MCAST_)
09f75cd7 399 dev->stats.multicast++;
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400 }
401 /* Remove the bad packet data from the RX FIFO */
402 smc911x_drop_pkt(dev);
403 } else {
404 /* Receive a valid packet */
405 /* Alloc a buffer with extra room for DMA alignment */
406 skb=dev_alloc_skb(pkt_len+32);
407 if (unlikely(skb == NULL)) {
408 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
409 dev->name);
09f75cd7 410 dev->stats.rx_dropped++;
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411 smc911x_drop_pkt(dev);
412 return;
413 }
d5498bef 414 /* Align IP header to 32 bits
0a0c72c9 415 * Note that the device is configured to add a 2
d5498bef 416 * byte padding to the packet start, so we really
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417 * want to write to the orignal data pointer */
418 data = skb->data;
419 skb_reserve(skb, 2);
420 skb_put(skb,pkt_len-4);
421#ifdef SMC_USE_DMA
422 {
423 unsigned int fifo;
424 /* Lower the FIFO threshold if possible */
699559f8 425 fifo = SMC_GET_FIFO_INT(lp);
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426 if (fifo & 0xFF) fifo--;
427 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
428 dev->name, fifo & 0xff);
699559f8 429 SMC_SET_FIFO_INT(lp, fifo);
0a0c72c9 430 /* Setup RX DMA */
699559f8 431 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
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432 lp->rxdma_active = 1;
433 lp->current_rx_skb = skb;
699559f8 434 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
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435 /* Packet processing deferred to DMA RX interrupt */
436 }
437#else
699559f8
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438 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
439 SMC_PULL_DATA(lp, data, pkt_len+2+3);
0a0c72c9 440
b4cf2058 441 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
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442 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
443 dev->last_rx = jiffies;
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444 skb->protocol = eth_type_trans(skb, dev);
445 netif_rx(skb);
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446 dev->stats.rx_packets++;
447 dev->stats.rx_bytes += pkt_len-4;
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448#endif
449 }
450}
451
452/*
453 * This is called to actually send a packet to the chip.
454 */
455static void smc911x_hardware_send_pkt(struct net_device *dev)
456{
457 struct smc911x_local *lp = netdev_priv(dev);
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458 struct sk_buff *skb;
459 unsigned int cmdA, cmdB, len;
460 unsigned char *buf;
461 unsigned long flags;
462
b39d66a8 463 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __func__);
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464 BUG_ON(lp->pending_tx_skb == NULL);
465
466 skb = lp->pending_tx_skb;
467 lp->pending_tx_skb = NULL;
468
d5498bef
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469 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
470 /* cmdB {31:16] pkt tag [10:0] length */
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471#ifdef SMC_USE_DMA
472 /* 16 byte buffer alignment mode */
473 buf = (char*)((u32)(skb->data) & ~0xF);
d5498bef 474 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
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475 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
476 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
477 skb->len;
478#else
479 buf = (char*)((u32)skb->data & ~0x3);
d5498bef 480 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
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481 cmdA = (((u32)skb->data & 0x3) << 16) |
482 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
483 skb->len;
484#endif
d5498bef 485 /* tag is packet length so we can use this in stats update later */
0a0c72c9 486 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
d5498bef 487
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488 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
489 dev->name, len, len, buf, cmdA, cmdB);
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490 SMC_SET_TX_FIFO(lp, cmdA);
491 SMC_SET_TX_FIFO(lp, cmdB);
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492
493 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
494 PRINT_PKT(buf, len <= 64 ? len : 64);
495
496 /* Send pkt via PIO or DMA */
497#ifdef SMC_USE_DMA
498 lp->current_tx_skb = skb;
699559f8 499 SMC_PUSH_DATA(lp, buf, len);
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500 /* DMA complete IRQ will free buffer and set jiffies */
501#else
699559f8 502 SMC_PUSH_DATA(lp, buf, len);
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503 dev->trans_start = jiffies;
504 dev_kfree_skb(skb);
505#endif
506 spin_lock_irqsave(&lp->lock, flags);
507 if (!lp->tx_throttle) {
508 netif_wake_queue(dev);
509 }
510 spin_unlock_irqrestore(&lp->lock, flags);
699559f8 511 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
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512}
513
514/*
515 * Since I am not sure if I will have enough room in the chip's ram
516 * to store the packet, I call this routine which either sends it
517 * now, or set the card to generates an interrupt when ready
518 * for the packet.
519 */
520static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
521{
522 struct smc911x_local *lp = netdev_priv(dev);
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523 unsigned int free;
524 unsigned long flags;
525
d5498bef 526 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
b39d66a8 527 dev->name, __func__);
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528
529 BUG_ON(lp->pending_tx_skb != NULL);
530
699559f8 531 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
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532 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
533
534 /* Turn off the flow when running out of space in FIFO */
535 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
d5498bef 536 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
0a0c72c9
DM
537 dev->name, free);
538 spin_lock_irqsave(&lp->lock, flags);
539 /* Reenable when at least 1 packet of size MTU present */
699559f8 540 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
0a0c72c9
DM
541 lp->tx_throttle = 1;
542 netif_stop_queue(dev);
543 spin_unlock_irqrestore(&lp->lock, flags);
544 }
545
d5498bef 546 /* Drop packets when we run out of space in TX FIFO
0a0c72c9 547 * Account for overhead required for:
d5498bef
JG
548 *
549 * Tx command words 8 bytes
0a0c72c9
DM
550 * Start offset 15 bytes
551 * End padding 15 bytes
d5498bef 552 */
0a0c72c9 553 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
d5498bef 554 printk("%s: No Tx free space %d < %d\n",
0a0c72c9
DM
555 dev->name, free, skb->len);
556 lp->pending_tx_skb = NULL;
09f75cd7
JG
557 dev->stats.tx_errors++;
558 dev->stats.tx_dropped++;
0a0c72c9
DM
559 dev_kfree_skb(skb);
560 return 0;
561 }
d5498bef 562
0a0c72c9
DM
563#ifdef SMC_USE_DMA
564 {
565 /* If the DMA is already running then defer this packet Tx until
d5498bef 566 * the DMA IRQ starts it
0a0c72c9
DM
567 */
568 spin_lock_irqsave(&lp->lock, flags);
569 if (lp->txdma_active) {
570 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
571 lp->pending_tx_skb = skb;
572 netif_stop_queue(dev);
573 spin_unlock_irqrestore(&lp->lock, flags);
574 return 0;
575 } else {
576 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
577 lp->txdma_active = 1;
578 }
579 spin_unlock_irqrestore(&lp->lock, flags);
580 }
581#endif
582 lp->pending_tx_skb = skb;
583 smc911x_hardware_send_pkt(dev);
584
585 return 0;
586}
587
588/*
589 * This handles a TX status interrupt, which is only called when:
590 * - a TX error occurred, or
591 * - TX of a packet completed.
592 */
593static void smc911x_tx(struct net_device *dev)
594{
0a0c72c9
DM
595 struct smc911x_local *lp = netdev_priv(dev);
596 unsigned int tx_status;
597
d5498bef 598 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
b39d66a8 599 dev->name, __func__);
0a0c72c9
DM
600
601 /* Collect the TX status */
699559f8 602 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
d5498bef
JG
603 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
604 dev->name,
699559f8
MD
605 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
606 tx_status = SMC_GET_TX_STS_FIFO(lp);
09f75cd7
JG
607 dev->stats.tx_packets++;
608 dev->stats.tx_bytes+=tx_status>>16;
d5498bef
JG
609 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
610 dev->name, (tx_status & 0xffff0000) >> 16,
0a0c72c9 611 tx_status & 0x0000ffff);
d5498bef 612 /* count Tx errors, but ignore lost carrier errors when in
0a0c72c9 613 * full-duplex mode */
d5498bef 614 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
0a0c72c9 615 !(tx_status & 0x00000306))) {
09f75cd7 616 dev->stats.tx_errors++;
0a0c72c9
DM
617 }
618 if (tx_status & TX_STS_MANY_COLL_) {
09f75cd7
JG
619 dev->stats.collisions+=16;
620 dev->stats.tx_aborted_errors++;
0a0c72c9 621 } else {
09f75cd7 622 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
0a0c72c9
DM
623 }
624 /* carrier error only has meaning for half-duplex communication */
d5498bef 625 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
0a0c72c9 626 !lp->ctl_rfduplx) {
09f75cd7 627 dev->stats.tx_carrier_errors++;
d5498bef 628 }
0a0c72c9 629 if (tx_status & TX_STS_LATE_COLL_) {
09f75cd7
JG
630 dev->stats.collisions++;
631 dev->stats.tx_aborted_errors++;
0a0c72c9
DM
632 }
633 }
634}
635
636
637/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
638/*
639 * Reads a register from the MII Management serial interface
640 */
641
642static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
643{
699559f8 644 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
645 unsigned int phydata;
646
699559f8 647 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
0a0c72c9
DM
648
649 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
b39d66a8 650 __func__, phyaddr, phyreg, phydata);
0a0c72c9
DM
651 return phydata;
652}
653
654
655/*
656 * Writes a register to the MII Management serial interface
657 */
658static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
659 int phydata)
660{
699559f8 661 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
662
663 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
b39d66a8 664 __func__, phyaddr, phyreg, phydata);
0a0c72c9 665
699559f8 666 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
0a0c72c9
DM
667}
668
669/*
670 * Finds and reports the PHY address (115 and 117 have external
671 * PHY interface 118 has internal only
672 */
673static void smc911x_phy_detect(struct net_device *dev)
674{
0a0c72c9
DM
675 struct smc911x_local *lp = netdev_priv(dev);
676 int phyaddr;
677 unsigned int cfg, id1, id2;
678
b39d66a8 679 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
680
681 lp->phy_type = 0;
682
683 /*
684 * Scan all 32 PHY addresses if necessary, starting at
685 * PHY#1 to PHY#31, and then PHY#0 last.
686 */
687 switch(lp->version) {
c6dcb827
GL
688 case CHIP_9115:
689 case CHIP_9117:
690 case CHIP_9215:
691 case CHIP_9217:
699559f8 692 cfg = SMC_GET_HW_CFG(lp);
0a0c72c9
DM
693 if (cfg & HW_CFG_EXT_PHY_DET_) {
694 cfg &= ~HW_CFG_PHY_CLK_SEL_;
695 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
699559f8 696 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
697 udelay(10); /* Wait for clocks to stop */
698
699 cfg |= HW_CFG_EXT_PHY_EN_;
699559f8 700 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
701 udelay(10); /* Wait for clocks to stop */
702
703 cfg &= ~HW_CFG_PHY_CLK_SEL_;
704 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
699559f8 705 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
706 udelay(10); /* Wait for clocks to stop */
707
708 cfg |= HW_CFG_SMI_SEL_;
699559f8 709 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
710
711 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
712
713 /* Read the PHY identifiers */
699559f8
MD
714 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
715 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
0a0c72c9
DM
716
717 /* Make sure it is a valid identifier */
d5498bef
JG
718 if (id1 != 0x0000 && id1 != 0xffff &&
719 id1 != 0x8000 && id2 != 0x0000 &&
0a0c72c9
DM
720 id2 != 0xffff && id2 != 0x8000) {
721 /* Save the PHY's address */
722 lp->mii.phy_id = phyaddr & 31;
723 lp->phy_type = id1 << 16 | id2;
724 break;
725 }
726 }
f3073ac7
GL
727 if (phyaddr < 32)
728 /* Found an external PHY */
729 break;
0a0c72c9
DM
730 }
731 default:
732 /* Internal media only */
699559f8
MD
733 SMC_GET_PHY_ID1(lp, 1, id1);
734 SMC_GET_PHY_ID2(lp, 1, id2);
0a0c72c9
DM
735 /* Save the PHY's address */
736 lp->mii.phy_id = 1;
737 lp->phy_type = id1 << 16 | id2;
738 }
739
740 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
741 dev->name, id1, id2, lp->mii.phy_id);
742}
743
744/*
745 * Sets the PHY to a configuration as determined by the user.
746 * Called with spin_lock held.
747 */
748static int smc911x_phy_fixed(struct net_device *dev)
749{
750 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
751 int phyaddr = lp->mii.phy_id;
752 int bmcr;
753
b39d66a8 754 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
755
756 /* Enter Link Disable state */
699559f8 757 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9 758 bmcr |= BMCR_PDOWN;
699559f8 759 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
760
761 /*
762 * Set our fixed capabilities
763 * Disable auto-negotiation
764 */
765 bmcr &= ~BMCR_ANENABLE;
766 if (lp->ctl_rfduplx)
767 bmcr |= BMCR_FULLDPLX;
768
769 if (lp->ctl_rspeed == 100)
770 bmcr |= BMCR_SPEED100;
771
772 /* Write our capabilities to the phy control register */
699559f8 773 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
774
775 /* Re-Configure the Receive/Phy Control register */
776 bmcr &= ~BMCR_PDOWN;
699559f8 777 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
778
779 return 1;
780}
781
782/*
783 * smc911x_phy_reset - reset the phy
784 * @dev: net device
785 * @phy: phy address
786 *
787 * Issue a software reset for the specified PHY and
788 * wait up to 100ms for the reset to complete. We should
789 * not access the PHY for 50ms after issuing the reset.
790 *
791 * The time to wait appears to be dependent on the PHY.
792 *
793 */
794static int smc911x_phy_reset(struct net_device *dev, int phy)
795{
796 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
797 int timeout;
798 unsigned long flags;
799 unsigned int reg;
800
b39d66a8 801 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
0a0c72c9
DM
802
803 spin_lock_irqsave(&lp->lock, flags);
699559f8 804 reg = SMC_GET_PMT_CTRL(lp);
0a0c72c9
DM
805 reg &= ~0xfffff030;
806 reg |= PMT_CTRL_PHY_RST_;
699559f8 807 SMC_SET_PMT_CTRL(lp, reg);
0a0c72c9
DM
808 spin_unlock_irqrestore(&lp->lock, flags);
809 for (timeout = 2; timeout; timeout--) {
810 msleep(50);
811 spin_lock_irqsave(&lp->lock, flags);
699559f8 812 reg = SMC_GET_PMT_CTRL(lp);
0a0c72c9
DM
813 spin_unlock_irqrestore(&lp->lock, flags);
814 if (!(reg & PMT_CTRL_PHY_RST_)) {
d5498bef 815 /* extra delay required because the phy may
0a0c72c9 816 * not be completed with its reset
d5498bef 817 * when PHY_BCR_RESET_ is cleared. 256us
0a0c72c9
DM
818 * should suffice, but use 500us to be safe
819 */
820 udelay(500);
821 break;
822 }
823 }
824
825 return reg & PMT_CTRL_PHY_RST_;
826}
827
828/*
829 * smc911x_phy_powerdown - powerdown phy
830 * @dev: net device
831 * @phy: phy address
832 *
833 * Power down the specified PHY
834 */
835static void smc911x_phy_powerdown(struct net_device *dev, int phy)
836{
699559f8 837 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
838 unsigned int bmcr;
839
840 /* Enter Link Disable state */
699559f8 841 SMC_GET_PHY_BMCR(lp, phy, bmcr);
0a0c72c9 842 bmcr |= BMCR_PDOWN;
699559f8 843 SMC_SET_PHY_BMCR(lp, phy, bmcr);
0a0c72c9
DM
844}
845
846/*
847 * smc911x_phy_check_media - check the media status and adjust BMCR
848 * @dev: net device
849 * @init: set true for initialisation
850 *
851 * Select duplex mode depending on negotiation state. This
852 * also updates our carrier state.
853 */
854static void smc911x_phy_check_media(struct net_device *dev, int init)
855{
856 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
857 int phyaddr = lp->mii.phy_id;
858 unsigned int bmcr, cr;
859
b39d66a8 860 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
861
862 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
863 /* duplex state has changed */
699559f8
MD
864 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
865 SMC_GET_MAC_CR(lp, cr);
0a0c72c9
DM
866 if (lp->mii.full_duplex) {
867 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
868 bmcr |= BMCR_FULLDPLX;
869 cr |= MAC_CR_RCVOWN_;
870 } else {
871 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
872 bmcr &= ~BMCR_FULLDPLX;
873 cr &= ~MAC_CR_RCVOWN_;
874 }
699559f8
MD
875 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
876 SMC_SET_MAC_CR(lp, cr);
0a0c72c9
DM
877 }
878}
879
880/*
881 * Configures the specified PHY through the MII management interface
882 * using Autonegotiation.
883 * Calls smc911x_phy_fixed() if the user has requested a certain config.
884 * If RPC ANEG bit is set, the media selection is dependent purely on
885 * the selection by the MII (either in the MII BMCR reg or the result
886 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
887 * is controlled by the RPC SPEED and RPC DPLX bits.
888 */
ef8142a5 889static void smc911x_phy_configure(struct work_struct *work)
0a0c72c9 890{
ef8142a5
AM
891 struct smc911x_local *lp = container_of(work, struct smc911x_local,
892 phy_configure);
893 struct net_device *dev = lp->netdev;
0a0c72c9
DM
894 int phyaddr = lp->mii.phy_id;
895 int my_phy_caps; /* My PHY capabilities */
896 int my_ad_caps; /* My Advertised capabilities */
897 int status;
898 unsigned long flags;
899
b39d66a8 900 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
0a0c72c9
DM
901
902 /*
903 * We should not be called if phy_type is zero.
904 */
905 if (lp->phy_type == 0)
4bb073c0 906 return;
0a0c72c9
DM
907
908 if (smc911x_phy_reset(dev, phyaddr)) {
909 printk("%s: PHY reset timed out\n", dev->name);
4bb073c0 910 return;
0a0c72c9
DM
911 }
912 spin_lock_irqsave(&lp->lock, flags);
913
914 /*
915 * Enable PHY Interrupts (for register 18)
916 * Interrupts listed here are enabled
917 */
699559f8 918 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
0a0c72c9
DM
919 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
920 PHY_INT_MASK_LINK_DOWN_);
921
922 /* If the user requested no auto neg, then go set his request */
923 if (lp->mii.force_media) {
924 smc911x_phy_fixed(dev);
925 goto smc911x_phy_configure_exit;
926 }
927
928 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
699559f8 929 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
0a0c72c9
DM
930 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
931 printk(KERN_INFO "Auto negotiation NOT supported\n");
932 smc911x_phy_fixed(dev);
933 goto smc911x_phy_configure_exit;
934 }
935
936 /* CSMA capable w/ both pauses */
937 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
938
939 if (my_phy_caps & BMSR_100BASE4)
940 my_ad_caps |= ADVERTISE_100BASE4;
941 if (my_phy_caps & BMSR_100FULL)
942 my_ad_caps |= ADVERTISE_100FULL;
943 if (my_phy_caps & BMSR_100HALF)
944 my_ad_caps |= ADVERTISE_100HALF;
945 if (my_phy_caps & BMSR_10FULL)
946 my_ad_caps |= ADVERTISE_10FULL;
947 if (my_phy_caps & BMSR_10HALF)
948 my_ad_caps |= ADVERTISE_10HALF;
949
950 /* Disable capabilities not selected by our user */
951 if (lp->ctl_rspeed != 100)
952 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
953
954 if (!lp->ctl_rfduplx)
955 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
956
957 /* Update our Auto-Neg Advertisement Register */
699559f8 958 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
0a0c72c9
DM
959 lp->mii.advertising = my_ad_caps;
960
961 /*
962 * Read the register back. Without this, it appears that when
963 * auto-negotiation is restarted, sometimes it isn't ready and
964 * the link does not come up.
965 */
966 udelay(10);
699559f8 967 SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
0a0c72c9
DM
968
969 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
970 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
971
972 /* Restart auto-negotiation process in order to advertise my caps */
699559f8 973 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
0a0c72c9
DM
974
975 smc911x_phy_check_media(dev, 1);
976
977smc911x_phy_configure_exit:
978 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM
979}
980
981/*
982 * smc911x_phy_interrupt
983 *
984 * Purpose: Handle interrupts relating to PHY register 18. This is
985 * called from the "hard" interrupt handler under our private spinlock.
986 */
987static void smc911x_phy_interrupt(struct net_device *dev)
988{
989 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
990 int phyaddr = lp->mii.phy_id;
991 int status;
992
b39d66a8 993 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
994
995 if (lp->phy_type == 0)
996 return;
997
998 smc911x_phy_check_media(dev, 0);
999 /* read to clear status bits */
699559f8 1000 SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
d5498bef 1001 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
0a0c72c9 1002 dev->name, status & 0xffff);
d5498bef 1003 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
699559f8 1004 dev->name, SMC_GET_AFC_CFG(lp));
0a0c72c9
DM
1005}
1006
1007/*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1008
1009/*
1010 * This is the main routine of the driver, to handle the device when
1011 * it needs some attention.
1012 */
7d12e780 1013static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
0a0c72c9
DM
1014{
1015 struct net_device *dev = dev_id;
0a0c72c9
DM
1016 struct smc911x_local *lp = netdev_priv(dev);
1017 unsigned int status, mask, timeout;
1018 unsigned int rx_overrun=0, cr, pkts;
1019 unsigned long flags;
1020
b39d66a8 1021 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1022
1023 spin_lock_irqsave(&lp->lock, flags);
1024
1025 /* Spurious interrupt check */
699559f8 1026 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
0a0c72c9 1027 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
a4d09272 1028 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM
1029 return IRQ_NONE;
1030 }
1031
699559f8
MD
1032 mask = SMC_GET_INT_EN(lp);
1033 SMC_SET_INT_EN(lp, 0);
0a0c72c9
DM
1034
1035 /* set a timeout value, so I don't stay here forever */
1036 timeout = 8;
1037
1038
1039 do {
699559f8 1040 status = SMC_GET_INT(lp);
0a0c72c9
DM
1041
1042 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1043 dev->name, status, mask, status & ~mask);
1044
1045 status &= mask;
1046 if (!status)
1047 break;
1048
1049 /* Handle SW interrupt condition */
1050 if (status & INT_STS_SW_INT_) {
699559f8 1051 SMC_ACK_INT(lp, INT_STS_SW_INT_);
0a0c72c9
DM
1052 mask &= ~INT_EN_SW_INT_EN_;
1053 }
1054 /* Handle various error conditions */
1055 if (status & INT_STS_RXE_) {
699559f8 1056 SMC_ACK_INT(lp, INT_STS_RXE_);
09f75cd7 1057 dev->stats.rx_errors++;
d5498bef 1058 }
0a0c72c9 1059 if (status & INT_STS_RXDFH_INT_) {
699559f8
MD
1060 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1061 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
0a0c72c9
DM
1062 }
1063 /* Undocumented interrupt-what is the right thing to do here? */
1064 if (status & INT_STS_RXDF_INT_) {
699559f8 1065 SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
0a0c72c9
DM
1066 }
1067
1068 /* Rx Data FIFO exceeds set level */
1069 if (status & INT_STS_RDFL_) {
1070 if (IS_REV_A(lp->revision)) {
1071 rx_overrun=1;
699559f8 1072 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 1073 cr &= ~MAC_CR_RXEN_;
699559f8 1074 SMC_SET_MAC_CR(lp, cr);
0a0c72c9 1075 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
09f75cd7
JG
1076 dev->stats.rx_errors++;
1077 dev->stats.rx_fifo_errors++;
0a0c72c9 1078 }
699559f8 1079 SMC_ACK_INT(lp, INT_STS_RDFL_);
0a0c72c9
DM
1080 }
1081 if (status & INT_STS_RDFO_) {
1082 if (!IS_REV_A(lp->revision)) {
699559f8 1083 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 1084 cr &= ~MAC_CR_RXEN_;
699559f8 1085 SMC_SET_MAC_CR(lp, cr);
0a0c72c9
DM
1086 rx_overrun=1;
1087 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
09f75cd7
JG
1088 dev->stats.rx_errors++;
1089 dev->stats.rx_fifo_errors++;
0a0c72c9 1090 }
699559f8 1091 SMC_ACK_INT(lp, INT_STS_RDFO_);
0a0c72c9
DM
1092 }
1093 /* Handle receive condition */
1094 if ((status & INT_STS_RSFL_) || rx_overrun) {
1095 unsigned int fifo;
1096 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
699559f8 1097 fifo = SMC_GET_RX_FIFO_INF(lp);
d5498bef
JG
1098 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1099 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
0a0c72c9
DM
1100 dev->name, pkts, fifo & 0xFFFF );
1101 if (pkts != 0) {
1102#ifdef SMC_USE_DMA
1103 unsigned int fifo;
1104 if (lp->rxdma_active){
d5498bef 1105 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
0a0c72c9
DM
1106 "%s: RX DMA active\n", dev->name);
1107 /* The DMA is already running so up the IRQ threshold */
699559f8 1108 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
0a0c72c9 1109 fifo |= pkts & 0xFF;
d5498bef 1110 DBG(SMC_DEBUG_RX,
0a0c72c9
DM
1111 "%s: Setting RX stat FIFO threshold to %d\n",
1112 dev->name, fifo & 0xff);
699559f8 1113 SMC_SET_FIFO_INT(lp, fifo);
0a0c72c9
DM
1114 } else
1115#endif
1116 smc911x_rcv(dev);
1117 }
699559f8 1118 SMC_ACK_INT(lp, INT_STS_RSFL_);
0a0c72c9
DM
1119 }
1120 /* Handle transmit FIFO available */
1121 if (status & INT_STS_TDFA_) {
1122 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
699559f8 1123 SMC_SET_FIFO_TDA(lp, 0xFF);
0a0c72c9
DM
1124 lp->tx_throttle = 0;
1125#ifdef SMC_USE_DMA
1126 if (!lp->txdma_active)
1127#endif
1128 netif_wake_queue(dev);
699559f8 1129 SMC_ACK_INT(lp, INT_STS_TDFA_);
0a0c72c9
DM
1130 }
1131 /* Handle transmit done condition */
1132#if 1
1133 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
d5498bef
JG
1134 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1135 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
699559f8 1136 dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
0a0c72c9 1137 smc911x_tx(dev);
699559f8
MD
1138 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1139 SMC_ACK_INT(lp, INT_STS_TSFL_);
1140 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
0a0c72c9
DM
1141 }
1142#else
1143 if (status & INT_STS_TSFL_) {
1144 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1145 smc911x_tx(dev);
699559f8 1146 SMC_ACK_INT(lp, INT_STS_TSFL_);
0a0c72c9
DM
1147 }
1148
1149 if (status & INT_STS_GPT_INT_) {
d5498bef
JG
1150 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1151 dev->name,
699559f8
MD
1152 SMC_GET_IRQ_CFG(lp),
1153 SMC_GET_FIFO_INT(lp),
1154 SMC_GET_RX_CFG(lp));
0a0c72c9
DM
1155 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1156 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
d5498bef 1157 dev->name,
699559f8
MD
1158 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1159 SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1160 SMC_GET_RX_STS_FIFO_PEEK(lp));
1161 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1162 SMC_ACK_INT(lp, INT_STS_GPT_INT_);
0a0c72c9
DM
1163 }
1164#endif
1165
3a4fa0a2 1166 /* Handle PHY interrupt condition */
0a0c72c9
DM
1167 if (status & INT_STS_PHY_INT_) {
1168 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1169 smc911x_phy_interrupt(dev);
699559f8 1170 SMC_ACK_INT(lp, INT_STS_PHY_INT_);
0a0c72c9
DM
1171 }
1172 } while (--timeout);
1173
1174 /* restore mask state */
699559f8 1175 SMC_SET_INT_EN(lp, mask);
0a0c72c9 1176
d5498bef 1177 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
0a0c72c9
DM
1178 dev->name, 8-timeout);
1179
1180 spin_unlock_irqrestore(&lp->lock, flags);
1181
0a0c72c9
DM
1182 return IRQ_HANDLED;
1183}
1184
1185#ifdef SMC_USE_DMA
1186static void
7d12e780 1187smc911x_tx_dma_irq(int dma, void *data)
0a0c72c9
DM
1188{
1189 struct net_device *dev = (struct net_device *)data;
1190 struct smc911x_local *lp = netdev_priv(dev);
1191 struct sk_buff *skb = lp->current_tx_skb;
1192 unsigned long flags;
1193
b39d66a8 1194 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1195
1196 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1197 /* Clear the DMA interrupt sources */
1198 SMC_DMA_ACK_IRQ(dev, dma);
1199 BUG_ON(skb == NULL);
1200 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1201 dev->trans_start = jiffies;
1202 dev_kfree_skb_irq(skb);
1203 lp->current_tx_skb = NULL;
1204 if (lp->pending_tx_skb != NULL)
1205 smc911x_hardware_send_pkt(dev);
1206 else {
d5498bef 1207 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM
1208 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1209 spin_lock_irqsave(&lp->lock, flags);
1210 lp->txdma_active = 0;
1211 if (!lp->tx_throttle) {
1212 netif_wake_queue(dev);
1213 }
1214 spin_unlock_irqrestore(&lp->lock, flags);
1215 }
1216
d5498bef 1217 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM
1218 "%s: TX DMA irq completed\n", dev->name);
1219}
1220static void
7d12e780 1221smc911x_rx_dma_irq(int dma, void *data)
0a0c72c9
DM
1222{
1223 struct net_device *dev = (struct net_device *)data;
1224 unsigned long ioaddr = dev->base_addr;
1225 struct smc911x_local *lp = netdev_priv(dev);
1226 struct sk_buff *skb = lp->current_rx_skb;
1227 unsigned long flags;
1228 unsigned int pkts;
1229
b39d66a8 1230 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1231 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1232 /* Clear the DMA interrupt sources */
1233 SMC_DMA_ACK_IRQ(dev, dma);
1234 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1235 BUG_ON(skb == NULL);
1236 lp->current_rx_skb = NULL;
1237 PRINT_PKT(skb->data, skb->len);
1238 dev->last_rx = jiffies;
0a0c72c9 1239 skb->protocol = eth_type_trans(skb, dev);
09f75cd7
JG
1240 dev->stats.rx_packets++;
1241 dev->stats.rx_bytes += skb->len;
d30f53ae 1242 netif_rx(skb);
0a0c72c9
DM
1243
1244 spin_lock_irqsave(&lp->lock, flags);
d5498bef 1245 pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
0a0c72c9
DM
1246 if (pkts != 0) {
1247 smc911x_rcv(dev);
1248 }else {
1249 lp->rxdma_active = 0;
1250 }
1251 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef
JG
1252 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1253 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
0a0c72c9
DM
1254 dev->name, pkts);
1255}
1256#endif /* SMC_USE_DMA */
1257
1258#ifdef CONFIG_NET_POLL_CONTROLLER
1259/*
1260 * Polling receive - used by netconsole and other diagnostic tools
1261 * to allow network i/o with interrupts disabled.
1262 */
1263static void smc911x_poll_controller(struct net_device *dev)
1264{
1265 disable_irq(dev->irq);
9b6d2efe 1266 smc911x_interrupt(dev->irq, dev);
0a0c72c9
DM
1267 enable_irq(dev->irq);
1268}
1269#endif
1270
1271/* Our watchdog timed out. Called by the networking layer */
1272static void smc911x_timeout(struct net_device *dev)
1273{
1274 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1275 int status, mask;
1276 unsigned long flags;
1277
b39d66a8 1278 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1279
1280 spin_lock_irqsave(&lp->lock, flags);
699559f8
MD
1281 status = SMC_GET_INT(lp);
1282 mask = SMC_GET_INT_EN(lp);
0a0c72c9
DM
1283 spin_unlock_irqrestore(&lp->lock, flags);
1284 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1285 dev->name, status, mask);
1286
1287 /* Dump the current TX FIFO contents and restart */
699559f8
MD
1288 mask = SMC_GET_TX_CFG(lp);
1289 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
0a0c72c9
DM
1290 /*
1291 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1292 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1293 * which calls schedule(). Hence we use a work queue.
1294 */
4bb073c0
DM
1295 if (lp->phy_type != 0)
1296 schedule_work(&lp->phy_configure);
0a0c72c9
DM
1297
1298 /* We can accept TX packets again */
1299 dev->trans_start = jiffies;
1300 netif_wake_queue(dev);
1301}
1302
1303/*
1304 * This routine will, depending on the values passed to it,
1305 * either make it accept multicast packets, go into
1306 * promiscuous mode (for TCPDUMP and cousins) or accept
1307 * a select set of multicast packets
1308 */
1309static void smc911x_set_multicast_list(struct net_device *dev)
1310{
1311 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1312 unsigned int multicast_table[2];
1313 unsigned int mcr, update_multicast = 0;
1314 unsigned long flags;
0a0c72c9 1315
b39d66a8 1316 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1317
1318 spin_lock_irqsave(&lp->lock, flags);
699559f8 1319 SMC_GET_MAC_CR(lp, mcr);
0a0c72c9
DM
1320 spin_unlock_irqrestore(&lp->lock, flags);
1321
1322 if (dev->flags & IFF_PROMISC) {
1323
1324 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1325 mcr |= MAC_CR_PRMS_;
1326 }
1327 /*
1328 * Here, I am setting this to accept all multicast packets.
1329 * I don't need to zero the multicast table, because the flag is
1330 * checked before the table is
1331 */
1332 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1333 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1334 mcr |= MAC_CR_MCPAS_;
1335 }
1336
1337 /*
1338 * This sets the internal hardware table to filter out unwanted
1339 * multicast packets before they take up memory.
1340 *
1341 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1342 * address are the offset into the table. If that bit is 1, then the
1343 * multicast packet is accepted. Otherwise, it's dropped silently.
1344 *
1345 * To use the 6 bits as an offset into the table, the high 1 bit is
1346 * the number of the 32 bit register, while the low 5 bits are the bit
1347 * within that register.
1348 */
1349 else if (dev->mc_count) {
1350 int i;
1351 struct dev_mc_list *cur_addr;
1352
1353 /* Set the Hash perfec mode */
1354 mcr |= MAC_CR_HPFILT_;
1355
1356 /* start with a table of all zeros: reject all */
1357 memset(multicast_table, 0, sizeof(multicast_table));
1358
1359 cur_addr = dev->mc_list;
1360 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
7b31f7ff 1361 u32 position;
0a0c72c9
DM
1362
1363 /* do we have a pointer here? */
1364 if (!cur_addr)
1365 break;
1366 /* make sure this is a multicast address -
1367 shouldn't this be a given if we have it here ? */
1368 if (!(*cur_addr->dmi_addr & 1))
1369 continue;
1370
7b31f7ff
PK
1371 /* upper 6 bits are used as hash index */
1372 position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
0a0c72c9 1373
7b31f7ff 1374 multicast_table[position>>5] |= 1 << (position&0x1f);
0a0c72c9
DM
1375 }
1376
1377 /* be sure I get rid of flags I might have set */
1378 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1379
1380 /* now, the table can be loaded into the chipset */
1381 update_multicast = 1;
1382 } else {
d5498bef 1383 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
0a0c72c9
DM
1384 dev->name);
1385 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1386
1387 /*
1388 * since I'm disabling all multicast entirely, I need to
1389 * clear the multicast list
1390 */
1391 memset(multicast_table, 0, sizeof(multicast_table));
1392 update_multicast = 1;
1393 }
1394
1395 spin_lock_irqsave(&lp->lock, flags);
699559f8 1396 SMC_SET_MAC_CR(lp, mcr);
0a0c72c9 1397 if (update_multicast) {
d5498bef
JG
1398 DBG(SMC_DEBUG_MISC,
1399 "%s: update mcast hash table 0x%08x 0x%08x\n",
0a0c72c9 1400 dev->name, multicast_table[0], multicast_table[1]);
699559f8
MD
1401 SMC_SET_HASHL(lp, multicast_table[0]);
1402 SMC_SET_HASHH(lp, multicast_table[1]);
0a0c72c9
DM
1403 }
1404 spin_unlock_irqrestore(&lp->lock, flags);
1405}
1406
1407
1408/*
1409 * Open and Initialize the board
1410 *
1411 * Set up everything, reset the card, etc..
1412 */
1413static int
1414smc911x_open(struct net_device *dev)
1415{
ef8142a5
AM
1416 struct smc911x_local *lp = netdev_priv(dev);
1417
b39d66a8 1418 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1419
1420 /*
1421 * Check that the address is valid. If its not, refuse
1422 * to bring the device up. The user must specify an
1423 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1424 */
1425 if (!is_valid_ether_addr(dev->dev_addr)) {
b39d66a8 1426 PRINTK("%s: no valid ethernet hw addr\n", __func__);
0a0c72c9
DM
1427 return -EINVAL;
1428 }
1429
1430 /* reset the hardware */
1431 smc911x_reset(dev);
1432
1433 /* Configure the PHY, initialize the link state */
ef8142a5 1434 smc911x_phy_configure(&lp->phy_configure);
0a0c72c9
DM
1435
1436 /* Turn on Tx + Rx */
1437 smc911x_enable(dev);
1438
1439 netif_start_queue(dev);
1440
1441 return 0;
1442}
1443
1444/*
1445 * smc911x_close
1446 *
1447 * this makes the board clean up everything that it can
1448 * and not talk to the outside world. Caused by
1449 * an 'ifconfig ethX down'
1450 */
1451static int smc911x_close(struct net_device *dev)
1452{
1453 struct smc911x_local *lp = netdev_priv(dev);
1454
b39d66a8 1455 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1456
1457 netif_stop_queue(dev);
1458 netif_carrier_off(dev);
1459
1460 /* clear everything */
1461 smc911x_shutdown(dev);
1462
1463 if (lp->phy_type != 0) {
1464 /* We need to ensure that no calls to
1465 * smc911x_phy_configure are pending.
0a0c72c9 1466 */
4bb073c0 1467 cancel_work_sync(&lp->phy_configure);
0a0c72c9
DM
1468 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1469 }
1470
1471 if (lp->pending_tx_skb) {
1472 dev_kfree_skb(lp->pending_tx_skb);
1473 lp->pending_tx_skb = NULL;
1474 }
1475
1476 return 0;
1477}
1478
0a0c72c9
DM
1479/*
1480 * Ethtool support
1481 */
1482static int
1483smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1484{
1485 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1486 int ret, status;
1487 unsigned long flags;
1488
b39d66a8 1489 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1490 cmd->maxtxpkt = 1;
1491 cmd->maxrxpkt = 1;
1492
1493 if (lp->phy_type != 0) {
1494 spin_lock_irqsave(&lp->lock, flags);
1495 ret = mii_ethtool_gset(&lp->mii, cmd);
1496 spin_unlock_irqrestore(&lp->lock, flags);
1497 } else {
1498 cmd->supported = SUPPORTED_10baseT_Half |
1499 SUPPORTED_10baseT_Full |
1500 SUPPORTED_TP | SUPPORTED_AUI;
1501
1502 if (lp->ctl_rspeed == 10)
1503 cmd->speed = SPEED_10;
1504 else if (lp->ctl_rspeed == 100)
1505 cmd->speed = SPEED_100;
1506
1507 cmd->autoneg = AUTONEG_DISABLE;
1508 if (lp->mii.phy_id==1)
1509 cmd->transceiver = XCVR_INTERNAL;
1510 else
1511 cmd->transceiver = XCVR_EXTERNAL;
1512 cmd->port = 0;
699559f8 1513 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
d5498bef
JG
1514 cmd->duplex =
1515 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
0a0c72c9
DM
1516 DUPLEX_FULL : DUPLEX_HALF;
1517 ret = 0;
1518 }
1519
1520 return ret;
1521}
1522
1523static int
1524smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1525{
1526 struct smc911x_local *lp = netdev_priv(dev);
1527 int ret;
1528 unsigned long flags;
1529
1530 if (lp->phy_type != 0) {
1531 spin_lock_irqsave(&lp->lock, flags);
1532 ret = mii_ethtool_sset(&lp->mii, cmd);
1533 spin_unlock_irqrestore(&lp->lock, flags);
1534 } else {
1535 if (cmd->autoneg != AUTONEG_DISABLE ||
1536 cmd->speed != SPEED_10 ||
1537 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1538 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1539 return -EINVAL;
1540
1541 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1542
1543 ret = 0;
1544 }
1545
1546 return ret;
1547}
1548
1549static void
1550smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1551{
1552 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1553 strncpy(info->version, version, sizeof(info->version));
43cb76d9 1554 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
0a0c72c9
DM
1555}
1556
1557static int smc911x_ethtool_nwayreset(struct net_device *dev)
1558{
1559 struct smc911x_local *lp = netdev_priv(dev);
1560 int ret = -EINVAL;
1561 unsigned long flags;
1562
1563 if (lp->phy_type != 0) {
1564 spin_lock_irqsave(&lp->lock, flags);
1565 ret = mii_nway_restart(&lp->mii);
1566 spin_unlock_irqrestore(&lp->lock, flags);
1567 }
1568
1569 return ret;
1570}
1571
1572static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1573{
1574 struct smc911x_local *lp = netdev_priv(dev);
1575 return lp->msg_enable;
1576}
1577
1578static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1579{
1580 struct smc911x_local *lp = netdev_priv(dev);
1581 lp->msg_enable = level;
1582}
1583
1584static int smc911x_ethtool_getregslen(struct net_device *dev)
1585{
1586 /* System regs + MAC regs + PHY regs */
d5498bef
JG
1587 return (((E2P_CMD - ID_REV)/4 + 1) +
1588 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
0a0c72c9
DM
1589}
1590
d5498bef 1591static void smc911x_ethtool_getregs(struct net_device *dev,
0a0c72c9
DM
1592 struct ethtool_regs* regs, void *buf)
1593{
0a0c72c9
DM
1594 struct smc911x_local *lp = netdev_priv(dev);
1595 unsigned long flags;
1596 u32 reg,i,j=0;
1597 u32 *data = (u32*)buf;
1598
1599 regs->version = lp->version;
1600 for(i=ID_REV;i<=E2P_CMD;i+=4) {
699559f8 1601 data[j++] = SMC_inl(lp, i);
0a0c72c9
DM
1602 }
1603 for(i=MAC_CR;i<=WUCSR;i++) {
1604 spin_lock_irqsave(&lp->lock, flags);
699559f8 1605 SMC_GET_MAC_CSR(lp, i, reg);
0a0c72c9 1606 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1607 data[j++] = reg;
0a0c72c9
DM
1608 }
1609 for(i=0;i<=31;i++) {
1610 spin_lock_irqsave(&lp->lock, flags);
699559f8 1611 SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
0a0c72c9 1612 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1613 data[j++] = reg & 0xFFFF;
0a0c72c9
DM
1614 }
1615}
1616
1617static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1618{
699559f8 1619 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1620 unsigned int timeout;
1621 int e2p_cmd;
1622
699559f8 1623 e2p_cmd = SMC_GET_E2P_CMD(lp);
0a0c72c9
DM
1624 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1625 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
d5498bef 1626 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
b39d66a8 1627 dev->name, __func__);
0a0c72c9 1628 return -EFAULT;
d5498bef 1629 }
0a0c72c9 1630 mdelay(1);
699559f8 1631 e2p_cmd = SMC_GET_E2P_CMD(lp);
0a0c72c9
DM
1632 }
1633 if (timeout == 0) {
d5498bef 1634 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
b39d66a8 1635 dev->name, __func__);
0a0c72c9
DM
1636 return -ETIMEDOUT;
1637 }
1638 return 0;
1639}
1640
d5498bef 1641static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
0a0c72c9
DM
1642 int cmd, int addr)
1643{
699559f8 1644 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1645 int ret;
1646
d5498bef 1647 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1648 return ret;
699559f8 1649 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
d5498bef 1650 ((cmd) & (0x7<<28)) |
0a0c72c9
DM
1651 ((addr) & 0xFF));
1652 return 0;
1653}
1654
d5498bef 1655static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
0a0c72c9
DM
1656 u8 *data)
1657{
699559f8 1658 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1659 int ret;
1660
d5498bef 1661 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1662 return ret;
699559f8 1663 *data = SMC_GET_E2P_DATA(lp);
0a0c72c9
DM
1664 return 0;
1665}
1666
d5498bef 1667static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
0a0c72c9
DM
1668 u8 data)
1669{
699559f8 1670 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1671 int ret;
1672
d5498bef 1673 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1674 return ret;
699559f8 1675 SMC_SET_E2P_DATA(lp, data);
0a0c72c9
DM
1676 return 0;
1677}
1678
d5498bef 1679static int smc911x_ethtool_geteeprom(struct net_device *dev,
0a0c72c9
DM
1680 struct ethtool_eeprom *eeprom, u8 *data)
1681{
1682 u8 eebuf[SMC911X_EEPROM_LEN];
1683 int i, ret;
1684
1685 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1686 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1687 return ret;
1688 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1689 return ret;
1690 }
1691 memcpy(data, eebuf+eeprom->offset, eeprom->len);
d5498bef 1692 return 0;
0a0c72c9
DM
1693}
1694
d5498bef 1695static int smc911x_ethtool_seteeprom(struct net_device *dev,
0a0c72c9
DM
1696 struct ethtool_eeprom *eeprom, u8 *data)
1697{
1698 int i, ret;
1699
1700 /* Enable erase */
1701 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1702 return ret;
1703 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1704 /* erase byte */
1705 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1706 return ret;
1707 /* write byte */
1708 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1709 return ret;
1710 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1711 return ret;
1712 }
1713 return 0;
1714}
1715
1716static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1717{
1718 return SMC911X_EEPROM_LEN;
1719}
1720
7282d491 1721static const struct ethtool_ops smc911x_ethtool_ops = {
0a0c72c9
DM
1722 .get_settings = smc911x_ethtool_getsettings,
1723 .set_settings = smc911x_ethtool_setsettings,
1724 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1725 .get_msglevel = smc911x_ethtool_getmsglevel,
1726 .set_msglevel = smc911x_ethtool_setmsglevel,
1727 .nway_reset = smc911x_ethtool_nwayreset,
1728 .get_link = ethtool_op_get_link,
1729 .get_regs_len = smc911x_ethtool_getregslen,
1730 .get_regs = smc911x_ethtool_getregs,
1731 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1732 .get_eeprom = smc911x_ethtool_geteeprom,
1733 .set_eeprom = smc911x_ethtool_seteeprom,
1734};
1735
1736/*
1737 * smc911x_findirq
1738 *
1739 * This routine has a simple purpose -- make the SMC chip generate an
1740 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1741 */
699559f8 1742static int __init smc911x_findirq(struct net_device *dev)
0a0c72c9 1743{
699559f8 1744 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1745 int timeout = 20;
1746 unsigned long cookie;
1747
b39d66a8 1748 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
0a0c72c9
DM
1749
1750 cookie = probe_irq_on();
1751
1752 /*
1753 * Force a SW interrupt
1754 */
1755
699559f8 1756 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
0a0c72c9
DM
1757
1758 /*
1759 * Wait until positive that the interrupt has been generated
1760 */
1761 do {
1762 int int_status;
1763 udelay(10);
699559f8 1764 int_status = SMC_GET_INT_EN(lp);
0a0c72c9
DM
1765 if (int_status & INT_EN_SW_INT_EN_)
1766 break; /* got the interrupt */
1767 } while (--timeout);
1768
1769 /*
1770 * there is really nothing that I can do here if timeout fails,
1771 * as autoirq_report will return a 0 anyway, which is what I
1772 * want in this case. Plus, the clean up is needed in both
1773 * cases.
1774 */
1775
1776 /* and disable all interrupts again */
699559f8 1777 SMC_SET_INT_EN(lp, 0);
0a0c72c9
DM
1778
1779 /* and return what I found */
1780 return probe_irq_off(cookie);
1781}
1782
1783/*
1784 * Function: smc911x_probe(unsigned long ioaddr)
1785 *
1786 * Purpose:
1787 * Tests to see if a given ioaddr points to an SMC911x chip.
1788 * Returns a 0 on success
1789 *
1790 * Algorithm:
1791 * (1) see if the endian word is OK
1792 * (1) see if I recognize the chip ID in the appropriate register
1793 *
1794 * Here I do typical initialization tasks.
1795 *
1796 * o Initialize the structure if needed
1797 * o print out my vanity message if not done so already
1798 * o print out what type of hardware is detected
1799 * o print out the ethernet address
1800 * o find the IRQ
1801 * o set up my private data
1802 * o configure the dev structure with my subroutines
1803 * o actually GRAB the irq.
1804 * o GRAB the region
1805 */
699559f8 1806static int __init smc911x_probe(struct net_device *dev)
0a0c72c9
DM
1807{
1808 struct smc911x_local *lp = netdev_priv(dev);
1809 int i, retval;
1810 unsigned int val, chip_id, revision;
1811 const char *version_string;
12c03f59 1812 unsigned long irq_flags;
0a0c72c9 1813
b39d66a8 1814 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
0a0c72c9
DM
1815
1816 /* First, see if the endian word is recognized */
699559f8 1817 val = SMC_GET_BYTE_TEST(lp);
0a0c72c9
DM
1818 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1819 if (val != 0x87654321) {
1820 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
1821 retval = -ENODEV;
1822 goto err_out;
1823 }
1824
1825 /*
1826 * check if the revision register is something that I
1827 * recognize. These might need to be added to later,
1828 * as future revisions could be added.
1829 */
699559f8 1830 chip_id = SMC_GET_PN(lp);
0a0c72c9
DM
1831 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1832 for(i=0;chip_ids[i].id != 0; i++) {
1833 if (chip_ids[i].id == chip_id) break;
1834 }
1835 if (!chip_ids[i].id) {
1836 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1837 retval = -ENODEV;
1838 goto err_out;
1839 }
1840 version_string = chip_ids[i].name;
1841
699559f8 1842 revision = SMC_GET_REV(lp);
0a0c72c9
DM
1843 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1844
1845 /* At this point I'll assume that the chip is an SMC911x. */
1846 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1847
1848 /* Validate the TX FIFO size requested */
1849 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1850 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1851 retval = -EINVAL;
1852 goto err_out;
1853 }
d5498bef 1854
0a0c72c9 1855 /* fill in some of the fields */
0a0c72c9
DM
1856 lp->version = chip_ids[i].id;
1857 lp->revision = revision;
1858 lp->tx_fifo_kb = tx_fifo_kb;
1859 /* Reverse calculate the RX FIFO size from the TX */
1860 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1861 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1862
1863 /* Set the automatic flow control values */
1864 switch(lp->tx_fifo_kb) {
d5498bef 1865 /*
0a0c72c9
DM
1866 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1867 * AFC_LO is AFC_HI/2
1868 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1869 */
1870 case 2:/* 13440 Rx Data Fifo Size */
1871 lp->afc_cfg=0x008C46AF;break;
1872 case 3:/* 12480 Rx Data Fifo Size */
1873 lp->afc_cfg=0x0082419F;break;
1874 case 4:/* 11520 Rx Data Fifo Size */
1875 lp->afc_cfg=0x00783C9F;break;
1876 case 5:/* 10560 Rx Data Fifo Size */
1877 lp->afc_cfg=0x006E374F;break;
1878 case 6:/* 9600 Rx Data Fifo Size */
1879 lp->afc_cfg=0x0064328F;break;
1880 case 7:/* 8640 Rx Data Fifo Size */
1881 lp->afc_cfg=0x005A2D7F;break;
1882 case 8:/* 7680 Rx Data Fifo Size */
1883 lp->afc_cfg=0x0050287F;break;
1884 case 9:/* 6720 Rx Data Fifo Size */
1885 lp->afc_cfg=0x0046236F;break;
1886 case 10:/* 5760 Rx Data Fifo Size */
1887 lp->afc_cfg=0x003C1E6F;break;
1888 case 11:/* 4800 Rx Data Fifo Size */
1889 lp->afc_cfg=0x0032195F;break;
d5498bef 1890 /*
0a0c72c9
DM
1891 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1892 * AFC_LO is AFC_HI/2
1893 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1894 */
1895 case 12:/* 3840 Rx Data Fifo Size */
1896 lp->afc_cfg=0x0024124F;break;
1897 case 13:/* 2880 Rx Data Fifo Size */
1898 lp->afc_cfg=0x0015073F;break;
1899 case 14:/* 1920 Rx Data Fifo Size */
1900 lp->afc_cfg=0x0006032F;break;
1901 default:
d5498bef 1902 PRINTK("%s: ERROR -- no AFC_CFG setting found",
0a0c72c9
DM
1903 dev->name);
1904 break;
1905 }
1906
d5498bef
JG
1907 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
1908 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
0a0c72c9
DM
1909 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1910
1911 spin_lock_init(&lp->lock);
1912
1913 /* Get the MAC address */
699559f8 1914 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
0a0c72c9
DM
1915
1916 /* now, reset the chip, and put it into a known state */
1917 smc911x_reset(dev);
1918
1919 /*
1920 * If dev->irq is 0, then the device has to be banged on to see
1921 * what the IRQ is.
1922 *
1923 * Specifying an IRQ is done with the assumption that the user knows
1924 * what (s)he is doing. No checking is done!!!!
1925 */
1926 if (dev->irq < 1) {
1927 int trials;
1928
1929 trials = 3;
1930 while (trials--) {
699559f8 1931 dev->irq = smc911x_findirq(dev);
0a0c72c9
DM
1932 if (dev->irq)
1933 break;
1934 /* kick the card and try again */
1935 smc911x_reset(dev);
1936 }
1937 }
1938 if (dev->irq == 0) {
1939 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1940 dev->name);
1941 retval = -ENODEV;
1942 goto err_out;
1943 }
1944 dev->irq = irq_canonicalize(dev->irq);
1945
1946 /* Fill in the fields of the device structure with ethernet values. */
1947 ether_setup(dev);
1948
1949 dev->open = smc911x_open;
1950 dev->stop = smc911x_close;
1951 dev->hard_start_xmit = smc911x_hard_start_xmit;
1952 dev->tx_timeout = smc911x_timeout;
1953 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
0a0c72c9
DM
1954 dev->set_multicast_list = smc911x_set_multicast_list;
1955 dev->ethtool_ops = &smc911x_ethtool_ops;
1956#ifdef CONFIG_NET_POLL_CONTROLLER
1957 dev->poll_controller = smc911x_poll_controller;
1958#endif
1959
ef8142a5 1960 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
0a0c72c9
DM
1961 lp->mii.phy_id_mask = 0x1f;
1962 lp->mii.reg_num_mask = 0x1f;
1963 lp->mii.force_media = 0;
1964 lp->mii.full_duplex = 0;
1965 lp->mii.dev = dev;
1966 lp->mii.mdio_read = smc911x_phy_read;
1967 lp->mii.mdio_write = smc911x_phy_write;
1968
1969 /*
1970 * Locate the phy, if any.
1971 */
1972 smc911x_phy_detect(dev);
1973
1974 /* Set default parameters */
1975 lp->msg_enable = NETIF_MSG_LINK;
1976 lp->ctl_rfduplx = 1;
1977 lp->ctl_rspeed = 100;
1978
12c03f59
MD
1979#ifdef SMC_DYNAMIC_BUS_CONFIG
1980 irq_flags = lp->cfg.irq_flags;
1981#else
1982 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1983#endif
1984
0a0c72c9 1985 /* Grab the IRQ */
f2773a29 1986 retval = request_irq(dev->irq, &smc911x_interrupt,
12c03f59 1987 irq_flags, dev->name, dev);
0a0c72c9
DM
1988 if (retval)
1989 goto err_out;
1990
0a0c72c9
DM
1991#ifdef SMC_USE_DMA
1992 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
1993 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
1994 lp->rxdma_active = 0;
1995 lp->txdma_active = 0;
1996 dev->dma = lp->rxdma;
1997#endif
1998
1999 retval = register_netdev(dev);
2000 if (retval == 0) {
2001 /* now, print out the card info, in a short format.. */
2002 printk("%s: %s (rev %d) at %#lx IRQ %d",
2003 dev->name, version_string, lp->revision,
2004 dev->base_addr, dev->irq);
2005
2006#ifdef SMC_USE_DMA
2007 if (lp->rxdma != -1)
2008 printk(" RXDMA %d ", lp->rxdma);
2009
2010 if (lp->txdma != -1)
2011 printk("TXDMA %d", lp->txdma);
2012#endif
2013 printk("\n");
2014 if (!is_valid_ether_addr(dev->dev_addr)) {
2015 printk("%s: Invalid ethernet MAC address. Please "
2016 "set using ifconfig\n", dev->name);
2017 } else {
2018 /* Print the Ethernet address */
2019 printk("%s: Ethernet addr: ", dev->name);
2020 for (i = 0; i < 5; i++)
2021 printk("%2.2x:", dev->dev_addr[i]);
2022 printk("%2.2x\n", dev->dev_addr[5]);
2023 }
2024
2025 if (lp->phy_type == 0) {
2026 PRINTK("%s: No PHY found\n", dev->name);
2027 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2028 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2029 } else {
2030 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2031 }
2032 }
d5498bef 2033
0a0c72c9
DM
2034err_out:
2035#ifdef SMC_USE_DMA
2036 if (retval) {
2037 if (lp->rxdma != -1) {
2038 SMC_DMA_FREE(dev, lp->rxdma);
2039 }
2040 if (lp->txdma != -1) {
2041 SMC_DMA_FREE(dev, lp->txdma);
2042 }
2043 }
2044#endif
2045 return retval;
2046}
2047
2048/*
2049 * smc911x_init(void)
2050 *
2051 * Output:
2052 * 0 --> there is a device
2053 * anything else, error
2054 */
2055static int smc911x_drv_probe(struct platform_device *pdev)
2056{
12c03f59 2057 struct smc91x_platdata *pd = pdev->dev.platform_data;
0a0c72c9
DM
2058 struct net_device *ndev;
2059 struct resource *res;
ef8142a5 2060 struct smc911x_local *lp;
0a0c72c9
DM
2061 unsigned int *addr;
2062 int ret;
2063
b39d66a8 2064 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
0a0c72c9
DM
2065 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2066 if (!res) {
2067 ret = -ENODEV;
2068 goto out;
2069 }
2070
2071 /*
2072 * Request the regions.
2073 */
2074 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2075 ret = -EBUSY;
2076 goto out;
2077 }
2078
2079 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2080 if (!ndev) {
2081 printk("%s: could not allocate device.\n", CARDNAME);
2082 ret = -ENOMEM;
2083 goto release_1;
2084 }
0a0c72c9
DM
2085 SET_NETDEV_DEV(ndev, &pdev->dev);
2086
2087 ndev->dma = (unsigned char)-1;
2088 ndev->irq = platform_get_irq(pdev, 0);
ef8142a5
AM
2089 lp = netdev_priv(ndev);
2090 lp->netdev = ndev;
12c03f59
MD
2091#ifdef SMC_DYNAMIC_BUS_CONFIG
2092 if (!pd) {
2093 ret = -EINVAL;
2094 goto release_both;
2095 }
2096 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2097#endif
0a0c72c9
DM
2098
2099 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2100 if (!addr) {
2101 ret = -ENOMEM;
2102 goto release_both;
2103 }
2104
2105 platform_set_drvdata(pdev, ndev);
699559f8
MD
2106 lp->base = addr;
2107 ndev->base_addr = res->start;
2108 ret = smc911x_probe(ndev);
0a0c72c9
DM
2109 if (ret != 0) {
2110 platform_set_drvdata(pdev, NULL);
2111 iounmap(addr);
2112release_both:
2113 free_netdev(ndev);
2114release_1:
2115 release_mem_region(res->start, SMC911X_IO_EXTENT);
2116out:
2117 printk("%s: not found (%d).\n", CARDNAME, ret);
2118 }
2119#ifdef SMC_USE_DMA
2120 else {
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2121 lp->physaddr = res->start;
2122 lp->dev = &pdev->dev;
2123 }
2124#endif
2125
2126 return ret;
2127}
2128
2129static int smc911x_drv_remove(struct platform_device *pdev)
2130{
2131 struct net_device *ndev = platform_get_drvdata(pdev);
699559f8 2132 struct smc911x_local *lp = netdev_priv(ndev);
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2133 struct resource *res;
2134
b39d66a8 2135 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
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2136 platform_set_drvdata(pdev, NULL);
2137
2138 unregister_netdev(ndev);
2139
2140 free_irq(ndev->irq, ndev);
2141
2142#ifdef SMC_USE_DMA
2143 {
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2144 if (lp->rxdma != -1) {
2145 SMC_DMA_FREE(dev, lp->rxdma);
2146 }
2147 if (lp->txdma != -1) {
2148 SMC_DMA_FREE(dev, lp->txdma);
2149 }
2150 }
2151#endif
699559f8 2152 iounmap(lp->base);
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2153 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2154 release_mem_region(res->start, SMC911X_IO_EXTENT);
2155
2156 free_netdev(ndev);
2157 return 0;
2158}
2159
2160static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2161{
2162 struct net_device *ndev = platform_get_drvdata(dev);
699559f8 2163 struct smc911x_local *lp = netdev_priv(ndev);
0a0c72c9 2164
b39d66a8 2165 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
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2166 if (ndev) {
2167 if (netif_running(ndev)) {
2168 netif_device_detach(ndev);
2169 smc911x_shutdown(ndev);
2170#if POWER_DOWN
2171 /* Set D2 - Energy detect only setting */
699559f8 2172 SMC_SET_PMT_CTRL(lp, 2<<12);
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2173#endif
2174 }
2175 }
2176 return 0;
2177}
2178
2179static int smc911x_drv_resume(struct platform_device *dev)
2180{
2181 struct net_device *ndev = platform_get_drvdata(dev);
2182
b39d66a8 2183 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
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2184 if (ndev) {
2185 struct smc911x_local *lp = netdev_priv(ndev);
2186
2187 if (netif_running(ndev)) {
2188 smc911x_reset(ndev);
2189 smc911x_enable(ndev);
2190 if (lp->phy_type != 0)
ef8142a5 2191 smc911x_phy_configure(&lp->phy_configure);
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2192 netif_device_attach(ndev);
2193 }
2194 }
2195 return 0;
2196}
2197
2198static struct platform_driver smc911x_driver = {
2199 .probe = smc911x_drv_probe,
2200 .remove = smc911x_drv_remove,
2201 .suspend = smc911x_drv_suspend,
2202 .resume = smc911x_drv_resume,
2203 .driver = {
2204 .name = CARDNAME,
72abb461 2205 .owner = THIS_MODULE,
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2206 },
2207};
d5498bef 2208
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2209static int __init smc911x_init(void)
2210{
2211 return platform_driver_register(&smc911x_driver);
2212}
2213
2214static void __exit smc911x_cleanup(void)
2215{
2216 platform_driver_unregister(&smc911x_driver);
2217}
2218
2219module_init(smc911x_init);
2220module_exit(smc911x_cleanup);
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