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[PATCH] smc911 workqueue fixes
[deliverable/linux.git] / drivers / net / smc911x.c
CommitLineData
0a0c72c9
DM		 1/*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4 *
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
d5498bef 7 * and the smsc911x.c reference driver by SMSC
0a0c72c9
DM		 8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Arguments:
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
26 *
27 * History:
28 * 04/16/05 Dustin McIntire Initial version
29 */
30static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32
33/* Debugging options */
34#define ENABLE_SMC_DEBUG_RX 0
35#define ENABLE_SMC_DEBUG_TX 0
36#define ENABLE_SMC_DEBUG_DMA 0
37#define ENABLE_SMC_DEBUG_PKTS 0
38#define ENABLE_SMC_DEBUG_MISC 0
39#define ENABLE_SMC_DEBUG_FUNC 0
40
41#define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42#define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43#define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44#define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45#define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46#define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
47
48#ifndef SMC_DEBUG
49#define SMC_DEBUG ( SMC_DEBUG_RX | \
50 SMC_DEBUG_TX | \
51 SMC_DEBUG_DMA | \
52 SMC_DEBUG_PKTS | \
53 SMC_DEBUG_MISC | \
54 SMC_DEBUG_FUNC \
55 )
56#endif
57
0a0c72c9
DM		 58#include <linux/init.h>
59#include <linux/module.h>
60#include <linux/kernel.h>
61#include <linux/sched.h>
62#include <linux/slab.h>
63#include <linux/delay.h>
64#include <linux/interrupt.h>
65#include <linux/errno.h>
66#include <linux/ioport.h>
67#include <linux/crc32.h>
68#include <linux/device.h>
69#include <linux/platform_device.h>
70#include <linux/spinlock.h>
71#include <linux/ethtool.h>
72#include <linux/mii.h>
73#include <linux/workqueue.h>
74
75#include <linux/netdevice.h>
76#include <linux/etherdevice.h>
77#include <linux/skbuff.h>
78
79#include <asm/io.h>
80#include <asm/irq.h>
81
82#include "smc911x.h"
83
84/*
85 * Transmit timeout, default 5 seconds.
86 */
87static int watchdog = 5000;
88module_param(watchdog, int, 0400);
89MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
90
91static int tx_fifo_kb=8;
92module_param(tx_fifo_kb, int, 0400);
93MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
94
95MODULE_LICENSE("GPL");
96
97/*
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
101 */
102#define CARDNAME "smc911x"
103
104/*
105 * Use power-down feature of the chip
106 */
107#define POWER_DOWN 1
108
109
110/* store this information for the driver.. */
111struct smc911x_local {
112 /*
113 * If I have to wait until the DMA is finished and ready to reload a
d5498bef 114 * packet, I will store the skbuff here. Then, the DMA will send it
0a0c72c9
DM		 115 * out and free it.
116 */
117 struct sk_buff *pending_tx_skb;
118
119 /*
120 * these are things that the kernel wants me to keep, so users
121 * can find out semi-useless statistics of how well the card is
122 * performing
123 */
124 struct net_device_stats stats;
125
126 /* version/revision of the SMC911x chip */
127 u16 version;
128 u16 revision;
129
130 /* FIFO sizes */
131 int tx_fifo_kb;
132 int tx_fifo_size;
133 int rx_fifo_size;
134 int afc_cfg;
135
136 /* Contains the current active receive/phy mode */
137 int ctl_rfduplx;
138 int ctl_rspeed;
139
140 u32 msg_enable;
141 u32 phy_type;
142 struct mii_if_info mii;
143
144 /* work queue */
145 struct work_struct phy_configure;
146 int work_pending;
147
148 int tx_throttle;
149 spinlock_t lock;
150
ef8142a5
AM		 151 struct net_device *netdev;
152
0a0c72c9
DM		 153#ifdef SMC_USE_DMA
154 /* DMA needs the physical address of the chip */
155 u_long physaddr;
156 int rxdma;
157 int txdma;
158 int rxdma_active;
159 int txdma_active;
160 struct sk_buff *current_rx_skb;
161 struct sk_buff *current_tx_skb;
162 struct device *dev;
163#endif
164};
165
166#if SMC_DEBUG > 0
167#define DBG(n, args...) \
168 do { \
169 if (SMC_DEBUG & (n)) \
170 printk(args); \
171 } while (0)
172
173#define PRINTK(args...) printk(args)
174#else
175#define DBG(n, args...) do { } while (0)
176#define PRINTK(args...) printk(KERN_DEBUG args)
177#endif
178
179#if SMC_DEBUG_PKTS > 0
180static void PRINT_PKT(u_char *buf, int length)
181{
182 int i;
183 int remainder;
184 int lines;
185
186 lines = length / 16;
187 remainder = length % 16;
188
189 for (i = 0; i < lines ; i ++) {
190 int cur;
191 for (cur = 0; cur < 8; cur++) {
192 u_char a, b;
193 a = *buf++;
194 b = *buf++;
195 printk("%02x%02x ", a, b);
196 }
197 printk("\n");
198 }
199 for (i = 0; i < remainder/2 ; i++) {
200 u_char a, b;
201 a = *buf++;
202 b = *buf++;
203 printk("%02x%02x ", a, b);
204 }
205 printk("\n");
206}
207#else
208#define PRINT_PKT(x...) do { } while (0)
209#endif
210
211
212/* this enables an interrupt in the interrupt mask register */
213#define SMC_ENABLE_INT(x) do { \
214 unsigned int __mask; \
215 unsigned long __flags; \
216 spin_lock_irqsave(&lp->lock, __flags); \
217 __mask = SMC_GET_INT_EN(); \
218 __mask |= (x); \
219 SMC_SET_INT_EN(__mask); \
220 spin_unlock_irqrestore(&lp->lock, __flags); \
221} while (0)
222
223/* this disables an interrupt from the interrupt mask register */
224#define SMC_DISABLE_INT(x) do { \
225 unsigned int __mask; \
226 unsigned long __flags; \
227 spin_lock_irqsave(&lp->lock, __flags); \
228 __mask = SMC_GET_INT_EN(); \
229 __mask &= ~(x); \
230 SMC_SET_INT_EN(__mask); \
231 spin_unlock_irqrestore(&lp->lock, __flags); \
232} while (0)
233
234/*
235 * this does a soft reset on the device
236 */
237static void smc911x_reset(struct net_device *dev)
238{
239 unsigned long ioaddr = dev->base_addr;
240 struct smc911x_local *lp = netdev_priv(dev);
241 unsigned int reg, timeout=0, resets=1;
242 unsigned long flags;
243
244 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
245
246 /* Take out of PM setting first */
247 if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) {
248 /* Write to the bytetest will take out of powerdown */
d5498bef 249 SMC_SET_BYTE_TEST(0);
0a0c72c9
DM		 250 timeout=10;
251 do {
252 udelay(10);
253 reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_;
254 } while ( timeout-- && !reg);
255 if (timeout == 0) {
256 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
257 return;
258 }
259 }
260
261 /* Disable all interrupts */
262 spin_lock_irqsave(&lp->lock, flags);
263 SMC_SET_INT_EN(0);
264 spin_unlock_irqrestore(&lp->lock, flags);
265
266 while (resets--) {
267 SMC_SET_HW_CFG(HW_CFG_SRST_);
268 timeout=10;
269 do {
270 udelay(10);
271 reg = SMC_GET_HW_CFG();
272 /* If chip indicates reset timeout then try again */
273 if (reg & HW_CFG_SRST_TO_) {
274 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
275 resets++;
276 break;
277 }
278 } while ( timeout-- && (reg & HW_CFG_SRST_));
279 }
280 if (timeout == 0) {
281 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
282 return;
283 }
284
285 /* make sure EEPROM has finished loading before setting GPIO_CFG */
286 timeout=1000;
287 while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) {
288 udelay(10);
289 }
290 if (timeout == 0){
291 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
292 return;
293 }
294
295 /* Initialize interrupts */
296 SMC_SET_INT_EN(0);
297 SMC_ACK_INT(-1);
298
299 /* Reset the FIFO level and flow control settings */
300 SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16);
301//TODO: Figure out what appropriate pause time is
302 SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_);
303 SMC_SET_AFC_CFG(lp->afc_cfg);
304
305
306 /* Set to LED outputs */
307 SMC_SET_GPIO_CFG(0x70070000);
308
d5498bef 309 /*
0a0c72c9 310 * Deassert IRQ for 1*10us for edge type interrupts
d5498bef 311 * and drive IRQ pin push-pull
0a0c72c9
DM		 312 */
313 SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ );
314
315 /* clear anything saved */
316 if (lp->pending_tx_skb != NULL) {
317 dev_kfree_skb (lp->pending_tx_skb);
318 lp->pending_tx_skb = NULL;
319 lp->stats.tx_errors++;
320 lp->stats.tx_aborted_errors++;
321 }
322}
323
324/*
325 * Enable Interrupts, Receive, and Transmit
326 */
327static void smc911x_enable(struct net_device *dev)
328{
329 unsigned long ioaddr = dev->base_addr;
330 struct smc911x_local *lp = netdev_priv(dev);
331 unsigned mask, cfg, cr;
332 unsigned long flags;
333
334 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
335
336 SMC_SET_MAC_ADDR(dev->dev_addr);
337
338 /* Enable TX */
339 cfg = SMC_GET_HW_CFG();
340 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
341 cfg |= HW_CFG_SF_;
342 SMC_SET_HW_CFG(cfg);
343 SMC_SET_FIFO_TDA(0xFF);
344 /* Update TX stats on every 64 packets received or every 1 sec */
345 SMC_SET_FIFO_TSL(64);
346 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
347
348 spin_lock_irqsave(&lp->lock, flags);
349 SMC_GET_MAC_CR(cr);
350 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
351 SMC_SET_MAC_CR(cr);
352 SMC_SET_TX_CFG(TX_CFG_TX_ON_);
353 spin_unlock_irqrestore(&lp->lock, flags);
354
355 /* Add 2 byte padding to start of packets */
356 SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_);
357
358 /* Turn on receiver and enable RX */
359 if (cr & MAC_CR_RXEN_)
360 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
361
362 spin_lock_irqsave(&lp->lock, flags);
363 SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ );
364 spin_unlock_irqrestore(&lp->lock, flags);
365
366 /* Interrupt on every received packet */
367 SMC_SET_FIFO_RSA(0x01);
368 SMC_SET_FIFO_RSL(0x00);
369
370 /* now, enable interrupts */
d5498bef
JG		 371 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
372 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
0a0c72c9
DM		 373 INT_EN_PHY_INT_EN_;
374 if (IS_REV_A(lp->revision))
375 mask|=INT_EN_RDFL_EN_;
376 else {
377 mask|=INT_EN_RDFO_EN_;
378 }
379 SMC_ENABLE_INT(mask);
380}
381
382/*
383 * this puts the device in an inactive state
384 */
385static void smc911x_shutdown(struct net_device *dev)
386{
387 unsigned long ioaddr = dev->base_addr;
388 struct smc911x_local *lp = netdev_priv(dev);
389 unsigned cr;
390 unsigned long flags;
391
392 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
393
394 /* Disable IRQ's */
395 SMC_SET_INT_EN(0);
396
397 /* Turn of Rx and TX */
398 spin_lock_irqsave(&lp->lock, flags);
399 SMC_GET_MAC_CR(cr);
400 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
401 SMC_SET_MAC_CR(cr);
402 SMC_SET_TX_CFG(TX_CFG_STOP_TX_);
403 spin_unlock_irqrestore(&lp->lock, flags);
404}
405
406static inline void smc911x_drop_pkt(struct net_device *dev)
d5498bef 407{
0a0c72c9
DM		 408 unsigned long ioaddr = dev->base_addr;
409 unsigned int fifo_count, timeout, reg;
410
411 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
d5498bef 412 fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF;
0a0c72c9
DM		 413 if (fifo_count <= 4) {
414 /* Manually dump the packet data */
415 while (fifo_count--)
416 SMC_GET_RX_FIFO();
417 } else {
418 /* Fast forward through the bad packet */
419 SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_);
420 timeout=50;
421 do {
422 udelay(10);
423 reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_;
424 } while ( timeout-- && reg);
425 if (timeout == 0) {
426 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
427 }
428 }
429}
430
431/*
432 * This is the procedure to handle the receipt of a packet.
433 * It should be called after checking for packet presence in
d5498bef 434 * the RX status FIFO. It must be called with the spin lock
0a0c72c9
DM		 435 * already held.
436 */
437static inline void smc911x_rcv(struct net_device *dev)
438{
439 struct smc911x_local *lp = netdev_priv(dev);
440 unsigned long ioaddr = dev->base_addr;
441 unsigned int pkt_len, status;
442 struct sk_buff *skb;
443 unsigned char *data;
444
d5498bef 445 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
0a0c72c9
DM		 446 dev->name, __FUNCTION__);
447 status = SMC_GET_RX_STS_FIFO();
d5498bef 448 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
0a0c72c9
DM		 449 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
450 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
d5498bef 451 if (status & RX_STS_ES_) {
0a0c72c9
DM		 452 /* Deal with a bad packet */
453 lp->stats.rx_errors++;
d5498bef 454 if (status & RX_STS_CRC_ERR_)
0a0c72c9
DM		 455 lp->stats.rx_crc_errors++;
456 else {
457 if (status & RX_STS_LEN_ERR_)
458 lp->stats.rx_length_errors++;
d5498bef 459 if (status & RX_STS_MCAST_)
0a0c72c9
DM		 460 lp->stats.multicast++;
461 }
462 /* Remove the bad packet data from the RX FIFO */
463 smc911x_drop_pkt(dev);
464 } else {
465 /* Receive a valid packet */
466 /* Alloc a buffer with extra room for DMA alignment */
467 skb=dev_alloc_skb(pkt_len+32);
468 if (unlikely(skb == NULL)) {
469 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
470 dev->name);
471 lp->stats.rx_dropped++;
472 smc911x_drop_pkt(dev);
473 return;
474 }
d5498bef 475 /* Align IP header to 32 bits
0a0c72c9 476 * Note that the device is configured to add a 2
d5498bef 477 * byte padding to the packet start, so we really
0a0c72c9
DM		 478 * want to write to the orignal data pointer */
479 data = skb->data;
480 skb_reserve(skb, 2);
481 skb_put(skb,pkt_len-4);
482#ifdef SMC_USE_DMA
483 {
484 unsigned int fifo;
485 /* Lower the FIFO threshold if possible */
486 fifo = SMC_GET_FIFO_INT();
487 if (fifo & 0xFF) fifo--;
488 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
489 dev->name, fifo & 0xff);
490 SMC_SET_FIFO_INT(fifo);
491 /* Setup RX DMA */
492 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
493 lp->rxdma_active = 1;
494 lp->current_rx_skb = skb;
495 SMC_PULL_DATA(data, (pkt_len+2+15) & ~15);
496 /* Packet processing deferred to DMA RX interrupt */
497 }
498#else
499 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
500 SMC_PULL_DATA(data, pkt_len+2+3);
501
502 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name,);
503 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
504 dev->last_rx = jiffies;
505 skb->dev = dev;
506 skb->protocol = eth_type_trans(skb, dev);
507 netif_rx(skb);
508 lp->stats.rx_packets++;
509 lp->stats.rx_bytes += pkt_len-4;
510#endif
511 }
512}
513
514/*
515 * This is called to actually send a packet to the chip.
516 */
517static void smc911x_hardware_send_pkt(struct net_device *dev)
518{
519 struct smc911x_local *lp = netdev_priv(dev);
520 unsigned long ioaddr = dev->base_addr;
521 struct sk_buff *skb;
522 unsigned int cmdA, cmdB, len;
523 unsigned char *buf;
524 unsigned long flags;
525
526 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
527 BUG_ON(lp->pending_tx_skb == NULL);
528
529 skb = lp->pending_tx_skb;
530 lp->pending_tx_skb = NULL;
531
d5498bef
JG		 532 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
533 /* cmdB {31:16] pkt tag [10:0] length */
0a0c72c9
DM		 534#ifdef SMC_USE_DMA
535 /* 16 byte buffer alignment mode */
536 buf = (char*)((u32)(skb->data) & ~0xF);
d5498bef 537 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
0a0c72c9
DM		 538 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
539 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
540 skb->len;
541#else
542 buf = (char*)((u32)skb->data & ~0x3);
d5498bef 543 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
0a0c72c9
DM		 544 cmdA = (((u32)skb->data & 0x3) << 16) |
545 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
546 skb->len;
547#endif
d5498bef 548 /* tag is packet length so we can use this in stats update later */
0a0c72c9 549 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
d5498bef 550
0a0c72c9
DM		 551 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
552 dev->name, len, len, buf, cmdA, cmdB);
553 SMC_SET_TX_FIFO(cmdA);
554 SMC_SET_TX_FIFO(cmdB);
555
556 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
557 PRINT_PKT(buf, len <= 64 ? len : 64);
558
559 /* Send pkt via PIO or DMA */
560#ifdef SMC_USE_DMA
561 lp->current_tx_skb = skb;
562 SMC_PUSH_DATA(buf, len);
563 /* DMA complete IRQ will free buffer and set jiffies */
564#else
565 SMC_PUSH_DATA(buf, len);
566 dev->trans_start = jiffies;
567 dev_kfree_skb(skb);
568#endif
569 spin_lock_irqsave(&lp->lock, flags);
570 if (!lp->tx_throttle) {
571 netif_wake_queue(dev);
572 }
573 spin_unlock_irqrestore(&lp->lock, flags);
574 SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
575}
576
577/*
578 * Since I am not sure if I will have enough room in the chip's ram
579 * to store the packet, I call this routine which either sends it
580 * now, or set the card to generates an interrupt when ready
581 * for the packet.
582 */
583static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
584{
585 struct smc911x_local *lp = netdev_priv(dev);
586 unsigned long ioaddr = dev->base_addr;
587 unsigned int free;
588 unsigned long flags;
589
d5498bef 590 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
0a0c72c9
DM		 591 dev->name, __FUNCTION__);
592
593 BUG_ON(lp->pending_tx_skb != NULL);
594
595 free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_;
596 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
597
598 /* Turn off the flow when running out of space in FIFO */
599 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
d5498bef 600 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
0a0c72c9
DM		 601 dev->name, free);
602 spin_lock_irqsave(&lp->lock, flags);
603 /* Reenable when at least 1 packet of size MTU present */
604 SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
605 lp->tx_throttle = 1;
606 netif_stop_queue(dev);
607 spin_unlock_irqrestore(&lp->lock, flags);
608 }
609
d5498bef 610 /* Drop packets when we run out of space in TX FIFO
0a0c72c9 611 * Account for overhead required for:
d5498bef
JG		 612 *
613 * Tx command words 8 bytes
0a0c72c9
DM		 614 * Start offset 15 bytes
615 * End padding 15 bytes
d5498bef 616 */
0a0c72c9 617 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
d5498bef 618 printk("%s: No Tx free space %d < %d\n",
0a0c72c9
DM		 619 dev->name, free, skb->len);
620 lp->pending_tx_skb = NULL;
621 lp->stats.tx_errors++;
622 lp->stats.tx_dropped++;
623 dev_kfree_skb(skb);
624 return 0;
625 }
d5498bef 626
0a0c72c9
DM		 627#ifdef SMC_USE_DMA
628 {
629 /* If the DMA is already running then defer this packet Tx until
d5498bef 630 * the DMA IRQ starts it
0a0c72c9
DM		 631 */
632 spin_lock_irqsave(&lp->lock, flags);
633 if (lp->txdma_active) {
634 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
635 lp->pending_tx_skb = skb;
636 netif_stop_queue(dev);
637 spin_unlock_irqrestore(&lp->lock, flags);
638 return 0;
639 } else {
640 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
641 lp->txdma_active = 1;
642 }
643 spin_unlock_irqrestore(&lp->lock, flags);
644 }
645#endif
646 lp->pending_tx_skb = skb;
647 smc911x_hardware_send_pkt(dev);
648
649 return 0;
650}
651
652/*
653 * This handles a TX status interrupt, which is only called when:
654 * - a TX error occurred, or
655 * - TX of a packet completed.
656 */
657static void smc911x_tx(struct net_device *dev)
658{
659 unsigned long ioaddr = dev->base_addr;
660 struct smc911x_local *lp = netdev_priv(dev);
661 unsigned int tx_status;
662
d5498bef 663 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
0a0c72c9
DM		 664 dev->name, __FUNCTION__);
665
666 /* Collect the TX status */
667 while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
d5498bef
JG		 668 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
669 dev->name,
0a0c72c9
DM		 670 (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16);
671 tx_status = SMC_GET_TX_STS_FIFO();
672 lp->stats.tx_packets++;
673 lp->stats.tx_bytes+=tx_status>>16;
d5498bef
JG		 674 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
675 dev->name, (tx_status & 0xffff0000) >> 16,
0a0c72c9 676 tx_status & 0x0000ffff);
d5498bef 677 /* count Tx errors, but ignore lost carrier errors when in
0a0c72c9 678 * full-duplex mode */
d5498bef 679 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
0a0c72c9
DM		 680 !(tx_status & 0x00000306))) {
681 lp->stats.tx_errors++;
682 }
683 if (tx_status & TX_STS_MANY_COLL_) {
684 lp->stats.collisions+=16;
685 lp->stats.tx_aborted_errors++;
686 } else {
687 lp->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
688 }
689 /* carrier error only has meaning for half-duplex communication */
d5498bef 690 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
0a0c72c9
DM		 691 !lp->ctl_rfduplx) {
692 lp->stats.tx_carrier_errors++;
d5498bef 693 }
0a0c72c9
DM		 694 if (tx_status & TX_STS_LATE_COLL_) {
695 lp->stats.collisions++;
696 lp->stats.tx_aborted_errors++;
697 }
698 }
699}
700
701
702/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
703/*
704 * Reads a register from the MII Management serial interface
705 */
706
707static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
708{
709 unsigned long ioaddr = dev->base_addr;
710 unsigned int phydata;
711
712 SMC_GET_MII(phyreg, phyaddr, phydata);
713
714 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
715 __FUNCTION__, phyaddr, phyreg, phydata);
716 return phydata;
717}
718
719
720/*
721 * Writes a register to the MII Management serial interface
722 */
723static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
724 int phydata)
725{
726 unsigned long ioaddr = dev->base_addr;
727
728 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
729 __FUNCTION__, phyaddr, phyreg, phydata);
730
731 SMC_SET_MII(phyreg, phyaddr, phydata);
732}
733
734/*
735 * Finds and reports the PHY address (115 and 117 have external
736 * PHY interface 118 has internal only
737 */
738static void smc911x_phy_detect(struct net_device *dev)
739{
740 unsigned long ioaddr = dev->base_addr;
741 struct smc911x_local *lp = netdev_priv(dev);
742 int phyaddr;
743 unsigned int cfg, id1, id2;
744
745 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
746
747 lp->phy_type = 0;
748
749 /*
750 * Scan all 32 PHY addresses if necessary, starting at
751 * PHY#1 to PHY#31, and then PHY#0 last.
752 */
753 switch(lp->version) {
754 case 0x115:
755 case 0x117:
d5498bef 756 cfg = SMC_GET_HW_CFG();
0a0c72c9
DM		 757 if (cfg & HW_CFG_EXT_PHY_DET_) {
758 cfg &= ~HW_CFG_PHY_CLK_SEL_;
759 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
760 SMC_SET_HW_CFG(cfg);
761 udelay(10); /* Wait for clocks to stop */
762
763 cfg |= HW_CFG_EXT_PHY_EN_;
764 SMC_SET_HW_CFG(cfg);
765 udelay(10); /* Wait for clocks to stop */
766
767 cfg &= ~HW_CFG_PHY_CLK_SEL_;
768 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
769 SMC_SET_HW_CFG(cfg);
770 udelay(10); /* Wait for clocks to stop */
771
772 cfg |= HW_CFG_SMI_SEL_;
773 SMC_SET_HW_CFG(cfg);
774
775 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
776
777 /* Read the PHY identifiers */
778 SMC_GET_PHY_ID1(phyaddr & 31, id1);
779 SMC_GET_PHY_ID2(phyaddr & 31, id2);
780
781 /* Make sure it is a valid identifier */
d5498bef
JG		 782 if (id1 != 0x0000 && id1 != 0xffff &&
783 id1 != 0x8000 && id2 != 0x0000 &&
0a0c72c9
DM		 784 id2 != 0xffff && id2 != 0x8000) {
785 /* Save the PHY's address */
786 lp->mii.phy_id = phyaddr & 31;
787 lp->phy_type = id1 << 16 | id2;
788 break;
789 }
790 }
791 }
792 default:
793 /* Internal media only */
794 SMC_GET_PHY_ID1(1, id1);
795 SMC_GET_PHY_ID2(1, id2);
796 /* Save the PHY's address */
797 lp->mii.phy_id = 1;
798 lp->phy_type = id1 << 16 | id2;
799 }
800
801 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
802 dev->name, id1, id2, lp->mii.phy_id);
803}
804
805/*
806 * Sets the PHY to a configuration as determined by the user.
807 * Called with spin_lock held.
808 */
809static int smc911x_phy_fixed(struct net_device *dev)
810{
811 struct smc911x_local *lp = netdev_priv(dev);
812 unsigned long ioaddr = dev->base_addr;
813 int phyaddr = lp->mii.phy_id;
814 int bmcr;
815
816 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
817
818 /* Enter Link Disable state */
819 SMC_GET_PHY_BMCR(phyaddr, bmcr);
820 bmcr |= BMCR_PDOWN;
821 SMC_SET_PHY_BMCR(phyaddr, bmcr);
822
823 /*
824 * Set our fixed capabilities
825 * Disable auto-negotiation
826 */
827 bmcr &= ~BMCR_ANENABLE;
828 if (lp->ctl_rfduplx)
829 bmcr |= BMCR_FULLDPLX;
830
831 if (lp->ctl_rspeed == 100)
832 bmcr |= BMCR_SPEED100;
833
834 /* Write our capabilities to the phy control register */
835 SMC_SET_PHY_BMCR(phyaddr, bmcr);
836
837 /* Re-Configure the Receive/Phy Control register */
838 bmcr &= ~BMCR_PDOWN;
839 SMC_SET_PHY_BMCR(phyaddr, bmcr);
840
841 return 1;
842}
843
844/*
845 * smc911x_phy_reset - reset the phy
846 * @dev: net device
847 * @phy: phy address
848 *
849 * Issue a software reset for the specified PHY and
850 * wait up to 100ms for the reset to complete. We should
851 * not access the PHY for 50ms after issuing the reset.
852 *
853 * The time to wait appears to be dependent on the PHY.
854 *
855 */
856static int smc911x_phy_reset(struct net_device *dev, int phy)
857{
858 struct smc911x_local *lp = netdev_priv(dev);
859 unsigned long ioaddr = dev->base_addr;
860 int timeout;
861 unsigned long flags;
862 unsigned int reg;
863
864 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
865
866 spin_lock_irqsave(&lp->lock, flags);
867 reg = SMC_GET_PMT_CTRL();
868 reg &= ~0xfffff030;
869 reg |= PMT_CTRL_PHY_RST_;
870 SMC_SET_PMT_CTRL(reg);
871 spin_unlock_irqrestore(&lp->lock, flags);
872 for (timeout = 2; timeout; timeout--) {
873 msleep(50);
874 spin_lock_irqsave(&lp->lock, flags);
875 reg = SMC_GET_PMT_CTRL();
876 spin_unlock_irqrestore(&lp->lock, flags);
877 if (!(reg & PMT_CTRL_PHY_RST_)) {
d5498bef 878 /* extra delay required because the phy may
0a0c72c9 879 * not be completed with its reset
d5498bef 880 * when PHY_BCR_RESET_ is cleared. 256us
0a0c72c9
DM		 881 * should suffice, but use 500us to be safe
882 */
883 udelay(500);
884 break;
885 }
886 }
887
888 return reg & PMT_CTRL_PHY_RST_;
889}
890
891/*
892 * smc911x_phy_powerdown - powerdown phy
893 * @dev: net device
894 * @phy: phy address
895 *
896 * Power down the specified PHY
897 */
898static void smc911x_phy_powerdown(struct net_device *dev, int phy)
899{
900 unsigned long ioaddr = dev->base_addr;
901 unsigned int bmcr;
902
903 /* Enter Link Disable state */
904 SMC_GET_PHY_BMCR(phy, bmcr);
905 bmcr |= BMCR_PDOWN;
906 SMC_SET_PHY_BMCR(phy, bmcr);
907}
908
909/*
910 * smc911x_phy_check_media - check the media status and adjust BMCR
911 * @dev: net device
912 * @init: set true for initialisation
913 *
914 * Select duplex mode depending on negotiation state. This
915 * also updates our carrier state.
916 */
917static void smc911x_phy_check_media(struct net_device *dev, int init)
918{
919 struct smc911x_local *lp = netdev_priv(dev);
920 unsigned long ioaddr = dev->base_addr;
921 int phyaddr = lp->mii.phy_id;
922 unsigned int bmcr, cr;
923
924 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
925
926 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
927 /* duplex state has changed */
928 SMC_GET_PHY_BMCR(phyaddr, bmcr);
929 SMC_GET_MAC_CR(cr);
930 if (lp->mii.full_duplex) {
931 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
932 bmcr |= BMCR_FULLDPLX;
933 cr |= MAC_CR_RCVOWN_;
934 } else {
935 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
936 bmcr &= ~BMCR_FULLDPLX;
937 cr &= ~MAC_CR_RCVOWN_;
938 }
939 SMC_SET_PHY_BMCR(phyaddr, bmcr);
940 SMC_SET_MAC_CR(cr);
941 }
942}
943
944/*
945 * Configures the specified PHY through the MII management interface
946 * using Autonegotiation.
947 * Calls smc911x_phy_fixed() if the user has requested a certain config.
948 * If RPC ANEG bit is set, the media selection is dependent purely on
949 * the selection by the MII (either in the MII BMCR reg or the result
950 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
951 * is controlled by the RPC SPEED and RPC DPLX bits.
952 */
ef8142a5 953static void smc911x_phy_configure(struct work_struct *work)
0a0c72c9 954{
ef8142a5
AM		 955 struct smc911x_local *lp = container_of(work, struct smc911x_local,
956 phy_configure);
957 struct net_device *dev = lp->netdev;
0a0c72c9
DM		 958 unsigned long ioaddr = dev->base_addr;
959 int phyaddr = lp->mii.phy_id;
960 int my_phy_caps; /* My PHY capabilities */
961 int my_ad_caps; /* My Advertised capabilities */
962 int status;
963 unsigned long flags;
964
965 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
966
967 /*
968 * We should not be called if phy_type is zero.
969 */
970 if (lp->phy_type == 0)
971 goto smc911x_phy_configure_exit;
972
973 if (smc911x_phy_reset(dev, phyaddr)) {
974 printk("%s: PHY reset timed out\n", dev->name);
975 goto smc911x_phy_configure_exit;
976 }
977 spin_lock_irqsave(&lp->lock, flags);
978
979 /*
980 * Enable PHY Interrupts (for register 18)
981 * Interrupts listed here are enabled
982 */
983 SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ |
984 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
985 PHY_INT_MASK_LINK_DOWN_);
986
987 /* If the user requested no auto neg, then go set his request */
988 if (lp->mii.force_media) {
989 smc911x_phy_fixed(dev);
990 goto smc911x_phy_configure_exit;
991 }
992
993 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
994 SMC_GET_PHY_BMSR(phyaddr, my_phy_caps);
995 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
996 printk(KERN_INFO "Auto negotiation NOT supported\n");
997 smc911x_phy_fixed(dev);
998 goto smc911x_phy_configure_exit;
999 }
1000
1001 /* CSMA capable w/ both pauses */
1002 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1003
1004 if (my_phy_caps & BMSR_100BASE4)
1005 my_ad_caps |= ADVERTISE_100BASE4;
1006 if (my_phy_caps & BMSR_100FULL)
1007 my_ad_caps |= ADVERTISE_100FULL;
1008 if (my_phy_caps & BMSR_100HALF)
1009 my_ad_caps |= ADVERTISE_100HALF;
1010 if (my_phy_caps & BMSR_10FULL)
1011 my_ad_caps |= ADVERTISE_10FULL;
1012 if (my_phy_caps & BMSR_10HALF)
1013 my_ad_caps |= ADVERTISE_10HALF;
1014
1015 /* Disable capabilities not selected by our user */
1016 if (lp->ctl_rspeed != 100)
1017 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1018
1019 if (!lp->ctl_rfduplx)
1020 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1021
1022 /* Update our Auto-Neg Advertisement Register */
1023 SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps);
1024 lp->mii.advertising = my_ad_caps;
1025
1026 /*
1027 * Read the register back. Without this, it appears that when
1028 * auto-negotiation is restarted, sometimes it isn't ready and
1029 * the link does not come up.
1030 */
1031 udelay(10);
1032 SMC_GET_PHY_MII_ADV(phyaddr, status);
1033
1034 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
1035 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
1036
1037 /* Restart auto-negotiation process in order to advertise my caps */
1038 SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
1039
1040 smc911x_phy_check_media(dev, 1);
1041
1042smc911x_phy_configure_exit:
1043 spin_unlock_irqrestore(&lp->lock, flags);
1044 lp->work_pending = 0;
1045}
1046
1047/*
1048 * smc911x_phy_interrupt
1049 *
1050 * Purpose: Handle interrupts relating to PHY register 18. This is
1051 * called from the "hard" interrupt handler under our private spinlock.
1052 */
1053static void smc911x_phy_interrupt(struct net_device *dev)
1054{
1055 struct smc911x_local *lp = netdev_priv(dev);
1056 unsigned long ioaddr = dev->base_addr;
1057 int phyaddr = lp->mii.phy_id;
1058 int status;
1059
1060 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1061
1062 if (lp->phy_type == 0)
1063 return;
1064
1065 smc911x_phy_check_media(dev, 0);
1066 /* read to clear status bits */
1067 SMC_GET_PHY_INT_SRC(phyaddr,status);
d5498bef 1068 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
0a0c72c9 1069 dev->name, status & 0xffff);
d5498bef 1070 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
0a0c72c9
DM		 1071 dev->name, SMC_GET_AFC_CFG());
1072}
1073
1074/*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1075
1076/*
1077 * This is the main routine of the driver, to handle the device when
1078 * it needs some attention.
1079 */
7d12e780 1080static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
0a0c72c9
DM		 1081{
1082 struct net_device *dev = dev_id;
1083 unsigned long ioaddr = dev->base_addr;
1084 struct smc911x_local *lp = netdev_priv(dev);
1085 unsigned int status, mask, timeout;
1086 unsigned int rx_overrun=0, cr, pkts;
1087 unsigned long flags;
1088
1089 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1090
1091 spin_lock_irqsave(&lp->lock, flags);
1092
1093 /* Spurious interrupt check */
1094 if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1095 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
a4d09272 1096 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM		 1097 return IRQ_NONE;
1098 }
1099
1100 mask = SMC_GET_INT_EN();
1101 SMC_SET_INT_EN(0);
1102
1103 /* set a timeout value, so I don't stay here forever */
1104 timeout = 8;
1105
1106
1107 do {
1108 status = SMC_GET_INT();
1109
1110 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1111 dev->name, status, mask, status & ~mask);
1112
1113 status &= mask;
1114 if (!status)
1115 break;
1116
1117 /* Handle SW interrupt condition */
1118 if (status & INT_STS_SW_INT_) {
1119 SMC_ACK_INT(INT_STS_SW_INT_);
1120 mask &= ~INT_EN_SW_INT_EN_;
1121 }
1122 /* Handle various error conditions */
1123 if (status & INT_STS_RXE_) {
1124 SMC_ACK_INT(INT_STS_RXE_);
1125 lp->stats.rx_errors++;
d5498bef 1126 }
0a0c72c9
DM		 1127 if (status & INT_STS_RXDFH_INT_) {
1128 SMC_ACK_INT(INT_STS_RXDFH_INT_);
1129 lp->stats.rx_dropped+=SMC_GET_RX_DROP();
1130 }
1131 /* Undocumented interrupt-what is the right thing to do here? */
1132 if (status & INT_STS_RXDF_INT_) {
1133 SMC_ACK_INT(INT_STS_RXDF_INT_);
1134 }
1135
1136 /* Rx Data FIFO exceeds set level */
1137 if (status & INT_STS_RDFL_) {
1138 if (IS_REV_A(lp->revision)) {
1139 rx_overrun=1;
1140 SMC_GET_MAC_CR(cr);
1141 cr &= ~MAC_CR_RXEN_;
1142 SMC_SET_MAC_CR(cr);
1143 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1144 lp->stats.rx_errors++;
1145 lp->stats.rx_fifo_errors++;
1146 }
1147 SMC_ACK_INT(INT_STS_RDFL_);
1148 }
1149 if (status & INT_STS_RDFO_) {
1150 if (!IS_REV_A(lp->revision)) {
1151 SMC_GET_MAC_CR(cr);
1152 cr &= ~MAC_CR_RXEN_;
1153 SMC_SET_MAC_CR(cr);
1154 rx_overrun=1;
1155 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1156 lp->stats.rx_errors++;
1157 lp->stats.rx_fifo_errors++;
1158 }
1159 SMC_ACK_INT(INT_STS_RDFO_);
1160 }
1161 /* Handle receive condition */
1162 if ((status & INT_STS_RSFL_) || rx_overrun) {
1163 unsigned int fifo;
1164 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
d5498bef
JG		 1165 fifo = SMC_GET_RX_FIFO_INF();
1166 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1167 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
0a0c72c9
DM		 1168 dev->name, pkts, fifo & 0xFFFF );
1169 if (pkts != 0) {
1170#ifdef SMC_USE_DMA
1171 unsigned int fifo;
1172 if (lp->rxdma_active){
d5498bef 1173 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
0a0c72c9
DM		 1174 "%s: RX DMA active\n", dev->name);
1175 /* The DMA is already running so up the IRQ threshold */
1176 fifo = SMC_GET_FIFO_INT() & ~0xFF;
1177 fifo |= pkts & 0xFF;
d5498bef 1178 DBG(SMC_DEBUG_RX,
0a0c72c9
DM		 1179 "%s: Setting RX stat FIFO threshold to %d\n",
1180 dev->name, fifo & 0xff);
1181 SMC_SET_FIFO_INT(fifo);
1182 } else
1183#endif
1184 smc911x_rcv(dev);
1185 }
1186 SMC_ACK_INT(INT_STS_RSFL_);
1187 }
1188 /* Handle transmit FIFO available */
1189 if (status & INT_STS_TDFA_) {
1190 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
1191 SMC_SET_FIFO_TDA(0xFF);
1192 lp->tx_throttle = 0;
1193#ifdef SMC_USE_DMA
1194 if (!lp->txdma_active)
1195#endif
1196 netif_wake_queue(dev);
1197 SMC_ACK_INT(INT_STS_TDFA_);
1198 }
1199 /* Handle transmit done condition */
1200#if 1
1201 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
d5498bef
JG		 1202 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1203 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
0a0c72c9
DM		 1204 dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16);
1205 smc911x_tx(dev);
1206 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1207 SMC_ACK_INT(INT_STS_TSFL_);
1208 SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_);
1209 }
1210#else
1211 if (status & INT_STS_TSFL_) {
1212 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1213 smc911x_tx(dev);
1214 SMC_ACK_INT(INT_STS_TSFL_);
1215 }
1216
1217 if (status & INT_STS_GPT_INT_) {
d5498bef
JG		 1218 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1219 dev->name,
1220 SMC_GET_IRQ_CFG(),
1221 SMC_GET_FIFO_INT(),
0a0c72c9
DM		 1222 SMC_GET_RX_CFG());
1223 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1224 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
d5498bef
JG		 1225 dev->name,
1226 (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16,
1227 SMC_GET_RX_FIFO_INF() & 0xffff,
0a0c72c9
DM		 1228 SMC_GET_RX_STS_FIFO_PEEK());
1229 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000);
1230 SMC_ACK_INT(INT_STS_GPT_INT_);
1231 }
1232#endif
1233
1234 /* Handle PHY interupt condition */
1235 if (status & INT_STS_PHY_INT_) {
1236 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1237 smc911x_phy_interrupt(dev);
1238 SMC_ACK_INT(INT_STS_PHY_INT_);
1239 }
1240 } while (--timeout);
1241
1242 /* restore mask state */
1243 SMC_SET_INT_EN(mask);
1244
d5498bef 1245 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
0a0c72c9
DM		 1246 dev->name, 8-timeout);
1247
1248 spin_unlock_irqrestore(&lp->lock, flags);
1249
1250 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
1251
1252 return IRQ_HANDLED;
1253}
1254
1255#ifdef SMC_USE_DMA
1256static void
7d12e780 1257smc911x_tx_dma_irq(int dma, void *data)
0a0c72c9
DM		 1258{
1259 struct net_device *dev = (struct net_device *)data;
1260 struct smc911x_local *lp = netdev_priv(dev);
1261 struct sk_buff *skb = lp->current_tx_skb;
1262 unsigned long flags;
1263
1264 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1265
1266 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1267 /* Clear the DMA interrupt sources */
1268 SMC_DMA_ACK_IRQ(dev, dma);
1269 BUG_ON(skb == NULL);
1270 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1271 dev->trans_start = jiffies;
1272 dev_kfree_skb_irq(skb);
1273 lp->current_tx_skb = NULL;
1274 if (lp->pending_tx_skb != NULL)
1275 smc911x_hardware_send_pkt(dev);
1276 else {
d5498bef 1277 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM		 1278 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1279 spin_lock_irqsave(&lp->lock, flags);
1280 lp->txdma_active = 0;
1281 if (!lp->tx_throttle) {
1282 netif_wake_queue(dev);
1283 }
1284 spin_unlock_irqrestore(&lp->lock, flags);
1285 }
1286
d5498bef 1287 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM		 1288 "%s: TX DMA irq completed\n", dev->name);
1289}
1290static void
7d12e780 1291smc911x_rx_dma_irq(int dma, void *data)
0a0c72c9
DM		 1292{
1293 struct net_device *dev = (struct net_device *)data;
1294 unsigned long ioaddr = dev->base_addr;
1295 struct smc911x_local *lp = netdev_priv(dev);
1296 struct sk_buff *skb = lp->current_rx_skb;
1297 unsigned long flags;
1298 unsigned int pkts;
1299
1300 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1301 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1302 /* Clear the DMA interrupt sources */
1303 SMC_DMA_ACK_IRQ(dev, dma);
1304 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1305 BUG_ON(skb == NULL);
1306 lp->current_rx_skb = NULL;
1307 PRINT_PKT(skb->data, skb->len);
1308 dev->last_rx = jiffies;
1309 skb->dev = dev;
1310 skb->protocol = eth_type_trans(skb, dev);
1311 netif_rx(skb);
1312 lp->stats.rx_packets++;
1313 lp->stats.rx_bytes += skb->len;
1314
1315 spin_lock_irqsave(&lp->lock, flags);
d5498bef 1316 pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
0a0c72c9
DM		 1317 if (pkts != 0) {
1318 smc911x_rcv(dev);
1319 }else {
1320 lp->rxdma_active = 0;
1321 }
1322 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef
JG		 1323 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1324 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
0a0c72c9
DM		 1325 dev->name, pkts);
1326}
1327#endif /* SMC_USE_DMA */
1328
1329#ifdef CONFIG_NET_POLL_CONTROLLER
1330/*
1331 * Polling receive - used by netconsole and other diagnostic tools
1332 * to allow network i/o with interrupts disabled.
1333 */
1334static void smc911x_poll_controller(struct net_device *dev)
1335{
1336 disable_irq(dev->irq);
9b6d2efe 1337 smc911x_interrupt(dev->irq, dev);
0a0c72c9
DM		 1338 enable_irq(dev->irq);
1339}
1340#endif
1341
1342/* Our watchdog timed out. Called by the networking layer */
1343static void smc911x_timeout(struct net_device *dev)
1344{
1345 struct smc911x_local *lp = netdev_priv(dev);
1346 unsigned long ioaddr = dev->base_addr;
1347 int status, mask;
1348 unsigned long flags;
1349
1350 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1351
1352 spin_lock_irqsave(&lp->lock, flags);
1353 status = SMC_GET_INT();
1354 mask = SMC_GET_INT_EN();
1355 spin_unlock_irqrestore(&lp->lock, flags);
1356 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1357 dev->name, status, mask);
1358
1359 /* Dump the current TX FIFO contents and restart */
d5498bef
JG		 1360 mask = SMC_GET_TX_CFG();
1361 SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
0a0c72c9
DM		 1362 /*
1363 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1364 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1365 * which calls schedule(). Hence we use a work queue.
1366 */
1367 if (lp->phy_type != 0) {
1368 if (schedule_work(&lp->phy_configure)) {
1369 lp->work_pending = 1;
1370 }
1371 }
1372
1373 /* We can accept TX packets again */
1374 dev->trans_start = jiffies;
1375 netif_wake_queue(dev);
1376}
1377
1378/*
1379 * This routine will, depending on the values passed to it,
1380 * either make it accept multicast packets, go into
1381 * promiscuous mode (for TCPDUMP and cousins) or accept
1382 * a select set of multicast packets
1383 */
1384static void smc911x_set_multicast_list(struct net_device *dev)
1385{
1386 struct smc911x_local *lp = netdev_priv(dev);
1387 unsigned long ioaddr = dev->base_addr;
1388 unsigned int multicast_table[2];
1389 unsigned int mcr, update_multicast = 0;
1390 unsigned long flags;
1391 /* table for flipping the order of 5 bits */
d5498bef 1392 static const unsigned char invert5[] =
0a0c72c9
DM		 1393 {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C,
1394 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E,
1395 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D,
1396 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F};
1397
1398
1399 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1400
1401 spin_lock_irqsave(&lp->lock, flags);
1402 SMC_GET_MAC_CR(mcr);
1403 spin_unlock_irqrestore(&lp->lock, flags);
1404
1405 if (dev->flags & IFF_PROMISC) {
1406
1407 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1408 mcr |= MAC_CR_PRMS_;
1409 }
1410 /*
1411 * Here, I am setting this to accept all multicast packets.
1412 * I don't need to zero the multicast table, because the flag is
1413 * checked before the table is
1414 */
1415 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1416 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1417 mcr |= MAC_CR_MCPAS_;
1418 }
1419
1420 /*
1421 * This sets the internal hardware table to filter out unwanted
1422 * multicast packets before they take up memory.
1423 *
1424 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1425 * address are the offset into the table. If that bit is 1, then the
1426 * multicast packet is accepted. Otherwise, it's dropped silently.
1427 *
1428 * To use the 6 bits as an offset into the table, the high 1 bit is
1429 * the number of the 32 bit register, while the low 5 bits are the bit
1430 * within that register.
1431 */
1432 else if (dev->mc_count) {
1433 int i;
1434 struct dev_mc_list *cur_addr;
1435
1436 /* Set the Hash perfec mode */
1437 mcr |= MAC_CR_HPFILT_;
1438
1439 /* start with a table of all zeros: reject all */
1440 memset(multicast_table, 0, sizeof(multicast_table));
1441
1442 cur_addr = dev->mc_list;
1443 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1444 int position;
1445
1446 /* do we have a pointer here? */
1447 if (!cur_addr)
1448 break;
1449 /* make sure this is a multicast address -
1450 shouldn't this be a given if we have it here ? */
1451 if (!(*cur_addr->dmi_addr & 1))
1452 continue;
1453
1454 /* only use the low order bits */
1455 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1456
1457 /* do some messy swapping to put the bit in the right spot */
1458 multicast_table[invert5[position&0x1F]&0x1] |=
1459 (1<<invert5[(position>>1)&0x1F]);
1460 }
1461
1462 /* be sure I get rid of flags I might have set */
1463 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1464
1465 /* now, the table can be loaded into the chipset */
1466 update_multicast = 1;
1467 } else {
d5498bef 1468 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
0a0c72c9
DM		 1469 dev->name);
1470 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1471
1472 /*
1473 * since I'm disabling all multicast entirely, I need to
1474 * clear the multicast list
1475 */
1476 memset(multicast_table, 0, sizeof(multicast_table));
1477 update_multicast = 1;
1478 }
1479
1480 spin_lock_irqsave(&lp->lock, flags);
1481 SMC_SET_MAC_CR(mcr);
1482 if (update_multicast) {
d5498bef
JG		 1483 DBG(SMC_DEBUG_MISC,
1484 "%s: update mcast hash table 0x%08x 0x%08x\n",
0a0c72c9
DM		 1485 dev->name, multicast_table[0], multicast_table[1]);
1486 SMC_SET_HASHL(multicast_table[0]);
1487 SMC_SET_HASHH(multicast_table[1]);
1488 }
1489 spin_unlock_irqrestore(&lp->lock, flags);
1490}
1491
1492
1493/*
1494 * Open and Initialize the board
1495 *
1496 * Set up everything, reset the card, etc..
1497 */
1498static int
1499smc911x_open(struct net_device *dev)
1500{
ef8142a5
AM		 1501 struct smc911x_local *lp = netdev_priv(dev);
1502
0a0c72c9
DM		 1503 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1504
1505 /*
1506 * Check that the address is valid. If its not, refuse
1507 * to bring the device up. The user must specify an
1508 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1509 */
1510 if (!is_valid_ether_addr(dev->dev_addr)) {
1511 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1512 return -EINVAL;
1513 }
1514
1515 /* reset the hardware */
1516 smc911x_reset(dev);
1517
1518 /* Configure the PHY, initialize the link state */
ef8142a5 1519 smc911x_phy_configure(&lp->phy_configure);
0a0c72c9
DM		 1520
1521 /* Turn on Tx + Rx */
1522 smc911x_enable(dev);
1523
1524 netif_start_queue(dev);
1525
1526 return 0;
1527}
1528
1529/*
1530 * smc911x_close
1531 *
1532 * this makes the board clean up everything that it can
1533 * and not talk to the outside world. Caused by
1534 * an 'ifconfig ethX down'
1535 */
1536static int smc911x_close(struct net_device *dev)
1537{
1538 struct smc911x_local *lp = netdev_priv(dev);
1539
1540 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1541
1542 netif_stop_queue(dev);
1543 netif_carrier_off(dev);
1544
1545 /* clear everything */
1546 smc911x_shutdown(dev);
1547
1548 if (lp->phy_type != 0) {
1549 /* We need to ensure that no calls to
1550 * smc911x_phy_configure are pending.
1551
1552 * flush_scheduled_work() cannot be called because we
1553 * are running with the netlink semaphore held (from
1554 * devinet_ioctl()) and the pending work queue
1555 * contains linkwatch_event() (scheduled by
1556 * netif_carrier_off() above). linkwatch_event() also
1557 * wants the netlink semaphore.
1558 */
1559 while (lp->work_pending)
1560 schedule();
1561 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1562 }
1563
1564 if (lp->pending_tx_skb) {
1565 dev_kfree_skb(lp->pending_tx_skb);
1566 lp->pending_tx_skb = NULL;
1567 }
1568
1569 return 0;
1570}
1571
1572/*
1573 * Get the current statistics.
1574 * This may be called with the card open or closed.
1575 */
1576static struct net_device_stats *smc911x_query_statistics(struct net_device *dev)
1577{
1578 struct smc911x_local *lp = netdev_priv(dev);
1579 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1580
1581
1582 return &lp->stats;
1583}
1584
1585/*
1586 * Ethtool support
1587 */
1588static int
1589smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1590{
1591 struct smc911x_local *lp = netdev_priv(dev);
1592 unsigned long ioaddr = dev->base_addr;
1593 int ret, status;
1594 unsigned long flags;
1595
1596 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1597 cmd->maxtxpkt = 1;
1598 cmd->maxrxpkt = 1;
1599
1600 if (lp->phy_type != 0) {
1601 spin_lock_irqsave(&lp->lock, flags);
1602 ret = mii_ethtool_gset(&lp->mii, cmd);
1603 spin_unlock_irqrestore(&lp->lock, flags);
1604 } else {
1605 cmd->supported = SUPPORTED_10baseT_Half |
1606 SUPPORTED_10baseT_Full |
1607 SUPPORTED_TP | SUPPORTED_AUI;
1608
1609 if (lp->ctl_rspeed == 10)
1610 cmd->speed = SPEED_10;
1611 else if (lp->ctl_rspeed == 100)
1612 cmd->speed = SPEED_100;
1613
1614 cmd->autoneg = AUTONEG_DISABLE;
1615 if (lp->mii.phy_id==1)
1616 cmd->transceiver = XCVR_INTERNAL;
1617 else
1618 cmd->transceiver = XCVR_EXTERNAL;
1619 cmd->port = 0;
1620 SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status);
d5498bef
JG		 1621 cmd->duplex =
1622 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
0a0c72c9
DM		 1623 DUPLEX_FULL : DUPLEX_HALF;
1624 ret = 0;
1625 }
1626
1627 return ret;
1628}
1629
1630static int
1631smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1632{
1633 struct smc911x_local *lp = netdev_priv(dev);
1634 int ret;
1635 unsigned long flags;
1636
1637 if (lp->phy_type != 0) {
1638 spin_lock_irqsave(&lp->lock, flags);
1639 ret = mii_ethtool_sset(&lp->mii, cmd);
1640 spin_unlock_irqrestore(&lp->lock, flags);
1641 } else {
1642 if (cmd->autoneg != AUTONEG_DISABLE ||
1643 cmd->speed != SPEED_10 ||
1644 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1645 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1646 return -EINVAL;
1647
1648 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1649
1650 ret = 0;
1651 }
1652
1653 return ret;
1654}
1655
1656static void
1657smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1658{
1659 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1660 strncpy(info->version, version, sizeof(info->version));
1661 strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
1662}
1663
1664static int smc911x_ethtool_nwayreset(struct net_device *dev)
1665{
1666 struct smc911x_local *lp = netdev_priv(dev);
1667 int ret = -EINVAL;
1668 unsigned long flags;
1669
1670 if (lp->phy_type != 0) {
1671 spin_lock_irqsave(&lp->lock, flags);
1672 ret = mii_nway_restart(&lp->mii);
1673 spin_unlock_irqrestore(&lp->lock, flags);
1674 }
1675
1676 return ret;
1677}
1678
1679static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1680{
1681 struct smc911x_local *lp = netdev_priv(dev);
1682 return lp->msg_enable;
1683}
1684
1685static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1686{
1687 struct smc911x_local *lp = netdev_priv(dev);
1688 lp->msg_enable = level;
1689}
1690
1691static int smc911x_ethtool_getregslen(struct net_device *dev)
1692{
1693 /* System regs + MAC regs + PHY regs */
d5498bef
JG		 1694 return (((E2P_CMD - ID_REV)/4 + 1) +
1695 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
0a0c72c9
DM		 1696}
1697
d5498bef 1698static void smc911x_ethtool_getregs(struct net_device *dev,
0a0c72c9
DM		 1699 struct ethtool_regs* regs, void *buf)
1700{
1701 unsigned long ioaddr = dev->base_addr;
1702 struct smc911x_local *lp = netdev_priv(dev);
1703 unsigned long flags;
1704 u32 reg,i,j=0;
1705 u32 *data = (u32*)buf;
1706
1707 regs->version = lp->version;
1708 for(i=ID_REV;i<=E2P_CMD;i+=4) {
d5498bef 1709 data[j++] = SMC_inl(ioaddr,i);
0a0c72c9
DM		 1710 }
1711 for(i=MAC_CR;i<=WUCSR;i++) {
1712 spin_lock_irqsave(&lp->lock, flags);
1713 SMC_GET_MAC_CSR(i, reg);
1714 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1715 data[j++] = reg;
0a0c72c9
DM		 1716 }
1717 for(i=0;i<=31;i++) {
1718 spin_lock_irqsave(&lp->lock, flags);
1719 SMC_GET_MII(i, lp->mii.phy_id, reg);
1720 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1721 data[j++] = reg & 0xFFFF;
0a0c72c9
DM		 1722 }
1723}
1724
1725static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1726{
1727 unsigned long ioaddr = dev->base_addr;
1728 unsigned int timeout;
1729 int e2p_cmd;
1730
1731 e2p_cmd = SMC_GET_E2P_CMD();
1732 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1733 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
d5498bef 1734 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
0a0c72c9
DM		 1735 dev->name, __FUNCTION__);
1736 return -EFAULT;
d5498bef 1737 }
0a0c72c9
DM		 1738 mdelay(1);
1739 e2p_cmd = SMC_GET_E2P_CMD();
1740 }
1741 if (timeout == 0) {
d5498bef 1742 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
0a0c72c9
DM		 1743 dev->name, __FUNCTION__);
1744 return -ETIMEDOUT;
1745 }
1746 return 0;
1747}
1748
d5498bef 1749static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
0a0c72c9
DM		 1750 int cmd, int addr)
1751{
1752 unsigned long ioaddr = dev->base_addr;
1753 int ret;
1754
d5498bef 1755 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1756 return ret;
d5498bef
JG		 1757 SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ |
1758 ((cmd) & (0x7<<28)) |
0a0c72c9
DM		 1759 ((addr) & 0xFF));
1760 return 0;
1761}
1762
d5498bef 1763static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
0a0c72c9
DM		 1764 u8 *data)
1765{
1766 unsigned long ioaddr = dev->base_addr;
1767 int ret;
1768
d5498bef 1769 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9
DM		 1770 return ret;
1771 *data = SMC_GET_E2P_DATA();
1772 return 0;
1773}
1774
d5498bef 1775static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
0a0c72c9
DM		 1776 u8 data)
1777{
1778 unsigned long ioaddr = dev->base_addr;
1779 int ret;
1780
d5498bef 1781 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9
DM		 1782 return ret;
1783 SMC_SET_E2P_DATA(data);
1784 return 0;
1785}
1786
d5498bef 1787static int smc911x_ethtool_geteeprom(struct net_device *dev,
0a0c72c9
DM		 1788 struct ethtool_eeprom *eeprom, u8 *data)
1789{
1790 u8 eebuf[SMC911X_EEPROM_LEN];
1791 int i, ret;
1792
1793 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1794 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1795 return ret;
1796 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1797 return ret;
1798 }
1799 memcpy(data, eebuf+eeprom->offset, eeprom->len);
d5498bef 1800 return 0;
0a0c72c9
DM		 1801}
1802
d5498bef 1803static int smc911x_ethtool_seteeprom(struct net_device *dev,
0a0c72c9
DM		 1804 struct ethtool_eeprom *eeprom, u8 *data)
1805{
1806 int i, ret;
1807
1808 /* Enable erase */
1809 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1810 return ret;
1811 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1812 /* erase byte */
1813 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1814 return ret;
1815 /* write byte */
1816 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1817 return ret;
1818 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1819 return ret;
1820 }
1821 return 0;
1822}
1823
1824static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1825{
1826 return SMC911X_EEPROM_LEN;
1827}
1828
7282d491 1829static const struct ethtool_ops smc911x_ethtool_ops = {
0a0c72c9
DM		 1830 .get_settings = smc911x_ethtool_getsettings,
1831 .set_settings = smc911x_ethtool_setsettings,
1832 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1833 .get_msglevel = smc911x_ethtool_getmsglevel,
1834 .set_msglevel = smc911x_ethtool_setmsglevel,
1835 .nway_reset = smc911x_ethtool_nwayreset,
1836 .get_link = ethtool_op_get_link,
1837 .get_regs_len = smc911x_ethtool_getregslen,
1838 .get_regs = smc911x_ethtool_getregs,
1839 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1840 .get_eeprom = smc911x_ethtool_geteeprom,
1841 .set_eeprom = smc911x_ethtool_seteeprom,
1842};
1843
1844/*
1845 * smc911x_findirq
1846 *
1847 * This routine has a simple purpose -- make the SMC chip generate an
1848 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1849 */
1850static int __init smc911x_findirq(unsigned long ioaddr)
1851{
1852 int timeout = 20;
1853 unsigned long cookie;
1854
1855 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
1856
1857 cookie = probe_irq_on();
1858
1859 /*
1860 * Force a SW interrupt
1861 */
1862
1863 SMC_SET_INT_EN(INT_EN_SW_INT_EN_);
1864
1865 /*
1866 * Wait until positive that the interrupt has been generated
1867 */
1868 do {
1869 int int_status;
1870 udelay(10);
1871 int_status = SMC_GET_INT_EN();
1872 if (int_status & INT_EN_SW_INT_EN_)
1873 break; /* got the interrupt */
1874 } while (--timeout);
1875
1876 /*
1877 * there is really nothing that I can do here if timeout fails,
1878 * as autoirq_report will return a 0 anyway, which is what I
1879 * want in this case. Plus, the clean up is needed in both
1880 * cases.
1881 */
1882
1883 /* and disable all interrupts again */
1884 SMC_SET_INT_EN(0);
1885
1886 /* and return what I found */
1887 return probe_irq_off(cookie);
1888}
1889
1890/*
1891 * Function: smc911x_probe(unsigned long ioaddr)
1892 *
1893 * Purpose:
1894 * Tests to see if a given ioaddr points to an SMC911x chip.
1895 * Returns a 0 on success
1896 *
1897 * Algorithm:
1898 * (1) see if the endian word is OK
1899 * (1) see if I recognize the chip ID in the appropriate register
1900 *
1901 * Here I do typical initialization tasks.
1902 *
1903 * o Initialize the structure if needed
1904 * o print out my vanity message if not done so already
1905 * o print out what type of hardware is detected
1906 * o print out the ethernet address
1907 * o find the IRQ
1908 * o set up my private data
1909 * o configure the dev structure with my subroutines
1910 * o actually GRAB the irq.
1911 * o GRAB the region
1912 */
1913static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr)
1914{
1915 struct smc911x_local *lp = netdev_priv(dev);
1916 int i, retval;
1917 unsigned int val, chip_id, revision;
1918 const char *version_string;
1919
1920 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1921
1922 /* First, see if the endian word is recognized */
1923 val = SMC_GET_BYTE_TEST();
1924 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1925 if (val != 0x87654321) {
1926 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
1927 retval = -ENODEV;
1928 goto err_out;
1929 }
1930
1931 /*
1932 * check if the revision register is something that I
1933 * recognize. These might need to be added to later,
1934 * as future revisions could be added.
1935 */
1936 chip_id = SMC_GET_PN();
1937 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1938 for(i=0;chip_ids[i].id != 0; i++) {
1939 if (chip_ids[i].id == chip_id) break;
1940 }
1941 if (!chip_ids[i].id) {
1942 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1943 retval = -ENODEV;
1944 goto err_out;
1945 }
1946 version_string = chip_ids[i].name;
1947
1948 revision = SMC_GET_REV();
1949 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1950
1951 /* At this point I'll assume that the chip is an SMC911x. */
1952 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1953
1954 /* Validate the TX FIFO size requested */
1955 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1956 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1957 retval = -EINVAL;
1958 goto err_out;
1959 }
d5498bef 1960
0a0c72c9
DM		 1961 /* fill in some of the fields */
1962 dev->base_addr = ioaddr;
1963 lp->version = chip_ids[i].id;
1964 lp->revision = revision;
1965 lp->tx_fifo_kb = tx_fifo_kb;
1966 /* Reverse calculate the RX FIFO size from the TX */
1967 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1968 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1969
1970 /* Set the automatic flow control values */
1971 switch(lp->tx_fifo_kb) {
d5498bef 1972 /*
0a0c72c9
DM		 1973 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1974 * AFC_LO is AFC_HI/2
1975 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1976 */
1977 case 2:/* 13440 Rx Data Fifo Size */
1978 lp->afc_cfg=0x008C46AF;break;
1979 case 3:/* 12480 Rx Data Fifo Size */
1980 lp->afc_cfg=0x0082419F;break;
1981 case 4:/* 11520 Rx Data Fifo Size */
1982 lp->afc_cfg=0x00783C9F;break;
1983 case 5:/* 10560 Rx Data Fifo Size */
1984 lp->afc_cfg=0x006E374F;break;
1985 case 6:/* 9600 Rx Data Fifo Size */
1986 lp->afc_cfg=0x0064328F;break;
1987 case 7:/* 8640 Rx Data Fifo Size */
1988 lp->afc_cfg=0x005A2D7F;break;
1989 case 8:/* 7680 Rx Data Fifo Size */
1990 lp->afc_cfg=0x0050287F;break;
1991 case 9:/* 6720 Rx Data Fifo Size */
1992 lp->afc_cfg=0x0046236F;break;
1993 case 10:/* 5760 Rx Data Fifo Size */
1994 lp->afc_cfg=0x003C1E6F;break;
1995 case 11:/* 4800 Rx Data Fifo Size */
1996 lp->afc_cfg=0x0032195F;break;
d5498bef 1997 /*
0a0c72c9
DM		 1998 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1999 * AFC_LO is AFC_HI/2
2000 * BACK_DUR is about 5uS*(AFC_LO) rounded down
2001 */
2002 case 12:/* 3840 Rx Data Fifo Size */
2003 lp->afc_cfg=0x0024124F;break;
2004 case 13:/* 2880 Rx Data Fifo Size */
2005 lp->afc_cfg=0x0015073F;break;
2006 case 14:/* 1920 Rx Data Fifo Size */
2007 lp->afc_cfg=0x0006032F;break;
2008 default:
d5498bef 2009 PRINTK("%s: ERROR -- no AFC_CFG setting found",
0a0c72c9
DM		 2010 dev->name);
2011 break;
2012 }
2013
d5498bef
JG		 2014 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
2015 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
0a0c72c9
DM		 2016 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
2017
2018 spin_lock_init(&lp->lock);
2019
2020 /* Get the MAC address */
2021 SMC_GET_MAC_ADDR(dev->dev_addr);
2022
2023 /* now, reset the chip, and put it into a known state */
2024 smc911x_reset(dev);
2025
2026 /*
2027 * If dev->irq is 0, then the device has to be banged on to see
2028 * what the IRQ is.
2029 *
2030 * Specifying an IRQ is done with the assumption that the user knows
2031 * what (s)he is doing. No checking is done!!!!
2032 */
2033 if (dev->irq < 1) {
2034 int trials;
2035
2036 trials = 3;
2037 while (trials--) {
2038 dev->irq = smc911x_findirq(ioaddr);
2039 if (dev->irq)
2040 break;
2041 /* kick the card and try again */
2042 smc911x_reset(dev);
2043 }
2044 }
2045 if (dev->irq == 0) {
2046 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
2047 dev->name);
2048 retval = -ENODEV;
2049 goto err_out;
2050 }
2051 dev->irq = irq_canonicalize(dev->irq);
2052
2053 /* Fill in the fields of the device structure with ethernet values. */
2054 ether_setup(dev);
2055
2056 dev->open = smc911x_open;
2057 dev->stop = smc911x_close;
2058 dev->hard_start_xmit = smc911x_hard_start_xmit;
2059 dev->tx_timeout = smc911x_timeout;
2060 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
2061 dev->get_stats = smc911x_query_statistics;
2062 dev->set_multicast_list = smc911x_set_multicast_list;
2063 dev->ethtool_ops = &smc911x_ethtool_ops;
2064#ifdef CONFIG_NET_POLL_CONTROLLER
2065 dev->poll_controller = smc911x_poll_controller;
2066#endif
2067
ef8142a5 2068 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
0a0c72c9
DM		 2069 lp->mii.phy_id_mask = 0x1f;
2070 lp->mii.reg_num_mask = 0x1f;
2071 lp->mii.force_media = 0;
2072 lp->mii.full_duplex = 0;
2073 lp->mii.dev = dev;
2074 lp->mii.mdio_read = smc911x_phy_read;
2075 lp->mii.mdio_write = smc911x_phy_write;
2076
2077 /*
2078 * Locate the phy, if any.
2079 */
2080 smc911x_phy_detect(dev);
2081
2082 /* Set default parameters */
2083 lp->msg_enable = NETIF_MSG_LINK;
2084 lp->ctl_rfduplx = 1;
2085 lp->ctl_rspeed = 100;
2086
2087 /* Grab the IRQ */
1fb9df5d 2088 retval = request_irq(dev->irq, &smc911x_interrupt, IRQF_SHARED, dev->name, dev);
0a0c72c9
DM		 2089 if (retval)
2090 goto err_out;
2091
2092 set_irq_type(dev->irq, IRQT_FALLING);
2093
2094#ifdef SMC_USE_DMA
2095 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
2096 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
2097 lp->rxdma_active = 0;
2098 lp->txdma_active = 0;
2099 dev->dma = lp->rxdma;
2100#endif
2101
2102 retval = register_netdev(dev);
2103 if (retval == 0) {
2104 /* now, print out the card info, in a short format.. */
2105 printk("%s: %s (rev %d) at %#lx IRQ %d",
2106 dev->name, version_string, lp->revision,
2107 dev->base_addr, dev->irq);
2108
2109#ifdef SMC_USE_DMA
2110 if (lp->rxdma != -1)
2111 printk(" RXDMA %d ", lp->rxdma);
2112
2113 if (lp->txdma != -1)
2114 printk("TXDMA %d", lp->txdma);
2115#endif
2116 printk("\n");
2117 if (!is_valid_ether_addr(dev->dev_addr)) {
2118 printk("%s: Invalid ethernet MAC address. Please "
2119 "set using ifconfig\n", dev->name);
2120 } else {
2121 /* Print the Ethernet address */
2122 printk("%s: Ethernet addr: ", dev->name);
2123 for (i = 0; i < 5; i++)
2124 printk("%2.2x:", dev->dev_addr[i]);
2125 printk("%2.2x\n", dev->dev_addr[5]);
2126 }
2127
2128 if (lp->phy_type == 0) {
2129 PRINTK("%s: No PHY found\n", dev->name);
2130 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2131 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2132 } else {
2133 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2134 }
2135 }
d5498bef 2136
0a0c72c9
DM		 2137err_out:
2138#ifdef SMC_USE_DMA
2139 if (retval) {
2140 if (lp->rxdma != -1) {
2141 SMC_DMA_FREE(dev, lp->rxdma);
2142 }
2143 if (lp->txdma != -1) {
2144 SMC_DMA_FREE(dev, lp->txdma);
2145 }
2146 }
2147#endif
2148 return retval;
2149}
2150
2151/*
2152 * smc911x_init(void)
2153 *
2154 * Output:
2155 * 0 --> there is a device
2156 * anything else, error
2157 */
2158static int smc911x_drv_probe(struct platform_device *pdev)
2159{
2160 struct net_device *ndev;
2161 struct resource *res;
ef8142a5 2162 struct smc911x_local *lp;
0a0c72c9
DM		 2163 unsigned int *addr;
2164 int ret;
2165
2166 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2167 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2168 if (!res) {
2169 ret = -ENODEV;
2170 goto out;
2171 }
2172
2173 /*
2174 * Request the regions.
2175 */
2176 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2177 ret = -EBUSY;
2178 goto out;
2179 }
2180
2181 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2182 if (!ndev) {
2183 printk("%s: could not allocate device.\n", CARDNAME);
2184 ret = -ENOMEM;
2185 goto release_1;
2186 }
2187 SET_MODULE_OWNER(ndev);
2188 SET_NETDEV_DEV(ndev, &pdev->dev);
2189
2190 ndev->dma = (unsigned char)-1;
2191 ndev->irq = platform_get_irq(pdev, 0);
ef8142a5
AM		 2192 lp = netdev_priv(ndev);
2193 lp->netdev = ndev;
0a0c72c9
DM		 2194
2195 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2196 if (!addr) {
2197 ret = -ENOMEM;
2198 goto release_both;
2199 }
2200
2201 platform_set_drvdata(pdev, ndev);
2202 ret = smc911x_probe(ndev, (unsigned long)addr);
2203 if (ret != 0) {
2204 platform_set_drvdata(pdev, NULL);
2205 iounmap(addr);
2206release_both:
2207 free_netdev(ndev);
2208release_1:
2209 release_mem_region(res->start, SMC911X_IO_EXTENT);
2210out:
2211 printk("%s: not found (%d).\n", CARDNAME, ret);
2212 }
2213#ifdef SMC_USE_DMA
2214 else {
0a0c72c9
DM		 2215 lp->physaddr = res->start;
2216 lp->dev = &pdev->dev;
2217 }
2218#endif
2219
2220 return ret;
2221}
2222
2223static int smc911x_drv_remove(struct platform_device *pdev)
2224{
2225 struct net_device *ndev = platform_get_drvdata(pdev);
2226 struct resource *res;
2227
2228 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2229 platform_set_drvdata(pdev, NULL);
2230
2231 unregister_netdev(ndev);
2232
2233 free_irq(ndev->irq, ndev);
2234
2235#ifdef SMC_USE_DMA
2236 {
2237 struct smc911x_local *lp = netdev_priv(ndev);
2238 if (lp->rxdma != -1) {
2239 SMC_DMA_FREE(dev, lp->rxdma);
2240 }
2241 if (lp->txdma != -1) {
2242 SMC_DMA_FREE(dev, lp->txdma);
2243 }
2244 }
2245#endif
2246 iounmap((void *)ndev->base_addr);
2247 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2248 release_mem_region(res->start, SMC911X_IO_EXTENT);
2249
2250 free_netdev(ndev);
2251 return 0;
2252}
2253
2254static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2255{
2256 struct net_device *ndev = platform_get_drvdata(dev);
2257 unsigned long ioaddr = ndev->base_addr;
2258
2259 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2260 if (ndev) {
2261 if (netif_running(ndev)) {
2262 netif_device_detach(ndev);
2263 smc911x_shutdown(ndev);
2264#if POWER_DOWN
2265 /* Set D2 - Energy detect only setting */
2266 SMC_SET_PMT_CTRL(2<<12);
2267#endif
2268 }
2269 }
2270 return 0;
2271}
2272
2273static int smc911x_drv_resume(struct platform_device *dev)
2274{
2275 struct net_device *ndev = platform_get_drvdata(dev);
2276
2277 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2278 if (ndev) {
2279 struct smc911x_local *lp = netdev_priv(ndev);
2280
2281 if (netif_running(ndev)) {
2282 smc911x_reset(ndev);
2283 smc911x_enable(ndev);
2284 if (lp->phy_type != 0)
ef8142a5 2285 smc911x_phy_configure(&lp->phy_configure);
0a0c72c9
DM		 2286 netif_device_attach(ndev);
2287 }
2288 }
2289 return 0;
2290}
2291
2292static struct platform_driver smc911x_driver = {
2293 .probe = smc911x_drv_probe,
2294 .remove = smc911x_drv_remove,
2295 .suspend = smc911x_drv_suspend,
2296 .resume = smc911x_drv_resume,
2297 .driver = {
2298 .name = CARDNAME,
2299 },
2300};
d5498bef 2301
0a0c72c9
DM		 2302static int __init smc911x_init(void)
2303{
2304 return platform_driver_register(&smc911x_driver);
2305}
2306
2307static void __exit smc911x_cleanup(void)
2308{
2309 platform_driver_unregister(&smc911x_driver);
2310}
2311
2312module_init(smc911x_init);
2313module_exit(smc911x_cleanup);
Linux kernel - Deliverables
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