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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394...
[deliverable/linux.git] / drivers / net / tlan.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2 *
3 * Linux ThunderLAN Driver
4 *
5 * tlan.c
6 * by James Banks
7 *
8 * (C) 1997-1998 Caldera, Inc.
9 * (C) 1998 James Banks
10 * (C) 1999-2001 Torben Mathiasen
11 * (C) 2002 Samuel Chessman
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 *
1da177e4
LT		 16 ** Useful (if not required) reading:
17 *
18 * Texas Instruments, ThunderLAN Programmer's Guide,
19 * TI Literature Number SPWU013A
20 * available in PDF format from www.ti.com
21 * Level One, LXT901 and LXT970 Data Sheets
22 * available in PDF format from www.level1.com
23 * National Semiconductor, DP83840A Data Sheet
24 * available in PDF format from www.national.com
25 * Microchip Technology, 24C01A/02A/04A Data Sheet
26 * available in PDF format from www.microchip.com
27 *
28 * Change History
29 *
30 * Tigran Aivazian <tigran@sco.com>: TLan_PciProbe() now uses
31 * new PCI BIOS interface.
113aa838
AC		 32 * Alan Cox <alan@lxorguk.ukuu.org.uk>:
33 * Fixed the out of memory
1da177e4 34 * handling.
6aa20a22 35 *
1da177e4
LT		 36 * Torben Mathiasen <torben.mathiasen@compaq.com> New Maintainer!
37 *
38 * v1.1 Dec 20, 1999 - Removed linux version checking
6aa20a22 39 * Patch from Tigran Aivazian.
1da177e4
LT		 40 * - v1.1 includes Alan's SMP updates.
41 * - We still have problems on SMP though,
6aa20a22
JG		 42 * but I'm looking into that.
43 *
1da177e4
LT		 44 * v1.2 Jan 02, 2000 - Hopefully fixed the SMP deadlock.
45 * - Removed dependency of HZ being 100.
6aa20a22 46 * - We now allow higher priority timers to
1da177e4
LT		 47 * overwrite timers like TLAN_TIMER_ACTIVITY
48 * Patch from John Cagle <john.cagle@compaq.com>.
49 * - Fixed a few compiler warnings.
50 *
51 * v1.3 Feb 04, 2000 - Fixed the remaining HZ issues.
6aa20a22 52 * - Removed call to pci_present().
1da177e4 53 * - Removed SA_INTERRUPT flag from irq handler.
6aa20a22 54 * - Added __init and __initdata to reduce resisdent
1da177e4
LT		 55 * code size.
56 * - Driver now uses module_init/module_exit.
57 * - Rewrote init_module and tlan_probe to
58 * share a lot more code. We now use tlan_probe
59 * with builtin and module driver.
6aa20a22
JG		 60 * - Driver ported to new net API.
61 * - tlan.txt has been reworked to reflect current
1da177e4
LT		 62 * driver (almost)
63 * - Other minor stuff
64 *
65 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's
66 * network cleanup in 2.3.43pre7 (Tigran & myself)
67 * - Minor stuff.
68 *
69 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver
70 * if no cable/link were present.
71 * - Cosmetic changes.
72 * - TODO: Port completely to new PCI/DMA API
73 * Auto-Neg fallback.
74 *
75 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't
6aa20a22 76 * tested it though, as the kernel support is currently
1da177e4
LT		 77 * broken (2.3.99p4p3).
78 * - Updated tlan.txt accordingly.
79 * - Adjusted minimum/maximum frame length.
6aa20a22 80 * - There is now a TLAN website up at
1da177e4
LT		 81 * http://tlan.kernel.dk
82 *
83 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now
84 * reports PHY information when used with Donald
85 * Beckers userspace MII diagnostics utility.
86 *
87 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings.
88 * - Added link information to Auto-Neg and forced
89 * modes. When NIC operates with auto-neg the driver
90 * will report Link speed & duplex modes as well as
91 * link partner abilities. When forced link is used,
92 * the driver will report status of the established
93 * link.
6aa20a22
JG		 94 * Please read tlan.txt for additional information.
95 * - Removed call to check_region(), and used
1da177e4 96 * return value of request_region() instead.
6aa20a22 97 *
1da177e4
LT		 98 * v1.8a May 28, 2000 - Minor updates.
99 *
100 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues.
101 * - Updated with timer fixes from Andrew Morton.
102 * - Fixed module race in TLan_Open.
103 * - Added routine to monitor PHY status.
104 * - Added activity led support for Proliant devices.
105 *
6aa20a22
JG		 106 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers
107 * like the Compaq NetFlex3/E.
1da177e4
LT		 108 * - Rewrote tlan_probe to better handle multiple
109 * bus probes. Probing and device setup is now
110 * done through TLan_Probe and TLan_init_one. Actual
6aa20a22 111 * hardware probe is done with kernel API and
1da177e4
LT		 112 * TLan_EisaProbe.
113 * - Adjusted debug information for probing.
6aa20a22
JG		 114 * - Fixed bug that would cause general debug information
115 * to be printed after driver removal.
1da177e4 116 * - Added transmit timeout handling.
6aa20a22
JG		 117 * - Fixed OOM return values in tlan_probe.
118 * - Fixed possible mem leak in tlan_exit
1da177e4
LT		 119 * (now tlan_remove_one).
120 * - Fixed timer bug in TLan_phyMonitor.
121 * - This driver version is alpha quality, please
122 * send me any bug issues you may encounter.
123 *
6aa20a22 124 * v1.11 Aug 31, 2000 - Do not try to register irq 0 if no irq line was
1da177e4
LT		 125 * set for EISA cards.
126 * - Added support for NetFlex3/E with nibble-rate
127 * 10Base-T PHY. This is untestet as I haven't got
128 * one of these cards.
129 * - Fixed timer being added twice.
130 * - Disabled PhyMonitoring by default as this is
131 * work in progress. Define MONITOR to enable it.
132 * - Now we don't display link info with PHYs that
133 * doesn't support it (level1).
134 * - Incresed tx_timeout beacuse of auto-neg.
135 * - Adjusted timers for forced speeds.
136 *
137 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.)
138 *
139 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues
140 * when link can't be established.
141 * - Added the bbuf option as a kernel parameter.
142 * - Fixed ioaddr probe bug.
143 * - Fixed stupid deadlock with MII interrupts.
6aa20a22 144 * - Added support for speed/duplex selection with
1da177e4
LT		 145 * multiple nics.
146 * - Added partly fix for TX Channel lockup with
147 * TLAN v1.0 silicon. This needs to be investigated
148 * further.
149 *
150 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per.
151 * interrupt. Thanks goes to
152 * Adam Keys <adam@ti.com>
153 * Denis Beaudoin <dbeaudoin@ti.com>
154 * for providing the patch.
155 * - Fixed auto-neg output when using multiple
156 * adapters.
157 * - Converted to use new taskq interface.
158 *
159 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.)
160 *
161 * Samuel Chessman <chessman@tux.org> New Maintainer!
162 *
163 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be
164 * 10T half duplex no loopback
165 * Thanks to Gunnar Eikman
5eeabf51
SA		 166 *
167 * Sakari Ailus <sakari.ailus@iki.fi>:
168 *
169 * v1.15a Dec 15 2008 - Remove bbuf support, it doesn't work anyway.
170 *
1da177e4
LT		 171 *******************************************************************************/
172
173#include <linux/module.h>
174#include <linux/init.h>
175#include <linux/ioport.h>
176#include <linux/eisa.h>
177#include <linux/pci.h>
1e7f0bd8 178#include <linux/dma-mapping.h>
1da177e4
LT		 179#include <linux/netdevice.h>
180#include <linux/etherdevice.h>
181#include <linux/delay.h>
182#include <linux/spinlock.h>
183#include <linux/workqueue.h>
184#include <linux/mii.h>
185
186#include "tlan.h"
187
188typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 );
189
190
191/* For removing EISA devices */
192static struct net_device *TLan_Eisa_Devices;
193
194static int TLanDevicesInstalled;
195
196/* Set speed, duplex and aui settings */
197static int aui[MAX_TLAN_BOARDS];
198static int duplex[MAX_TLAN_BOARDS];
199static int speed[MAX_TLAN_BOARDS];
200static int boards_found;
15efa9bb
SH		 201module_param_array(aui, int, NULL, 0);
202module_param_array(duplex, int, NULL, 0);
203module_param_array(speed, int, NULL, 0);
204MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
205MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
206MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
1da177e4
LT		 207
208MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
209MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
210MODULE_LICENSE("GPL");
211
212
213/* Define this to enable Link beat monitoring */
214#undef MONITOR
215
216/* Turn on debugging. See Documentation/networking/tlan.txt for details */
217static int debug;
15efa9bb
SH		 218module_param(debug, int, 0);
219MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
1da177e4 220
a3ccc789 221static const char TLanSignature[] = "TLAN";
5eeabf51 222static const char tlan_banner[] = "ThunderLAN driver v1.15a\n";
1da177e4
LT		 223static int tlan_have_pci;
224static int tlan_have_eisa;
225
226static const char *media[] = {
6aa20a22 227 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ",
1da177e4
LT		 228 "100baseTx-FD", "100baseT4", NULL
229};
230
231static struct board {
232 const char *deviceLabel;
233 u32 flags;
234 u16 addrOfs;
235} board_info[] = {
236 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
237 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
238 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6
SH		 239 { "Compaq NetFlex-3/P",
240 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4 241 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6
SH		 242 { "Compaq Netelligent Integrated 10/100 TX UTP",
243 TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
1da177e4
LT		 244 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 },
245 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 },
246 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
247 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 },
248 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 },
249 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
250 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6
SH		 251 { "Compaq NetFlex-3/E",
252 TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
253 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4
LT		 254 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
255};
256
257static struct pci_device_id tlan_pci_tbl[] = {
258 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
259 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
260 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
261 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
262 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
263 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
264 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
265 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
266 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
267 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
268 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
269 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
270 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
271 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
272 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
273 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
274 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
275 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
276 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
277 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
278 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
279 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
280 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
281 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
282 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
283 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
284 { 0,}
285};
6aa20a22 286MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
1da177e4
LT		 287
288static void TLan_EisaProbe( void );
289static void TLan_Eisa_Cleanup( void );
290static int TLan_Init( struct net_device * );
291static int TLan_Open( struct net_device *dev );
292static int TLan_StartTx( struct sk_buff *, struct net_device *);
7d12e780 293static irqreturn_t TLan_HandleInterrupt( int, void *);
1da177e4
LT		 294static int TLan_Close( struct net_device *);
295static struct net_device_stats *TLan_GetStats( struct net_device *);
296static void TLan_SetMulticastList( struct net_device *);
297static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd);
dfc2c0a6
SH		 298static int TLan_probe1( struct pci_dev *pdev, long ioaddr,
299 int irq, int rev, const struct pci_device_id *ent);
1da177e4 300static void TLan_tx_timeout( struct net_device *dev);
c4028958 301static void TLan_tx_timeout_work(struct work_struct *work);
1da177e4
LT		 302static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent);
303
1da177e4
LT		 304static u32 TLan_HandleTxEOF( struct net_device *, u16 );
305static u32 TLan_HandleStatOverflow( struct net_device *, u16 );
306static u32 TLan_HandleRxEOF( struct net_device *, u16 );
307static u32 TLan_HandleDummy( struct net_device *, u16 );
308static u32 TLan_HandleTxEOC( struct net_device *, u16 );
309static u32 TLan_HandleStatusCheck( struct net_device *, u16 );
310static u32 TLan_HandleRxEOC( struct net_device *, u16 );
311
312static void TLan_Timer( unsigned long );
313
314static void TLan_ResetLists( struct net_device * );
315static void TLan_FreeLists( struct net_device * );
316static void TLan_PrintDio( u16 );
317static void TLan_PrintList( TLanList *, char *, int );
318static void TLan_ReadAndClearStats( struct net_device *, int );
319static void TLan_ResetAdapter( struct net_device * );
320static void TLan_FinishReset( struct net_device * );
321static void TLan_SetMac( struct net_device *, int areg, char *mac );
322
323static void TLan_PhyPrint( struct net_device * );
324static void TLan_PhyDetect( struct net_device * );
325static void TLan_PhyPowerDown( struct net_device * );
326static void TLan_PhyPowerUp( struct net_device * );
327static void TLan_PhyReset( struct net_device * );
328static void TLan_PhyStartLink( struct net_device * );
329static void TLan_PhyFinishAutoNeg( struct net_device * );
330#ifdef MONITOR
331static void TLan_PhyMonitor( struct net_device * );
332#endif
333
334/*
335static int TLan_PhyNop( struct net_device * );
336static int TLan_PhyInternalCheck( struct net_device * );
337static int TLan_PhyInternalService( struct net_device * );
338static int TLan_PhyDp83840aCheck( struct net_device * );
339*/
340
341static int TLan_MiiReadReg( struct net_device *, u16, u16, u16 * );
342static void TLan_MiiSendData( u16, u32, unsigned );
343static void TLan_MiiSync( u16 );
344static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 );
345
346static void TLan_EeSendStart( u16 );
347static int TLan_EeSendByte( u16, u8, int );
348static void TLan_EeReceiveByte( u16, u8 *, int );
349static int TLan_EeReadByte( struct net_device *, u8, u8 * );
350
351
93e16847 352static inline void
1da177e4
LT		 353TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb)
354{
355 unsigned long addr = (unsigned long)skb;
93e16847
SH		 356 tag->buffer[9].address = addr;
357 tag->buffer[8].address = upper_32_bits(addr);
1da177e4
LT		 358}
359
93e16847
SH		 360static inline struct sk_buff *
361TLan_GetSKB( const struct tlan_list_tag *tag)
1da177e4 362{
93e16847
SH		 363 unsigned long addr;
364
0d63bea2
RF		 365 addr = tag->buffer[9].address;
366 addr |= (tag->buffer[8].address << 16) << 16;
1da177e4
LT		 367 return (struct sk_buff *) addr;
368}
369
370
371static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = {
a3ccc789 372 NULL,
1da177e4
LT		 373 TLan_HandleTxEOF,
374 TLan_HandleStatOverflow,
375 TLan_HandleRxEOF,
376 TLan_HandleDummy,
377 TLan_HandleTxEOC,
378 TLan_HandleStatusCheck,
379 TLan_HandleRxEOC
380};
381
382static inline void
383TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type )
384{
385 TLanPrivateInfo *priv = netdev_priv(dev);
386 unsigned long flags = 0;
6aa20a22 387
1da177e4
LT		 388 if (!in_irq())
389 spin_lock_irqsave(&priv->lock, flags);
390 if ( priv->timer.function != NULL &&
6aa20a22 391 priv->timerType != TLAN_TIMER_ACTIVITY ) {
1da177e4
LT		 392 if (!in_irq())
393 spin_unlock_irqrestore(&priv->lock, flags);
394 return;
395 }
396 priv->timer.function = &TLan_Timer;
397 if (!in_irq())
398 spin_unlock_irqrestore(&priv->lock, flags);
399
400 priv->timer.data = (unsigned long) dev;
401 priv->timerSetAt = jiffies;
402 priv->timerType = type;
403 mod_timer(&priv->timer, jiffies + ticks);
6aa20a22 404
1da177e4
LT		 405} /* TLan_SetTimer */
406
407
408/*****************************************************************************
409******************************************************************************
410
411 ThunderLAN Driver Primary Functions
412
413 These functions are more or less common to all Linux network drivers.
414
415******************************************************************************
416*****************************************************************************/
417
418
419
420
421
422 /***************************************************************
423 * tlan_remove_one
424 *
425 * Returns:
426 * Nothing
427 * Parms:
428 * None
429 *
430 * Goes through the TLanDevices list and frees the device
431 * structs and memory associated with each device (lists
432 * and buffers). It also ureserves the IO port regions
433 * associated with this device.
434 *
435 **************************************************************/
436
437
438static void __devexit tlan_remove_one( struct pci_dev *pdev)
439{
440 struct net_device *dev = pci_get_drvdata( pdev );
441 TLanPrivateInfo *priv = netdev_priv(dev);
6aa20a22 442
1da177e4
LT		 443 unregister_netdev( dev );
444
445 if ( priv->dmaStorage ) {
dfc2c0a6
SH		 446 pci_free_consistent(priv->pciDev,
447 priv->dmaSize, priv->dmaStorage,
448 priv->dmaStorageDMA );
1da177e4
LT		 449 }
450
451#ifdef CONFIG_PCI
452 pci_release_regions(pdev);
453#endif
6aa20a22 454
1da177e4 455 free_netdev( dev );
6aa20a22 456
1da177e4 457 pci_set_drvdata( pdev, NULL );
6aa20a22 458}
1da177e4
LT		 459
460static struct pci_driver tlan_driver = {
461 .name = "tlan",
462 .id_table = tlan_pci_tbl,
463 .probe = tlan_init_one,
6aa20a22 464 .remove = __devexit_p(tlan_remove_one),
1da177e4
LT		 465};
466
467static int __init tlan_probe(void)
468{
6c04a515 469 int rc = -ENODEV;
6aa20a22 470
1da177e4 471 printk(KERN_INFO "%s", tlan_banner);
6aa20a22 472
1da177e4 473 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
6aa20a22 474
1da177e4
LT		 475 /* Use new style PCI probing. Now the kernel will
476 do most of this for us */
6c04a515
LP		 477 rc = pci_register_driver(&tlan_driver);
478
479 if (rc != 0) {
480 printk(KERN_ERR "TLAN: Could not register pci driver.\n");
481 goto err_out_pci_free;
482 }
1da177e4
LT		 483
484 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
485 TLan_EisaProbe();
6aa20a22
JG		 486
487 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n",
1da177e4
LT		 488 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s",
489 tlan_have_pci, tlan_have_eisa);
490
491 if (TLanDevicesInstalled == 0) {
6c04a515
LP		 492 rc = -ENODEV;
493 goto err_out_pci_unreg;
1da177e4
LT		 494 }
495 return 0;
6c04a515
LP		 496
497err_out_pci_unreg:
498 pci_unregister_driver(&tlan_driver);
499err_out_pci_free:
6c04a515 500 return rc;
1da177e4 501}
6aa20a22 502
1da177e4
LT		 503
504static int __devinit tlan_init_one( struct pci_dev *pdev,
505 const struct pci_device_id *ent)
506{
507 return TLan_probe1( pdev, -1, -1, 0, ent);
508}
509
510
511/*
512 ***************************************************************
513 * tlan_probe1
514 *
515 * Returns:
516 * 0 on success, error code on error
6aa20a22 517 * Parms:
1da177e4
LT		 518 * none
519 *
520 * The name is lower case to fit in with all the rest of
6aa20a22 521 * the netcard_probe names. This function looks for
1da177e4
LT		 522 * another TLan based adapter, setting it up with the
523 * allocated device struct if one is found.
524 * tlan_probe has been ported to the new net API and
525 * now allocates its own device structure. This function
526 * is also used by modules.
527 *
528 **************************************************************/
529
6aa20a22 530static int __devinit TLan_probe1(struct pci_dev *pdev,
dfc2c0a6
SH		 531 long ioaddr, int irq, int rev,
532 const struct pci_device_id *ent )
1da177e4
LT		 533{
534
535 struct net_device *dev;
536 TLanPrivateInfo *priv;
1da177e4
LT		 537 u16 device_id;
538 int reg, rc = -ENODEV;
539
ad9f6713 540#ifdef CONFIG_PCI
1da177e4
LT		 541 if (pdev) {
542 rc = pci_enable_device(pdev);
543 if (rc)
544 return rc;
545
546 rc = pci_request_regions(pdev, TLanSignature);
547 if (rc) {
548 printk(KERN_ERR "TLAN: Could not reserve IO regions\n");
549 goto err_out;
550 }
551 }
ad9f6713 552#endif /* CONFIG_PCI */
1da177e4
LT		 553
554 dev = alloc_etherdev(sizeof(TLanPrivateInfo));
555 if (dev == NULL) {
556 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n");
557 rc = -ENOMEM;
558 goto err_out_regions;
559 }
1da177e4 560 SET_NETDEV_DEV(dev, &pdev->dev);
6aa20a22 561
1da177e4
LT		 562 priv = netdev_priv(dev);
563
564 priv->pciDev = pdev;
c4028958 565 priv->dev = dev;
6aa20a22 566
1da177e4
LT		 567 /* Is this a PCI device? */
568 if (pdev) {
569 u32 pci_io_base = 0;
570
571 priv->adapter = &board_info[ent->driver_data];
572
1e7f0bd8 573 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1da177e4
LT		 574 if (rc) {
575 printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n");
576 goto err_out_free_dev;
577 }
578
1da177e4
LT		 579 for ( reg= 0; reg <= 5; reg ++ ) {
580 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
581 pci_io_base = pci_resource_start(pdev, reg);
582 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n",
583 pci_io_base);
584 break;
585 }
586 }
587 if (!pci_io_base) {
588 printk(KERN_ERR "TLAN: No IO mappings available\n");
589 rc = -EIO;
590 goto err_out_free_dev;
591 }
6aa20a22 592
1da177e4
LT		 593 dev->base_addr = pci_io_base;
594 dev->irq = pdev->irq;
44c10138 595 priv->adapterRev = pdev->revision;
1da177e4
LT		 596 pci_set_master(pdev);
597 pci_set_drvdata(pdev, dev);
598
599 } else { /* EISA card */
600 /* This is a hack. We need to know which board structure
601 * is suited for this adapter */
602 device_id = inw(ioaddr + EISA_ID2);
603 priv->is_eisa = 1;
604 if (device_id == 0x20F1) {
605 priv->adapter = &board_info[13]; /* NetFlex-3/E */
606 priv->adapterRev = 23; /* TLAN 2.3 */
607 } else {
608 priv->adapter = &board_info[14];
609 priv->adapterRev = 10; /* TLAN 1.0 */
610 }
611 dev->base_addr = ioaddr;
612 dev->irq = irq;
613 }
614
615 /* Kernel parameters */
616 if (dev->mem_start) {
617 priv->aui = dev->mem_start & 0x01;
dfc2c0a6
SH		 618 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0
619 : (dev->mem_start & 0x06) >> 1;
620 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0
621 : (dev->mem_start & 0x18) >> 3;
6aa20a22 622
1da177e4
LT		 623 if (priv->speed == 0x1) {
624 priv->speed = TLAN_SPEED_10;
625 } else if (priv->speed == 0x2) {
626 priv->speed = TLAN_SPEED_100;
627 }
628 debug = priv->debug = dev->mem_end;
629 } else {
630 priv->aui = aui[boards_found];
631 priv->speed = speed[boards_found];
632 priv->duplex = duplex[boards_found];
633 priv->debug = debug;
634 }
6aa20a22 635
1da177e4
LT		 636 /* This will be used when we get an adapter error from
637 * within our irq handler */
c4028958 638 INIT_WORK(&priv->tlan_tqueue, TLan_tx_timeout_work);
1da177e4
LT		 639
640 spin_lock_init(&priv->lock);
6aa20a22 641
1da177e4
LT		 642 rc = TLan_Init(dev);
643 if (rc) {
644 printk(KERN_ERR "TLAN: Could not set up device.\n");
645 goto err_out_free_dev;
646 }
647
648 rc = register_netdev(dev);
649 if (rc) {
650 printk(KERN_ERR "TLAN: Could not register device.\n");
651 goto err_out_uninit;
652 }
653
6aa20a22 654
1da177e4
LT		 655 TLanDevicesInstalled++;
656 boards_found++;
6aa20a22 657
1da177e4
LT		 658 /* pdev is NULL if this is an EISA device */
659 if (pdev)
660 tlan_have_pci++;
661 else {
662 priv->nextDevice = TLan_Eisa_Devices;
663 TLan_Eisa_Devices = dev;
664 tlan_have_eisa++;
665 }
6aa20a22 666
1da177e4
LT		 667 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n",
668 dev->name,
669 (int) dev->irq,
670 (int) dev->base_addr,
671 priv->adapter->deviceLabel,
672 priv->adapterRev);
673 return 0;
674
675err_out_uninit:
676 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage,
677 priv->dmaStorageDMA );
678err_out_free_dev:
679 free_netdev(dev);
680err_out_regions:
681#ifdef CONFIG_PCI
682 if (pdev)
683 pci_release_regions(pdev);
684#endif
685err_out:
686 if (pdev)
687 pci_disable_device(pdev);
688 return rc;
689}
690
691
692static void TLan_Eisa_Cleanup(void)
693{
694 struct net_device *dev;
695 TLanPrivateInfo *priv;
6aa20a22 696
1da177e4
LT		 697 while( tlan_have_eisa ) {
698 dev = TLan_Eisa_Devices;
699 priv = netdev_priv(dev);
700 if (priv->dmaStorage) {
dfc2c0a6
SH		 701 pci_free_consistent(priv->pciDev, priv->dmaSize,
702 priv->dmaStorage, priv->dmaStorageDMA );
1da177e4
LT		 703 }
704 release_region( dev->base_addr, 0x10);
705 unregister_netdev( dev );
706 TLan_Eisa_Devices = priv->nextDevice;
707 free_netdev( dev );
708 tlan_have_eisa--;
709 }
710}
6aa20a22
JG		 711
712
1da177e4
LT		 713static void __exit tlan_exit(void)
714{
715 pci_unregister_driver(&tlan_driver);
716
717 if (tlan_have_eisa)
718 TLan_Eisa_Cleanup();
719
1da177e4
LT		 720}
721
722
723/* Module loading/unloading */
724module_init(tlan_probe);
725module_exit(tlan_exit);
726
727
728
729 /**************************************************************
730 * TLan_EisaProbe
731 *
732 * Returns: 0 on success, 1 otherwise
733 *
734 * Parms: None
735 *
736 *
6aa20a22
JG		 737 * This functions probes for EISA devices and calls
738 * TLan_probe1 when one is found.
1da177e4
LT		 739 *
740 *************************************************************/
741
6aa20a22 742static void __init TLan_EisaProbe (void)
1da177e4
LT		 743{
744 long ioaddr;
745 int rc = -ENODEV;
746 int irq;
747 u16 device_id;
748
6aa20a22 749 if (!EISA_bus) {
1da177e4
LT		 750 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
751 return;
752 }
6aa20a22 753
1da177e4
LT		 754 /* Loop through all slots of the EISA bus */
755 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
6aa20a22 756
dfc2c0a6
SH		 757 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n",
758 (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
759 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n",
760 (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
1da177e4
LT		 761
762
763 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ",
764 (int) ioaddr);
6aa20a22 765 if (request_region(ioaddr, 0x10, TLanSignature) == NULL)
1da177e4
LT		 766 goto out;
767
6aa20a22 768 if (inw(ioaddr + EISA_ID) != 0x110E) {
1da177e4
LT		 769 release_region(ioaddr, 0x10);
770 goto out;
771 }
6aa20a22 772
1da177e4 773 device_id = inw(ioaddr + EISA_ID2);
6aa20a22 774 if (device_id != 0x20F1 && device_id != 0x40F1) {
1da177e4
LT		 775 release_region (ioaddr, 0x10);
776 goto out;
777 }
6aa20a22 778
1da177e4
LT		 779 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */
780 release_region (ioaddr, 0x10);
781 goto out2;
782 }
6aa20a22
JG		 783
784 if (debug == 0x10)
1da177e4
LT		 785 printk("Found one\n");
786
787
788 /* Get irq from board */
789 switch (inb(ioaddr + 0xCC0)) {
790 case(0x10):
791 irq=5;
792 break;
793 case(0x20):
794 irq=9;
795 break;
796 case(0x40):
797 irq=10;
798 break;
799 case(0x80):
800 irq=11;
801 break;
802 default:
803 goto out;
6aa20a22
JG		 804 }
805
806
1da177e4
LT		 807 /* Setup the newly found eisa adapter */
808 rc = TLan_probe1( NULL, ioaddr, irq,
809 12, NULL);
810 continue;
6aa20a22 811
1da177e4
LT		 812 out:
813 if (debug == 0x10)
814 printk("None found\n");
815 continue;
816
817 out2: if (debug == 0x10)
818 printk("Card found but it is not enabled, skipping\n");
819 continue;
6aa20a22 820
1da177e4
LT		 821 }
822
823} /* TLan_EisaProbe */
824
825#ifdef CONFIG_NET_POLL_CONTROLLER
826static void TLan_Poll(struct net_device *dev)
827{
828 disable_irq(dev->irq);
7d12e780 829 TLan_HandleInterrupt(dev->irq, dev);
1da177e4
LT		 830 enable_irq(dev->irq);
831}
832#endif
833
6aa20a22 834
1da177e4
LT		 835
836
837 /***************************************************************
838 * TLan_Init
839 *
840 * Returns:
841 * 0 on success, error code otherwise.
842 * Parms:
843 * dev The structure of the device to be
844 * init'ed.
845 *
846 * This function completes the initialization of the
847 * device structure and driver. It reserves the IO
848 * addresses, allocates memory for the lists and bounce
849 * buffers, retrieves the MAC address from the eeprom
850 * and assignes the device's methods.
6aa20a22 851 *
1da177e4
LT		 852 **************************************************************/
853
854static int TLan_Init( struct net_device *dev )
855{
856 int dma_size;
857 int err;
858 int i;
859 TLanPrivateInfo *priv;
860
861 priv = netdev_priv(dev);
6aa20a22 862
5eeabf51
SA		 863 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
864 * ( sizeof(TLanList) );
93e16847
SH		 865 priv->dmaStorage = pci_alloc_consistent(priv->pciDev,
866 dma_size, &priv->dmaStorageDMA);
1da177e4 867 priv->dmaSize = dma_size;
6aa20a22 868
1da177e4
LT		 869 if ( priv->dmaStorage == NULL ) {
870 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n",
871 dev->name );
872 return -ENOMEM;
873 }
874 memset( priv->dmaStorage, 0, dma_size );
93e16847
SH		 875 priv->rxList = (TLanList *) ALIGN((unsigned long)priv->dmaStorage, 8);
876 priv->rxListDMA = ALIGN(priv->dmaStorageDMA, 8);
1da177e4
LT		 877 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
878 priv->txListDMA = priv->rxListDMA + sizeof(TLanList) * TLAN_NUM_RX_LISTS;
93e16847 879
1da177e4
LT		 880 err = 0;
881 for ( i = 0; i < 6 ; i++ )
882 err |= TLan_EeReadByte( dev,
883 (u8) priv->adapter->addrOfs + i,
884 (u8 *) &dev->dev_addr[i] );
885 if ( err ) {
886 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n",
887 dev->name,
888 err );
889 }
890 dev->addr_len = 6;
891
892 netif_carrier_off(dev);
893
894 /* Device methods */
895 dev->open = &TLan_Open;
896 dev->hard_start_xmit = &TLan_StartTx;
897 dev->stop = &TLan_Close;
898 dev->get_stats = &TLan_GetStats;
899 dev->set_multicast_list = &TLan_SetMulticastList;
900 dev->do_ioctl = &TLan_ioctl;
901#ifdef CONFIG_NET_POLL_CONTROLLER
902 dev->poll_controller = &TLan_Poll;
903#endif
904 dev->tx_timeout = &TLan_tx_timeout;
905 dev->watchdog_timeo = TX_TIMEOUT;
906
907 return 0;
908
909} /* TLan_Init */
910
911
912
913
914 /***************************************************************
915 * TLan_Open
916 *
917 * Returns:
918 * 0 on success, error code otherwise.
919 * Parms:
920 * dev Structure of device to be opened.
921 *
922 * This routine puts the driver and TLAN adapter in a
923 * state where it is ready to send and receive packets.
924 * It allocates the IRQ, resets and brings the adapter
925 * out of reset, and allows interrupts. It also delays
926 * the startup for autonegotiation or sends a Rx GO
927 * command to the adapter, as appropriate.
928 *
929 **************************************************************/
930
931static int TLan_Open( struct net_device *dev )
932{
933 TLanPrivateInfo *priv = netdev_priv(dev);
934 int err;
6aa20a22 935
1da177e4 936 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
a3ccc789
SH		 937 err = request_irq( dev->irq, TLan_HandleInterrupt, IRQF_SHARED,
938 dev->name, dev );
6aa20a22 939
1da177e4 940 if ( err ) {
dfc2c0a6
SH		 941 pr_err("TLAN: Cannot open %s because IRQ %d is already in use.\n",
942 dev->name, dev->irq );
1da177e4
LT		 943 return err;
944 }
6aa20a22 945
1da177e4
LT		 946 init_timer(&priv->timer);
947 netif_start_queue(dev);
6aa20a22 948
1da177e4
LT		 949 /* NOTE: It might not be necessary to read the stats before a
950 reset if you don't care what the values are.
951 */
952 TLan_ResetLists( dev );
953 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
954 TLan_ResetAdapter( dev );
955
dfc2c0a6
SH		 956 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n",
957 dev->name, priv->tlanRev );
1da177e4
LT		 958
959 return 0;
960
961} /* TLan_Open */
962
963
964
965 /**************************************************************
966 * TLan_ioctl
6aa20a22 967 *
1da177e4
LT		 968 * Returns:
969 * 0 on success, error code otherwise
970 * Params:
971 * dev structure of device to receive ioctl.
6aa20a22 972 *
1da177e4
LT		 973 * rq ifreq structure to hold userspace data.
974 *
975 * cmd ioctl command.
976 *
977 *
978 *************************************************************/
979
980static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
981{
982 TLanPrivateInfo *priv = netdev_priv(dev);
983 struct mii_ioctl_data *data = if_mii(rq);
984 u32 phy = priv->phy[priv->phyNum];
6aa20a22 985
1da177e4
LT		 986 if (!priv->phyOnline)
987 return -EAGAIN;
988
989 switch(cmd) {
990 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
991 data->phy_id = phy;
992
993
994 case SIOCGMIIREG: /* Read MII PHY register. */
dfc2c0a6
SH		 995 TLan_MiiReadReg(dev, data->phy_id & 0x1f,
996 data->reg_num & 0x1f, &data->val_out);
1da177e4 997 return 0;
6aa20a22 998
1da177e4
LT		 999
1000 case SIOCSMIIREG: /* Write MII PHY register. */
1001 if (!capable(CAP_NET_ADMIN))
1002 return -EPERM;
dfc2c0a6
SH		 1003 TLan_MiiWriteReg(dev, data->phy_id & 0x1f,
1004 data->reg_num & 0x1f, data->val_in);
1da177e4
LT		 1005 return 0;
1006 default:
1007 return -EOPNOTSUPP;
1008 }
1009} /* tlan_ioctl */
1010
1011
1012 /***************************************************************
1013 * TLan_tx_timeout
1014 *
1015 * Returns: nothing
1016 *
1017 * Params:
6aa20a22 1018 * dev structure of device which timed out
1da177e4
LT		 1019 * during transmit.
1020 *
1021 **************************************************************/
1022
1023static void TLan_tx_timeout(struct net_device *dev)
1024{
6aa20a22 1025
1da177e4 1026 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
6aa20a22 1027
1da177e4
LT		 1028 /* Ok so we timed out, lets see what we can do about it...*/
1029 TLan_FreeLists( dev );
6aa20a22 1030 TLan_ResetLists( dev );
1da177e4
LT		 1031 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
1032 TLan_ResetAdapter( dev );
1033 dev->trans_start = jiffies;
6aa20a22 1034 netif_wake_queue( dev );
1da177e4
LT		 1035
1036}
6aa20a22 1037
1da177e4 1038
c4028958
DH		 1039 /***************************************************************
1040 * TLan_tx_timeout_work
1041 *
1042 * Returns: nothing
1043 *
1044 * Params:
1045 * work work item of device which timed out
1046 *
1047 **************************************************************/
1048
1049static void TLan_tx_timeout_work(struct work_struct *work)
1050{
1051 TLanPrivateInfo *priv =
1052 container_of(work, TLanPrivateInfo, tlan_tqueue);
1053
1054 TLan_tx_timeout(priv->dev);
1055}
1056
1057
1da177e4
LT		 1058
1059 /***************************************************************
1060 * TLan_StartTx
6aa20a22 1061 *
1da177e4
LT		 1062 * Returns:
1063 * 0 on success, non-zero on failure.
1064 * Parms:
1065 * skb A pointer to the sk_buff containing the
1066 * frame to be sent.
1067 * dev The device to send the data on.
1068 *
1069 * This function adds a frame to the Tx list to be sent
1070 * ASAP. First it verifies that the adapter is ready and
1071 * there is room in the queue. Then it sets up the next
1072 * available list, copies the frame to the corresponding
1073 * buffer. If the adapter Tx channel is idle, it gives
1074 * the adapter a Tx Go command on the list, otherwise it
1075 * sets the forward address of the previous list to point
1076 * to this one. Then it frees the sk_buff.
1077 *
1078 **************************************************************/
1079
1080static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1081{
1082 TLanPrivateInfo *priv = netdev_priv(dev);
1da177e4 1083 dma_addr_t tail_list_phys;
5eeabf51 1084 TLanList *tail_list;
1da177e4 1085 unsigned long flags;
8953f128 1086 unsigned int txlen;
1da177e4
LT		 1087
1088 if ( ! priv->phyOnline ) {
dfc2c0a6
SH		 1089 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n",
1090 dev->name );
1da177e4
LT		 1091 dev_kfree_skb_any(skb);
1092 return 0;
1093 }
1094
41873e9a
SH		 1095 if (skb_padto(skb, TLAN_MIN_FRAME_SIZE))
1096 return 0;
8953f128 1097 txlen = max(skb->len, (unsigned int)TLAN_MIN_FRAME_SIZE);
41873e9a 1098
1da177e4
LT		 1099 tail_list = priv->txList + priv->txTail;
1100 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail;
6aa20a22 1101
1da177e4 1102 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
dfc2c0a6
SH		 1103 TLAN_DBG( TLAN_DEBUG_TX,
1104 "TRANSMIT: %s is busy (Head=%d Tail=%d)\n",
1105 dev->name, priv->txHead, priv->txTail );
1da177e4
LT		 1106 netif_stop_queue(dev);
1107 priv->txBusyCount++;
1108 return 1;
1109 }
1110
1111 tail_list->forward = 0;
1112
5eeabf51
SA		 1113 tail_list->buffer[0].address = pci_map_single(priv->pciDev,
1114 skb->data, txlen,
1115 PCI_DMA_TODEVICE);
1116 TLan_StoreSKB(tail_list, skb);
1da177e4 1117
8953f128
SA		 1118 tail_list->frameSize = (u16) txlen;
1119 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) txlen;
41873e9a
SH		 1120 tail_list->buffer[1].count = 0;
1121 tail_list->buffer[1].address = 0;
1da177e4
LT		 1122
1123 spin_lock_irqsave(&priv->lock, flags);
1124 tail_list->cStat = TLAN_CSTAT_READY;
1125 if ( ! priv->txInProgress ) {
1126 priv->txInProgress = 1;
dfc2c0a6
SH		 1127 TLAN_DBG( TLAN_DEBUG_TX,
1128 "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
1da177e4
LT		 1129 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM );
1130 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD );
1131 } else {
dfc2c0a6
SH		 1132 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n",
1133 priv->txTail );
1da177e4 1134 if ( priv->txTail == 0 ) {
dfc2c0a6
SH		 1135 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward
1136 = tail_list_phys;
1da177e4 1137 } else {
dfc2c0a6
SH		 1138 ( priv->txList + ( priv->txTail - 1 ) )->forward
1139 = tail_list_phys;
1da177e4
LT		 1140 }
1141 }
1142 spin_unlock_irqrestore(&priv->lock, flags);
1143
1144 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
1145
1da177e4
LT		 1146 dev->trans_start = jiffies;
1147 return 0;
1148
1149} /* TLan_StartTx */
1150
1151
1152
1153
1154 /***************************************************************
1155 * TLan_HandleInterrupt
6aa20a22
JG		 1156 *
1157 * Returns:
1da177e4
LT		 1158 * Nothing
1159 * Parms:
1160 * irq The line on which the interrupt
1161 * occurred.
1162 * dev_id A pointer to the device assigned to
1163 * this irq line.
1da177e4
LT		 1164 *
1165 * This function handles an interrupt generated by its
1166 * assigned TLAN adapter. The function deactivates
1167 * interrupts on its adapter, records the type of
1168 * interrupt, executes the appropriate subhandler, and
1169 * acknowdges the interrupt to the adapter (thus
1170 * re-enabling adapter interrupts.
1171 *
1172 **************************************************************/
1173
7d12e780 1174static irqreturn_t TLan_HandleInterrupt(int irq, void *dev_id)
1da177e4 1175{
a3ccc789
SH		 1176 struct net_device *dev = dev_id;
1177 TLanPrivateInfo *priv = netdev_priv(dev);
1da177e4 1178 u16 host_int;
a3ccc789 1179 u16 type;
1da177e4
LT		 1180
1181 spin_lock(&priv->lock);
1182
1183 host_int = inw( dev->base_addr + TLAN_HOST_INT );
1da177e4 1184 type = ( host_int & TLAN_HI_IT_MASK ) >> 2;
a3ccc789
SH		 1185 if ( type ) {
1186 u32 ack;
1187 u32 host_cmd;
1da177e4 1188
a3ccc789
SH		 1189 outw( host_int, dev->base_addr + TLAN_HOST_INT );
1190 ack = TLanIntVector[type]( dev, host_int );
1da177e4 1191
a3ccc789
SH		 1192 if ( ack ) {
1193 host_cmd = TLAN_HC_ACK | ack | ( type << 18 );
1194 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD );
1195 }
1da177e4
LT		 1196 }
1197
1198 spin_unlock(&priv->lock);
1199
a3ccc789 1200 return IRQ_RETVAL(type);
1da177e4
LT		 1201} /* TLan_HandleInterrupts */
1202
1203
1204
1205
1206 /***************************************************************
1207 * TLan_Close
6aa20a22 1208 *
1da177e4
LT		 1209 * Returns:
1210 * An error code.
1211 * Parms:
1212 * dev The device structure of the device to
1213 * close.
1214 *
1215 * This function shuts down the adapter. It records any
1216 * stats, puts the adapter into reset state, deactivates
1217 * its time as needed, and frees the irq it is using.
1218 *
1219 **************************************************************/
1220
1221static int TLan_Close(struct net_device *dev)
1222{
1223 TLanPrivateInfo *priv = netdev_priv(dev);
1224
1225 netif_stop_queue(dev);
1226 priv->neg_be_verbose = 0;
1227
1228 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1229 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1230 if ( priv->timer.function != NULL ) {
1231 del_timer_sync( &priv->timer );
1232 priv->timer.function = NULL;
1233 }
6aa20a22 1234
1da177e4
LT		 1235 free_irq( dev->irq, dev );
1236 TLan_FreeLists( dev );
1237 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name );
1238
1239 return 0;
1240
1241} /* TLan_Close */
1242
1243
1244
1245
1246 /***************************************************************
1247 * TLan_GetStats
6aa20a22 1248 *
1da177e4
LT		 1249 * Returns:
1250 * A pointer to the device's statistics structure.
1251 * Parms:
1252 * dev The device structure to return the
1253 * stats for.
1254 *
1255 * This function updates the devices statistics by reading
1256 * the TLAN chip's onboard registers. Then it returns the
1257 * address of the statistics structure.
1258 *
1259 **************************************************************/
1260
1261static struct net_device_stats *TLan_GetStats( struct net_device *dev )
1262{
1263 TLanPrivateInfo *priv = netdev_priv(dev);
1264 int i;
1265
1266 /* Should only read stats if open ? */
1267 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1268
dfc2c0a6
SH		 1269 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name,
1270 priv->rxEocCount );
1271 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name,
1272 priv->txBusyCount );
1da177e4
LT		 1273 if ( debug & TLAN_DEBUG_GNRL ) {
1274 TLan_PrintDio( dev->base_addr );
6aa20a22 1275 TLan_PhyPrint( dev );
1da177e4
LT		 1276 }
1277 if ( debug & TLAN_DEBUG_LIST ) {
1278 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ )
1279 TLan_PrintList( priv->rxList + i, "RX", i );
1280 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ )
1281 TLan_PrintList( priv->txList + i, "TX", i );
1282 }
6aa20a22 1283
f8f31544 1284 return &dev->stats;
1da177e4
LT		 1285
1286} /* TLan_GetStats */
1287
1288
1289
1290
1291 /***************************************************************
1292 * TLan_SetMulticastList
6aa20a22 1293 *
1da177e4
LT		 1294 * Returns:
1295 * Nothing
1296 * Parms:
1297 * dev The device structure to set the
1298 * multicast list for.
1299 *
1300 * This function sets the TLAN adaptor to various receive
1301 * modes. If the IFF_PROMISC flag is set, promiscuous
1302 * mode is acitviated. Otherwise, promiscuous mode is
1303 * turned off. If the IFF_ALLMULTI flag is set, then
1304 * the hash table is set to receive all group addresses.
1305 * Otherwise, the first three multicast addresses are
1306 * stored in AREG_1-3, and the rest are selected via the
1307 * hash table, as necessary.
1308 *
1309 **************************************************************/
1310
1311static void TLan_SetMulticastList( struct net_device *dev )
6aa20a22 1312{
1da177e4
LT		 1313 struct dev_mc_list *dmi = dev->mc_list;
1314 u32 hash1 = 0;
1315 u32 hash2 = 0;
1316 int i;
1317 u32 offset;
1318 u8 tmp;
1319
1320 if ( dev->flags & IFF_PROMISC ) {
1321 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
dfc2c0a6
SH		 1322 TLan_DioWrite8( dev->base_addr,
1323 TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1da177e4
LT		 1324 } else {
1325 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
dfc2c0a6
SH		 1326 TLan_DioWrite8( dev->base_addr,
1327 TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1da177e4 1328 if ( dev->flags & IFF_ALLMULTI ) {
6aa20a22 1329 for ( i = 0; i < 3; i++ )
1da177e4
LT		 1330 TLan_SetMac( dev, i + 1, NULL );
1331 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF );
1332 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF );
1333 } else {
1334 for ( i = 0; i < dev->mc_count; i++ ) {
1335 if ( i < 3 ) {
dfc2c0a6
SH		 1336 TLan_SetMac( dev, i + 1,
1337 (char *) &dmi->dmi_addr );
1da177e4
LT		 1338 } else {
1339 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
6aa20a22 1340 if ( offset < 32 )
1da177e4
LT		 1341 hash1 |= ( 1 << offset );
1342 else
1343 hash2 |= ( 1 << ( offset - 32 ) );
1344 }
1345 dmi = dmi->next;
1346 }
6aa20a22 1347 for ( ; i < 3; i++ )
1da177e4
LT		 1348 TLan_SetMac( dev, i + 1, NULL );
1349 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 );
1350 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 );
1351 }
1352 }
1353
1354} /* TLan_SetMulticastList */
1355
1356
1357
1358/*****************************************************************************
1359******************************************************************************
1360
1361 ThunderLAN Driver Interrupt Vectors and Table
1362
1363 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN
1364 Programmer's Guide" for more informations on handling interrupts
6aa20a22 1365 generated by TLAN based adapters.
1da177e4
LT		 1366
1367******************************************************************************
1368*****************************************************************************/
1369
1370
1da177e4
LT		 1371
1372
1373 /***************************************************************
1374 * TLan_HandleTxEOF
1375 *
1376 * Returns:
1377 * 1
1378 * Parms:
1379 * dev Device assigned the IRQ that was
1380 * raised.
1381 * host_int The contents of the HOST_INT
1382 * port.
1383 *
1384 * This function handles Tx EOF interrupts which are raised
1385 * by the adapter when it has completed sending the
1386 * contents of a buffer. If detemines which list/buffer
1387 * was completed and resets it. If the buffer was the last
1388 * in the channel (EOC), then the function checks to see if
1389 * another buffer is ready to send, and if so, sends a Tx
1390 * Go command. Finally, the driver activates/continues the
1391 * activity LED.
1392 *
1393 **************************************************************/
1394
98e0f521 1395static u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1da177e4
LT		 1396{
1397 TLanPrivateInfo *priv = netdev_priv(dev);
1398 int eoc = 0;
1399 TLanList *head_list;
1400 dma_addr_t head_list_phys;
1401 u32 ack = 0;
1402 u16 tmpCStat;
6aa20a22 1403
dfc2c0a6
SH		 1404 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n",
1405 priv->txHead, priv->txTail );
1da177e4
LT		 1406 head_list = priv->txList + priv->txHead;
1407
1408 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
5eeabf51
SA		 1409 struct sk_buff *skb = TLan_GetSKB(head_list);
1410
1da177e4 1411 ack++;
5eeabf51
SA		 1412 pci_unmap_single(priv->pciDev, head_list->buffer[0].address,
1413 max(skb->len,
1414 (unsigned int)TLAN_MIN_FRAME_SIZE),
1415 PCI_DMA_TODEVICE);
1416 dev_kfree_skb_any(skb);
1417 head_list->buffer[8].address = 0;
1418 head_list->buffer[9].address = 0;
6aa20a22 1419
1da177e4
LT		 1420 if ( tmpCStat & TLAN_CSTAT_EOC )
1421 eoc = 1;
6aa20a22 1422
f8f31544 1423 dev->stats.tx_bytes += head_list->frameSize;
1da177e4
LT		 1424
1425 head_list->cStat = TLAN_CSTAT_UNUSED;
6aa20a22
JG		 1426 netif_start_queue(dev);
1427 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
1da177e4
LT		 1428 head_list = priv->txList + priv->txHead;
1429 }
1430
1431 if (!ack)
1432 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n");
6aa20a22 1433
1da177e4 1434 if ( eoc ) {
dfc2c0a6
SH		 1435 TLAN_DBG( TLAN_DEBUG_TX,
1436 "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n",
1437 priv->txHead, priv->txTail );
1da177e4
LT		 1438 head_list = priv->txList + priv->txHead;
1439 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1440 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1441 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1442 ack |= TLAN_HC_GO;
1443 } else {
1444 priv->txInProgress = 0;
1445 }
1446 }
6aa20a22 1447
1da177e4 1448 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
dfc2c0a6
SH		 1449 TLan_DioWrite8( dev->base_addr,
1450 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1da177e4
LT		 1451 if ( priv->timer.function == NULL ) {
1452 priv->timer.function = &TLan_Timer;
1453 priv->timer.data = (unsigned long) dev;
1454 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1455 priv->timerSetAt = jiffies;
1456 priv->timerType = TLAN_TIMER_ACTIVITY;
1457 add_timer(&priv->timer);
1458 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1459 priv->timerSetAt = jiffies;
1460 }
1461 }
1462
1463 return ack;
1464
1465} /* TLan_HandleTxEOF */
1466
1467
1468
1469
1470 /***************************************************************
1471 * TLan_HandleStatOverflow
1472 *
1473 * Returns:
1474 * 1
1475 * Parms:
1476 * dev Device assigned the IRQ that was
1477 * raised.
1478 * host_int The contents of the HOST_INT
1479 * port.
1480 *
1481 * This function handles the Statistics Overflow interrupt
1482 * which means that one or more of the TLAN statistics
1483 * registers has reached 1/2 capacity and needs to be read.
1484 *
1485 **************************************************************/
1486
98e0f521 1487static u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
1da177e4
LT		 1488{
1489 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1490
1491 return 1;
1492
1493} /* TLan_HandleStatOverflow */
1494
1495
1496
1497
1498 /***************************************************************
1499 * TLan_HandleRxEOF
1500 *
1501 * Returns:
1502 * 1
1503 * Parms:
1504 * dev Device assigned the IRQ that was
1505 * raised.
1506 * host_int The contents of the HOST_INT
1507 * port.
1508 *
1509 * This function handles the Rx EOF interrupt which
1510 * indicates a frame has been received by the adapter from
1511 * the net and the frame has been transferred to memory.
1512 * The function determines the bounce buffer the frame has
1513 * been loaded into, creates a new sk_buff big enough to
1514 * hold the frame, and sends it to protocol stack. It
1515 * then resets the used buffer and appends it to the end
1516 * of the list. If the frame was the last in the Rx
1517 * channel (EOC), the function restarts the receive channel
1518 * by sending an Rx Go command to the adapter. Then it
1519 * activates/continues the activity LED.
1520 *
1521 **************************************************************/
1522
98e0f521 1523static u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1da177e4
LT		 1524{
1525 TLanPrivateInfo *priv = netdev_priv(dev);
1526 u32 ack = 0;
1527 int eoc = 0;
1da177e4
LT		 1528 TLanList *head_list;
1529 struct sk_buff *skb;
1530 TLanList *tail_list;
1da177e4
LT		 1531 u16 tmpCStat;
1532 dma_addr_t head_list_phys;
1533
dfc2c0a6
SH		 1534 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n",
1535 priv->rxHead, priv->rxTail );
1da177e4
LT		 1536 head_list = priv->rxList + priv->rxHead;
1537 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
6aa20a22 1538
1da177e4 1539 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
9ded65a1
SH		 1540 dma_addr_t frameDma = head_list->buffer[0].address;
1541 u32 frameSize = head_list->frameSize;
5eeabf51
SA		 1542 struct sk_buff *new_skb;
1543
1da177e4
LT		 1544 ack++;
1545 if (tmpCStat & TLAN_CSTAT_EOC)
1546 eoc = 1;
6aa20a22 1547
5eeabf51
SA		 1548 new_skb = netdev_alloc_skb(dev, TLAN_MAX_FRAME_SIZE + 7 );
1549 if ( !new_skb )
1550 goto drop_and_reuse;
6aa20a22 1551
5eeabf51
SA		 1552 skb = TLan_GetSKB(head_list);
1553 pci_unmap_single(priv->pciDev, frameDma,
1554 TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1555 skb_put( skb, frameSize );
1da177e4 1556
5eeabf51 1557 dev->stats.rx_bytes += frameSize;
1da177e4 1558
5eeabf51
SA		 1559 skb->protocol = eth_type_trans( skb, dev );
1560 netif_rx( skb );
6aa20a22 1561
5eeabf51
SA		 1562 skb_reserve( new_skb, NET_IP_ALIGN );
1563 head_list->buffer[0].address = pci_map_single(priv->pciDev,
1564 new_skb->data,
1565 TLAN_MAX_FRAME_SIZE,
1566 PCI_DMA_FROMDEVICE);
93e16847 1567
5eeabf51 1568 TLan_StoreSKB(head_list, new_skb);
dfc2c0a6 1569drop_and_reuse:
1da177e4
LT		 1570 head_list->forward = 0;
1571 head_list->cStat = 0;
1572 tail_list = priv->rxList + priv->rxTail;
1573 tail_list->forward = head_list_phys;
1574
1575 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
1576 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
1577 head_list = priv->rxList + priv->rxHead;
1578 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1579 }
1580
1581 if (!ack)
1582 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n");
1da177e4
LT		 1583
1584
6aa20a22 1585 if ( eoc ) {
dfc2c0a6
SH		 1586 TLAN_DBG( TLAN_DEBUG_RX,
1587 "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n",
1588 priv->rxHead, priv->rxTail );
1da177e4
LT		 1589 head_list = priv->rxList + priv->rxHead;
1590 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1591 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1592 ack |= TLAN_HC_GO | TLAN_HC_RT;
1593 priv->rxEocCount++;
1594 }
1595
1596 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
dfc2c0a6
SH		 1597 TLan_DioWrite8( dev->base_addr,
1598 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1da177e4
LT		 1599 if ( priv->timer.function == NULL ) {
1600 priv->timer.function = &TLan_Timer;
1601 priv->timer.data = (unsigned long) dev;
1602 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1603 priv->timerSetAt = jiffies;
1604 priv->timerType = TLAN_TIMER_ACTIVITY;
1605 add_timer(&priv->timer);
1606 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1607 priv->timerSetAt = jiffies;
1608 }
1609 }
1610
1da177e4
LT		 1611 return ack;
1612
1613} /* TLan_HandleRxEOF */
1614
1615
1616
1617
1618 /***************************************************************
1619 * TLan_HandleDummy
1620 *
1621 * Returns:
1622 * 1
1623 * Parms:
1624 * dev Device assigned the IRQ that was
1625 * raised.
1626 * host_int The contents of the HOST_INT
1627 * port.
1628 *
1629 * This function handles the Dummy interrupt, which is
1630 * raised whenever a test interrupt is generated by setting
1631 * the Req_Int bit of HOST_CMD to 1.
1632 *
1633 **************************************************************/
1634
98e0f521 1635static u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
1da177e4
LT		 1636{
1637 printk( "TLAN: Test interrupt on %s.\n", dev->name );
1638 return 1;
1639
1640} /* TLan_HandleDummy */
1641
1642
1643
1644
1645 /***************************************************************
1646 * TLan_HandleTxEOC
1647 *
1648 * Returns:
1649 * 1
1650 * Parms:
1651 * dev Device assigned the IRQ that was
1652 * raised.
1653 * host_int The contents of the HOST_INT
1654 * port.
1655 *
1656 * This driver is structured to determine EOC occurrences by
1657 * reading the CSTAT member of the list structure. Tx EOC
1658 * interrupts are disabled via the DIO INTDIS register.
1659 * However, TLAN chips before revision 3.0 didn't have this
1660 * functionality, so process EOC events if this is the
1661 * case.
1662 *
1663 **************************************************************/
1664
98e0f521 1665static u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
1da177e4
LT		 1666{
1667 TLanPrivateInfo *priv = netdev_priv(dev);
1668 TLanList *head_list;
1669 dma_addr_t head_list_phys;
1670 u32 ack = 1;
6aa20a22 1671
1da177e4
LT		 1672 host_int = 0;
1673 if ( priv->tlanRev < 0x30 ) {
dfc2c0a6
SH		 1674 TLAN_DBG( TLAN_DEBUG_TX,
1675 "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n",
1676 priv->txHead, priv->txTail );
1da177e4
LT		 1677 head_list = priv->txList + priv->txHead;
1678 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1679 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1680 netif_stop_queue(dev);
1681 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1682 ack |= TLAN_HC_GO;
1683 } else {
1684 priv->txInProgress = 0;
1685 }
1686 }
1687
1688 return ack;
1689
1690} /* TLan_HandleTxEOC */
1691
1692
1693
1694
1695 /***************************************************************
1696 * TLan_HandleStatusCheck
1697 *
1698 * Returns:
1699 * 0 if Adapter check, 1 if Network Status check.
1700 * Parms:
1701 * dev Device assigned the IRQ that was
1702 * raised.
1703 * host_int The contents of the HOST_INT
1704 * port.
1705 *
1706 * This function handles Adapter Check/Network Status
1707 * interrupts generated by the adapter. It checks the
1708 * vector in the HOST_INT register to determine if it is
1709 * an Adapter Check interrupt. If so, it resets the
1710 * adapter. Otherwise it clears the status registers
1711 * and services the PHY.
1712 *
1713 **************************************************************/
1714
98e0f521 1715static u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
6aa20a22 1716{
1da177e4
LT		 1717 TLanPrivateInfo *priv = netdev_priv(dev);
1718 u32 ack;
1719 u32 error;
1720 u8 net_sts;
1721 u32 phy;
1722 u16 tlphy_ctl;
1723 u16 tlphy_sts;
6aa20a22 1724
1da177e4
LT		 1725 ack = 1;
1726 if ( host_int & TLAN_HI_IV_MASK ) {
1727 netif_stop_queue( dev );
1728 error = inl( dev->base_addr + TLAN_CH_PARM );
1729 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error );
1730 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1731 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1732
1733 schedule_work(&priv->tlan_tqueue);
1734
1735 netif_wake_queue(dev);
1736 ack = 0;
1737 } else {
1738 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name );
1739 phy = priv->phy[priv->phyNum];
1740
1741 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1742 if ( net_sts ) {
1743 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
dfc2c0a6
SH		 1744 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n",
1745 dev->name, (unsigned) net_sts );
1da177e4
LT		 1746 }
1747 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1748 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1749 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
dfc2c0a6
SH		 1750 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) &&
1751 ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1da177e4
LT		 1752 tlphy_ctl |= TLAN_TC_SWAPOL;
1753 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
dfc2c0a6
SH		 1754 } else if ( ( tlphy_sts & TLAN_TS_POLOK )
1755 && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1da177e4
LT		 1756 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1757 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1758 }
1759
1760 if (debug) {
6aa20a22 1761 TLan_PhyPrint( dev );
1da177e4
LT		 1762 }
1763 }
1764 }
1765
1766 return ack;
1767
1768} /* TLan_HandleStatusCheck */
1769
1770
1771
1772
1773 /***************************************************************
1774 * TLan_HandleRxEOC
1775 *
1776 * Returns:
1777 * 1
1778 * Parms:
1779 * dev Device assigned the IRQ that was
1780 * raised.
1781 * host_int The contents of the HOST_INT
1782 * port.
1783 *
1784 * This driver is structured to determine EOC occurrences by
1785 * reading the CSTAT member of the list structure. Rx EOC
1786 * interrupts are disabled via the DIO INTDIS register.
1787 * However, TLAN chips before revision 3.0 didn't have this
1788 * CSTAT member or a INTDIS register, so if this chip is
1789 * pre-3.0, process EOC interrupts normally.
1790 *
1791 **************************************************************/
1792
98e0f521 1793static u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1da177e4
LT		 1794{
1795 TLanPrivateInfo *priv = netdev_priv(dev);
1796 dma_addr_t head_list_phys;
1797 u32 ack = 1;
1798
1799 if ( priv->tlanRev < 0x30 ) {
dfc2c0a6
SH		 1800 TLAN_DBG( TLAN_DEBUG_RX,
1801 "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n",
1802 priv->rxHead, priv->rxTail );
1da177e4
LT		 1803 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1804 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1805 ack |= TLAN_HC_GO | TLAN_HC_RT;
1806 priv->rxEocCount++;
1807 }
1808
1809 return ack;
1810
1811} /* TLan_HandleRxEOC */
1812
1813
1814
1815
1816/*****************************************************************************
1817******************************************************************************
1818
1819 ThunderLAN Driver Timer Function
1820
1821******************************************************************************
1822*****************************************************************************/
1823
1824
1825 /***************************************************************
1826 * TLan_Timer
1827 *
1828 * Returns:
1829 * Nothing
1830 * Parms:
1831 * data A value given to add timer when
1832 * add_timer was called.
1833 *
1834 * This function handles timed functionality for the
1835 * TLAN driver. The two current timer uses are for
1836 * delaying for autonegotionation and driving the ACT LED.
1837 * - Autonegotiation requires being allowed about
1838 * 2 1/2 seconds before attempting to transmit a
1839 * packet. It would be a very bad thing to hang
1840 * the kernel this long, so the driver doesn't
1841 * allow transmission 'til after this time, for
1842 * certain PHYs. It would be much nicer if all
1843 * PHYs were interrupt-capable like the internal
1844 * PHY.
1845 * - The ACT LED, which shows adapter activity, is
1846 * driven by the driver, and so must be left on
1847 * for a short period to power up the LED so it
1848 * can be seen. This delay can be changed by
1849 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1850 * if desired. 100 ms produces a slightly
1851 * sluggish response.
1852 *
1853 **************************************************************/
1854
98e0f521 1855static void TLan_Timer( unsigned long data )
1da177e4
LT		 1856{
1857 struct net_device *dev = (struct net_device *) data;
1858 TLanPrivateInfo *priv = netdev_priv(dev);
1859 u32 elapsed;
1860 unsigned long flags = 0;
1861
1862 priv->timer.function = NULL;
1863
1864 switch ( priv->timerType ) {
6aa20a22 1865#ifdef MONITOR
1da177e4
LT		 1866 case TLAN_TIMER_LINK_BEAT:
1867 TLan_PhyMonitor( dev );
1868 break;
1869#endif
1870 case TLAN_TIMER_PHY_PDOWN:
1871 TLan_PhyPowerDown( dev );
1872 break;
1873 case TLAN_TIMER_PHY_PUP:
1874 TLan_PhyPowerUp( dev );
1875 break;
1876 case TLAN_TIMER_PHY_RESET:
1877 TLan_PhyReset( dev );
1878 break;
1879 case TLAN_TIMER_PHY_START_LINK:
1880 TLan_PhyStartLink( dev );
1881 break;
1882 case TLAN_TIMER_PHY_FINISH_AN:
1883 TLan_PhyFinishAutoNeg( dev );
1884 break;
1885 case TLAN_TIMER_FINISH_RESET:
1886 TLan_FinishReset( dev );
1887 break;
1888 case TLAN_TIMER_ACTIVITY:
1889 spin_lock_irqsave(&priv->lock, flags);
1890 if ( priv->timer.function == NULL ) {
1891 elapsed = jiffies - priv->timerSetAt;
1892 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
dfc2c0a6
SH		 1893 TLan_DioWrite8( dev->base_addr,
1894 TLAN_LED_REG, TLAN_LED_LINK );
1da177e4
LT		 1895 } else {
1896 priv->timer.function = &TLan_Timer;
dfc2c0a6
SH		 1897 priv->timer.expires = priv->timerSetAt
1898 + TLAN_TIMER_ACT_DELAY;
1da177e4
LT		 1899 spin_unlock_irqrestore(&priv->lock, flags);
1900 add_timer( &priv->timer );
1901 break;
1902 }
1903 }
1904 spin_unlock_irqrestore(&priv->lock, flags);
1905 break;
1906 default:
1907 break;
1908 }
1909
1910} /* TLan_Timer */
1911
1912
1913
1914
1915/*****************************************************************************
1916******************************************************************************
1917
1918 ThunderLAN Driver Adapter Related Routines
1919
1920******************************************************************************
1921*****************************************************************************/
1922
1923
1924 /***************************************************************
1925 * TLan_ResetLists
6aa20a22 1926 *
1da177e4
LT		 1927 * Returns:
1928 * Nothing
1929 * Parms:
1930 * dev The device structure with the list
1931 * stuctures to be reset.
1932 *
1933 * This routine sets the variables associated with managing
1934 * the TLAN lists to their initial values.
1935 *
1936 **************************************************************/
1937
98e0f521 1938static void TLan_ResetLists( struct net_device *dev )
1da177e4
LT		 1939{
1940 TLanPrivateInfo *priv = netdev_priv(dev);
1941 int i;
1942 TLanList *list;
1943 dma_addr_t list_phys;
1944 struct sk_buff *skb;
1da177e4
LT		 1945
1946 priv->txHead = 0;
1947 priv->txTail = 0;
1948 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1949 list = priv->txList + i;
1950 list->cStat = TLAN_CSTAT_UNUSED;
5eeabf51 1951 list->buffer[0].address = 0;
1da177e4
LT		 1952 list->buffer[2].count = 0;
1953 list->buffer[2].address = 0;
1954 list->buffer[8].address = 0;
1955 list->buffer[9].address = 0;
1956 }
1957
1958 priv->rxHead = 0;
1959 priv->rxTail = TLAN_NUM_RX_LISTS - 1;
1960 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
1961 list = priv->rxList + i;
1962 list_phys = priv->rxListDMA + sizeof(TLanList) * i;
1963 list->cStat = TLAN_CSTAT_READY;
1964 list->frameSize = TLAN_MAX_FRAME_SIZE;
1965 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
5eeabf51
SA		 1966 skb = netdev_alloc_skb(dev, TLAN_MAX_FRAME_SIZE + 7 );
1967 if ( !skb ) {
1968 pr_err("TLAN: out of memory for received data.\n" );
1969 break;
1da177e4 1970 }
5eeabf51
SA		 1971
1972 skb_reserve( skb, NET_IP_ALIGN );
1973 list->buffer[0].address = pci_map_single(priv->pciDev,
1974 skb->data,
1975 TLAN_MAX_FRAME_SIZE,
1976 PCI_DMA_FROMDEVICE);
1977 TLan_StoreSKB(list, skb);
1da177e4
LT		 1978 list->buffer[1].count = 0;
1979 list->buffer[1].address = 0;
9ded65a1
SH		 1980 list->forward = list_phys + sizeof(TLanList);
1981 }
1982
1983 /* in case ran out of memory early, clear bits */
1984 while (i < TLAN_NUM_RX_LISTS) {
1985 TLan_StoreSKB(priv->rxList + i, NULL);
1986 ++i;
1da177e4 1987 }
9ded65a1 1988 list->forward = 0;
1da177e4
LT		 1989
1990} /* TLan_ResetLists */
1991
1992
98e0f521 1993static void TLan_FreeLists( struct net_device *dev )
1da177e4
LT		 1994{
1995 TLanPrivateInfo *priv = netdev_priv(dev);
1996 int i;
1997 TLanList *list;
1998 struct sk_buff *skb;
1999
5eeabf51
SA		 2000 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
2001 list = priv->txList + i;
2002 skb = TLan_GetSKB(list);
2003 if ( skb ) {
2004 pci_unmap_single(
2005 priv->pciDev,
2006 list->buffer[0].address,
2007 max(skb->len,
2008 (unsigned int)TLAN_MIN_FRAME_SIZE),
2009 PCI_DMA_TODEVICE);
2010 dev_kfree_skb_any( skb );
2011 list->buffer[8].address = 0;
2012 list->buffer[9].address = 0;
1da177e4 2013 }
5eeabf51 2014 }
1da177e4 2015
5eeabf51
SA		 2016 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2017 list = priv->rxList + i;
2018 skb = TLan_GetSKB(list);
2019 if ( skb ) {
2020 pci_unmap_single(priv->pciDev,
2021 list->buffer[0].address,
2022 TLAN_MAX_FRAME_SIZE,
2023 PCI_DMA_FROMDEVICE);
2024 dev_kfree_skb_any( skb );
2025 list->buffer[8].address = 0;
2026 list->buffer[9].address = 0;
1da177e4
LT		 2027 }
2028 }
2029} /* TLan_FreeLists */
2030
2031
2032
2033
2034 /***************************************************************
2035 * TLan_PrintDio
6aa20a22 2036 *
1da177e4
LT		 2037 * Returns:
2038 * Nothing
2039 * Parms:
2040 * io_base Base IO port of the device of
2041 * which to print DIO registers.
2042 *
2043 * This function prints out all the internal (DIO)
2044 * registers of a TLAN chip.
2045 *
2046 **************************************************************/
2047
98e0f521 2048static void TLan_PrintDio( u16 io_base )
1da177e4
LT		 2049{
2050 u32 data0, data1;
2051 int i;
2052
dfc2c0a6
SH		 2053 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n",
2054 io_base );
1da177e4
LT		 2055 printk( "TLAN: Off. +0 +4\n" );
2056 for ( i = 0; i < 0x4C; i+= 8 ) {
2057 data0 = TLan_DioRead32( io_base, i );
2058 data1 = TLan_DioRead32( io_base, i + 0x4 );
2059 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 );
2060 }
2061
2062} /* TLan_PrintDio */
2063
2064
2065
2066
2067 /***************************************************************
2068 * TLan_PrintList
6aa20a22 2069 *
1da177e4
LT		 2070 * Returns:
2071 * Nothing
2072 * Parms:
2073 * list A pointer to the TLanList structure to
2074 * be printed.
2075 * type A string to designate type of list,
2076 * "Rx" or "Tx".
2077 * num The index of the list.
2078 *
2079 * This function prints out the contents of the list
2080 * pointed to by the list parameter.
2081 *
2082 **************************************************************/
2083
98e0f521 2084static void TLan_PrintList( TLanList *list, char *type, int num)
1da177e4
LT		 2085{
2086 int i;
2087
93e16847 2088 printk( "TLAN: %s List %d at %p\n", type, num, list );
1da177e4
LT		 2089 printk( "TLAN: Forward = 0x%08x\n", list->forward );
2090 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat );
2091 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
2092 /* for ( i = 0; i < 10; i++ ) { */
2093 for ( i = 0; i < 2; i++ ) {
dfc2c0a6
SH		 2094 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n",
2095 i, list->buffer[i].count, list->buffer[i].address );
1da177e4
LT		 2096 }
2097
2098} /* TLan_PrintList */
2099
2100
2101
2102
2103 /***************************************************************
2104 * TLan_ReadAndClearStats
2105 *
2106 * Returns:
2107 * Nothing
2108 * Parms:
2109 * dev Pointer to device structure of adapter
2110 * to which to read stats.
6aa20a22 2111 * record Flag indicating whether to add
1da177e4
LT		 2112 *
2113 * This functions reads all the internal status registers
2114 * of the TLAN chip, which clears them as a side effect.
2115 * It then either adds the values to the device's status
2116 * struct, or discards them, depending on whether record
2117 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2118 *
2119 **************************************************************/
2120
98e0f521 2121static void TLan_ReadAndClearStats( struct net_device *dev, int record )
1da177e4 2122{
1da177e4
LT		 2123 u32 tx_good, tx_under;
2124 u32 rx_good, rx_over;
2125 u32 def_tx, crc, code;
2126 u32 multi_col, single_col;
2127 u32 excess_col, late_col, loss;
2128
2129 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2130 tx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2131 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2132 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2133 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2134
2135 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2136 rx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2137 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2138 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2139 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2140
1da177e4
LT		 2141 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR );
2142 def_tx = inb( dev->base_addr + TLAN_DIO_DATA );
2143 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2144 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2145 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2146
1da177e4
LT		 2147 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2148 multi_col = inb( dev->base_addr + TLAN_DIO_DATA );
2149 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2150 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2151 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8;
2152
2153 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2154 excess_col = inb( dev->base_addr + TLAN_DIO_DATA );
2155 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 );
2156 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2157
2158 if ( record ) {
f8f31544
SH		 2159 dev->stats.rx_packets += rx_good;
2160 dev->stats.rx_errors += rx_over + crc + code;
2161 dev->stats.tx_packets += tx_good;
2162 dev->stats.tx_errors += tx_under + loss;
2163 dev->stats.collisions += multi_col + single_col + excess_col + late_col;
2164
2165 dev->stats.rx_over_errors += rx_over;
2166 dev->stats.rx_crc_errors += crc;
2167 dev->stats.rx_frame_errors += code;
2168
2169 dev->stats.tx_aborted_errors += tx_under;
2170 dev->stats.tx_carrier_errors += loss;
1da177e4 2171 }
6aa20a22 2172
1da177e4
LT		 2173} /* TLan_ReadAndClearStats */
2174
2175
2176
2177
2178 /***************************************************************
2179 * TLan_Reset
2180 *
2181 * Returns:
2182 * 0
2183 * Parms:
2184 * dev Pointer to device structure of adapter
2185 * to be reset.
2186 *
2187 * This function resets the adapter and it's physical
2188 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2189 * Programmer's Guide" for details. The routine tries to
2190 * implement what is detailed there, though adjustments
2191 * have been made.
2192 *
2193 **************************************************************/
2194
98e0f521 2195static void
1da177e4
LT		 2196TLan_ResetAdapter( struct net_device *dev )
2197{
2198 TLanPrivateInfo *priv = netdev_priv(dev);
2199 int i;
2200 u32 addr;
2201 u32 data;
2202 u8 data8;
2203
2204 priv->tlanFullDuplex = FALSE;
2205 priv->phyOnline=0;
2206 netif_carrier_off(dev);
2207
2208/* 1. Assert reset bit. */
2209
2210 data = inl(dev->base_addr + TLAN_HOST_CMD);
2211 data |= TLAN_HC_AD_RST;
2212 outl(data, dev->base_addr + TLAN_HOST_CMD);
6aa20a22 2213
1da177e4
LT		 2214 udelay(1000);
2215
2216/* 2. Turn off interrupts. ( Probably isn't necessary ) */
2217
2218 data = inl(dev->base_addr + TLAN_HOST_CMD);
2219 data |= TLAN_HC_INT_OFF;
2220 outl(data, dev->base_addr + TLAN_HOST_CMD);
2221
2222/* 3. Clear AREGs and HASHs. */
2223
2224 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) {
2225 TLan_DioWrite32( dev->base_addr, (u16) i, 0 );
2226 }
2227
2228/* 4. Setup NetConfig register. */
2229
2230 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2231 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2232
2233/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2234
2235 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD );
2236 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD );
2237
2238/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2239
2240 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR );
2241 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2242 TLan_SetBit( TLAN_NET_SIO_NMRST, addr );
2243
2244/* 7. Setup the remaining registers. */
2245
2246 if ( priv->tlanRev >= 0x30 ) {
2247 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2248 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 );
2249 }
2250 TLan_PhyDetect( dev );
2251 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
6aa20a22 2252
1da177e4
LT		 2253 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
2254 data |= TLAN_NET_CFG_BIT;
2255 if ( priv->aui == 1 ) {
2256 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a );
2257 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2258 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 );
2259 priv->tlanFullDuplex = TRUE;
2260 } else {
2261 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 );
2262 }
2263 }
2264
2265 if ( priv->phyNum == 0 ) {
2266 data |= TLAN_NET_CFG_PHY_EN;
2267 }
2268 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2269
2270 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2271 TLan_FinishReset( dev );
2272 } else {
2273 TLan_PhyPowerDown( dev );
2274 }
2275
2276} /* TLan_ResetAdapter */
2277
2278
2279
2280
98e0f521 2281static void
1da177e4
LT		 2282TLan_FinishReset( struct net_device *dev )
2283{
2284 TLanPrivateInfo *priv = netdev_priv(dev);
2285 u8 data;
2286 u32 phy;
2287 u8 sio;
2288 u16 status;
2289 u16 partner;
2290 u16 tlphy_ctl;
2291 u16 tlphy_par;
2292 u16 tlphy_id1, tlphy_id2;
2293 int i;
2294
2295 phy = priv->phy[priv->phyNum];
2296
2297 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2298 if ( priv->tlanFullDuplex ) {
2299 data |= TLAN_NET_CMD_DUPLEX;
2300 }
2301 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
6aa20a22 2302 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
1da177e4 2303 if ( priv->phyNum == 0 ) {
6aa20a22 2304 data |= TLAN_NET_MASK_MASK7;
1da177e4
LT		 2305 }
2306 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data );
2307 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 );
2308 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 );
2309 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
6aa20a22 2310
dfc2c0a6
SH		 2311 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) ||
2312 ( priv->aui ) ) {
1da177e4
LT		 2313 status = MII_GS_LINK;
2314 printk( "TLAN: %s: Link forced.\n", dev->name );
2315 } else {
2316 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2317 udelay( 1000 );
2318 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
dfc2c0a6
SH		 2319 if ( (status & MII_GS_LINK) &&
2320 /* We only support link info on Nat.Sem. PHY's */
1da177e4
LT		 2321 (tlphy_id1 == NAT_SEM_ID1) &&
2322 (tlphy_id2 == NAT_SEM_ID2) ) {
2323 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner );
2324 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par );
6aa20a22 2325
1da177e4
LT		 2326 printk( "TLAN: %s: Link active with ", dev->name );
2327 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
6aa20a22 2328 printk( "forced 10%sMbps %s-Duplex\n",
dfc2c0a6
SH		 2329 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2330 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
1da177e4
LT		 2331 } else {
2332 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
dfc2c0a6
SH		 2333 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2334 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
1da177e4
LT		 2335 printk("TLAN: Partner capability: ");
2336 for (i = 5; i <= 10; i++)
2337 if (partner & (1<<i))
2338 printk("%s",media[i-5]);
2339 printk("\n");
2340 }
2341
2342 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
6aa20a22 2343#ifdef MONITOR
1da177e4
LT		 2344 /* We have link beat..for now anyway */
2345 priv->link = 1;
2346 /*Enabling link beat monitoring */
2347 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2348#endif
1da177e4
LT		 2349 } else if (status & MII_GS_LINK) {
2350 printk( "TLAN: %s: Link active\n", dev->name );
2351 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2352 }
2353 }
2354
2355 if ( priv->phyNum == 0 ) {
2356 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
2357 tlphy_ctl |= TLAN_TC_INTEN;
2358 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl );
2359 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO );
2360 sio |= TLAN_NET_SIO_MINTEN;
2361 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio );
2362 }
2363
2364 if ( status & MII_GS_LINK ) {
2365 TLan_SetMac( dev, 0, dev->dev_addr );
2366 priv->phyOnline = 1;
2367 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2368 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) {
2369 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2370 }
2371 outl( priv->rxListDMA, dev->base_addr + TLAN_CH_PARM );
2372 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2373 netif_carrier_on(dev);
2374 } else {
dfc2c0a6
SH		 2375 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n",
2376 dev->name );
1da177e4
LT		 2377 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
2378 return;
2379 }
562faf46 2380 TLan_SetMulticastList(dev);
1da177e4
LT		 2381
2382} /* TLan_FinishReset */
2383
2384
2385
2386
2387 /***************************************************************
2388 * TLan_SetMac
2389 *
2390 * Returns:
2391 * Nothing
2392 * Parms:
2393 * dev Pointer to device structure of adapter
2394 * on which to change the AREG.
2395 * areg The AREG to set the address in (0 - 3).
2396 * mac A pointer to an array of chars. Each
2397 * element stores one byte of the address.
2398 * IE, it isn't in ascii.
2399 *
2400 * This function transfers a MAC address to one of the
2401 * TLAN AREGs (address registers). The TLAN chip locks
2402 * the register on writing to offset 0 and unlocks the
2403 * register after writing to offset 5. If NULL is passed
2404 * in mac, then the AREG is filled with 0's.
2405 *
2406 **************************************************************/
2407
98e0f521 2408static void TLan_SetMac( struct net_device *dev, int areg, char *mac )
1da177e4
LT		 2409{
2410 int i;
6aa20a22 2411
1da177e4
LT		 2412 areg *= 6;
2413
2414 if ( mac != NULL ) {
2415 for ( i = 0; i < 6; i++ )
dfc2c0a6
SH		 2416 TLan_DioWrite8( dev->base_addr,
2417 TLAN_AREG_0 + areg + i, mac[i] );
1da177e4
LT		 2418 } else {
2419 for ( i = 0; i < 6; i++ )
dfc2c0a6
SH		 2420 TLan_DioWrite8( dev->base_addr,
2421 TLAN_AREG_0 + areg + i, 0 );
1da177e4
LT		 2422 }
2423
2424} /* TLan_SetMac */
2425
2426
2427
2428
2429/*****************************************************************************
2430******************************************************************************
2431
2432 ThunderLAN Driver PHY Layer Routines
2433
2434******************************************************************************
2435*****************************************************************************/
2436
2437
2438
2439 /*********************************************************************
2440 * TLan_PhyPrint
2441 *
2442 * Returns:
2443 * Nothing
2444 * Parms:
2445 * dev A pointer to the device structure of the
2446 * TLAN device having the PHYs to be detailed.
6aa20a22 2447 *
1da177e4
LT		 2448 * This function prints the registers a PHY (aka transceiver).
2449 *
2450 ********************************************************************/
2451
98e0f521 2452static void TLan_PhyPrint( struct net_device *dev )
1da177e4
LT		 2453{
2454 TLanPrivateInfo *priv = netdev_priv(dev);
2455 u16 i, data0, data1, data2, data3, phy;
2456
2457 phy = priv->phy[priv->phyNum];
2458
2459 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2460 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name );
2461 } else if ( phy <= TLAN_PHY_MAX_ADDR ) {
2462 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy );
2463 printk( "TLAN: Off. +0 +1 +2 +3 \n" );
2464 for ( i = 0; i < 0x20; i+= 4 ) {
2465 printk( "TLAN: 0x%02x", i );
2466 TLan_MiiReadReg( dev, phy, i, &data0 );
2467 printk( " 0x%04hx", data0 );
2468 TLan_MiiReadReg( dev, phy, i + 1, &data1 );
2469 printk( " 0x%04hx", data1 );
2470 TLan_MiiReadReg( dev, phy, i + 2, &data2 );
2471 printk( " 0x%04hx", data2 );
2472 TLan_MiiReadReg( dev, phy, i + 3, &data3 );
2473 printk( " 0x%04hx\n", data3 );
2474 }
2475 } else {
2476 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name );
2477 }
2478
2479} /* TLan_PhyPrint */
2480
2481
2482
2483
2484 /*********************************************************************
2485 * TLan_PhyDetect
2486 *
2487 * Returns:
2488 * Nothing
2489 * Parms:
2490 * dev A pointer to the device structure of the adapter
2491 * for which the PHY needs determined.
2492 *
2493 * So far I've found that adapters which have external PHYs
2494 * may also use the internal PHY for part of the functionality.
2495 * (eg, AUI/Thinnet). This function finds out if this TLAN
2496 * chip has an internal PHY, and then finds the first external
2497 * PHY (starting from address 0) if it exists).
2498 *
2499 ********************************************************************/
2500
98e0f521 2501static void TLan_PhyDetect( struct net_device *dev )
1da177e4
LT		 2502{
2503 TLanPrivateInfo *priv = netdev_priv(dev);
2504 u16 control;
2505 u16 hi;
2506 u16 lo;
2507 u32 phy;
2508
2509 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2510 priv->phyNum = 0xFFFF;
2511 return;
2512 }
2513
2514 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi );
6aa20a22 2515
1da177e4
LT		 2516 if ( hi != 0xFFFF ) {
2517 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2518 } else {
2519 priv->phy[0] = TLAN_PHY_NONE;
2520 }
2521
2522 priv->phy[1] = TLAN_PHY_NONE;
2523 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) {
2524 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2525 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2526 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
dfc2c0a6
SH		 2527 if ( ( control != 0xFFFF ) ||
2528 ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2529 TLAN_DBG( TLAN_DEBUG_GNRL,
2530 "PHY found at %02x %04x %04x %04x\n",
2531 phy, control, hi, lo );
2532 if ( ( priv->phy[1] == TLAN_PHY_NONE ) &&
2533 ( phy != TLAN_PHY_MAX_ADDR ) ) {
1da177e4
LT		 2534 priv->phy[1] = phy;
2535 }
2536 }
2537 }
2538
2539 if ( priv->phy[1] != TLAN_PHY_NONE ) {
2540 priv->phyNum = 1;
2541 } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
2542 priv->phyNum = 0;
2543 } else {
2544 printk( "TLAN: Cannot initialize device, no PHY was found!\n" );
2545 }
2546
2547} /* TLan_PhyDetect */
2548
2549
2550
2551
98e0f521 2552static void TLan_PhyPowerDown( struct net_device *dev )
1da177e4
LT		 2553{
2554 TLanPrivateInfo *priv = netdev_priv(dev);
2555 u16 value;
2556
2557 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name );
2558 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2559 TLan_MiiSync( dev->base_addr );
2560 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
dfc2c0a6
SH		 2561 if ( ( priv->phyNum == 0 ) &&
2562 ( priv->phy[1] != TLAN_PHY_NONE ) &&
2563 ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
1da177e4
LT		 2564 TLan_MiiSync( dev->base_addr );
2565 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2566 }
2567
2568 /* Wait for 50 ms and powerup
2569 * This is abitrary. It is intended to make sure the
2570 * transceiver settles.
2571 */
2572 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP );
2573
2574} /* TLan_PhyPowerDown */
2575
2576
2577
2578
98e0f521 2579static void TLan_PhyPowerUp( struct net_device *dev )
1da177e4
LT		 2580{
2581 TLanPrivateInfo *priv = netdev_priv(dev);
2582 u16 value;
2583
2584 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name );
2585 TLan_MiiSync( dev->base_addr );
2586 value = MII_GC_LOOPBK;
2587 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2588 TLan_MiiSync(dev->base_addr);
2589 /* Wait for 500 ms and reset the
2590 * transceiver. The TLAN docs say both 50 ms and
2591 * 500 ms, so do the longer, just in case.
2592 */
2593 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET );
2594
2595} /* TLan_PhyPowerUp */
2596
2597
2598
2599
98e0f521 2600static void TLan_PhyReset( struct net_device *dev )
1da177e4
LT		 2601{
2602 TLanPrivateInfo *priv = netdev_priv(dev);
2603 u16 phy;
2604 u16 value;
2605
2606 phy = priv->phy[priv->phyNum];
2607
2608 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name );
2609 TLan_MiiSync( dev->base_addr );
2610 value = MII_GC_LOOPBK | MII_GC_RESET;
2611 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value );
2612 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2613 while ( value & MII_GC_RESET ) {
2614 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2615 }
2616
2617 /* Wait for 500 ms and initialize.
2618 * I don't remember why I wait this long.
2619 * I've changed this to 50ms, as it seems long enough.
2620 */
2621 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK );
2622
2623} /* TLan_PhyReset */
2624
2625
2626
2627
98e0f521 2628static void TLan_PhyStartLink( struct net_device *dev )
1da177e4
LT		 2629{
2630 TLanPrivateInfo *priv = netdev_priv(dev);
2631 u16 ability;
2632 u16 control;
2633 u16 data;
2634 u16 phy;
2635 u16 status;
2636 u16 tctl;
2637
2638 phy = priv->phy[priv->phyNum];
2639 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name );
2640 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2641 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability );
2642
6aa20a22 2643 if ( ( status & MII_GS_AUTONEG ) &&
1da177e4
LT		 2644 ( ! priv->aui ) ) {
2645 ability = status >> 11;
6aa20a22 2646 if ( priv->speed == TLAN_SPEED_10 &&
1da177e4
LT		 2647 priv->duplex == TLAN_DUPLEX_HALF) {
2648 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000);
2649 } else if ( priv->speed == TLAN_SPEED_10 &&
2650 priv->duplex == TLAN_DUPLEX_FULL) {
2651 priv->tlanFullDuplex = TRUE;
2652 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100);
2653 } else if ( priv->speed == TLAN_SPEED_100 &&
2654 priv->duplex == TLAN_DUPLEX_HALF) {
2655 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000);
2656 } else if ( priv->speed == TLAN_SPEED_100 &&
2657 priv->duplex == TLAN_DUPLEX_FULL) {
2658 priv->tlanFullDuplex = TRUE;
2659 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100);
2660 } else {
6aa20a22 2661
1da177e4
LT		 2662 /* Set Auto-Neg advertisement */
2663 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1);
2664 /* Enablee Auto-Neg */
2665 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 );
2666 /* Restart Auto-Neg */
2667 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 );
2668 /* Wait for 4 sec for autonegotiation
2669 * to complete. The max spec time is less than this
2670 * but the card need additional time to start AN.
2671 * .5 sec should be plenty extra.
2672 */
2673 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name );
2674 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN );
2675 return;
2676 }
6aa20a22
JG		 2677
2678 }
2679
1da177e4
LT		 2680 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
2681 priv->phyNum = 0;
2682 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2683 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2684 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2685 return;
2686 } else if ( priv->phyNum == 0 ) {
2687 control = 0;
2688 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl );
2689 if ( priv->aui ) {
2690 tctl |= TLAN_TC_AUISEL;
6aa20a22 2691 } else {
1da177e4
LT		 2692 tctl &= ~TLAN_TC_AUISEL;
2693 if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2694 control |= MII_GC_DUPLEX;
2695 priv->tlanFullDuplex = TRUE;
2696 }
2697 if ( priv->speed == TLAN_SPEED_100 ) {
2698 control |= MII_GC_SPEEDSEL;
2699 }
2700 }
2701 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control );
2702 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl );
2703 }
2704
2705 /* Wait for 2 sec to give the transceiver time
2706 * to establish link.
2707 */
2708 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET );
2709
2710} /* TLan_PhyStartLink */
2711
2712
2713
2714
98e0f521 2715static void TLan_PhyFinishAutoNeg( struct net_device *dev )
1da177e4
LT		 2716{
2717 TLanPrivateInfo *priv = netdev_priv(dev);
2718 u16 an_adv;
2719 u16 an_lpa;
2720 u16 data;
2721 u16 mode;
2722 u16 phy;
2723 u16 status;
6aa20a22 2724
1da177e4
LT		 2725 phy = priv->phy[priv->phyNum];
2726
2727 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2728 udelay( 1000 );
2729 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2730
2731 if ( ! ( status & MII_GS_AUTOCMPLT ) ) {
2732 /* Wait for 8 sec to give the process
2733 * more time. Perhaps we should fail after a while.
2734 */
2735 if (!priv->neg_be_verbose++) {
dfc2c0a6
SH		 2736 pr_info("TLAN: Giving autonegotiation more time.\n");
2737 pr_info("TLAN: Please check that your adapter has\n");
2738 pr_info("TLAN: been properly connected to a HUB or Switch.\n");
2739 pr_info("TLAN: Trying to establish link in the background...\n");
1da177e4
LT		 2740 }
2741 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN );
2742 return;
2743 }
2744
2745 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name );
2746 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv );
2747 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa );
2748 mode = an_adv & an_lpa & 0x03E0;
2749 if ( mode & 0x0100 ) {
2750 priv->tlanFullDuplex = TRUE;
2751 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) {
2752 priv->tlanFullDuplex = TRUE;
2753 }
2754
dfc2c0a6
SH		 2755 if ( ( ! ( mode & 0x0180 ) ) &&
2756 ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) &&
2757 ( priv->phyNum != 0 ) ) {
1da177e4
LT		 2758 priv->phyNum = 0;
2759 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2760 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2761 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2762 return;
2763 }
2764
2765 if ( priv->phyNum == 0 ) {
dfc2c0a6
SH		 2766 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) ||
2767 ( an_adv & an_lpa & 0x0040 ) ) {
2768 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL,
2769 MII_GC_AUTOENB | MII_GC_DUPLEX );
2770 pr_info("TLAN: Starting internal PHY with FULL-DUPLEX\n" );
1da177e4
LT		 2771 } else {
2772 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
dfc2c0a6 2773 pr_info( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
1da177e4
LT		 2774 }
2775 }
2776
2777 /* Wait for 100 ms. No reason in partiticular.
2778 */
2779 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET );
6aa20a22 2780
1da177e4
LT		 2781} /* TLan_PhyFinishAutoNeg */
2782
2783#ifdef MONITOR
2784
2785 /*********************************************************************
2786 *
2787 * TLan_phyMonitor
2788 *
6aa20a22 2789 * Returns:
1da177e4
LT		 2790 * None
2791 *
2792 * Params:
2793 * dev The device structure of this device.
2794 *
6aa20a22 2795 *
1da177e4
LT		 2796 * This function monitors PHY condition by reading the status
2797 * register via the MII bus. This can be used to give info
2798 * about link changes (up/down), and possible switch to alternate
2799 * media.
2800 *
2801 * ******************************************************************/
2802
2803void TLan_PhyMonitor( struct net_device *dev )
2804{
2805 TLanPrivateInfo *priv = netdev_priv(dev);
2806 u16 phy;
2807 u16 phy_status;
2808
2809 phy = priv->phy[priv->phyNum];
2810
2811 /* Get PHY status register */
2812 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status );
2813
2814 /* Check if link has been lost */
6aa20a22 2815 if (!(phy_status & MII_GS_LINK)) {
1da177e4
LT		 2816 if (priv->link) {
2817 priv->link = 0;
2818 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name);
7d17c1d6 2819 netif_carrier_off(dev);
1da177e4
LT		 2820 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2821 return;
2822 }
2823 }
2824
2825 /* Link restablished? */
2826 if ((phy_status & MII_GS_LINK) && !priv->link) {
2827 priv->link = 1;
2828 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name);
7d17c1d6 2829 netif_carrier_on(dev);
1da177e4
LT		 2830 }
2831
2832 /* Setup a new monitor */
2833 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2834}
1da177e4
LT		 2835
2836#endif /* MONITOR */
2837
2838
2839/*****************************************************************************
2840******************************************************************************
2841
2842 ThunderLAN Driver MII Routines
2843
2844 These routines are based on the information in Chap. 2 of the
2845 "ThunderLAN Programmer's Guide", pp. 15-24.
2846
2847******************************************************************************
2848*****************************************************************************/
2849
2850
2851 /***************************************************************
2852 * TLan_MiiReadReg
2853 *
2854 * Returns:
2855 * 0 if ack received ok
2856 * 1 otherwise.
2857 *
2858 * Parms:
2859 * dev The device structure containing
2860 * The io address and interrupt count
2861 * for this device.
2862 * phy The address of the PHY to be queried.
2863 * reg The register whose contents are to be
4a4efbde 2864 * retrieved.
1da177e4
LT		 2865 * val A pointer to a variable to store the
2866 * retrieved value.
2867 *
4a4efbde 2868 * This function uses the TLAN's MII bus to retrieve the contents
1da177e4
LT		 2869 * of a given register on a PHY. It sends the appropriate info
2870 * and then reads the 16-bit register value from the MII bus via
2871 * the TLAN SIO register.
2872 *
2873 **************************************************************/
2874
98e0f521 2875static int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
1da177e4
LT		 2876{
2877 u8 nack;
2878 u16 sio, tmp;
2879 u32 i;
2880 int err;
2881 int minten;
2882 TLanPrivateInfo *priv = netdev_priv(dev);
2883 unsigned long flags = 0;
2884
2885 err = FALSE;
2886 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2887 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 2888
1da177e4
LT		 2889 if (!in_irq())
2890 spin_lock_irqsave(&priv->lock, flags);
2891
2892 TLan_MiiSync(dev->base_addr);
2893
2894 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2895 if ( minten )
2896 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio);
2897
2898 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2899 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */
2900 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2901 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2902
2903
2904 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */
2905
2906 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */
2907 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2908 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */
2909
2910 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */
2911 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */
2912 if (nack) { /* No ACK, so fake it */
2913 for (i = 0; i < 16; i++) {
2914 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2915 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2916 }
2917 tmp = 0xffff;
2918 err = TRUE;
2919 } else { /* ACK, so read data */
2920 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2921 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2922 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio))
2923 tmp |= i;
2924 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2925 }
2926 }
2927
2928
2929 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */
2930 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2931
2932 if ( minten )
2933 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio);
2934
2935 *val = tmp;
6aa20a22 2936
1da177e4
LT		 2937 if (!in_irq())
2938 spin_unlock_irqrestore(&priv->lock, flags);
2939
2940 return err;
2941
2942} /* TLan_MiiReadReg */
2943
2944
2945
2946
2947 /***************************************************************
2948 * TLan_MiiSendData
2949 *
2950 * Returns:
2951 * Nothing
2952 * Parms:
2953 * base_port The base IO port of the adapter in
2954 * question.
2955 * dev The address of the PHY to be queried.
2956 * data The value to be placed on the MII bus.
2957 * num_bits The number of bits in data that are to
2958 * be placed on the MII bus.
2959 *
2960 * This function sends on sequence of bits on the MII
2961 * configuration bus.
2962 *
2963 **************************************************************/
2964
98e0f521 2965static void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
1da177e4
LT		 2966{
2967 u16 sio;
2968 u32 i;
2969
2970 if ( num_bits == 0 )
2971 return;
2972
2973 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
2974 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2975 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio );
2976
2977 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) {
2978 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
2979 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2980 if ( data & i )
2981 TLan_SetBit( TLAN_NET_SIO_MDATA, sio );
2982 else
2983 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio );
2984 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
2985 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2986 }
2987
2988} /* TLan_MiiSendData */
2989
2990
2991
2992
2993 /***************************************************************
2994 * TLan_MiiSync
2995 *
2996 * Returns:
2997 * Nothing
2998 * Parms:
2999 * base_port The base IO port of the adapter in
3000 * question.
3001 *
3002 * This functions syncs all PHYs in terms of the MII configuration
3003 * bus.
3004 *
3005 **************************************************************/
3006
98e0f521 3007static void TLan_MiiSync( u16 base_port )
1da177e4
LT		 3008{
3009 int i;
3010 u16 sio;
3011
3012 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3013 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3014
3015 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio );
3016 for ( i = 0; i < 32; i++ ) {
3017 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3018 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3019 }
3020
3021} /* TLan_MiiSync */
3022
3023
3024
3025
3026 /***************************************************************
3027 * TLan_MiiWriteReg
3028 *
3029 * Returns:
3030 * Nothing
3031 * Parms:
3032 * dev The device structure for the device
3033 * to write to.
3034 * phy The address of the PHY to be written to.
3035 * reg The register whose contents are to be
3036 * written.
3037 * val The value to be written to the register.
3038 *
3039 * This function uses the TLAN's MII bus to write the contents of a
3040 * given register on a PHY. It sends the appropriate info and then
3041 * writes the 16-bit register value from the MII configuration bus
3042 * via the TLAN SIO register.
3043 *
3044 **************************************************************/
3045
98e0f521 3046static void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
1da177e4
LT		 3047{
3048 u16 sio;
3049 int minten;
3050 unsigned long flags = 0;
3051 TLanPrivateInfo *priv = netdev_priv(dev);
3052
3053 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3054 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 3055
1da177e4
LT		 3056 if (!in_irq())
3057 spin_lock_irqsave(&priv->lock, flags);
3058
3059 TLan_MiiSync( dev->base_addr );
3060
3061 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
3062 if ( minten )
3063 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
3064
3065 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
3066 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */
3067 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
3068 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
3069
3070 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */
3071 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */
3072
3073 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */
3074 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3075
3076 if ( minten )
3077 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
6aa20a22 3078
1da177e4
LT		 3079 if (!in_irq())
3080 spin_unlock_irqrestore(&priv->lock, flags);
3081
3082} /* TLan_MiiWriteReg */
3083
3084
3085
3086
3087/*****************************************************************************
3088******************************************************************************
3089
3090 ThunderLAN Driver Eeprom routines
3091
3092 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A
3093 EEPROM. These functions are based on information in Microchip's
3094 data sheet. I don't know how well this functions will work with
3095 other EEPROMs.
3096
3097******************************************************************************
3098*****************************************************************************/
3099
3100
3101 /***************************************************************
3102 * TLan_EeSendStart
3103 *
3104 * Returns:
3105 * Nothing
6aa20a22 3106 * Parms:
1da177e4
LT		 3107 * io_base The IO port base address for the
3108 * TLAN device with the EEPROM to
3109 * use.
3110 *
3111 * This function sends a start cycle to an EEPROM attached
3112 * to a TLAN chip.
3113 *
3114 **************************************************************/
3115
98e0f521 3116static void TLan_EeSendStart( u16 io_base )
1da177e4
LT		 3117{
3118 u16 sio;
3119
3120 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3121 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3122
3123 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3124 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3125 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3126 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3127 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3128
3129} /* TLan_EeSendStart */
3130
3131
3132
3133
3134 /***************************************************************
3135 * TLan_EeSendByte
3136 *
3137 * Returns:
3138 * If the correct ack was received, 0, otherwise 1
3139 * Parms: io_base The IO port base address for the
3140 * TLAN device with the EEPROM to
3141 * use.
3142 * data The 8 bits of information to
3143 * send to the EEPROM.
3144 * stop If TLAN_EEPROM_STOP is passed, a
3145 * stop cycle is sent after the
3146 * byte is sent after the ack is
3147 * read.
3148 *
3149 * This function sends a byte on the serial EEPROM line,
3150 * driving the clock to send each bit. The function then
3151 * reverses transmission direction and reads an acknowledge
3152 * bit.
3153 *
3154 **************************************************************/
3155
98e0f521 3156static int TLan_EeSendByte( u16 io_base, u8 data, int stop )
1da177e4
LT		 3157{
3158 int err;
3159 u8 place;
3160 u16 sio;
3161
3162 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3163 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3164
3165 /* Assume clock is low, tx is enabled; */
3166 for ( place = 0x80; place != 0; place >>= 1 ) {
3167 if ( place & data )
3168 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3169 else
3170 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3171 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3172 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3173 }
3174 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3175 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3176 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio );
3177 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3178 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3179
3180 if ( ( ! err ) && stop ) {
dfc2c0a6
SH		 3181 /* STOP, raise data while clock is high */
3182 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
1da177e4
LT		 3183 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3184 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3185 }
3186
3187 return ( err );
3188
3189} /* TLan_EeSendByte */
3190
3191
3192
3193
3194 /***************************************************************
3195 * TLan_EeReceiveByte
3196 *
3197 * Returns:
3198 * Nothing
3199 * Parms:
3200 * io_base The IO port base address for the
3201 * TLAN device with the EEPROM to
3202 * use.
3203 * data An address to a char to hold the
3204 * data sent from the EEPROM.
3205 * stop If TLAN_EEPROM_STOP is passed, a
3206 * stop cycle is sent after the
3207 * byte is received, and no ack is
3208 * sent.
3209 *
3210 * This function receives 8 bits of data from the EEPROM
3211 * over the serial link. It then sends and ack bit, or no
3212 * ack and a stop bit. This function is used to retrieve
3213 * data after the address of a byte in the EEPROM has been
3214 * sent.
3215 *
3216 **************************************************************/
3217
98e0f521 3218static void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
1da177e4
LT		 3219{
3220 u8 place;
3221 u16 sio;
3222
3223 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3224 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3225 *data = 0;
3226
3227 /* Assume clock is low, tx is enabled; */
3228 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3229 for ( place = 0x80; place; place >>= 1 ) {
3230 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3231 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) )
3232 *data |= place;
3233 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3234 }
3235
3236 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3237 if ( ! stop ) {
3238 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */
3239 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3240 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3241 } else {
3242 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
3243 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3244 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
dfc2c0a6
SH		 3245 /* STOP, raise data while clock is high */
3246 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
1da177e4
LT		 3247 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3248 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3249 }
3250
3251} /* TLan_EeReceiveByte */
3252
3253
3254
3255
3256 /***************************************************************
3257 * TLan_EeReadByte
3258 *
3259 * Returns:
3260 * No error = 0, else, the stage at which the error
3261 * occurred.
3262 * Parms:
3263 * io_base The IO port base address for the
3264 * TLAN device with the EEPROM to
3265 * use.
3266 * ee_addr The address of the byte in the
3267 * EEPROM whose contents are to be
3268 * retrieved.
3269 * data An address to a char to hold the
3270 * data obtained from the EEPROM.
3271 *
3272 * This function reads a byte of information from an byte
3273 * cell in the EEPROM.
3274 *
3275 **************************************************************/
3276
98e0f521 3277static int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
1da177e4
LT		 3278{
3279 int err;
3280 TLanPrivateInfo *priv = netdev_priv(dev);
3281 unsigned long flags = 0;
3282 int ret=0;
3283
3284 spin_lock_irqsave(&priv->lock, flags);
3285
3286 TLan_EeSendStart( dev->base_addr );
3287 err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK );
3288 if (err)
3289 {
3290 ret=1;
3291 goto fail;
3292 }
3293 err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK );
3294 if (err)
3295 {
3296 ret=2;
3297 goto fail;
3298 }
3299 TLan_EeSendStart( dev->base_addr );
3300 err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK );
3301 if (err)
3302 {
3303 ret=3;
3304 goto fail;
3305 }
3306 TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP );
3307fail:
3308 spin_unlock_irqrestore(&priv->lock, flags);
3309
3310 return ret;
3311
3312} /* TLan_EeReadByte */
3313
3314
3315
Linux kernel - Deliverables
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