Pull trivial into release branch
[deliverable/linux.git] / drivers / net / tlan.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2 *
3 * Linux ThunderLAN Driver
4 *
5 * tlan.c
6 * by James Banks
7 *
8 * (C) 1997-1998 Caldera, Inc.
9 * (C) 1998 James Banks
10 * (C) 1999-2001 Torben Mathiasen
11 * (C) 2002 Samuel Chessman
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 *
16 ** This file is best viewed/edited with columns>=132.
17 *
18 ** Useful (if not required) reading:
19 *
20 * Texas Instruments, ThunderLAN Programmer's Guide,
21 * TI Literature Number SPWU013A
22 * available in PDF format from www.ti.com
23 * Level One, LXT901 and LXT970 Data Sheets
24 * available in PDF format from www.level1.com
25 * National Semiconductor, DP83840A Data Sheet
26 * available in PDF format from www.national.com
27 * Microchip Technology, 24C01A/02A/04A Data Sheet
28 * available in PDF format from www.microchip.com
29 *
30 * Change History
31 *
32 * Tigran Aivazian <tigran@sco.com>: TLan_PciProbe() now uses
33 * new PCI BIOS interface.
34 * Alan Cox <alan@redhat.com>: Fixed the out of memory
35 * handling.
6aa20a22 36 *
1da177e4
LT
37 * Torben Mathiasen <torben.mathiasen@compaq.com> New Maintainer!
38 *
39 * v1.1 Dec 20, 1999 - Removed linux version checking
6aa20a22 40 * Patch from Tigran Aivazian.
1da177e4
LT
41 * - v1.1 includes Alan's SMP updates.
42 * - We still have problems on SMP though,
6aa20a22
JG
43 * but I'm looking into that.
44 *
1da177e4
LT
45 * v1.2 Jan 02, 2000 - Hopefully fixed the SMP deadlock.
46 * - Removed dependency of HZ being 100.
6aa20a22 47 * - We now allow higher priority timers to
1da177e4
LT
48 * overwrite timers like TLAN_TIMER_ACTIVITY
49 * Patch from John Cagle <john.cagle@compaq.com>.
50 * - Fixed a few compiler warnings.
51 *
52 * v1.3 Feb 04, 2000 - Fixed the remaining HZ issues.
6aa20a22 53 * - Removed call to pci_present().
1da177e4 54 * - Removed SA_INTERRUPT flag from irq handler.
6aa20a22 55 * - Added __init and __initdata to reduce resisdent
1da177e4
LT
56 * code size.
57 * - Driver now uses module_init/module_exit.
58 * - Rewrote init_module and tlan_probe to
59 * share a lot more code. We now use tlan_probe
60 * with builtin and module driver.
6aa20a22
JG
61 * - Driver ported to new net API.
62 * - tlan.txt has been reworked to reflect current
1da177e4
LT
63 * driver (almost)
64 * - Other minor stuff
65 *
66 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's
67 * network cleanup in 2.3.43pre7 (Tigran & myself)
68 * - Minor stuff.
69 *
70 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver
71 * if no cable/link were present.
72 * - Cosmetic changes.
73 * - TODO: Port completely to new PCI/DMA API
74 * Auto-Neg fallback.
75 *
76 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't
6aa20a22 77 * tested it though, as the kernel support is currently
1da177e4
LT
78 * broken (2.3.99p4p3).
79 * - Updated tlan.txt accordingly.
80 * - Adjusted minimum/maximum frame length.
6aa20a22 81 * - There is now a TLAN website up at
1da177e4
LT
82 * http://tlan.kernel.dk
83 *
84 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now
85 * reports PHY information when used with Donald
86 * Beckers userspace MII diagnostics utility.
87 *
88 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings.
89 * - Added link information to Auto-Neg and forced
90 * modes. When NIC operates with auto-neg the driver
91 * will report Link speed & duplex modes as well as
92 * link partner abilities. When forced link is used,
93 * the driver will report status of the established
94 * link.
6aa20a22
JG
95 * Please read tlan.txt for additional information.
96 * - Removed call to check_region(), and used
1da177e4 97 * return value of request_region() instead.
6aa20a22 98 *
1da177e4
LT
99 * v1.8a May 28, 2000 - Minor updates.
100 *
101 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues.
102 * - Updated with timer fixes from Andrew Morton.
103 * - Fixed module race in TLan_Open.
104 * - Added routine to monitor PHY status.
105 * - Added activity led support for Proliant devices.
106 *
6aa20a22
JG
107 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers
108 * like the Compaq NetFlex3/E.
1da177e4
LT
109 * - Rewrote tlan_probe to better handle multiple
110 * bus probes. Probing and device setup is now
111 * done through TLan_Probe and TLan_init_one. Actual
6aa20a22 112 * hardware probe is done with kernel API and
1da177e4
LT
113 * TLan_EisaProbe.
114 * - Adjusted debug information for probing.
6aa20a22
JG
115 * - Fixed bug that would cause general debug information
116 * to be printed after driver removal.
1da177e4 117 * - Added transmit timeout handling.
6aa20a22
JG
118 * - Fixed OOM return values in tlan_probe.
119 * - Fixed possible mem leak in tlan_exit
1da177e4
LT
120 * (now tlan_remove_one).
121 * - Fixed timer bug in TLan_phyMonitor.
122 * - This driver version is alpha quality, please
123 * send me any bug issues you may encounter.
124 *
6aa20a22 125 * v1.11 Aug 31, 2000 - Do not try to register irq 0 if no irq line was
1da177e4
LT
126 * set for EISA cards.
127 * - Added support for NetFlex3/E with nibble-rate
128 * 10Base-T PHY. This is untestet as I haven't got
129 * one of these cards.
130 * - Fixed timer being added twice.
131 * - Disabled PhyMonitoring by default as this is
132 * work in progress. Define MONITOR to enable it.
133 * - Now we don't display link info with PHYs that
134 * doesn't support it (level1).
135 * - Incresed tx_timeout beacuse of auto-neg.
136 * - Adjusted timers for forced speeds.
137 *
138 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.)
139 *
140 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues
141 * when link can't be established.
142 * - Added the bbuf option as a kernel parameter.
143 * - Fixed ioaddr probe bug.
144 * - Fixed stupid deadlock with MII interrupts.
6aa20a22 145 * - Added support for speed/duplex selection with
1da177e4
LT
146 * multiple nics.
147 * - Added partly fix for TX Channel lockup with
148 * TLAN v1.0 silicon. This needs to be investigated
149 * further.
150 *
151 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per.
152 * interrupt. Thanks goes to
153 * Adam Keys <adam@ti.com>
154 * Denis Beaudoin <dbeaudoin@ti.com>
155 * for providing the patch.
156 * - Fixed auto-neg output when using multiple
157 * adapters.
158 * - Converted to use new taskq interface.
159 *
160 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.)
161 *
162 * Samuel Chessman <chessman@tux.org> New Maintainer!
163 *
164 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be
165 * 10T half duplex no loopback
166 * Thanks to Gunnar Eikman
167 *******************************************************************************/
168
169#include <linux/module.h>
170#include <linux/init.h>
171#include <linux/ioport.h>
172#include <linux/eisa.h>
173#include <linux/pci.h>
1e7f0bd8 174#include <linux/dma-mapping.h>
1da177e4
LT
175#include <linux/netdevice.h>
176#include <linux/etherdevice.h>
177#include <linux/delay.h>
178#include <linux/spinlock.h>
179#include <linux/workqueue.h>
180#include <linux/mii.h>
181
182#include "tlan.h"
183
184typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 );
185
186
187/* For removing EISA devices */
188static struct net_device *TLan_Eisa_Devices;
189
190static int TLanDevicesInstalled;
191
192/* Set speed, duplex and aui settings */
193static int aui[MAX_TLAN_BOARDS];
194static int duplex[MAX_TLAN_BOARDS];
195static int speed[MAX_TLAN_BOARDS];
196static int boards_found;
15efa9bb
SH
197module_param_array(aui, int, NULL, 0);
198module_param_array(duplex, int, NULL, 0);
199module_param_array(speed, int, NULL, 0);
200MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
201MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
202MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
1da177e4
LT
203
204MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
205MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
206MODULE_LICENSE("GPL");
207
208
209/* Define this to enable Link beat monitoring */
210#undef MONITOR
211
212/* Turn on debugging. See Documentation/networking/tlan.txt for details */
213static int debug;
15efa9bb
SH
214module_param(debug, int, 0);
215MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
1da177e4
LT
216
217static int bbuf;
15efa9bb
SH
218module_param(bbuf, int, 0);
219MODULE_PARM_DESC(bbuf, "ThunderLAN use big buffer (0-1)");
220
1da177e4
LT
221static u8 *TLanPadBuffer;
222static dma_addr_t TLanPadBufferDMA;
223static char TLanSignature[] = "TLAN";
224static const char tlan_banner[] = "ThunderLAN driver v1.15\n";
225static int tlan_have_pci;
226static int tlan_have_eisa;
227
228static const char *media[] = {
6aa20a22 229 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ",
1da177e4
LT
230 "100baseTx-FD", "100baseT4", NULL
231};
232
233static struct board {
234 const char *deviceLabel;
235 u32 flags;
236 u16 addrOfs;
237} board_info[] = {
238 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
239 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
240 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
241 { "Compaq NetFlex-3/P", TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
242 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
243 { "Compaq Netelligent Integrated 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
244 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 },
245 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 },
246 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
247 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 },
248 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 },
249 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
250 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 },
251 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
6aa20a22 252 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4
LT
253 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
254};
255
256static struct pci_device_id tlan_pci_tbl[] = {
257 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
258 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
259 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
260 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
261 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
262 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
263 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
264 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
265 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
266 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
267 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
269 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
271 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
273 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
274 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
275 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
276 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
277 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
278 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
279 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
280 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
281 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
282 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
283 { 0,}
284};
6aa20a22 285MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
1da177e4
LT
286
287static void TLan_EisaProbe( void );
288static void TLan_Eisa_Cleanup( void );
289static int TLan_Init( struct net_device * );
290static int TLan_Open( struct net_device *dev );
291static int TLan_StartTx( struct sk_buff *, struct net_device *);
7d12e780 292static irqreturn_t TLan_HandleInterrupt( int, void *);
1da177e4
LT
293static int TLan_Close( struct net_device *);
294static struct net_device_stats *TLan_GetStats( struct net_device *);
295static void TLan_SetMulticastList( struct net_device *);
296static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd);
297static int TLan_probe1( struct pci_dev *pdev, long ioaddr, int irq, int rev, const struct pci_device_id *ent);
298static void TLan_tx_timeout( struct net_device *dev);
c4028958 299static void TLan_tx_timeout_work(struct work_struct *work);
1da177e4
LT
300static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent);
301
302static u32 TLan_HandleInvalid( struct net_device *, u16 );
303static u32 TLan_HandleTxEOF( struct net_device *, u16 );
304static u32 TLan_HandleStatOverflow( struct net_device *, u16 );
305static u32 TLan_HandleRxEOF( struct net_device *, u16 );
306static u32 TLan_HandleDummy( struct net_device *, u16 );
307static u32 TLan_HandleTxEOC( struct net_device *, u16 );
308static u32 TLan_HandleStatusCheck( struct net_device *, u16 );
309static u32 TLan_HandleRxEOC( struct net_device *, u16 );
310
311static void TLan_Timer( unsigned long );
312
313static void TLan_ResetLists( struct net_device * );
314static void TLan_FreeLists( struct net_device * );
315static void TLan_PrintDio( u16 );
316static void TLan_PrintList( TLanList *, char *, int );
317static void TLan_ReadAndClearStats( struct net_device *, int );
318static void TLan_ResetAdapter( struct net_device * );
319static void TLan_FinishReset( struct net_device * );
320static void TLan_SetMac( struct net_device *, int areg, char *mac );
321
322static void TLan_PhyPrint( struct net_device * );
323static void TLan_PhyDetect( struct net_device * );
324static void TLan_PhyPowerDown( struct net_device * );
325static void TLan_PhyPowerUp( struct net_device * );
326static void TLan_PhyReset( struct net_device * );
327static void TLan_PhyStartLink( struct net_device * );
328static void TLan_PhyFinishAutoNeg( struct net_device * );
329#ifdef MONITOR
330static void TLan_PhyMonitor( struct net_device * );
331#endif
332
333/*
334static int TLan_PhyNop( struct net_device * );
335static int TLan_PhyInternalCheck( struct net_device * );
336static int TLan_PhyInternalService( struct net_device * );
337static int TLan_PhyDp83840aCheck( struct net_device * );
338*/
339
340static int TLan_MiiReadReg( struct net_device *, u16, u16, u16 * );
341static void TLan_MiiSendData( u16, u32, unsigned );
342static void TLan_MiiSync( u16 );
343static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 );
344
345static void TLan_EeSendStart( u16 );
346static int TLan_EeSendByte( u16, u8, int );
347static void TLan_EeReceiveByte( u16, u8 *, int );
348static int TLan_EeReadByte( struct net_device *, u8, u8 * );
349
350
6aa20a22 351static void
1da177e4
LT
352TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb)
353{
354 unsigned long addr = (unsigned long)skb;
355 tag->buffer[9].address = (u32)addr;
356 addr >>= 31; /* >>= 32 is undefined for 32bit arch, stupid C */
357 addr >>= 1;
358 tag->buffer[8].address = (u32)addr;
359}
360
361static struct sk_buff *
362TLan_GetSKB( struct tlan_list_tag *tag)
363{
364 unsigned long addr = tag->buffer[8].address;
365 addr <<= 31;
366 addr <<= 1;
367 addr |= tag->buffer[9].address;
368 return (struct sk_buff *) addr;
369}
370
371
372static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = {
373 TLan_HandleInvalid,
374 TLan_HandleTxEOF,
375 TLan_HandleStatOverflow,
376 TLan_HandleRxEOF,
377 TLan_HandleDummy,
378 TLan_HandleTxEOC,
379 TLan_HandleStatusCheck,
380 TLan_HandleRxEOC
381};
382
383static inline void
384TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type )
385{
386 TLanPrivateInfo *priv = netdev_priv(dev);
387 unsigned long flags = 0;
6aa20a22 388
1da177e4
LT
389 if (!in_irq())
390 spin_lock_irqsave(&priv->lock, flags);
391 if ( priv->timer.function != NULL &&
6aa20a22 392 priv->timerType != TLAN_TIMER_ACTIVITY ) {
1da177e4
LT
393 if (!in_irq())
394 spin_unlock_irqrestore(&priv->lock, flags);
395 return;
396 }
397 priv->timer.function = &TLan_Timer;
398 if (!in_irq())
399 spin_unlock_irqrestore(&priv->lock, flags);
400
401 priv->timer.data = (unsigned long) dev;
402 priv->timerSetAt = jiffies;
403 priv->timerType = type;
404 mod_timer(&priv->timer, jiffies + ticks);
6aa20a22 405
1da177e4
LT
406} /* TLan_SetTimer */
407
408
409/*****************************************************************************
410******************************************************************************
411
412 ThunderLAN Driver Primary Functions
413
414 These functions are more or less common to all Linux network drivers.
415
416******************************************************************************
417*****************************************************************************/
418
419
420
421
422
423 /***************************************************************
424 * tlan_remove_one
425 *
426 * Returns:
427 * Nothing
428 * Parms:
429 * None
430 *
431 * Goes through the TLanDevices list and frees the device
432 * structs and memory associated with each device (lists
433 * and buffers). It also ureserves the IO port regions
434 * associated with this device.
435 *
436 **************************************************************/
437
438
439static void __devexit tlan_remove_one( struct pci_dev *pdev)
440{
441 struct net_device *dev = pci_get_drvdata( pdev );
442 TLanPrivateInfo *priv = netdev_priv(dev);
6aa20a22 443
1da177e4
LT
444 unregister_netdev( dev );
445
446 if ( priv->dmaStorage ) {
447 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
448 }
449
450#ifdef CONFIG_PCI
451 pci_release_regions(pdev);
452#endif
6aa20a22 453
1da177e4 454 free_netdev( dev );
6aa20a22 455
1da177e4 456 pci_set_drvdata( pdev, NULL );
6aa20a22 457}
1da177e4
LT
458
459static struct pci_driver tlan_driver = {
460 .name = "tlan",
461 .id_table = tlan_pci_tbl,
462 .probe = tlan_init_one,
6aa20a22 463 .remove = __devexit_p(tlan_remove_one),
1da177e4
LT
464};
465
466static int __init tlan_probe(void)
467{
468 static int pad_allocated;
6aa20a22 469
1da177e4 470 printk(KERN_INFO "%s", tlan_banner);
6aa20a22 471
1da177e4
LT
472 TLanPadBuffer = (u8 *) pci_alloc_consistent(NULL, TLAN_MIN_FRAME_SIZE, &TLanPadBufferDMA);
473
474 if (TLanPadBuffer == NULL) {
475 printk(KERN_ERR "TLAN: Could not allocate memory for pad buffer.\n");
476 return -ENOMEM;
477 }
478
479 memset(TLanPadBuffer, 0, TLAN_MIN_FRAME_SIZE);
480 pad_allocated = 1;
481
482 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
6aa20a22 483
1da177e4
LT
484 /* Use new style PCI probing. Now the kernel will
485 do most of this for us */
486 pci_register_driver(&tlan_driver);
487
488 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
489 TLan_EisaProbe();
6aa20a22
JG
490
491 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n",
1da177e4
LT
492 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s",
493 tlan_have_pci, tlan_have_eisa);
494
495 if (TLanDevicesInstalled == 0) {
496 pci_unregister_driver(&tlan_driver);
497 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
498 return -ENODEV;
499 }
500 return 0;
501}
6aa20a22 502
1da177e4
LT
503
504static int __devinit tlan_init_one( struct pci_dev *pdev,
505 const struct pci_device_id *ent)
506{
507 return TLan_probe1( pdev, -1, -1, 0, ent);
508}
509
510
511/*
512 ***************************************************************
513 * tlan_probe1
514 *
515 * Returns:
516 * 0 on success, error code on error
6aa20a22 517 * Parms:
1da177e4
LT
518 * none
519 *
520 * The name is lower case to fit in with all the rest of
6aa20a22 521 * the netcard_probe names. This function looks for
1da177e4
LT
522 * another TLan based adapter, setting it up with the
523 * allocated device struct if one is found.
524 * tlan_probe has been ported to the new net API and
525 * now allocates its own device structure. This function
526 * is also used by modules.
527 *
528 **************************************************************/
529
6aa20a22 530static int __devinit TLan_probe1(struct pci_dev *pdev,
1da177e4
LT
531 long ioaddr, int irq, int rev, const struct pci_device_id *ent )
532{
533
534 struct net_device *dev;
535 TLanPrivateInfo *priv;
536 u8 pci_rev;
537 u16 device_id;
538 int reg, rc = -ENODEV;
539
ad9f6713 540#ifdef CONFIG_PCI
1da177e4
LT
541 if (pdev) {
542 rc = pci_enable_device(pdev);
543 if (rc)
544 return rc;
545
546 rc = pci_request_regions(pdev, TLanSignature);
547 if (rc) {
548 printk(KERN_ERR "TLAN: Could not reserve IO regions\n");
549 goto err_out;
550 }
551 }
ad9f6713 552#endif /* CONFIG_PCI */
1da177e4
LT
553
554 dev = alloc_etherdev(sizeof(TLanPrivateInfo));
555 if (dev == NULL) {
556 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n");
557 rc = -ENOMEM;
558 goto err_out_regions;
559 }
560 SET_MODULE_OWNER(dev);
561 SET_NETDEV_DEV(dev, &pdev->dev);
6aa20a22 562
1da177e4
LT
563 priv = netdev_priv(dev);
564
565 priv->pciDev = pdev;
c4028958 566 priv->dev = dev;
6aa20a22 567
1da177e4
LT
568 /* Is this a PCI device? */
569 if (pdev) {
570 u32 pci_io_base = 0;
571
572 priv->adapter = &board_info[ent->driver_data];
573
1e7f0bd8 574 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1da177e4
LT
575 if (rc) {
576 printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n");
577 goto err_out_free_dev;
578 }
579
580 pci_read_config_byte ( pdev, PCI_REVISION_ID, &pci_rev);
581
582 for ( reg= 0; reg <= 5; reg ++ ) {
583 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
584 pci_io_base = pci_resource_start(pdev, reg);
585 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n",
586 pci_io_base);
587 break;
588 }
589 }
590 if (!pci_io_base) {
591 printk(KERN_ERR "TLAN: No IO mappings available\n");
592 rc = -EIO;
593 goto err_out_free_dev;
594 }
6aa20a22 595
1da177e4
LT
596 dev->base_addr = pci_io_base;
597 dev->irq = pdev->irq;
6aa20a22 598 priv->adapterRev = pci_rev;
1da177e4
LT
599 pci_set_master(pdev);
600 pci_set_drvdata(pdev, dev);
601
602 } else { /* EISA card */
603 /* This is a hack. We need to know which board structure
604 * is suited for this adapter */
605 device_id = inw(ioaddr + EISA_ID2);
606 priv->is_eisa = 1;
607 if (device_id == 0x20F1) {
608 priv->adapter = &board_info[13]; /* NetFlex-3/E */
609 priv->adapterRev = 23; /* TLAN 2.3 */
610 } else {
611 priv->adapter = &board_info[14];
612 priv->adapterRev = 10; /* TLAN 1.0 */
613 }
614 dev->base_addr = ioaddr;
615 dev->irq = irq;
616 }
617
618 /* Kernel parameters */
619 if (dev->mem_start) {
620 priv->aui = dev->mem_start & 0x01;
621 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0 : (dev->mem_start & 0x06) >> 1;
622 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0 : (dev->mem_start & 0x18) >> 3;
6aa20a22 623
1da177e4
LT
624 if (priv->speed == 0x1) {
625 priv->speed = TLAN_SPEED_10;
626 } else if (priv->speed == 0x2) {
627 priv->speed = TLAN_SPEED_100;
628 }
629 debug = priv->debug = dev->mem_end;
630 } else {
631 priv->aui = aui[boards_found];
632 priv->speed = speed[boards_found];
633 priv->duplex = duplex[boards_found];
634 priv->debug = debug;
635 }
6aa20a22 636
1da177e4
LT
637 /* This will be used when we get an adapter error from
638 * within our irq handler */
c4028958 639 INIT_WORK(&priv->tlan_tqueue, TLan_tx_timeout_work);
1da177e4
LT
640
641 spin_lock_init(&priv->lock);
6aa20a22 642
1da177e4
LT
643 rc = TLan_Init(dev);
644 if (rc) {
645 printk(KERN_ERR "TLAN: Could not set up device.\n");
646 goto err_out_free_dev;
647 }
648
649 rc = register_netdev(dev);
650 if (rc) {
651 printk(KERN_ERR "TLAN: Could not register device.\n");
652 goto err_out_uninit;
653 }
654
6aa20a22 655
1da177e4
LT
656 TLanDevicesInstalled++;
657 boards_found++;
6aa20a22 658
1da177e4
LT
659 /* pdev is NULL if this is an EISA device */
660 if (pdev)
661 tlan_have_pci++;
662 else {
663 priv->nextDevice = TLan_Eisa_Devices;
664 TLan_Eisa_Devices = dev;
665 tlan_have_eisa++;
666 }
6aa20a22 667
1da177e4
LT
668 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n",
669 dev->name,
670 (int) dev->irq,
671 (int) dev->base_addr,
672 priv->adapter->deviceLabel,
673 priv->adapterRev);
674 return 0;
675
676err_out_uninit:
677 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage,
678 priv->dmaStorageDMA );
679err_out_free_dev:
680 free_netdev(dev);
681err_out_regions:
682#ifdef CONFIG_PCI
683 if (pdev)
684 pci_release_regions(pdev);
685#endif
686err_out:
687 if (pdev)
688 pci_disable_device(pdev);
689 return rc;
690}
691
692
693static void TLan_Eisa_Cleanup(void)
694{
695 struct net_device *dev;
696 TLanPrivateInfo *priv;
6aa20a22 697
1da177e4
LT
698 while( tlan_have_eisa ) {
699 dev = TLan_Eisa_Devices;
700 priv = netdev_priv(dev);
701 if (priv->dmaStorage) {
702 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
703 }
704 release_region( dev->base_addr, 0x10);
705 unregister_netdev( dev );
706 TLan_Eisa_Devices = priv->nextDevice;
707 free_netdev( dev );
708 tlan_have_eisa--;
709 }
710}
6aa20a22
JG
711
712
1da177e4
LT
713static void __exit tlan_exit(void)
714{
715 pci_unregister_driver(&tlan_driver);
716
717 if (tlan_have_eisa)
718 TLan_Eisa_Cleanup();
719
720 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
721
722}
723
724
725/* Module loading/unloading */
726module_init(tlan_probe);
727module_exit(tlan_exit);
728
729
730
731 /**************************************************************
732 * TLan_EisaProbe
733 *
734 * Returns: 0 on success, 1 otherwise
735 *
736 * Parms: None
737 *
738 *
6aa20a22
JG
739 * This functions probes for EISA devices and calls
740 * TLan_probe1 when one is found.
1da177e4
LT
741 *
742 *************************************************************/
743
6aa20a22 744static void __init TLan_EisaProbe (void)
1da177e4
LT
745{
746 long ioaddr;
747 int rc = -ENODEV;
748 int irq;
749 u16 device_id;
750
6aa20a22 751 if (!EISA_bus) {
1da177e4
LT
752 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
753 return;
754 }
6aa20a22 755
1da177e4
LT
756 /* Loop through all slots of the EISA bus */
757 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
6aa20a22
JG
758
759 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
1da177e4
LT
760 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
761
762
763 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ",
764 (int) ioaddr);
6aa20a22 765 if (request_region(ioaddr, 0x10, TLanSignature) == NULL)
1da177e4
LT
766 goto out;
767
6aa20a22 768 if (inw(ioaddr + EISA_ID) != 0x110E) {
1da177e4
LT
769 release_region(ioaddr, 0x10);
770 goto out;
771 }
6aa20a22 772
1da177e4 773 device_id = inw(ioaddr + EISA_ID2);
6aa20a22 774 if (device_id != 0x20F1 && device_id != 0x40F1) {
1da177e4
LT
775 release_region (ioaddr, 0x10);
776 goto out;
777 }
6aa20a22 778
1da177e4
LT
779 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */
780 release_region (ioaddr, 0x10);
781 goto out2;
782 }
6aa20a22
JG
783
784 if (debug == 0x10)
1da177e4
LT
785 printk("Found one\n");
786
787
788 /* Get irq from board */
789 switch (inb(ioaddr + 0xCC0)) {
790 case(0x10):
791 irq=5;
792 break;
793 case(0x20):
794 irq=9;
795 break;
796 case(0x40):
797 irq=10;
798 break;
799 case(0x80):
800 irq=11;
801 break;
802 default:
803 goto out;
6aa20a22
JG
804 }
805
806
1da177e4
LT
807 /* Setup the newly found eisa adapter */
808 rc = TLan_probe1( NULL, ioaddr, irq,
809 12, NULL);
810 continue;
6aa20a22 811
1da177e4
LT
812 out:
813 if (debug == 0x10)
814 printk("None found\n");
815 continue;
816
817 out2: if (debug == 0x10)
818 printk("Card found but it is not enabled, skipping\n");
819 continue;
6aa20a22 820
1da177e4
LT
821 }
822
823} /* TLan_EisaProbe */
824
825#ifdef CONFIG_NET_POLL_CONTROLLER
826static void TLan_Poll(struct net_device *dev)
827{
828 disable_irq(dev->irq);
7d12e780 829 TLan_HandleInterrupt(dev->irq, dev);
1da177e4
LT
830 enable_irq(dev->irq);
831}
832#endif
833
6aa20a22 834
1da177e4
LT
835
836
837 /***************************************************************
838 * TLan_Init
839 *
840 * Returns:
841 * 0 on success, error code otherwise.
842 * Parms:
843 * dev The structure of the device to be
844 * init'ed.
845 *
846 * This function completes the initialization of the
847 * device structure and driver. It reserves the IO
848 * addresses, allocates memory for the lists and bounce
849 * buffers, retrieves the MAC address from the eeprom
850 * and assignes the device's methods.
6aa20a22 851 *
1da177e4
LT
852 **************************************************************/
853
854static int TLan_Init( struct net_device *dev )
855{
856 int dma_size;
857 int err;
858 int i;
859 TLanPrivateInfo *priv;
860
861 priv = netdev_priv(dev);
6aa20a22 862
1da177e4
LT
863 if ( bbuf ) {
864 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
865 * ( sizeof(TLanList) + TLAN_MAX_FRAME_SIZE );
866 } else {
867 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
868 * ( sizeof(TLanList) );
869 }
870 priv->dmaStorage = pci_alloc_consistent(priv->pciDev, dma_size, &priv->dmaStorageDMA);
871 priv->dmaSize = dma_size;
6aa20a22 872
1da177e4
LT
873 if ( priv->dmaStorage == NULL ) {
874 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n",
875 dev->name );
876 return -ENOMEM;
877 }
878 memset( priv->dmaStorage, 0, dma_size );
6aa20a22 879 priv->rxList = (TLanList *)
1da177e4
LT
880 ( ( ( (u32) priv->dmaStorage ) + 7 ) & 0xFFFFFFF8 );
881 priv->rxListDMA = ( ( ( (u32) priv->dmaStorageDMA ) + 7 ) & 0xFFFFFFF8 );
882 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
883 priv->txListDMA = priv->rxListDMA + sizeof(TLanList) * TLAN_NUM_RX_LISTS;
884 if ( bbuf ) {
885 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS );
886 priv->rxBufferDMA =priv->txListDMA + sizeof(TLanList) * TLAN_NUM_TX_LISTS;
887 priv->txBuffer = priv->rxBuffer + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
888 priv->txBufferDMA = priv->rxBufferDMA + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
889 }
890
891 err = 0;
892 for ( i = 0; i < 6 ; i++ )
893 err |= TLan_EeReadByte( dev,
894 (u8) priv->adapter->addrOfs + i,
895 (u8 *) &dev->dev_addr[i] );
896 if ( err ) {
897 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n",
898 dev->name,
899 err );
900 }
901 dev->addr_len = 6;
902
903 netif_carrier_off(dev);
904
905 /* Device methods */
906 dev->open = &TLan_Open;
907 dev->hard_start_xmit = &TLan_StartTx;
908 dev->stop = &TLan_Close;
909 dev->get_stats = &TLan_GetStats;
910 dev->set_multicast_list = &TLan_SetMulticastList;
911 dev->do_ioctl = &TLan_ioctl;
912#ifdef CONFIG_NET_POLL_CONTROLLER
913 dev->poll_controller = &TLan_Poll;
914#endif
915 dev->tx_timeout = &TLan_tx_timeout;
916 dev->watchdog_timeo = TX_TIMEOUT;
917
918 return 0;
919
920} /* TLan_Init */
921
922
923
924
925 /***************************************************************
926 * TLan_Open
927 *
928 * Returns:
929 * 0 on success, error code otherwise.
930 * Parms:
931 * dev Structure of device to be opened.
932 *
933 * This routine puts the driver and TLAN adapter in a
934 * state where it is ready to send and receive packets.
935 * It allocates the IRQ, resets and brings the adapter
936 * out of reset, and allows interrupts. It also delays
937 * the startup for autonegotiation or sends a Rx GO
938 * command to the adapter, as appropriate.
939 *
940 **************************************************************/
941
942static int TLan_Open( struct net_device *dev )
943{
944 TLanPrivateInfo *priv = netdev_priv(dev);
945 int err;
6aa20a22 946
1da177e4 947 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
1fb9df5d 948 err = request_irq( dev->irq, TLan_HandleInterrupt, IRQF_SHARED, TLanSignature, dev );
6aa20a22 949
1da177e4
LT
950 if ( err ) {
951 printk(KERN_ERR "TLAN: Cannot open %s because IRQ %d is already in use.\n", dev->name, dev->irq );
952 return err;
953 }
6aa20a22 954
1da177e4
LT
955 init_timer(&priv->timer);
956 netif_start_queue(dev);
6aa20a22 957
1da177e4
LT
958 /* NOTE: It might not be necessary to read the stats before a
959 reset if you don't care what the values are.
960 */
961 TLan_ResetLists( dev );
962 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
963 TLan_ResetAdapter( dev );
964
965 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n", dev->name, priv->tlanRev );
966
967 return 0;
968
969} /* TLan_Open */
970
971
972
973 /**************************************************************
974 * TLan_ioctl
6aa20a22 975 *
1da177e4
LT
976 * Returns:
977 * 0 on success, error code otherwise
978 * Params:
979 * dev structure of device to receive ioctl.
6aa20a22 980 *
1da177e4
LT
981 * rq ifreq structure to hold userspace data.
982 *
983 * cmd ioctl command.
984 *
985 *
986 *************************************************************/
987
988static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
989{
990 TLanPrivateInfo *priv = netdev_priv(dev);
991 struct mii_ioctl_data *data = if_mii(rq);
992 u32 phy = priv->phy[priv->phyNum];
6aa20a22 993
1da177e4
LT
994 if (!priv->phyOnline)
995 return -EAGAIN;
996
997 switch(cmd) {
998 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
999 data->phy_id = phy;
1000
1001
1002 case SIOCGMIIREG: /* Read MII PHY register. */
1003 TLan_MiiReadReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, &data->val_out);
1004 return 0;
6aa20a22 1005
1da177e4
LT
1006
1007 case SIOCSMIIREG: /* Write MII PHY register. */
1008 if (!capable(CAP_NET_ADMIN))
1009 return -EPERM;
1010 TLan_MiiWriteReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1011 return 0;
1012 default:
1013 return -EOPNOTSUPP;
1014 }
1015} /* tlan_ioctl */
1016
1017
1018 /***************************************************************
1019 * TLan_tx_timeout
1020 *
1021 * Returns: nothing
1022 *
1023 * Params:
6aa20a22 1024 * dev structure of device which timed out
1da177e4
LT
1025 * during transmit.
1026 *
1027 **************************************************************/
1028
1029static void TLan_tx_timeout(struct net_device *dev)
1030{
6aa20a22 1031
1da177e4 1032 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
6aa20a22 1033
1da177e4
LT
1034 /* Ok so we timed out, lets see what we can do about it...*/
1035 TLan_FreeLists( dev );
6aa20a22 1036 TLan_ResetLists( dev );
1da177e4
LT
1037 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
1038 TLan_ResetAdapter( dev );
1039 dev->trans_start = jiffies;
6aa20a22 1040 netif_wake_queue( dev );
1da177e4
LT
1041
1042}
6aa20a22 1043
1da177e4 1044
c4028958
DH
1045 /***************************************************************
1046 * TLan_tx_timeout_work
1047 *
1048 * Returns: nothing
1049 *
1050 * Params:
1051 * work work item of device which timed out
1052 *
1053 **************************************************************/
1054
1055static void TLan_tx_timeout_work(struct work_struct *work)
1056{
1057 TLanPrivateInfo *priv =
1058 container_of(work, TLanPrivateInfo, tlan_tqueue);
1059
1060 TLan_tx_timeout(priv->dev);
1061}
1062
1063
1da177e4
LT
1064
1065 /***************************************************************
1066 * TLan_StartTx
6aa20a22 1067 *
1da177e4
LT
1068 * Returns:
1069 * 0 on success, non-zero on failure.
1070 * Parms:
1071 * skb A pointer to the sk_buff containing the
1072 * frame to be sent.
1073 * dev The device to send the data on.
1074 *
1075 * This function adds a frame to the Tx list to be sent
1076 * ASAP. First it verifies that the adapter is ready and
1077 * there is room in the queue. Then it sets up the next
1078 * available list, copies the frame to the corresponding
1079 * buffer. If the adapter Tx channel is idle, it gives
1080 * the adapter a Tx Go command on the list, otherwise it
1081 * sets the forward address of the previous list to point
1082 * to this one. Then it frees the sk_buff.
1083 *
1084 **************************************************************/
1085
1086static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1087{
1088 TLanPrivateInfo *priv = netdev_priv(dev);
1089 TLanList *tail_list;
1090 dma_addr_t tail_list_phys;
1091 u8 *tail_buffer;
1092 int pad;
1093 unsigned long flags;
1094
1095 if ( ! priv->phyOnline ) {
1096 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n", dev->name );
1097 dev_kfree_skb_any(skb);
1098 return 0;
1099 }
1100
1101 tail_list = priv->txList + priv->txTail;
1102 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail;
6aa20a22 1103
1da177e4
LT
1104 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
1105 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s is busy (Head=%d Tail=%d)\n", dev->name, priv->txHead, priv->txTail );
1106 netif_stop_queue(dev);
1107 priv->txBusyCount++;
1108 return 1;
1109 }
1110
1111 tail_list->forward = 0;
1112
1113 if ( bbuf ) {
1114 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE );
1115 memcpy( tail_buffer, skb->data, skb->len );
1116 } else {
1117 tail_list->buffer[0].address = pci_map_single(priv->pciDev, skb->data, skb->len, PCI_DMA_TODEVICE);
1118 TLan_StoreSKB(tail_list, skb);
1119 }
1120
1121 pad = TLAN_MIN_FRAME_SIZE - skb->len;
1122
1123 if ( pad > 0 ) {
1124 tail_list->frameSize = (u16) skb->len + pad;
1125 tail_list->buffer[0].count = (u32) skb->len;
1126 tail_list->buffer[1].count = TLAN_LAST_BUFFER | (u32) pad;
1127 tail_list->buffer[1].address = TLanPadBufferDMA;
1128 } else {
1129 tail_list->frameSize = (u16) skb->len;
1130 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) skb->len;
1131 tail_list->buffer[1].count = 0;
1132 tail_list->buffer[1].address = 0;
1133 }
1134
1135 spin_lock_irqsave(&priv->lock, flags);
1136 tail_list->cStat = TLAN_CSTAT_READY;
1137 if ( ! priv->txInProgress ) {
1138 priv->txInProgress = 1;
1139 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
1140 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM );
1141 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD );
1142 } else {
1143 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n", priv->txTail );
1144 if ( priv->txTail == 0 ) {
1145 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward = tail_list_phys;
1146 } else {
1147 ( priv->txList + ( priv->txTail - 1 ) )->forward = tail_list_phys;
1148 }
1149 }
1150 spin_unlock_irqrestore(&priv->lock, flags);
1151
1152 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
1153
1154 if ( bbuf )
1155 dev_kfree_skb_any(skb);
6aa20a22 1156
1da177e4
LT
1157 dev->trans_start = jiffies;
1158 return 0;
1159
1160} /* TLan_StartTx */
1161
1162
1163
1164
1165 /***************************************************************
1166 * TLan_HandleInterrupt
6aa20a22
JG
1167 *
1168 * Returns:
1da177e4
LT
1169 * Nothing
1170 * Parms:
1171 * irq The line on which the interrupt
1172 * occurred.
1173 * dev_id A pointer to the device assigned to
1174 * this irq line.
1da177e4
LT
1175 *
1176 * This function handles an interrupt generated by its
1177 * assigned TLAN adapter. The function deactivates
1178 * interrupts on its adapter, records the type of
1179 * interrupt, executes the appropriate subhandler, and
1180 * acknowdges the interrupt to the adapter (thus
1181 * re-enabling adapter interrupts.
1182 *
1183 **************************************************************/
1184
7d12e780 1185static irqreturn_t TLan_HandleInterrupt(int irq, void *dev_id)
1da177e4
LT
1186{
1187 u32 ack;
1188 struct net_device *dev;
1189 u32 host_cmd;
1190 u16 host_int;
1191 int type;
1192 TLanPrivateInfo *priv;
1193
1194 dev = dev_id;
1195 priv = netdev_priv(dev);
1196
1197 spin_lock(&priv->lock);
1198
1199 host_int = inw( dev->base_addr + TLAN_HOST_INT );
1200 outw( host_int, dev->base_addr + TLAN_HOST_INT );
1201
1202 type = ( host_int & TLAN_HI_IT_MASK ) >> 2;
1203
1204 ack = TLanIntVector[type]( dev, host_int );
1205
1206 if ( ack ) {
1207 host_cmd = TLAN_HC_ACK | ack | ( type << 18 );
1208 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD );
1209 }
1210
1211 spin_unlock(&priv->lock);
1212
1213 return IRQ_HANDLED;
1214} /* TLan_HandleInterrupts */
1215
1216
1217
1218
1219 /***************************************************************
1220 * TLan_Close
6aa20a22 1221 *
1da177e4
LT
1222 * Returns:
1223 * An error code.
1224 * Parms:
1225 * dev The device structure of the device to
1226 * close.
1227 *
1228 * This function shuts down the adapter. It records any
1229 * stats, puts the adapter into reset state, deactivates
1230 * its time as needed, and frees the irq it is using.
1231 *
1232 **************************************************************/
1233
1234static int TLan_Close(struct net_device *dev)
1235{
1236 TLanPrivateInfo *priv = netdev_priv(dev);
1237
1238 netif_stop_queue(dev);
1239 priv->neg_be_verbose = 0;
1240
1241 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1242 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1243 if ( priv->timer.function != NULL ) {
1244 del_timer_sync( &priv->timer );
1245 priv->timer.function = NULL;
1246 }
6aa20a22 1247
1da177e4
LT
1248 free_irq( dev->irq, dev );
1249 TLan_FreeLists( dev );
1250 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name );
1251
1252 return 0;
1253
1254} /* TLan_Close */
1255
1256
1257
1258
1259 /***************************************************************
1260 * TLan_GetStats
6aa20a22 1261 *
1da177e4
LT
1262 * Returns:
1263 * A pointer to the device's statistics structure.
1264 * Parms:
1265 * dev The device structure to return the
1266 * stats for.
1267 *
1268 * This function updates the devices statistics by reading
1269 * the TLAN chip's onboard registers. Then it returns the
1270 * address of the statistics structure.
1271 *
1272 **************************************************************/
1273
1274static struct net_device_stats *TLan_GetStats( struct net_device *dev )
1275{
1276 TLanPrivateInfo *priv = netdev_priv(dev);
1277 int i;
1278
1279 /* Should only read stats if open ? */
1280 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1281
1282 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name, priv->rxEocCount );
1283 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name, priv->txBusyCount );
1284 if ( debug & TLAN_DEBUG_GNRL ) {
1285 TLan_PrintDio( dev->base_addr );
6aa20a22 1286 TLan_PhyPrint( dev );
1da177e4
LT
1287 }
1288 if ( debug & TLAN_DEBUG_LIST ) {
1289 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ )
1290 TLan_PrintList( priv->rxList + i, "RX", i );
1291 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ )
1292 TLan_PrintList( priv->txList + i, "TX", i );
1293 }
6aa20a22 1294
1da177e4
LT
1295 return ( &( (TLanPrivateInfo *) netdev_priv(dev) )->stats );
1296
1297} /* TLan_GetStats */
1298
1299
1300
1301
1302 /***************************************************************
1303 * TLan_SetMulticastList
6aa20a22 1304 *
1da177e4
LT
1305 * Returns:
1306 * Nothing
1307 * Parms:
1308 * dev The device structure to set the
1309 * multicast list for.
1310 *
1311 * This function sets the TLAN adaptor to various receive
1312 * modes. If the IFF_PROMISC flag is set, promiscuous
1313 * mode is acitviated. Otherwise, promiscuous mode is
1314 * turned off. If the IFF_ALLMULTI flag is set, then
1315 * the hash table is set to receive all group addresses.
1316 * Otherwise, the first three multicast addresses are
1317 * stored in AREG_1-3, and the rest are selected via the
1318 * hash table, as necessary.
1319 *
1320 **************************************************************/
1321
1322static void TLan_SetMulticastList( struct net_device *dev )
6aa20a22 1323{
1da177e4
LT
1324 struct dev_mc_list *dmi = dev->mc_list;
1325 u32 hash1 = 0;
1326 u32 hash2 = 0;
1327 int i;
1328 u32 offset;
1329 u8 tmp;
1330
1331 if ( dev->flags & IFF_PROMISC ) {
1332 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1333 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1334 } else {
1335 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1336 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1337 if ( dev->flags & IFF_ALLMULTI ) {
6aa20a22 1338 for ( i = 0; i < 3; i++ )
1da177e4
LT
1339 TLan_SetMac( dev, i + 1, NULL );
1340 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF );
1341 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF );
1342 } else {
1343 for ( i = 0; i < dev->mc_count; i++ ) {
1344 if ( i < 3 ) {
1345 TLan_SetMac( dev, i + 1, (char *) &dmi->dmi_addr );
1346 } else {
1347 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
6aa20a22 1348 if ( offset < 32 )
1da177e4
LT
1349 hash1 |= ( 1 << offset );
1350 else
1351 hash2 |= ( 1 << ( offset - 32 ) );
1352 }
1353 dmi = dmi->next;
1354 }
6aa20a22 1355 for ( ; i < 3; i++ )
1da177e4
LT
1356 TLan_SetMac( dev, i + 1, NULL );
1357 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 );
1358 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 );
1359 }
1360 }
1361
1362} /* TLan_SetMulticastList */
1363
1364
1365
1366/*****************************************************************************
1367******************************************************************************
1368
1369 ThunderLAN Driver Interrupt Vectors and Table
1370
1371 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN
1372 Programmer's Guide" for more informations on handling interrupts
6aa20a22 1373 generated by TLAN based adapters.
1da177e4
LT
1374
1375******************************************************************************
1376*****************************************************************************/
1377
1378
1379 /***************************************************************
1380 * TLan_HandleInvalid
1381 *
1382 * Returns:
1383 * 0
1384 * Parms:
1385 * dev Device assigned the IRQ that was
1386 * raised.
1387 * host_int The contents of the HOST_INT
1388 * port.
1389 *
1390 * This function handles invalid interrupts. This should
1391 * never happen unless some other adapter is trying to use
1392 * the IRQ line assigned to the device.
1393 *
1394 **************************************************************/
1395
1396u32 TLan_HandleInvalid( struct net_device *dev, u16 host_int )
1397{
1398 /* printk( "TLAN: Invalid interrupt on %s.\n", dev->name ); */
1399 return 0;
1400
1401} /* TLan_HandleInvalid */
1402
1403
1404
1405
1406 /***************************************************************
1407 * TLan_HandleTxEOF
1408 *
1409 * Returns:
1410 * 1
1411 * Parms:
1412 * dev Device assigned the IRQ that was
1413 * raised.
1414 * host_int The contents of the HOST_INT
1415 * port.
1416 *
1417 * This function handles Tx EOF interrupts which are raised
1418 * by the adapter when it has completed sending the
1419 * contents of a buffer. If detemines which list/buffer
1420 * was completed and resets it. If the buffer was the last
1421 * in the channel (EOC), then the function checks to see if
1422 * another buffer is ready to send, and if so, sends a Tx
1423 * Go command. Finally, the driver activates/continues the
1424 * activity LED.
1425 *
1426 **************************************************************/
1427
1428u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1429{
1430 TLanPrivateInfo *priv = netdev_priv(dev);
1431 int eoc = 0;
1432 TLanList *head_list;
1433 dma_addr_t head_list_phys;
1434 u32 ack = 0;
1435 u16 tmpCStat;
6aa20a22 1436
1da177e4
LT
1437 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1438 head_list = priv->txList + priv->txHead;
1439
1440 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1441 ack++;
1442 if ( ! bbuf ) {
1443 struct sk_buff *skb = TLan_GetSKB(head_list);
1444 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
1445 dev_kfree_skb_any(skb);
1446 head_list->buffer[8].address = 0;
1447 head_list->buffer[9].address = 0;
1448 }
6aa20a22 1449
1da177e4
LT
1450 if ( tmpCStat & TLAN_CSTAT_EOC )
1451 eoc = 1;
6aa20a22 1452
1da177e4
LT
1453 priv->stats.tx_bytes += head_list->frameSize;
1454
1455 head_list->cStat = TLAN_CSTAT_UNUSED;
6aa20a22
JG
1456 netif_start_queue(dev);
1457 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
1da177e4
LT
1458 head_list = priv->txList + priv->txHead;
1459 }
1460
1461 if (!ack)
1462 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n");
6aa20a22 1463
1da177e4
LT
1464 if ( eoc ) {
1465 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1466 head_list = priv->txList + priv->txHead;
1467 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1468 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1469 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1470 ack |= TLAN_HC_GO;
1471 } else {
1472 priv->txInProgress = 0;
1473 }
1474 }
6aa20a22 1475
1da177e4
LT
1476 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1477 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1478 if ( priv->timer.function == NULL ) {
1479 priv->timer.function = &TLan_Timer;
1480 priv->timer.data = (unsigned long) dev;
1481 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1482 priv->timerSetAt = jiffies;
1483 priv->timerType = TLAN_TIMER_ACTIVITY;
1484 add_timer(&priv->timer);
1485 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1486 priv->timerSetAt = jiffies;
1487 }
1488 }
1489
1490 return ack;
1491
1492} /* TLan_HandleTxEOF */
1493
1494
1495
1496
1497 /***************************************************************
1498 * TLan_HandleStatOverflow
1499 *
1500 * Returns:
1501 * 1
1502 * Parms:
1503 * dev Device assigned the IRQ that was
1504 * raised.
1505 * host_int The contents of the HOST_INT
1506 * port.
1507 *
1508 * This function handles the Statistics Overflow interrupt
1509 * which means that one or more of the TLAN statistics
1510 * registers has reached 1/2 capacity and needs to be read.
1511 *
1512 **************************************************************/
1513
1514u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
1515{
1516 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1517
1518 return 1;
1519
1520} /* TLan_HandleStatOverflow */
1521
1522
1523
1524
1525 /***************************************************************
1526 * TLan_HandleRxEOF
1527 *
1528 * Returns:
1529 * 1
1530 * Parms:
1531 * dev Device assigned the IRQ that was
1532 * raised.
1533 * host_int The contents of the HOST_INT
1534 * port.
1535 *
1536 * This function handles the Rx EOF interrupt which
1537 * indicates a frame has been received by the adapter from
1538 * the net and the frame has been transferred to memory.
1539 * The function determines the bounce buffer the frame has
1540 * been loaded into, creates a new sk_buff big enough to
1541 * hold the frame, and sends it to protocol stack. It
1542 * then resets the used buffer and appends it to the end
1543 * of the list. If the frame was the last in the Rx
1544 * channel (EOC), the function restarts the receive channel
1545 * by sending an Rx Go command to the adapter. Then it
1546 * activates/continues the activity LED.
1547 *
1548 **************************************************************/
1549
1550u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1551{
1552 TLanPrivateInfo *priv = netdev_priv(dev);
1553 u32 ack = 0;
1554 int eoc = 0;
1555 u8 *head_buffer;
1556 TLanList *head_list;
1557 struct sk_buff *skb;
1558 TLanList *tail_list;
1559 void *t;
1560 u32 frameSize;
1561 u16 tmpCStat;
1562 dma_addr_t head_list_phys;
1563
1564 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1565 head_list = priv->rxList + priv->rxHead;
1566 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
6aa20a22 1567
1da177e4
LT
1568 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1569 frameSize = head_list->frameSize;
1570 ack++;
1571 if (tmpCStat & TLAN_CSTAT_EOC)
1572 eoc = 1;
6aa20a22 1573
1da177e4
LT
1574 if (bbuf) {
1575 skb = dev_alloc_skb(frameSize + 7);
1576 if (skb == NULL)
1577 printk(KERN_INFO "TLAN: Couldn't allocate memory for received data.\n");
1578 else {
1579 head_buffer = priv->rxBuffer + (priv->rxHead * TLAN_MAX_FRAME_SIZE);
1580 skb->dev = dev;
1581 skb_reserve(skb, 2);
1582 t = (void *) skb_put(skb, frameSize);
6aa20a22 1583
1da177e4
LT
1584 priv->stats.rx_bytes += head_list->frameSize;
1585
1586 memcpy( t, head_buffer, frameSize );
1587 skb->protocol = eth_type_trans( skb, dev );
1588 netif_rx( skb );
1589 }
1590 } else {
1591 struct sk_buff *new_skb;
6aa20a22 1592
1da177e4
LT
1593 /*
1594 * I changed the algorithm here. What we now do
1595 * is allocate the new frame. If this fails we
1596 * simply recycle the frame.
1597 */
6aa20a22 1598
1da177e4 1599 new_skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
6aa20a22 1600
1da177e4
LT
1601 if ( new_skb != NULL ) {
1602 skb = TLan_GetSKB(head_list);
1603 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1604 skb_trim( skb, frameSize );
1605
1606 priv->stats.rx_bytes += frameSize;
1607
1608 skb->protocol = eth_type_trans( skb, dev );
1609 netif_rx( skb );
6aa20a22 1610
1da177e4
LT
1611 new_skb->dev = dev;
1612 skb_reserve( new_skb, 2 );
1613 t = (void *) skb_put( new_skb, TLAN_MAX_FRAME_SIZE );
1614 head_list->buffer[0].address = pci_map_single(priv->pciDev, new_skb->data, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1615 head_list->buffer[8].address = (u32) t;
1616 TLan_StoreSKB(head_list, new_skb);
6aa20a22 1617 } else
1da177e4
LT
1618 printk(KERN_WARNING "TLAN: Couldn't allocate memory for received data.\n" );
1619 }
1620
1621 head_list->forward = 0;
1622 head_list->cStat = 0;
1623 tail_list = priv->rxList + priv->rxTail;
1624 tail_list->forward = head_list_phys;
1625
1626 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
1627 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
1628 head_list = priv->rxList + priv->rxHead;
1629 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1630 }
1631
1632 if (!ack)
1633 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n");
1da177e4
LT
1634
1635
1636
6aa20a22
JG
1637
1638 if ( eoc ) {
1da177e4
LT
1639 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1640 head_list = priv->rxList + priv->rxHead;
1641 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1642 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1643 ack |= TLAN_HC_GO | TLAN_HC_RT;
1644 priv->rxEocCount++;
1645 }
1646
1647 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1648 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1649 if ( priv->timer.function == NULL ) {
1650 priv->timer.function = &TLan_Timer;
1651 priv->timer.data = (unsigned long) dev;
1652 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1653 priv->timerSetAt = jiffies;
1654 priv->timerType = TLAN_TIMER_ACTIVITY;
1655 add_timer(&priv->timer);
1656 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1657 priv->timerSetAt = jiffies;
1658 }
1659 }
1660
1661 dev->last_rx = jiffies;
6aa20a22 1662
1da177e4
LT
1663 return ack;
1664
1665} /* TLan_HandleRxEOF */
1666
1667
1668
1669
1670 /***************************************************************
1671 * TLan_HandleDummy
1672 *
1673 * Returns:
1674 * 1
1675 * Parms:
1676 * dev Device assigned the IRQ that was
1677 * raised.
1678 * host_int The contents of the HOST_INT
1679 * port.
1680 *
1681 * This function handles the Dummy interrupt, which is
1682 * raised whenever a test interrupt is generated by setting
1683 * the Req_Int bit of HOST_CMD to 1.
1684 *
1685 **************************************************************/
1686
1687u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
1688{
1689 printk( "TLAN: Test interrupt on %s.\n", dev->name );
1690 return 1;
1691
1692} /* TLan_HandleDummy */
1693
1694
1695
1696
1697 /***************************************************************
1698 * TLan_HandleTxEOC
1699 *
1700 * Returns:
1701 * 1
1702 * Parms:
1703 * dev Device assigned the IRQ that was
1704 * raised.
1705 * host_int The contents of the HOST_INT
1706 * port.
1707 *
1708 * This driver is structured to determine EOC occurrences by
1709 * reading the CSTAT member of the list structure. Tx EOC
1710 * interrupts are disabled via the DIO INTDIS register.
1711 * However, TLAN chips before revision 3.0 didn't have this
1712 * functionality, so process EOC events if this is the
1713 * case.
1714 *
1715 **************************************************************/
1716
1717u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
1718{
1719 TLanPrivateInfo *priv = netdev_priv(dev);
1720 TLanList *head_list;
1721 dma_addr_t head_list_phys;
1722 u32 ack = 1;
6aa20a22 1723
1da177e4
LT
1724 host_int = 0;
1725 if ( priv->tlanRev < 0x30 ) {
1726 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", priv->txHead, priv->txTail );
1727 head_list = priv->txList + priv->txHead;
1728 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1729 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1730 netif_stop_queue(dev);
1731 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1732 ack |= TLAN_HC_GO;
1733 } else {
1734 priv->txInProgress = 0;
1735 }
1736 }
1737
1738 return ack;
1739
1740} /* TLan_HandleTxEOC */
1741
1742
1743
1744
1745 /***************************************************************
1746 * TLan_HandleStatusCheck
1747 *
1748 * Returns:
1749 * 0 if Adapter check, 1 if Network Status check.
1750 * Parms:
1751 * dev Device assigned the IRQ that was
1752 * raised.
1753 * host_int The contents of the HOST_INT
1754 * port.
1755 *
1756 * This function handles Adapter Check/Network Status
1757 * interrupts generated by the adapter. It checks the
1758 * vector in the HOST_INT register to determine if it is
1759 * an Adapter Check interrupt. If so, it resets the
1760 * adapter. Otherwise it clears the status registers
1761 * and services the PHY.
1762 *
1763 **************************************************************/
1764
1765u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
6aa20a22 1766{
1da177e4
LT
1767 TLanPrivateInfo *priv = netdev_priv(dev);
1768 u32 ack;
1769 u32 error;
1770 u8 net_sts;
1771 u32 phy;
1772 u16 tlphy_ctl;
1773 u16 tlphy_sts;
6aa20a22 1774
1da177e4
LT
1775 ack = 1;
1776 if ( host_int & TLAN_HI_IV_MASK ) {
1777 netif_stop_queue( dev );
1778 error = inl( dev->base_addr + TLAN_CH_PARM );
1779 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error );
1780 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1781 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1782
1783 schedule_work(&priv->tlan_tqueue);
1784
1785 netif_wake_queue(dev);
1786 ack = 0;
1787 } else {
1788 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name );
1789 phy = priv->phy[priv->phyNum];
1790
1791 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1792 if ( net_sts ) {
1793 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
1794 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n", dev->name, (unsigned) net_sts );
1795 }
1796 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1797 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1798 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
1799 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) && ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1800 tlphy_ctl |= TLAN_TC_SWAPOL;
1801 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1802 } else if ( ( tlphy_sts & TLAN_TS_POLOK ) && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1803 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1804 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1805 }
1806
1807 if (debug) {
6aa20a22 1808 TLan_PhyPrint( dev );
1da177e4
LT
1809 }
1810 }
1811 }
1812
1813 return ack;
1814
1815} /* TLan_HandleStatusCheck */
1816
1817
1818
1819
1820 /***************************************************************
1821 * TLan_HandleRxEOC
1822 *
1823 * Returns:
1824 * 1
1825 * Parms:
1826 * dev Device assigned the IRQ that was
1827 * raised.
1828 * host_int The contents of the HOST_INT
1829 * port.
1830 *
1831 * This driver is structured to determine EOC occurrences by
1832 * reading the CSTAT member of the list structure. Rx EOC
1833 * interrupts are disabled via the DIO INTDIS register.
1834 * However, TLAN chips before revision 3.0 didn't have this
1835 * CSTAT member or a INTDIS register, so if this chip is
1836 * pre-3.0, process EOC interrupts normally.
1837 *
1838 **************************************************************/
1839
1840u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1841{
1842 TLanPrivateInfo *priv = netdev_priv(dev);
1843 dma_addr_t head_list_phys;
1844 u32 ack = 1;
1845
1846 if ( priv->tlanRev < 0x30 ) {
1847 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", priv->rxHead, priv->rxTail );
1848 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1849 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1850 ack |= TLAN_HC_GO | TLAN_HC_RT;
1851 priv->rxEocCount++;
1852 }
1853
1854 return ack;
1855
1856} /* TLan_HandleRxEOC */
1857
1858
1859
1860
1861/*****************************************************************************
1862******************************************************************************
1863
1864 ThunderLAN Driver Timer Function
1865
1866******************************************************************************
1867*****************************************************************************/
1868
1869
1870 /***************************************************************
1871 * TLan_Timer
1872 *
1873 * Returns:
1874 * Nothing
1875 * Parms:
1876 * data A value given to add timer when
1877 * add_timer was called.
1878 *
1879 * This function handles timed functionality for the
1880 * TLAN driver. The two current timer uses are for
1881 * delaying for autonegotionation and driving the ACT LED.
1882 * - Autonegotiation requires being allowed about
1883 * 2 1/2 seconds before attempting to transmit a
1884 * packet. It would be a very bad thing to hang
1885 * the kernel this long, so the driver doesn't
1886 * allow transmission 'til after this time, for
1887 * certain PHYs. It would be much nicer if all
1888 * PHYs were interrupt-capable like the internal
1889 * PHY.
1890 * - The ACT LED, which shows adapter activity, is
1891 * driven by the driver, and so must be left on
1892 * for a short period to power up the LED so it
1893 * can be seen. This delay can be changed by
1894 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1895 * if desired. 100 ms produces a slightly
1896 * sluggish response.
1897 *
1898 **************************************************************/
1899
1900void TLan_Timer( unsigned long data )
1901{
1902 struct net_device *dev = (struct net_device *) data;
1903 TLanPrivateInfo *priv = netdev_priv(dev);
1904 u32 elapsed;
1905 unsigned long flags = 0;
1906
1907 priv->timer.function = NULL;
1908
1909 switch ( priv->timerType ) {
6aa20a22 1910#ifdef MONITOR
1da177e4
LT
1911 case TLAN_TIMER_LINK_BEAT:
1912 TLan_PhyMonitor( dev );
1913 break;
1914#endif
1915 case TLAN_TIMER_PHY_PDOWN:
1916 TLan_PhyPowerDown( dev );
1917 break;
1918 case TLAN_TIMER_PHY_PUP:
1919 TLan_PhyPowerUp( dev );
1920 break;
1921 case TLAN_TIMER_PHY_RESET:
1922 TLan_PhyReset( dev );
1923 break;
1924 case TLAN_TIMER_PHY_START_LINK:
1925 TLan_PhyStartLink( dev );
1926 break;
1927 case TLAN_TIMER_PHY_FINISH_AN:
1928 TLan_PhyFinishAutoNeg( dev );
1929 break;
1930 case TLAN_TIMER_FINISH_RESET:
1931 TLan_FinishReset( dev );
1932 break;
1933 case TLAN_TIMER_ACTIVITY:
1934 spin_lock_irqsave(&priv->lock, flags);
1935 if ( priv->timer.function == NULL ) {
1936 elapsed = jiffies - priv->timerSetAt;
1937 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
1938 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
1939 } else {
1940 priv->timer.function = &TLan_Timer;
1941 priv->timer.expires = priv->timerSetAt + TLAN_TIMER_ACT_DELAY;
1942 spin_unlock_irqrestore(&priv->lock, flags);
1943 add_timer( &priv->timer );
1944 break;
1945 }
1946 }
1947 spin_unlock_irqrestore(&priv->lock, flags);
1948 break;
1949 default:
1950 break;
1951 }
1952
1953} /* TLan_Timer */
1954
1955
1956
1957
1958/*****************************************************************************
1959******************************************************************************
1960
1961 ThunderLAN Driver Adapter Related Routines
1962
1963******************************************************************************
1964*****************************************************************************/
1965
1966
1967 /***************************************************************
1968 * TLan_ResetLists
6aa20a22 1969 *
1da177e4
LT
1970 * Returns:
1971 * Nothing
1972 * Parms:
1973 * dev The device structure with the list
1974 * stuctures to be reset.
1975 *
1976 * This routine sets the variables associated with managing
1977 * the TLAN lists to their initial values.
1978 *
1979 **************************************************************/
1980
1981void TLan_ResetLists( struct net_device *dev )
1982{
1983 TLanPrivateInfo *priv = netdev_priv(dev);
1984 int i;
1985 TLanList *list;
1986 dma_addr_t list_phys;
1987 struct sk_buff *skb;
1988 void *t = NULL;
1989
1990 priv->txHead = 0;
1991 priv->txTail = 0;
1992 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1993 list = priv->txList + i;
1994 list->cStat = TLAN_CSTAT_UNUSED;
1995 if ( bbuf ) {
1996 list->buffer[0].address = priv->txBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
1997 } else {
1998 list->buffer[0].address = 0;
1999 }
2000 list->buffer[2].count = 0;
2001 list->buffer[2].address = 0;
2002 list->buffer[8].address = 0;
2003 list->buffer[9].address = 0;
2004 }
2005
2006 priv->rxHead = 0;
2007 priv->rxTail = TLAN_NUM_RX_LISTS - 1;
2008 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2009 list = priv->rxList + i;
2010 list_phys = priv->rxListDMA + sizeof(TLanList) * i;
2011 list->cStat = TLAN_CSTAT_READY;
2012 list->frameSize = TLAN_MAX_FRAME_SIZE;
2013 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
2014 if ( bbuf ) {
2015 list->buffer[0].address = priv->rxBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
2016 } else {
2017 skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
2018 if ( skb == NULL ) {
2019 printk( "TLAN: Couldn't allocate memory for received data.\n" );
2020 /* If this ever happened it would be a problem */
2021 } else {
2022 skb->dev = dev;
2023 skb_reserve( skb, 2 );
2024 t = (void *) skb_put( skb, TLAN_MAX_FRAME_SIZE );
2025 }
2026 list->buffer[0].address = pci_map_single(priv->pciDev, t, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2027 list->buffer[8].address = (u32) t;
2028 TLan_StoreSKB(list, skb);
2029 }
2030 list->buffer[1].count = 0;
2031 list->buffer[1].address = 0;
2032 if ( i < TLAN_NUM_RX_LISTS - 1 )
2033 list->forward = list_phys + sizeof(TLanList);
2034 else
2035 list->forward = 0;
2036 }
2037
2038} /* TLan_ResetLists */
2039
2040
2041void TLan_FreeLists( struct net_device *dev )
2042{
2043 TLanPrivateInfo *priv = netdev_priv(dev);
2044 int i;
2045 TLanList *list;
2046 struct sk_buff *skb;
2047
2048 if ( ! bbuf ) {
2049 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
2050 list = priv->txList + i;
2051 skb = TLan_GetSKB(list);
2052 if ( skb ) {
2053 pci_unmap_single(priv->pciDev, list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
2054 dev_kfree_skb_any( skb );
2055 list->buffer[8].address = 0;
2056 list->buffer[9].address = 0;
2057 }
2058 }
2059
2060 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2061 list = priv->rxList + i;
2062 skb = TLan_GetSKB(list);
2063 if ( skb ) {
2064 pci_unmap_single(priv->pciDev, list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2065 dev_kfree_skb_any( skb );
2066 list->buffer[8].address = 0;
2067 list->buffer[9].address = 0;
2068 }
2069 }
2070 }
2071} /* TLan_FreeLists */
2072
2073
2074
2075
2076 /***************************************************************
2077 * TLan_PrintDio
6aa20a22 2078 *
1da177e4
LT
2079 * Returns:
2080 * Nothing
2081 * Parms:
2082 * io_base Base IO port of the device of
2083 * which to print DIO registers.
2084 *
2085 * This function prints out all the internal (DIO)
2086 * registers of a TLAN chip.
2087 *
2088 **************************************************************/
2089
2090void TLan_PrintDio( u16 io_base )
2091{
2092 u32 data0, data1;
2093 int i;
2094
2095 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n", io_base );
2096 printk( "TLAN: Off. +0 +4\n" );
2097 for ( i = 0; i < 0x4C; i+= 8 ) {
2098 data0 = TLan_DioRead32( io_base, i );
2099 data1 = TLan_DioRead32( io_base, i + 0x4 );
2100 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 );
2101 }
2102
2103} /* TLan_PrintDio */
2104
2105
2106
2107
2108 /***************************************************************
2109 * TLan_PrintList
6aa20a22 2110 *
1da177e4
LT
2111 * Returns:
2112 * Nothing
2113 * Parms:
2114 * list A pointer to the TLanList structure to
2115 * be printed.
2116 * type A string to designate type of list,
2117 * "Rx" or "Tx".
2118 * num The index of the list.
2119 *
2120 * This function prints out the contents of the list
2121 * pointed to by the list parameter.
2122 *
2123 **************************************************************/
2124
2125void TLan_PrintList( TLanList *list, char *type, int num)
2126{
2127 int i;
2128
2129 printk( "TLAN: %s List %d at 0x%08x\n", type, num, (u32) list );
2130 printk( "TLAN: Forward = 0x%08x\n", list->forward );
2131 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat );
2132 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
2133 /* for ( i = 0; i < 10; i++ ) { */
2134 for ( i = 0; i < 2; i++ ) {
2135 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n", i, list->buffer[i].count, list->buffer[i].address );
2136 }
2137
2138} /* TLan_PrintList */
2139
2140
2141
2142
2143 /***************************************************************
2144 * TLan_ReadAndClearStats
2145 *
2146 * Returns:
2147 * Nothing
2148 * Parms:
2149 * dev Pointer to device structure of adapter
2150 * to which to read stats.
6aa20a22 2151 * record Flag indicating whether to add
1da177e4
LT
2152 *
2153 * This functions reads all the internal status registers
2154 * of the TLAN chip, which clears them as a side effect.
2155 * It then either adds the values to the device's status
2156 * struct, or discards them, depending on whether record
2157 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2158 *
2159 **************************************************************/
2160
2161void TLan_ReadAndClearStats( struct net_device *dev, int record )
2162{
2163 TLanPrivateInfo *priv = netdev_priv(dev);
2164 u32 tx_good, tx_under;
2165 u32 rx_good, rx_over;
2166 u32 def_tx, crc, code;
2167 u32 multi_col, single_col;
2168 u32 excess_col, late_col, loss;
2169
2170 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2171 tx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2172 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2173 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2174 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2175
2176 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2177 rx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2178 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2179 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2180 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2181
1da177e4
LT
2182 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR );
2183 def_tx = inb( dev->base_addr + TLAN_DIO_DATA );
2184 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2185 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2186 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2187
1da177e4
LT
2188 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2189 multi_col = inb( dev->base_addr + TLAN_DIO_DATA );
2190 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2191 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2192 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8;
2193
2194 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2195 excess_col = inb( dev->base_addr + TLAN_DIO_DATA );
2196 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 );
2197 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2198
2199 if ( record ) {
2200 priv->stats.rx_packets += rx_good;
2201 priv->stats.rx_errors += rx_over + crc + code;
2202 priv->stats.tx_packets += tx_good;
2203 priv->stats.tx_errors += tx_under + loss;
2204 priv->stats.collisions += multi_col + single_col + excess_col + late_col;
2205
2206 priv->stats.rx_over_errors += rx_over;
2207 priv->stats.rx_crc_errors += crc;
2208 priv->stats.rx_frame_errors += code;
2209
2210 priv->stats.tx_aborted_errors += tx_under;
2211 priv->stats.tx_carrier_errors += loss;
2212 }
6aa20a22 2213
1da177e4
LT
2214} /* TLan_ReadAndClearStats */
2215
2216
2217
2218
2219 /***************************************************************
2220 * TLan_Reset
2221 *
2222 * Returns:
2223 * 0
2224 * Parms:
2225 * dev Pointer to device structure of adapter
2226 * to be reset.
2227 *
2228 * This function resets the adapter and it's physical
2229 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2230 * Programmer's Guide" for details. The routine tries to
2231 * implement what is detailed there, though adjustments
2232 * have been made.
2233 *
2234 **************************************************************/
2235
2236void
2237TLan_ResetAdapter( struct net_device *dev )
2238{
2239 TLanPrivateInfo *priv = netdev_priv(dev);
2240 int i;
2241 u32 addr;
2242 u32 data;
2243 u8 data8;
2244
2245 priv->tlanFullDuplex = FALSE;
2246 priv->phyOnline=0;
2247 netif_carrier_off(dev);
2248
2249/* 1. Assert reset bit. */
2250
2251 data = inl(dev->base_addr + TLAN_HOST_CMD);
2252 data |= TLAN_HC_AD_RST;
2253 outl(data, dev->base_addr + TLAN_HOST_CMD);
6aa20a22 2254
1da177e4
LT
2255 udelay(1000);
2256
2257/* 2. Turn off interrupts. ( Probably isn't necessary ) */
2258
2259 data = inl(dev->base_addr + TLAN_HOST_CMD);
2260 data |= TLAN_HC_INT_OFF;
2261 outl(data, dev->base_addr + TLAN_HOST_CMD);
2262
2263/* 3. Clear AREGs and HASHs. */
2264
2265 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) {
2266 TLan_DioWrite32( dev->base_addr, (u16) i, 0 );
2267 }
2268
2269/* 4. Setup NetConfig register. */
2270
2271 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2272 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2273
2274/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2275
2276 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD );
2277 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD );
2278
2279/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2280
2281 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR );
2282 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2283 TLan_SetBit( TLAN_NET_SIO_NMRST, addr );
2284
2285/* 7. Setup the remaining registers. */
2286
2287 if ( priv->tlanRev >= 0x30 ) {
2288 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2289 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 );
2290 }
2291 TLan_PhyDetect( dev );
2292 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
6aa20a22 2293
1da177e4
LT
2294 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
2295 data |= TLAN_NET_CFG_BIT;
2296 if ( priv->aui == 1 ) {
2297 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a );
2298 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2299 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 );
2300 priv->tlanFullDuplex = TRUE;
2301 } else {
2302 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 );
2303 }
2304 }
2305
2306 if ( priv->phyNum == 0 ) {
2307 data |= TLAN_NET_CFG_PHY_EN;
2308 }
2309 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2310
2311 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2312 TLan_FinishReset( dev );
2313 } else {
2314 TLan_PhyPowerDown( dev );
2315 }
2316
2317} /* TLan_ResetAdapter */
2318
2319
2320
2321
2322void
2323TLan_FinishReset( struct net_device *dev )
2324{
2325 TLanPrivateInfo *priv = netdev_priv(dev);
2326 u8 data;
2327 u32 phy;
2328 u8 sio;
2329 u16 status;
2330 u16 partner;
2331 u16 tlphy_ctl;
2332 u16 tlphy_par;
2333 u16 tlphy_id1, tlphy_id2;
2334 int i;
2335
2336 phy = priv->phy[priv->phyNum];
2337
2338 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2339 if ( priv->tlanFullDuplex ) {
2340 data |= TLAN_NET_CMD_DUPLEX;
2341 }
2342 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
6aa20a22 2343 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
1da177e4 2344 if ( priv->phyNum == 0 ) {
6aa20a22 2345 data |= TLAN_NET_MASK_MASK7;
1da177e4
LT
2346 }
2347 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data );
2348 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 );
2349 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 );
2350 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
6aa20a22 2351
1da177e4
LT
2352 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || ( priv->aui ) ) {
2353 status = MII_GS_LINK;
2354 printk( "TLAN: %s: Link forced.\n", dev->name );
2355 } else {
2356 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2357 udelay( 1000 );
2358 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
6aa20a22 2359 if ( (status & MII_GS_LINK) && /* We only support link info on Nat.Sem. PHY's */
1da177e4
LT
2360 (tlphy_id1 == NAT_SEM_ID1) &&
2361 (tlphy_id2 == NAT_SEM_ID2) ) {
2362 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner );
2363 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par );
6aa20a22 2364
1da177e4
LT
2365 printk( "TLAN: %s: Link active with ", dev->name );
2366 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
6aa20a22 2367 printk( "forced 10%sMbps %s-Duplex\n",
1da177e4
LT
2368 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2369 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2370 } else {
2371 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
2372 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2373 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2374 printk("TLAN: Partner capability: ");
2375 for (i = 5; i <= 10; i++)
2376 if (partner & (1<<i))
2377 printk("%s",media[i-5]);
2378 printk("\n");
2379 }
2380
2381 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
6aa20a22 2382#ifdef MONITOR
1da177e4
LT
2383 /* We have link beat..for now anyway */
2384 priv->link = 1;
2385 /*Enabling link beat monitoring */
2386 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2387#endif
1da177e4
LT
2388 } else if (status & MII_GS_LINK) {
2389 printk( "TLAN: %s: Link active\n", dev->name );
2390 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2391 }
2392 }
2393
2394 if ( priv->phyNum == 0 ) {
2395 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
2396 tlphy_ctl |= TLAN_TC_INTEN;
2397 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl );
2398 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO );
2399 sio |= TLAN_NET_SIO_MINTEN;
2400 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio );
2401 }
2402
2403 if ( status & MII_GS_LINK ) {
2404 TLan_SetMac( dev, 0, dev->dev_addr );
2405 priv->phyOnline = 1;
2406 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2407 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) {
2408 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2409 }
2410 outl( priv->rxListDMA, dev->base_addr + TLAN_CH_PARM );
2411 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2412 netif_carrier_on(dev);
2413 } else {
2414 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n", dev->name );
2415 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
2416 return;
2417 }
562faf46 2418 TLan_SetMulticastList(dev);
1da177e4
LT
2419
2420} /* TLan_FinishReset */
2421
2422
2423
2424
2425 /***************************************************************
2426 * TLan_SetMac
2427 *
2428 * Returns:
2429 * Nothing
2430 * Parms:
2431 * dev Pointer to device structure of adapter
2432 * on which to change the AREG.
2433 * areg The AREG to set the address in (0 - 3).
2434 * mac A pointer to an array of chars. Each
2435 * element stores one byte of the address.
2436 * IE, it isn't in ascii.
2437 *
2438 * This function transfers a MAC address to one of the
2439 * TLAN AREGs (address registers). The TLAN chip locks
2440 * the register on writing to offset 0 and unlocks the
2441 * register after writing to offset 5. If NULL is passed
2442 * in mac, then the AREG is filled with 0's.
2443 *
2444 **************************************************************/
2445
2446void TLan_SetMac( struct net_device *dev, int areg, char *mac )
2447{
2448 int i;
6aa20a22 2449
1da177e4
LT
2450 areg *= 6;
2451
2452 if ( mac != NULL ) {
2453 for ( i = 0; i < 6; i++ )
2454 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, mac[i] );
2455 } else {
2456 for ( i = 0; i < 6; i++ )
2457 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, 0 );
2458 }
2459
2460} /* TLan_SetMac */
2461
2462
2463
2464
2465/*****************************************************************************
2466******************************************************************************
2467
2468 ThunderLAN Driver PHY Layer Routines
2469
2470******************************************************************************
2471*****************************************************************************/
2472
2473
2474
2475 /*********************************************************************
2476 * TLan_PhyPrint
2477 *
2478 * Returns:
2479 * Nothing
2480 * Parms:
2481 * dev A pointer to the device structure of the
2482 * TLAN device having the PHYs to be detailed.
6aa20a22 2483 *
1da177e4
LT
2484 * This function prints the registers a PHY (aka transceiver).
2485 *
2486 ********************************************************************/
2487
2488void TLan_PhyPrint( struct net_device *dev )
2489{
2490 TLanPrivateInfo *priv = netdev_priv(dev);
2491 u16 i, data0, data1, data2, data3, phy;
2492
2493 phy = priv->phy[priv->phyNum];
2494
2495 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2496 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name );
2497 } else if ( phy <= TLAN_PHY_MAX_ADDR ) {
2498 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy );
2499 printk( "TLAN: Off. +0 +1 +2 +3 \n" );
2500 for ( i = 0; i < 0x20; i+= 4 ) {
2501 printk( "TLAN: 0x%02x", i );
2502 TLan_MiiReadReg( dev, phy, i, &data0 );
2503 printk( " 0x%04hx", data0 );
2504 TLan_MiiReadReg( dev, phy, i + 1, &data1 );
2505 printk( " 0x%04hx", data1 );
2506 TLan_MiiReadReg( dev, phy, i + 2, &data2 );
2507 printk( " 0x%04hx", data2 );
2508 TLan_MiiReadReg( dev, phy, i + 3, &data3 );
2509 printk( " 0x%04hx\n", data3 );
2510 }
2511 } else {
2512 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name );
2513 }
2514
2515} /* TLan_PhyPrint */
2516
2517
2518
2519
2520 /*********************************************************************
2521 * TLan_PhyDetect
2522 *
2523 * Returns:
2524 * Nothing
2525 * Parms:
2526 * dev A pointer to the device structure of the adapter
2527 * for which the PHY needs determined.
2528 *
2529 * So far I've found that adapters which have external PHYs
2530 * may also use the internal PHY for part of the functionality.
2531 * (eg, AUI/Thinnet). This function finds out if this TLAN
2532 * chip has an internal PHY, and then finds the first external
2533 * PHY (starting from address 0) if it exists).
2534 *
2535 ********************************************************************/
2536
2537void TLan_PhyDetect( struct net_device *dev )
2538{
2539 TLanPrivateInfo *priv = netdev_priv(dev);
2540 u16 control;
2541 u16 hi;
2542 u16 lo;
2543 u32 phy;
2544
2545 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2546 priv->phyNum = 0xFFFF;
2547 return;
2548 }
2549
2550 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi );
6aa20a22 2551
1da177e4
LT
2552 if ( hi != 0xFFFF ) {
2553 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2554 } else {
2555 priv->phy[0] = TLAN_PHY_NONE;
2556 }
2557
2558 priv->phy[1] = TLAN_PHY_NONE;
2559 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) {
2560 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2561 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2562 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
2563 if ( ( control != 0xFFFF ) || ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2564 TLAN_DBG( TLAN_DEBUG_GNRL, "PHY found at %02x %04x %04x %04x\n", phy, control, hi, lo );
2565 if ( ( priv->phy[1] == TLAN_PHY_NONE ) && ( phy != TLAN_PHY_MAX_ADDR ) ) {
2566 priv->phy[1] = phy;
2567 }
2568 }
2569 }
2570
2571 if ( priv->phy[1] != TLAN_PHY_NONE ) {
2572 priv->phyNum = 1;
2573 } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
2574 priv->phyNum = 0;
2575 } else {
2576 printk( "TLAN: Cannot initialize device, no PHY was found!\n" );
2577 }
2578
2579} /* TLan_PhyDetect */
2580
2581
2582
2583
2584void TLan_PhyPowerDown( struct net_device *dev )
2585{
2586 TLanPrivateInfo *priv = netdev_priv(dev);
2587 u16 value;
2588
2589 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name );
2590 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2591 TLan_MiiSync( dev->base_addr );
2592 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2593 if ( ( priv->phyNum == 0 ) && ( priv->phy[1] != TLAN_PHY_NONE ) && ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
2594 TLan_MiiSync( dev->base_addr );
2595 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2596 }
2597
2598 /* Wait for 50 ms and powerup
2599 * This is abitrary. It is intended to make sure the
2600 * transceiver settles.
2601 */
2602 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP );
2603
2604} /* TLan_PhyPowerDown */
2605
2606
2607
2608
2609void TLan_PhyPowerUp( struct net_device *dev )
2610{
2611 TLanPrivateInfo *priv = netdev_priv(dev);
2612 u16 value;
2613
2614 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name );
2615 TLan_MiiSync( dev->base_addr );
2616 value = MII_GC_LOOPBK;
2617 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2618 TLan_MiiSync(dev->base_addr);
2619 /* Wait for 500 ms and reset the
2620 * transceiver. The TLAN docs say both 50 ms and
2621 * 500 ms, so do the longer, just in case.
2622 */
2623 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET );
2624
2625} /* TLan_PhyPowerUp */
2626
2627
2628
2629
2630void TLan_PhyReset( struct net_device *dev )
2631{
2632 TLanPrivateInfo *priv = netdev_priv(dev);
2633 u16 phy;
2634 u16 value;
2635
2636 phy = priv->phy[priv->phyNum];
2637
2638 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name );
2639 TLan_MiiSync( dev->base_addr );
2640 value = MII_GC_LOOPBK | MII_GC_RESET;
2641 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value );
2642 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2643 while ( value & MII_GC_RESET ) {
2644 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2645 }
2646
2647 /* Wait for 500 ms and initialize.
2648 * I don't remember why I wait this long.
2649 * I've changed this to 50ms, as it seems long enough.
2650 */
2651 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK );
2652
2653} /* TLan_PhyReset */
2654
2655
2656
2657
2658void TLan_PhyStartLink( struct net_device *dev )
2659{
2660 TLanPrivateInfo *priv = netdev_priv(dev);
2661 u16 ability;
2662 u16 control;
2663 u16 data;
2664 u16 phy;
2665 u16 status;
2666 u16 tctl;
2667
2668 phy = priv->phy[priv->phyNum];
2669 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name );
2670 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2671 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability );
2672
6aa20a22 2673 if ( ( status & MII_GS_AUTONEG ) &&
1da177e4
LT
2674 ( ! priv->aui ) ) {
2675 ability = status >> 11;
6aa20a22 2676 if ( priv->speed == TLAN_SPEED_10 &&
1da177e4
LT
2677 priv->duplex == TLAN_DUPLEX_HALF) {
2678 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000);
2679 } else if ( priv->speed == TLAN_SPEED_10 &&
2680 priv->duplex == TLAN_DUPLEX_FULL) {
2681 priv->tlanFullDuplex = TRUE;
2682 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100);
2683 } else if ( priv->speed == TLAN_SPEED_100 &&
2684 priv->duplex == TLAN_DUPLEX_HALF) {
2685 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000);
2686 } else if ( priv->speed == TLAN_SPEED_100 &&
2687 priv->duplex == TLAN_DUPLEX_FULL) {
2688 priv->tlanFullDuplex = TRUE;
2689 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100);
2690 } else {
6aa20a22 2691
1da177e4
LT
2692 /* Set Auto-Neg advertisement */
2693 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1);
2694 /* Enablee Auto-Neg */
2695 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 );
2696 /* Restart Auto-Neg */
2697 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 );
2698 /* Wait for 4 sec for autonegotiation
2699 * to complete. The max spec time is less than this
2700 * but the card need additional time to start AN.
2701 * .5 sec should be plenty extra.
2702 */
2703 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name );
2704 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN );
2705 return;
2706 }
6aa20a22
JG
2707
2708 }
2709
1da177e4
LT
2710 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
2711 priv->phyNum = 0;
2712 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2713 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2714 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2715 return;
2716 } else if ( priv->phyNum == 0 ) {
2717 control = 0;
2718 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl );
2719 if ( priv->aui ) {
2720 tctl |= TLAN_TC_AUISEL;
6aa20a22 2721 } else {
1da177e4
LT
2722 tctl &= ~TLAN_TC_AUISEL;
2723 if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2724 control |= MII_GC_DUPLEX;
2725 priv->tlanFullDuplex = TRUE;
2726 }
2727 if ( priv->speed == TLAN_SPEED_100 ) {
2728 control |= MII_GC_SPEEDSEL;
2729 }
2730 }
2731 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control );
2732 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl );
2733 }
2734
2735 /* Wait for 2 sec to give the transceiver time
2736 * to establish link.
2737 */
2738 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET );
2739
2740} /* TLan_PhyStartLink */
2741
2742
2743
2744
2745void TLan_PhyFinishAutoNeg( struct net_device *dev )
2746{
2747 TLanPrivateInfo *priv = netdev_priv(dev);
2748 u16 an_adv;
2749 u16 an_lpa;
2750 u16 data;
2751 u16 mode;
2752 u16 phy;
2753 u16 status;
6aa20a22 2754
1da177e4
LT
2755 phy = priv->phy[priv->phyNum];
2756
2757 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2758 udelay( 1000 );
2759 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2760
2761 if ( ! ( status & MII_GS_AUTOCMPLT ) ) {
2762 /* Wait for 8 sec to give the process
2763 * more time. Perhaps we should fail after a while.
2764 */
2765 if (!priv->neg_be_verbose++) {
2766 printk(KERN_INFO "TLAN: Giving autonegotiation more time.\n");
2767 printk(KERN_INFO "TLAN: Please check that your adapter has\n");
2768 printk(KERN_INFO "TLAN: been properly connected to a HUB or Switch.\n");
2769 printk(KERN_INFO "TLAN: Trying to establish link in the background...\n");
2770 }
2771 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN );
2772 return;
2773 }
2774
2775 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name );
2776 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv );
2777 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa );
2778 mode = an_adv & an_lpa & 0x03E0;
2779 if ( mode & 0x0100 ) {
2780 priv->tlanFullDuplex = TRUE;
2781 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) {
2782 priv->tlanFullDuplex = TRUE;
2783 }
2784
2785 if ( ( ! ( mode & 0x0180 ) ) && ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && ( priv->phyNum != 0 ) ) {
2786 priv->phyNum = 0;
2787 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2788 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2789 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2790 return;
2791 }
2792
2793 if ( priv->phyNum == 0 ) {
2794 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || ( an_adv & an_lpa & 0x0040 ) ) {
2795 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB | MII_GC_DUPLEX );
2796 printk( "TLAN: Starting internal PHY with FULL-DUPLEX\n" );
2797 } else {
2798 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
2799 printk( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
2800 }
2801 }
2802
2803 /* Wait for 100 ms. No reason in partiticular.
2804 */
2805 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET );
6aa20a22 2806
1da177e4
LT
2807} /* TLan_PhyFinishAutoNeg */
2808
2809#ifdef MONITOR
2810
2811 /*********************************************************************
2812 *
2813 * TLan_phyMonitor
2814 *
6aa20a22 2815 * Returns:
1da177e4
LT
2816 * None
2817 *
2818 * Params:
2819 * dev The device structure of this device.
2820 *
6aa20a22 2821 *
1da177e4
LT
2822 * This function monitors PHY condition by reading the status
2823 * register via the MII bus. This can be used to give info
2824 * about link changes (up/down), and possible switch to alternate
2825 * media.
2826 *
2827 * ******************************************************************/
2828
2829void TLan_PhyMonitor( struct net_device *dev )
2830{
2831 TLanPrivateInfo *priv = netdev_priv(dev);
2832 u16 phy;
2833 u16 phy_status;
2834
2835 phy = priv->phy[priv->phyNum];
2836
2837 /* Get PHY status register */
2838 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status );
2839
2840 /* Check if link has been lost */
6aa20a22 2841 if (!(phy_status & MII_GS_LINK)) {
1da177e4
LT
2842 if (priv->link) {
2843 priv->link = 0;
2844 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name);
7d17c1d6 2845 netif_carrier_off(dev);
1da177e4
LT
2846 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2847 return;
2848 }
2849 }
2850
2851 /* Link restablished? */
2852 if ((phy_status & MII_GS_LINK) && !priv->link) {
2853 priv->link = 1;
2854 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name);
7d17c1d6 2855 netif_carrier_on(dev);
1da177e4
LT
2856 }
2857
2858 /* Setup a new monitor */
2859 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2860}
1da177e4
LT
2861
2862#endif /* MONITOR */
2863
2864
2865/*****************************************************************************
2866******************************************************************************
2867
2868 ThunderLAN Driver MII Routines
2869
2870 These routines are based on the information in Chap. 2 of the
2871 "ThunderLAN Programmer's Guide", pp. 15-24.
2872
2873******************************************************************************
2874*****************************************************************************/
2875
2876
2877 /***************************************************************
2878 * TLan_MiiReadReg
2879 *
2880 * Returns:
2881 * 0 if ack received ok
2882 * 1 otherwise.
2883 *
2884 * Parms:
2885 * dev The device structure containing
2886 * The io address and interrupt count
2887 * for this device.
2888 * phy The address of the PHY to be queried.
2889 * reg The register whose contents are to be
4a4efbde 2890 * retrieved.
1da177e4
LT
2891 * val A pointer to a variable to store the
2892 * retrieved value.
2893 *
4a4efbde 2894 * This function uses the TLAN's MII bus to retrieve the contents
1da177e4
LT
2895 * of a given register on a PHY. It sends the appropriate info
2896 * and then reads the 16-bit register value from the MII bus via
2897 * the TLAN SIO register.
2898 *
2899 **************************************************************/
2900
2901int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
2902{
2903 u8 nack;
2904 u16 sio, tmp;
2905 u32 i;
2906 int err;
2907 int minten;
2908 TLanPrivateInfo *priv = netdev_priv(dev);
2909 unsigned long flags = 0;
2910
2911 err = FALSE;
2912 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2913 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 2914
1da177e4
LT
2915 if (!in_irq())
2916 spin_lock_irqsave(&priv->lock, flags);
2917
2918 TLan_MiiSync(dev->base_addr);
2919
2920 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2921 if ( minten )
2922 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio);
2923
2924 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2925 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */
2926 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2927 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2928
2929
2930 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */
2931
2932 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */
2933 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2934 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */
2935
2936 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */
2937 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */
2938 if (nack) { /* No ACK, so fake it */
2939 for (i = 0; i < 16; i++) {
2940 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2941 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2942 }
2943 tmp = 0xffff;
2944 err = TRUE;
2945 } else { /* ACK, so read data */
2946 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2947 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2948 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio))
2949 tmp |= i;
2950 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2951 }
2952 }
2953
2954
2955 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */
2956 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2957
2958 if ( minten )
2959 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio);
2960
2961 *val = tmp;
6aa20a22 2962
1da177e4
LT
2963 if (!in_irq())
2964 spin_unlock_irqrestore(&priv->lock, flags);
2965
2966 return err;
2967
2968} /* TLan_MiiReadReg */
2969
2970
2971
2972
2973 /***************************************************************
2974 * TLan_MiiSendData
2975 *
2976 * Returns:
2977 * Nothing
2978 * Parms:
2979 * base_port The base IO port of the adapter in
2980 * question.
2981 * dev The address of the PHY to be queried.
2982 * data The value to be placed on the MII bus.
2983 * num_bits The number of bits in data that are to
2984 * be placed on the MII bus.
2985 *
2986 * This function sends on sequence of bits on the MII
2987 * configuration bus.
2988 *
2989 **************************************************************/
2990
2991void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
2992{
2993 u16 sio;
2994 u32 i;
2995
2996 if ( num_bits == 0 )
2997 return;
2998
2999 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3000 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3001 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio );
3002
3003 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) {
3004 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3005 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
3006 if ( data & i )
3007 TLan_SetBit( TLAN_NET_SIO_MDATA, sio );
3008 else
3009 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio );
3010 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3011 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
3012 }
3013
3014} /* TLan_MiiSendData */
3015
3016
3017
3018
3019 /***************************************************************
3020 * TLan_MiiSync
3021 *
3022 * Returns:
3023 * Nothing
3024 * Parms:
3025 * base_port The base IO port of the adapter in
3026 * question.
3027 *
3028 * This functions syncs all PHYs in terms of the MII configuration
3029 * bus.
3030 *
3031 **************************************************************/
3032
3033void TLan_MiiSync( u16 base_port )
3034{
3035 int i;
3036 u16 sio;
3037
3038 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3039 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3040
3041 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio );
3042 for ( i = 0; i < 32; i++ ) {
3043 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3044 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3045 }
3046
3047} /* TLan_MiiSync */
3048
3049
3050
3051
3052 /***************************************************************
3053 * TLan_MiiWriteReg
3054 *
3055 * Returns:
3056 * Nothing
3057 * Parms:
3058 * dev The device structure for the device
3059 * to write to.
3060 * phy The address of the PHY to be written to.
3061 * reg The register whose contents are to be
3062 * written.
3063 * val The value to be written to the register.
3064 *
3065 * This function uses the TLAN's MII bus to write the contents of a
3066 * given register on a PHY. It sends the appropriate info and then
3067 * writes the 16-bit register value from the MII configuration bus
3068 * via the TLAN SIO register.
3069 *
3070 **************************************************************/
3071
3072void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
3073{
3074 u16 sio;
3075 int minten;
3076 unsigned long flags = 0;
3077 TLanPrivateInfo *priv = netdev_priv(dev);
3078
3079 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3080 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 3081
1da177e4
LT
3082 if (!in_irq())
3083 spin_lock_irqsave(&priv->lock, flags);
3084
3085 TLan_MiiSync( dev->base_addr );
3086
3087 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
3088 if ( minten )
3089 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
3090
3091 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
3092 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */
3093 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
3094 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
3095
3096 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */
3097 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */
3098
3099 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */
3100 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3101
3102 if ( minten )
3103 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
6aa20a22 3104
1da177e4
LT
3105 if (!in_irq())
3106 spin_unlock_irqrestore(&priv->lock, flags);
3107
3108} /* TLan_MiiWriteReg */
3109
3110
3111
3112
3113/*****************************************************************************
3114******************************************************************************
3115
3116 ThunderLAN Driver Eeprom routines
3117
3118 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A
3119 EEPROM. These functions are based on information in Microchip's
3120 data sheet. I don't know how well this functions will work with
3121 other EEPROMs.
3122
3123******************************************************************************
3124*****************************************************************************/
3125
3126
3127 /***************************************************************
3128 * TLan_EeSendStart
3129 *
3130 * Returns:
3131 * Nothing
6aa20a22 3132 * Parms:
1da177e4
LT
3133 * io_base The IO port base address for the
3134 * TLAN device with the EEPROM to
3135 * use.
3136 *
3137 * This function sends a start cycle to an EEPROM attached
3138 * to a TLAN chip.
3139 *
3140 **************************************************************/
3141
3142void TLan_EeSendStart( u16 io_base )
3143{
3144 u16 sio;
3145
3146 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3147 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3148
3149 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3150 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3151 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3152 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3153 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3154
3155} /* TLan_EeSendStart */
3156
3157
3158
3159
3160 /***************************************************************
3161 * TLan_EeSendByte
3162 *
3163 * Returns:
3164 * If the correct ack was received, 0, otherwise 1
3165 * Parms: io_base The IO port base address for the
3166 * TLAN device with the EEPROM to
3167 * use.
3168 * data The 8 bits of information to
3169 * send to the EEPROM.
3170 * stop If TLAN_EEPROM_STOP is passed, a
3171 * stop cycle is sent after the
3172 * byte is sent after the ack is
3173 * read.
3174 *
3175 * This function sends a byte on the serial EEPROM line,
3176 * driving the clock to send each bit. The function then
3177 * reverses transmission direction and reads an acknowledge
3178 * bit.
3179 *
3180 **************************************************************/
3181
3182int TLan_EeSendByte( u16 io_base, u8 data, int stop )
3183{
3184 int err;
3185 u8 place;
3186 u16 sio;
3187
3188 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3189 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3190
3191 /* Assume clock is low, tx is enabled; */
3192 for ( place = 0x80; place != 0; place >>= 1 ) {
3193 if ( place & data )
3194 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3195 else
3196 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3197 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3198 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3199 }
3200 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3201 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3202 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio );
3203 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3204 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3205
3206 if ( ( ! err ) && stop ) {
3207 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3208 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3209 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3210 }
3211
3212 return ( err );
3213
3214} /* TLan_EeSendByte */
3215
3216
3217
3218
3219 /***************************************************************
3220 * TLan_EeReceiveByte
3221 *
3222 * Returns:
3223 * Nothing
3224 * Parms:
3225 * io_base The IO port base address for the
3226 * TLAN device with the EEPROM to
3227 * use.
3228 * data An address to a char to hold the
3229 * data sent from the EEPROM.
3230 * stop If TLAN_EEPROM_STOP is passed, a
3231 * stop cycle is sent after the
3232 * byte is received, and no ack is
3233 * sent.
3234 *
3235 * This function receives 8 bits of data from the EEPROM
3236 * over the serial link. It then sends and ack bit, or no
3237 * ack and a stop bit. This function is used to retrieve
3238 * data after the address of a byte in the EEPROM has been
3239 * sent.
3240 *
3241 **************************************************************/
3242
3243void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
3244{
3245 u8 place;
3246 u16 sio;
3247
3248 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3249 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3250 *data = 0;
3251
3252 /* Assume clock is low, tx is enabled; */
3253 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3254 for ( place = 0x80; place; place >>= 1 ) {
3255 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3256 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) )
3257 *data |= place;
3258 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3259 }
3260
3261 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3262 if ( ! stop ) {
3263 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */
3264 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3265 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3266 } else {
3267 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
3268 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3269 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3270 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3271 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3272 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3273 }
3274
3275} /* TLan_EeReceiveByte */
3276
3277
3278
3279
3280 /***************************************************************
3281 * TLan_EeReadByte
3282 *
3283 * Returns:
3284 * No error = 0, else, the stage at which the error
3285 * occurred.
3286 * Parms:
3287 * io_base The IO port base address for the
3288 * TLAN device with the EEPROM to
3289 * use.
3290 * ee_addr The address of the byte in the
3291 * EEPROM whose contents are to be
3292 * retrieved.
3293 * data An address to a char to hold the
3294 * data obtained from the EEPROM.
3295 *
3296 * This function reads a byte of information from an byte
3297 * cell in the EEPROM.
3298 *
3299 **************************************************************/
3300
3301int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
3302{
3303 int err;
3304 TLanPrivateInfo *priv = netdev_priv(dev);
3305 unsigned long flags = 0;
3306 int ret=0;
3307
3308 spin_lock_irqsave(&priv->lock, flags);
3309
3310 TLan_EeSendStart( dev->base_addr );
3311 err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK );
3312 if (err)
3313 {
3314 ret=1;
3315 goto fail;
3316 }
3317 err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK );
3318 if (err)
3319 {
3320 ret=2;
3321 goto fail;
3322 }
3323 TLan_EeSendStart( dev->base_addr );
3324 err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK );
3325 if (err)
3326 {
3327 ret=3;
3328 goto fail;
3329 }
3330 TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP );
3331fail:
3332 spin_unlock_irqrestore(&priv->lock, flags);
3333
3334 return ret;
3335
3336} /* TLan_EeReadByte */
3337
3338
3339
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