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WorkStruct: Pass the work_struct pointer instead of context data
[deliverable/linux.git] / drivers / net / tlan.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2 *
3 * Linux ThunderLAN Driver
4 *
5 * tlan.c
6 * by James Banks
7 *
8 * (C) 1997-1998 Caldera, Inc.
9 * (C) 1998 James Banks
10 * (C) 1999-2001 Torben Mathiasen
11 * (C) 2002 Samuel Chessman
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 *
16 ** This file is best viewed/edited with columns>=132.
17 *
18 ** Useful (if not required) reading:
19 *
20 * Texas Instruments, ThunderLAN Programmer's Guide,
21 * TI Literature Number SPWU013A
22 * available in PDF format from www.ti.com
23 * Level One, LXT901 and LXT970 Data Sheets
24 * available in PDF format from www.level1.com
25 * National Semiconductor, DP83840A Data Sheet
26 * available in PDF format from www.national.com
27 * Microchip Technology, 24C01A/02A/04A Data Sheet
28 * available in PDF format from www.microchip.com
29 *
30 * Change History
31 *
32 * Tigran Aivazian <tigran@sco.com>: TLan_PciProbe() now uses
33 * new PCI BIOS interface.
34 * Alan Cox <alan@redhat.com>: Fixed the out of memory
35 * handling.
6aa20a22 36 *
1da177e4
LT		 37 * Torben Mathiasen <torben.mathiasen@compaq.com> New Maintainer!
38 *
39 * v1.1 Dec 20, 1999 - Removed linux version checking
6aa20a22 40 * Patch from Tigran Aivazian.
1da177e4
LT		 41 * - v1.1 includes Alan's SMP updates.
42 * - We still have problems on SMP though,
6aa20a22
JG		 43 * but I'm looking into that.
44 *
1da177e4
LT		 45 * v1.2 Jan 02, 2000 - Hopefully fixed the SMP deadlock.
46 * - Removed dependency of HZ being 100.
6aa20a22 47 * - We now allow higher priority timers to
1da177e4
LT		 48 * overwrite timers like TLAN_TIMER_ACTIVITY
49 * Patch from John Cagle <john.cagle@compaq.com>.
50 * - Fixed a few compiler warnings.
51 *
52 * v1.3 Feb 04, 2000 - Fixed the remaining HZ issues.
6aa20a22 53 * - Removed call to pci_present().
1da177e4 54 * - Removed SA_INTERRUPT flag from irq handler.
6aa20a22 55 * - Added __init and __initdata to reduce resisdent
1da177e4
LT		 56 * code size.
57 * - Driver now uses module_init/module_exit.
58 * - Rewrote init_module and tlan_probe to
59 * share a lot more code. We now use tlan_probe
60 * with builtin and module driver.
6aa20a22
JG		 61 * - Driver ported to new net API.
62 * - tlan.txt has been reworked to reflect current
1da177e4
LT		 63 * driver (almost)
64 * - Other minor stuff
65 *
66 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's
67 * network cleanup in 2.3.43pre7 (Tigran & myself)
68 * - Minor stuff.
69 *
70 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver
71 * if no cable/link were present.
72 * - Cosmetic changes.
73 * - TODO: Port completely to new PCI/DMA API
74 * Auto-Neg fallback.
75 *
76 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't
6aa20a22 77 * tested it though, as the kernel support is currently
1da177e4
LT		 78 * broken (2.3.99p4p3).
79 * - Updated tlan.txt accordingly.
80 * - Adjusted minimum/maximum frame length.
6aa20a22 81 * - There is now a TLAN website up at
1da177e4
LT		 82 * http://tlan.kernel.dk
83 *
84 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now
85 * reports PHY information when used with Donald
86 * Beckers userspace MII diagnostics utility.
87 *
88 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings.
89 * - Added link information to Auto-Neg and forced
90 * modes. When NIC operates with auto-neg the driver
91 * will report Link speed & duplex modes as well as
92 * link partner abilities. When forced link is used,
93 * the driver will report status of the established
94 * link.
6aa20a22
JG		 95 * Please read tlan.txt for additional information.
96 * - Removed call to check_region(), and used
1da177e4 97 * return value of request_region() instead.
6aa20a22 98 *
1da177e4
LT		 99 * v1.8a May 28, 2000 - Minor updates.
100 *
101 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues.
102 * - Updated with timer fixes from Andrew Morton.
103 * - Fixed module race in TLan_Open.
104 * - Added routine to monitor PHY status.
105 * - Added activity led support for Proliant devices.
106 *
6aa20a22
JG		 107 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers
108 * like the Compaq NetFlex3/E.
1da177e4
LT		 109 * - Rewrote tlan_probe to better handle multiple
110 * bus probes. Probing and device setup is now
111 * done through TLan_Probe and TLan_init_one. Actual
6aa20a22 112 * hardware probe is done with kernel API and
1da177e4
LT		 113 * TLan_EisaProbe.
114 * - Adjusted debug information for probing.
6aa20a22
JG		 115 * - Fixed bug that would cause general debug information
116 * to be printed after driver removal.
1da177e4 117 * - Added transmit timeout handling.
6aa20a22
JG		 118 * - Fixed OOM return values in tlan_probe.
119 * - Fixed possible mem leak in tlan_exit
1da177e4
LT		 120 * (now tlan_remove_one).
121 * - Fixed timer bug in TLan_phyMonitor.
122 * - This driver version is alpha quality, please
123 * send me any bug issues you may encounter.
124 *
6aa20a22 125 * v1.11 Aug 31, 2000 - Do not try to register irq 0 if no irq line was
1da177e4
LT		 126 * set for EISA cards.
127 * - Added support for NetFlex3/E with nibble-rate
128 * 10Base-T PHY. This is untestet as I haven't got
129 * one of these cards.
130 * - Fixed timer being added twice.
131 * - Disabled PhyMonitoring by default as this is
132 * work in progress. Define MONITOR to enable it.
133 * - Now we don't display link info with PHYs that
134 * doesn't support it (level1).
135 * - Incresed tx_timeout beacuse of auto-neg.
136 * - Adjusted timers for forced speeds.
137 *
138 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.)
139 *
140 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues
141 * when link can't be established.
142 * - Added the bbuf option as a kernel parameter.
143 * - Fixed ioaddr probe bug.
144 * - Fixed stupid deadlock with MII interrupts.
6aa20a22 145 * - Added support for speed/duplex selection with
1da177e4
LT		 146 * multiple nics.
147 * - Added partly fix for TX Channel lockup with
148 * TLAN v1.0 silicon. This needs to be investigated
149 * further.
150 *
151 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per.
152 * interrupt. Thanks goes to
153 * Adam Keys <adam@ti.com>
154 * Denis Beaudoin <dbeaudoin@ti.com>
155 * for providing the patch.
156 * - Fixed auto-neg output when using multiple
157 * adapters.
158 * - Converted to use new taskq interface.
159 *
160 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.)
161 *
162 * Samuel Chessman <chessman@tux.org> New Maintainer!
163 *
164 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be
165 * 10T half duplex no loopback
166 * Thanks to Gunnar Eikman
167 *******************************************************************************/
168
169#include <linux/module.h>
170#include <linux/init.h>
171#include <linux/ioport.h>
172#include <linux/eisa.h>
173#include <linux/pci.h>
1e7f0bd8 174#include <linux/dma-mapping.h>
1da177e4
LT		 175#include <linux/netdevice.h>
176#include <linux/etherdevice.h>
177#include <linux/delay.h>
178#include <linux/spinlock.h>
179#include <linux/workqueue.h>
180#include <linux/mii.h>
181
182#include "tlan.h"
183
184typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 );
185
186
187/* For removing EISA devices */
188static struct net_device *TLan_Eisa_Devices;
189
190static int TLanDevicesInstalled;
191
192/* Set speed, duplex and aui settings */
193static int aui[MAX_TLAN_BOARDS];
194static int duplex[MAX_TLAN_BOARDS];
195static int speed[MAX_TLAN_BOARDS];
196static int boards_found;
15efa9bb
SH		 197module_param_array(aui, int, NULL, 0);
198module_param_array(duplex, int, NULL, 0);
199module_param_array(speed, int, NULL, 0);
200MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
201MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
202MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
1da177e4
LT		 203
204MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
205MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
206MODULE_LICENSE("GPL");
207
208
209/* Define this to enable Link beat monitoring */
210#undef MONITOR
211
212/* Turn on debugging. See Documentation/networking/tlan.txt for details */
213static int debug;
15efa9bb
SH		 214module_param(debug, int, 0);
215MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
1da177e4
LT		 216
217static int bbuf;
15efa9bb
SH		 218module_param(bbuf, int, 0);
219MODULE_PARM_DESC(bbuf, "ThunderLAN use big buffer (0-1)");
220
1da177e4
LT		 221static u8 *TLanPadBuffer;
222static dma_addr_t TLanPadBufferDMA;
223static char TLanSignature[] = "TLAN";
224static const char tlan_banner[] = "ThunderLAN driver v1.15\n";
225static int tlan_have_pci;
226static int tlan_have_eisa;
227
228static const char *media[] = {
6aa20a22 229 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ",
1da177e4
LT		 230 "100baseTx-FD", "100baseT4", NULL
231};
232
233static struct board {
234 const char *deviceLabel;
235 u32 flags;
236 u16 addrOfs;
237} board_info[] = {
238 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
239 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
240 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
241 { "Compaq NetFlex-3/P", TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
242 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
243 { "Compaq Netelligent Integrated 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
244 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 },
245 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 },
246 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
247 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 },
248 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 },
249 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
250 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 },
251 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
6aa20a22 252 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4
LT		 253 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
254};
255
256static struct pci_device_id tlan_pci_tbl[] = {
257 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
258 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
259 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
260 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
261 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
262 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
263 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
264 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
265 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
266 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
267 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
269 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
271 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
273 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
274 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
275 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
276 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
277 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
278 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
279 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
280 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
281 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
282 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
283 { 0,}
284};
6aa20a22 285MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
1da177e4
LT		 286
287static void TLan_EisaProbe( void );
288static void TLan_Eisa_Cleanup( void );
289static int TLan_Init( struct net_device * );
290static int TLan_Open( struct net_device *dev );
291static int TLan_StartTx( struct sk_buff *, struct net_device *);
7d12e780 292static irqreturn_t TLan_HandleInterrupt( int, void *);
1da177e4
LT		 293static int TLan_Close( struct net_device *);
294static struct net_device_stats *TLan_GetStats( struct net_device *);
295static void TLan_SetMulticastList( struct net_device *);
296static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd);
297static int TLan_probe1( struct pci_dev *pdev, long ioaddr, int irq, int rev, const struct pci_device_id *ent);
298static void TLan_tx_timeout( struct net_device *dev);
299static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent);
300
301static u32 TLan_HandleInvalid( struct net_device *, u16 );
302static u32 TLan_HandleTxEOF( struct net_device *, u16 );
303static u32 TLan_HandleStatOverflow( struct net_device *, u16 );
304static u32 TLan_HandleRxEOF( struct net_device *, u16 );
305static u32 TLan_HandleDummy( struct net_device *, u16 );
306static u32 TLan_HandleTxEOC( struct net_device *, u16 );
307static u32 TLan_HandleStatusCheck( struct net_device *, u16 );
308static u32 TLan_HandleRxEOC( struct net_device *, u16 );
309
310static void TLan_Timer( unsigned long );
311
312static void TLan_ResetLists( struct net_device * );
313static void TLan_FreeLists( struct net_device * );
314static void TLan_PrintDio( u16 );
315static void TLan_PrintList( TLanList *, char *, int );
316static void TLan_ReadAndClearStats( struct net_device *, int );
317static void TLan_ResetAdapter( struct net_device * );
318static void TLan_FinishReset( struct net_device * );
319static void TLan_SetMac( struct net_device *, int areg, char *mac );
320
321static void TLan_PhyPrint( struct net_device * );
322static void TLan_PhyDetect( struct net_device * );
323static void TLan_PhyPowerDown( struct net_device * );
324static void TLan_PhyPowerUp( struct net_device * );
325static void TLan_PhyReset( struct net_device * );
326static void TLan_PhyStartLink( struct net_device * );
327static void TLan_PhyFinishAutoNeg( struct net_device * );
328#ifdef MONITOR
329static void TLan_PhyMonitor( struct net_device * );
330#endif
331
332/*
333static int TLan_PhyNop( struct net_device * );
334static int TLan_PhyInternalCheck( struct net_device * );
335static int TLan_PhyInternalService( struct net_device * );
336static int TLan_PhyDp83840aCheck( struct net_device * );
337*/
338
339static int TLan_MiiReadReg( struct net_device *, u16, u16, u16 * );
340static void TLan_MiiSendData( u16, u32, unsigned );
341static void TLan_MiiSync( u16 );
342static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 );
343
344static void TLan_EeSendStart( u16 );
345static int TLan_EeSendByte( u16, u8, int );
346static void TLan_EeReceiveByte( u16, u8 *, int );
347static int TLan_EeReadByte( struct net_device *, u8, u8 * );
348
349
6aa20a22 350static void
1da177e4
LT		 351TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb)
352{
353 unsigned long addr = (unsigned long)skb;
354 tag->buffer[9].address = (u32)addr;
355 addr >>= 31; /* >>= 32 is undefined for 32bit arch, stupid C */
356 addr >>= 1;
357 tag->buffer[8].address = (u32)addr;
358}
359
360static struct sk_buff *
361TLan_GetSKB( struct tlan_list_tag *tag)
362{
363 unsigned long addr = tag->buffer[8].address;
364 addr <<= 31;
365 addr <<= 1;
366 addr |= tag->buffer[9].address;
367 return (struct sk_buff *) addr;
368}
369
370
371static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = {
372 TLan_HandleInvalid,
373 TLan_HandleTxEOF,
374 TLan_HandleStatOverflow,
375 TLan_HandleRxEOF,
376 TLan_HandleDummy,
377 TLan_HandleTxEOC,
378 TLan_HandleStatusCheck,
379 TLan_HandleRxEOC
380};
381
382static inline void
383TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type )
384{
385 TLanPrivateInfo *priv = netdev_priv(dev);
386 unsigned long flags = 0;
6aa20a22 387
1da177e4
LT		 388 if (!in_irq())
389 spin_lock_irqsave(&priv->lock, flags);
390 if ( priv->timer.function != NULL &&
6aa20a22 391 priv->timerType != TLAN_TIMER_ACTIVITY ) {
1da177e4
LT		 392 if (!in_irq())
393 spin_unlock_irqrestore(&priv->lock, flags);
394 return;
395 }
396 priv->timer.function = &TLan_Timer;
397 if (!in_irq())
398 spin_unlock_irqrestore(&priv->lock, flags);
399
400 priv->timer.data = (unsigned long) dev;
401 priv->timerSetAt = jiffies;
402 priv->timerType = type;
403 mod_timer(&priv->timer, jiffies + ticks);
6aa20a22 404
1da177e4
LT		 405} /* TLan_SetTimer */
406
407
408/*****************************************************************************
409******************************************************************************
410
411 ThunderLAN Driver Primary Functions
412
413 These functions are more or less common to all Linux network drivers.
414
415******************************************************************************
416*****************************************************************************/
417
418
419
420
421
422 /***************************************************************
423 * tlan_remove_one
424 *
425 * Returns:
426 * Nothing
427 * Parms:
428 * None
429 *
430 * Goes through the TLanDevices list and frees the device
431 * structs and memory associated with each device (lists
432 * and buffers). It also ureserves the IO port regions
433 * associated with this device.
434 *
435 **************************************************************/
436
437
438static void __devexit tlan_remove_one( struct pci_dev *pdev)
439{
440 struct net_device *dev = pci_get_drvdata( pdev );
441 TLanPrivateInfo *priv = netdev_priv(dev);
6aa20a22 442
1da177e4
LT		 443 unregister_netdev( dev );
444
445 if ( priv->dmaStorage ) {
446 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
447 }
448
449#ifdef CONFIG_PCI
450 pci_release_regions(pdev);
451#endif
6aa20a22 452
1da177e4 453 free_netdev( dev );
6aa20a22 454
1da177e4 455 pci_set_drvdata( pdev, NULL );
6aa20a22 456}
1da177e4
LT		 457
458static struct pci_driver tlan_driver = {
459 .name = "tlan",
460 .id_table = tlan_pci_tbl,
461 .probe = tlan_init_one,
6aa20a22 462 .remove = __devexit_p(tlan_remove_one),
1da177e4
LT		 463};
464
465static int __init tlan_probe(void)
466{
467 static int pad_allocated;
6aa20a22 468
1da177e4 469 printk(KERN_INFO "%s", tlan_banner);
6aa20a22 470
1da177e4
LT		 471 TLanPadBuffer = (u8 *) pci_alloc_consistent(NULL, TLAN_MIN_FRAME_SIZE, &TLanPadBufferDMA);
472
473 if (TLanPadBuffer == NULL) {
474 printk(KERN_ERR "TLAN: Could not allocate memory for pad buffer.\n");
475 return -ENOMEM;
476 }
477
478 memset(TLanPadBuffer, 0, TLAN_MIN_FRAME_SIZE);
479 pad_allocated = 1;
480
481 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
6aa20a22 482
1da177e4
LT		 483 /* Use new style PCI probing. Now the kernel will
484 do most of this for us */
485 pci_register_driver(&tlan_driver);
486
487 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
488 TLan_EisaProbe();
6aa20a22
JG		 489
490 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n",
1da177e4
LT		 491 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s",
492 tlan_have_pci, tlan_have_eisa);
493
494 if (TLanDevicesInstalled == 0) {
495 pci_unregister_driver(&tlan_driver);
496 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
497 return -ENODEV;
498 }
499 return 0;
500}
6aa20a22 501
1da177e4
LT		 502
503static int __devinit tlan_init_one( struct pci_dev *pdev,
504 const struct pci_device_id *ent)
505{
506 return TLan_probe1( pdev, -1, -1, 0, ent);
507}
508
509
510/*
511 ***************************************************************
512 * tlan_probe1
513 *
514 * Returns:
515 * 0 on success, error code on error
6aa20a22 516 * Parms:
1da177e4
LT		 517 * none
518 *
519 * The name is lower case to fit in with all the rest of
6aa20a22 520 * the netcard_probe names. This function looks for
1da177e4
LT		 521 * another TLan based adapter, setting it up with the
522 * allocated device struct if one is found.
523 * tlan_probe has been ported to the new net API and
524 * now allocates its own device structure. This function
525 * is also used by modules.
526 *
527 **************************************************************/
528
6aa20a22 529static int __devinit TLan_probe1(struct pci_dev *pdev,
1da177e4
LT		 530 long ioaddr, int irq, int rev, const struct pci_device_id *ent )
531{
532
533 struct net_device *dev;
534 TLanPrivateInfo *priv;
535 u8 pci_rev;
536 u16 device_id;
537 int reg, rc = -ENODEV;
538
ad9f6713 539#ifdef CONFIG_PCI
1da177e4
LT		 540 if (pdev) {
541 rc = pci_enable_device(pdev);
542 if (rc)
543 return rc;
544
545 rc = pci_request_regions(pdev, TLanSignature);
546 if (rc) {
547 printk(KERN_ERR "TLAN: Could not reserve IO regions\n");
548 goto err_out;
549 }
550 }
ad9f6713 551#endif /* CONFIG_PCI */
1da177e4
LT		 552
553 dev = alloc_etherdev(sizeof(TLanPrivateInfo));
554 if (dev == NULL) {
555 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n");
556 rc = -ENOMEM;
557 goto err_out_regions;
558 }
559 SET_MODULE_OWNER(dev);
560 SET_NETDEV_DEV(dev, &pdev->dev);
6aa20a22 561
1da177e4
LT		 562 priv = netdev_priv(dev);
563
564 priv->pciDev = pdev;
6aa20a22 565
1da177e4
LT		 566 /* Is this a PCI device? */
567 if (pdev) {
568 u32 pci_io_base = 0;
569
570 priv->adapter = &board_info[ent->driver_data];
571
1e7f0bd8 572 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1da177e4
LT		 573 if (rc) {
574 printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n");
575 goto err_out_free_dev;
576 }
577
578 pci_read_config_byte ( pdev, PCI_REVISION_ID, &pci_rev);
579
580 for ( reg= 0; reg <= 5; reg ++ ) {
581 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
582 pci_io_base = pci_resource_start(pdev, reg);
583 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n",
584 pci_io_base);
585 break;
586 }
587 }
588 if (!pci_io_base) {
589 printk(KERN_ERR "TLAN: No IO mappings available\n");
590 rc = -EIO;
591 goto err_out_free_dev;
592 }
6aa20a22 593
1da177e4
LT		 594 dev->base_addr = pci_io_base;
595 dev->irq = pdev->irq;
6aa20a22 596 priv->adapterRev = pci_rev;
1da177e4
LT		 597 pci_set_master(pdev);
598 pci_set_drvdata(pdev, dev);
599
600 } else { /* EISA card */
601 /* This is a hack. We need to know which board structure
602 * is suited for this adapter */
603 device_id = inw(ioaddr + EISA_ID2);
604 priv->is_eisa = 1;
605 if (device_id == 0x20F1) {
606 priv->adapter = &board_info[13]; /* NetFlex-3/E */
607 priv->adapterRev = 23; /* TLAN 2.3 */
608 } else {
609 priv->adapter = &board_info[14];
610 priv->adapterRev = 10; /* TLAN 1.0 */
611 }
612 dev->base_addr = ioaddr;
613 dev->irq = irq;
614 }
615
616 /* Kernel parameters */
617 if (dev->mem_start) {
618 priv->aui = dev->mem_start & 0x01;
619 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0 : (dev->mem_start & 0x06) >> 1;
620 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0 : (dev->mem_start & 0x18) >> 3;
6aa20a22 621
1da177e4
LT		 622 if (priv->speed == 0x1) {
623 priv->speed = TLAN_SPEED_10;
624 } else if (priv->speed == 0x2) {
625 priv->speed = TLAN_SPEED_100;
626 }
627 debug = priv->debug = dev->mem_end;
628 } else {
629 priv->aui = aui[boards_found];
630 priv->speed = speed[boards_found];
631 priv->duplex = duplex[boards_found];
632 priv->debug = debug;
633 }
6aa20a22 634
1da177e4
LT		 635 /* This will be used when we get an adapter error from
636 * within our irq handler */
637 INIT_WORK(&priv->tlan_tqueue, (void *)(void*)TLan_tx_timeout, dev);
638
639 spin_lock_init(&priv->lock);
6aa20a22 640
1da177e4
LT		 641 rc = TLan_Init(dev);
642 if (rc) {
643 printk(KERN_ERR "TLAN: Could not set up device.\n");
644 goto err_out_free_dev;
645 }
646
647 rc = register_netdev(dev);
648 if (rc) {
649 printk(KERN_ERR "TLAN: Could not register device.\n");
650 goto err_out_uninit;
651 }
652
6aa20a22 653
1da177e4
LT		 654 TLanDevicesInstalled++;
655 boards_found++;
6aa20a22 656
1da177e4
LT		 657 /* pdev is NULL if this is an EISA device */
658 if (pdev)
659 tlan_have_pci++;
660 else {
661 priv->nextDevice = TLan_Eisa_Devices;
662 TLan_Eisa_Devices = dev;
663 tlan_have_eisa++;
664 }
6aa20a22 665
1da177e4
LT		 666 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n",
667 dev->name,
668 (int) dev->irq,
669 (int) dev->base_addr,
670 priv->adapter->deviceLabel,
671 priv->adapterRev);
672 return 0;
673
674err_out_uninit:
675 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage,
676 priv->dmaStorageDMA );
677err_out_free_dev:
678 free_netdev(dev);
679err_out_regions:
680#ifdef CONFIG_PCI
681 if (pdev)
682 pci_release_regions(pdev);
683#endif
684err_out:
685 if (pdev)
686 pci_disable_device(pdev);
687 return rc;
688}
689
690
691static void TLan_Eisa_Cleanup(void)
692{
693 struct net_device *dev;
694 TLanPrivateInfo *priv;
6aa20a22 695
1da177e4
LT		 696 while( tlan_have_eisa ) {
697 dev = TLan_Eisa_Devices;
698 priv = netdev_priv(dev);
699 if (priv->dmaStorage) {
700 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
701 }
702 release_region( dev->base_addr, 0x10);
703 unregister_netdev( dev );
704 TLan_Eisa_Devices = priv->nextDevice;
705 free_netdev( dev );
706 tlan_have_eisa--;
707 }
708}
6aa20a22
JG		 709
710
1da177e4
LT		 711static void __exit tlan_exit(void)
712{
713 pci_unregister_driver(&tlan_driver);
714
715 if (tlan_have_eisa)
716 TLan_Eisa_Cleanup();
717
718 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
719
720}
721
722
723/* Module loading/unloading */
724module_init(tlan_probe);
725module_exit(tlan_exit);
726
727
728
729 /**************************************************************
730 * TLan_EisaProbe
731 *
732 * Returns: 0 on success, 1 otherwise
733 *
734 * Parms: None
735 *
736 *
6aa20a22
JG		 737 * This functions probes for EISA devices and calls
738 * TLan_probe1 when one is found.
1da177e4
LT		 739 *
740 *************************************************************/
741
6aa20a22 742static void __init TLan_EisaProbe (void)
1da177e4
LT		 743{
744 long ioaddr;
745 int rc = -ENODEV;
746 int irq;
747 u16 device_id;
748
6aa20a22 749 if (!EISA_bus) {
1da177e4
LT		 750 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
751 return;
752 }
6aa20a22 753
1da177e4
LT		 754 /* Loop through all slots of the EISA bus */
755 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
6aa20a22
JG		 756
757 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
1da177e4
LT		 758 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
759
760
761 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ",
762 (int) ioaddr);
6aa20a22 763 if (request_region(ioaddr, 0x10, TLanSignature) == NULL)
1da177e4
LT		 764 goto out;
765
6aa20a22 766 if (inw(ioaddr + EISA_ID) != 0x110E) {
1da177e4
LT		 767 release_region(ioaddr, 0x10);
768 goto out;
769 }
6aa20a22 770
1da177e4 771 device_id = inw(ioaddr + EISA_ID2);
6aa20a22 772 if (device_id != 0x20F1 && device_id != 0x40F1) {
1da177e4
LT		 773 release_region (ioaddr, 0x10);
774 goto out;
775 }
6aa20a22 776
1da177e4
LT		 777 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */
778 release_region (ioaddr, 0x10);
779 goto out2;
780 }
6aa20a22
JG		 781
782 if (debug == 0x10)
1da177e4
LT		 783 printk("Found one\n");
784
785
786 /* Get irq from board */
787 switch (inb(ioaddr + 0xCC0)) {
788 case(0x10):
789 irq=5;
790 break;
791 case(0x20):
792 irq=9;
793 break;
794 case(0x40):
795 irq=10;
796 break;
797 case(0x80):
798 irq=11;
799 break;
800 default:
801 goto out;
6aa20a22
JG		 802 }
803
804
1da177e4
LT		 805 /* Setup the newly found eisa adapter */
806 rc = TLan_probe1( NULL, ioaddr, irq,
807 12, NULL);
808 continue;
6aa20a22 809
1da177e4
LT		 810 out:
811 if (debug == 0x10)
812 printk("None found\n");
813 continue;
814
815 out2: if (debug == 0x10)
816 printk("Card found but it is not enabled, skipping\n");
817 continue;
6aa20a22 818
1da177e4
LT		 819 }
820
821} /* TLan_EisaProbe */
822
823#ifdef CONFIG_NET_POLL_CONTROLLER
824static void TLan_Poll(struct net_device *dev)
825{
826 disable_irq(dev->irq);
7d12e780 827 TLan_HandleInterrupt(dev->irq, dev);
1da177e4
LT		 828 enable_irq(dev->irq);
829}
830#endif
831
6aa20a22 832
1da177e4
LT		 833
834
835 /***************************************************************
836 * TLan_Init
837 *
838 * Returns:
839 * 0 on success, error code otherwise.
840 * Parms:
841 * dev The structure of the device to be
842 * init'ed.
843 *
844 * This function completes the initialization of the
845 * device structure and driver. It reserves the IO
846 * addresses, allocates memory for the lists and bounce
847 * buffers, retrieves the MAC address from the eeprom
848 * and assignes the device's methods.
6aa20a22 849 *
1da177e4
LT		 850 **************************************************************/
851
852static int TLan_Init( struct net_device *dev )
853{
854 int dma_size;
855 int err;
856 int i;
857 TLanPrivateInfo *priv;
858
859 priv = netdev_priv(dev);
6aa20a22 860
1da177e4
LT		 861 if ( bbuf ) {
862 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
863 * ( sizeof(TLanList) + TLAN_MAX_FRAME_SIZE );
864 } else {
865 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
866 * ( sizeof(TLanList) );
867 }
868 priv->dmaStorage = pci_alloc_consistent(priv->pciDev, dma_size, &priv->dmaStorageDMA);
869 priv->dmaSize = dma_size;
6aa20a22 870
1da177e4
LT		 871 if ( priv->dmaStorage == NULL ) {
872 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n",
873 dev->name );
874 return -ENOMEM;
875 }
876 memset( priv->dmaStorage, 0, dma_size );
6aa20a22 877 priv->rxList = (TLanList *)
1da177e4
LT		 878 ( ( ( (u32) priv->dmaStorage ) + 7 ) & 0xFFFFFFF8 );
879 priv->rxListDMA = ( ( ( (u32) priv->dmaStorageDMA ) + 7 ) & 0xFFFFFFF8 );
880 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
881 priv->txListDMA = priv->rxListDMA + sizeof(TLanList) * TLAN_NUM_RX_LISTS;
882 if ( bbuf ) {
883 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS );
884 priv->rxBufferDMA =priv->txListDMA + sizeof(TLanList) * TLAN_NUM_TX_LISTS;
885 priv->txBuffer = priv->rxBuffer + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
886 priv->txBufferDMA = priv->rxBufferDMA + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
887 }
888
889 err = 0;
890 for ( i = 0; i < 6 ; i++ )
891 err |= TLan_EeReadByte( dev,
892 (u8) priv->adapter->addrOfs + i,
893 (u8 *) &dev->dev_addr[i] );
894 if ( err ) {
895 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n",
896 dev->name,
897 err );
898 }
899 dev->addr_len = 6;
900
901 netif_carrier_off(dev);
902
903 /* Device methods */
904 dev->open = &TLan_Open;
905 dev->hard_start_xmit = &TLan_StartTx;
906 dev->stop = &TLan_Close;
907 dev->get_stats = &TLan_GetStats;
908 dev->set_multicast_list = &TLan_SetMulticastList;
909 dev->do_ioctl = &TLan_ioctl;
910#ifdef CONFIG_NET_POLL_CONTROLLER
911 dev->poll_controller = &TLan_Poll;
912#endif
913 dev->tx_timeout = &TLan_tx_timeout;
914 dev->watchdog_timeo = TX_TIMEOUT;
915
916 return 0;
917
918} /* TLan_Init */
919
920
921
922
923 /***************************************************************
924 * TLan_Open
925 *
926 * Returns:
927 * 0 on success, error code otherwise.
928 * Parms:
929 * dev Structure of device to be opened.
930 *
931 * This routine puts the driver and TLAN adapter in a
932 * state where it is ready to send and receive packets.
933 * It allocates the IRQ, resets and brings the adapter
934 * out of reset, and allows interrupts. It also delays
935 * the startup for autonegotiation or sends a Rx GO
936 * command to the adapter, as appropriate.
937 *
938 **************************************************************/
939
940static int TLan_Open( struct net_device *dev )
941{
942 TLanPrivateInfo *priv = netdev_priv(dev);
943 int err;
6aa20a22 944
1da177e4 945 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
1fb9df5d 946 err = request_irq( dev->irq, TLan_HandleInterrupt, IRQF_SHARED, TLanSignature, dev );
6aa20a22 947
1da177e4
LT		 948 if ( err ) {
949 printk(KERN_ERR "TLAN: Cannot open %s because IRQ %d is already in use.\n", dev->name, dev->irq );
950 return err;
951 }
6aa20a22 952
1da177e4
LT		 953 init_timer(&priv->timer);
954 netif_start_queue(dev);
6aa20a22 955
1da177e4
LT		 956 /* NOTE: It might not be necessary to read the stats before a
957 reset if you don't care what the values are.
958 */
959 TLan_ResetLists( dev );
960 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
961 TLan_ResetAdapter( dev );
962
963 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n", dev->name, priv->tlanRev );
964
965 return 0;
966
967} /* TLan_Open */
968
969
970
971 /**************************************************************
972 * TLan_ioctl
6aa20a22 973 *
1da177e4
LT		 974 * Returns:
975 * 0 on success, error code otherwise
976 * Params:
977 * dev structure of device to receive ioctl.
6aa20a22 978 *
1da177e4
LT		 979 * rq ifreq structure to hold userspace data.
980 *
981 * cmd ioctl command.
982 *
983 *
984 *************************************************************/
985
986static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
987{
988 TLanPrivateInfo *priv = netdev_priv(dev);
989 struct mii_ioctl_data *data = if_mii(rq);
990 u32 phy = priv->phy[priv->phyNum];
6aa20a22 991
1da177e4
LT		 992 if (!priv->phyOnline)
993 return -EAGAIN;
994
995 switch(cmd) {
996 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
997 data->phy_id = phy;
998
999
1000 case SIOCGMIIREG: /* Read MII PHY register. */
1001 TLan_MiiReadReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, &data->val_out);
1002 return 0;
6aa20a22 1003
1da177e4
LT		 1004
1005 case SIOCSMIIREG: /* Write MII PHY register. */
1006 if (!capable(CAP_NET_ADMIN))
1007 return -EPERM;
1008 TLan_MiiWriteReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1009 return 0;
1010 default:
1011 return -EOPNOTSUPP;
1012 }
1013} /* tlan_ioctl */
1014
1015
1016 /***************************************************************
1017 * TLan_tx_timeout
1018 *
1019 * Returns: nothing
1020 *
1021 * Params:
6aa20a22 1022 * dev structure of device which timed out
1da177e4
LT		 1023 * during transmit.
1024 *
1025 **************************************************************/
1026
1027static void TLan_tx_timeout(struct net_device *dev)
1028{
6aa20a22 1029
1da177e4 1030 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
6aa20a22 1031
1da177e4
LT		 1032 /* Ok so we timed out, lets see what we can do about it...*/
1033 TLan_FreeLists( dev );
6aa20a22 1034 TLan_ResetLists( dev );
1da177e4
LT		 1035 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
1036 TLan_ResetAdapter( dev );
1037 dev->trans_start = jiffies;
6aa20a22 1038 netif_wake_queue( dev );
1da177e4
LT		 1039
1040}
6aa20a22 1041
1da177e4
LT		 1042
1043
1044 /***************************************************************
1045 * TLan_StartTx
6aa20a22 1046 *
1da177e4
LT		 1047 * Returns:
1048 * 0 on success, non-zero on failure.
1049 * Parms:
1050 * skb A pointer to the sk_buff containing the
1051 * frame to be sent.
1052 * dev The device to send the data on.
1053 *
1054 * This function adds a frame to the Tx list to be sent
1055 * ASAP. First it verifies that the adapter is ready and
1056 * there is room in the queue. Then it sets up the next
1057 * available list, copies the frame to the corresponding
1058 * buffer. If the adapter Tx channel is idle, it gives
1059 * the adapter a Tx Go command on the list, otherwise it
1060 * sets the forward address of the previous list to point
1061 * to this one. Then it frees the sk_buff.
1062 *
1063 **************************************************************/
1064
1065static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1066{
1067 TLanPrivateInfo *priv = netdev_priv(dev);
1068 TLanList *tail_list;
1069 dma_addr_t tail_list_phys;
1070 u8 *tail_buffer;
1071 int pad;
1072 unsigned long flags;
1073
1074 if ( ! priv->phyOnline ) {
1075 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n", dev->name );
1076 dev_kfree_skb_any(skb);
1077 return 0;
1078 }
1079
1080 tail_list = priv->txList + priv->txTail;
1081 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail;
6aa20a22 1082
1da177e4
LT		 1083 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
1084 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s is busy (Head=%d Tail=%d)\n", dev->name, priv->txHead, priv->txTail );
1085 netif_stop_queue(dev);
1086 priv->txBusyCount++;
1087 return 1;
1088 }
1089
1090 tail_list->forward = 0;
1091
1092 if ( bbuf ) {
1093 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE );
1094 memcpy( tail_buffer, skb->data, skb->len );
1095 } else {
1096 tail_list->buffer[0].address = pci_map_single(priv->pciDev, skb->data, skb->len, PCI_DMA_TODEVICE);
1097 TLan_StoreSKB(tail_list, skb);
1098 }
1099
1100 pad = TLAN_MIN_FRAME_SIZE - skb->len;
1101
1102 if ( pad > 0 ) {
1103 tail_list->frameSize = (u16) skb->len + pad;
1104 tail_list->buffer[0].count = (u32) skb->len;
1105 tail_list->buffer[1].count = TLAN_LAST_BUFFER | (u32) pad;
1106 tail_list->buffer[1].address = TLanPadBufferDMA;
1107 } else {
1108 tail_list->frameSize = (u16) skb->len;
1109 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) skb->len;
1110 tail_list->buffer[1].count = 0;
1111 tail_list->buffer[1].address = 0;
1112 }
1113
1114 spin_lock_irqsave(&priv->lock, flags);
1115 tail_list->cStat = TLAN_CSTAT_READY;
1116 if ( ! priv->txInProgress ) {
1117 priv->txInProgress = 1;
1118 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
1119 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM );
1120 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD );
1121 } else {
1122 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n", priv->txTail );
1123 if ( priv->txTail == 0 ) {
1124 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward = tail_list_phys;
1125 } else {
1126 ( priv->txList + ( priv->txTail - 1 ) )->forward = tail_list_phys;
1127 }
1128 }
1129 spin_unlock_irqrestore(&priv->lock, flags);
1130
1131 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
1132
1133 if ( bbuf )
1134 dev_kfree_skb_any(skb);
6aa20a22 1135
1da177e4
LT		 1136 dev->trans_start = jiffies;
1137 return 0;
1138
1139} /* TLan_StartTx */
1140
1141
1142
1143
1144 /***************************************************************
1145 * TLan_HandleInterrupt
6aa20a22
JG		 1146 *
1147 * Returns:
1da177e4
LT		 1148 * Nothing
1149 * Parms:
1150 * irq The line on which the interrupt
1151 * occurred.
1152 * dev_id A pointer to the device assigned to
1153 * this irq line.
1da177e4
LT		 1154 *
1155 * This function handles an interrupt generated by its
1156 * assigned TLAN adapter. The function deactivates
1157 * interrupts on its adapter, records the type of
1158 * interrupt, executes the appropriate subhandler, and
1159 * acknowdges the interrupt to the adapter (thus
1160 * re-enabling adapter interrupts.
1161 *
1162 **************************************************************/
1163
7d12e780 1164static irqreturn_t TLan_HandleInterrupt(int irq, void *dev_id)
1da177e4
LT		 1165{
1166 u32 ack;
1167 struct net_device *dev;
1168 u32 host_cmd;
1169 u16 host_int;
1170 int type;
1171 TLanPrivateInfo *priv;
1172
1173 dev = dev_id;
1174 priv = netdev_priv(dev);
1175
1176 spin_lock(&priv->lock);
1177
1178 host_int = inw( dev->base_addr + TLAN_HOST_INT );
1179 outw( host_int, dev->base_addr + TLAN_HOST_INT );
1180
1181 type = ( host_int & TLAN_HI_IT_MASK ) >> 2;
1182
1183 ack = TLanIntVector[type]( dev, host_int );
1184
1185 if ( ack ) {
1186 host_cmd = TLAN_HC_ACK | ack | ( type << 18 );
1187 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD );
1188 }
1189
1190 spin_unlock(&priv->lock);
1191
1192 return IRQ_HANDLED;
1193} /* TLan_HandleInterrupts */
1194
1195
1196
1197
1198 /***************************************************************
1199 * TLan_Close
6aa20a22 1200 *
1da177e4
LT		 1201 * Returns:
1202 * An error code.
1203 * Parms:
1204 * dev The device structure of the device to
1205 * close.
1206 *
1207 * This function shuts down the adapter. It records any
1208 * stats, puts the adapter into reset state, deactivates
1209 * its time as needed, and frees the irq it is using.
1210 *
1211 **************************************************************/
1212
1213static int TLan_Close(struct net_device *dev)
1214{
1215 TLanPrivateInfo *priv = netdev_priv(dev);
1216
1217 netif_stop_queue(dev);
1218 priv->neg_be_verbose = 0;
1219
1220 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1221 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1222 if ( priv->timer.function != NULL ) {
1223 del_timer_sync( &priv->timer );
1224 priv->timer.function = NULL;
1225 }
6aa20a22 1226
1da177e4
LT		 1227 free_irq( dev->irq, dev );
1228 TLan_FreeLists( dev );
1229 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name );
1230
1231 return 0;
1232
1233} /* TLan_Close */
1234
1235
1236
1237
1238 /***************************************************************
1239 * TLan_GetStats
6aa20a22 1240 *
1da177e4
LT		 1241 * Returns:
1242 * A pointer to the device's statistics structure.
1243 * Parms:
1244 * dev The device structure to return the
1245 * stats for.
1246 *
1247 * This function updates the devices statistics by reading
1248 * the TLAN chip's onboard registers. Then it returns the
1249 * address of the statistics structure.
1250 *
1251 **************************************************************/
1252
1253static struct net_device_stats *TLan_GetStats( struct net_device *dev )
1254{
1255 TLanPrivateInfo *priv = netdev_priv(dev);
1256 int i;
1257
1258 /* Should only read stats if open ? */
1259 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1260
1261 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name, priv->rxEocCount );
1262 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name, priv->txBusyCount );
1263 if ( debug & TLAN_DEBUG_GNRL ) {
1264 TLan_PrintDio( dev->base_addr );
6aa20a22 1265 TLan_PhyPrint( dev );
1da177e4
LT		 1266 }
1267 if ( debug & TLAN_DEBUG_LIST ) {
1268 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ )
1269 TLan_PrintList( priv->rxList + i, "RX", i );
1270 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ )
1271 TLan_PrintList( priv->txList + i, "TX", i );
1272 }
6aa20a22 1273
1da177e4
LT		 1274 return ( &( (TLanPrivateInfo *) netdev_priv(dev) )->stats );
1275
1276} /* TLan_GetStats */
1277
1278
1279
1280
1281 /***************************************************************
1282 * TLan_SetMulticastList
6aa20a22 1283 *
1da177e4
LT		 1284 * Returns:
1285 * Nothing
1286 * Parms:
1287 * dev The device structure to set the
1288 * multicast list for.
1289 *
1290 * This function sets the TLAN adaptor to various receive
1291 * modes. If the IFF_PROMISC flag is set, promiscuous
1292 * mode is acitviated. Otherwise, promiscuous mode is
1293 * turned off. If the IFF_ALLMULTI flag is set, then
1294 * the hash table is set to receive all group addresses.
1295 * Otherwise, the first three multicast addresses are
1296 * stored in AREG_1-3, and the rest are selected via the
1297 * hash table, as necessary.
1298 *
1299 **************************************************************/
1300
1301static void TLan_SetMulticastList( struct net_device *dev )
6aa20a22 1302{
1da177e4
LT		 1303 struct dev_mc_list *dmi = dev->mc_list;
1304 u32 hash1 = 0;
1305 u32 hash2 = 0;
1306 int i;
1307 u32 offset;
1308 u8 tmp;
1309
1310 if ( dev->flags & IFF_PROMISC ) {
1311 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1312 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1313 } else {
1314 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1315 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1316 if ( dev->flags & IFF_ALLMULTI ) {
6aa20a22 1317 for ( i = 0; i < 3; i++ )
1da177e4
LT		 1318 TLan_SetMac( dev, i + 1, NULL );
1319 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF );
1320 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF );
1321 } else {
1322 for ( i = 0; i < dev->mc_count; i++ ) {
1323 if ( i < 3 ) {
1324 TLan_SetMac( dev, i + 1, (char *) &dmi->dmi_addr );
1325 } else {
1326 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
6aa20a22 1327 if ( offset < 32 )
1da177e4
LT		 1328 hash1 |= ( 1 << offset );
1329 else
1330 hash2 |= ( 1 << ( offset - 32 ) );
1331 }
1332 dmi = dmi->next;
1333 }
6aa20a22 1334 for ( ; i < 3; i++ )
1da177e4
LT		 1335 TLan_SetMac( dev, i + 1, NULL );
1336 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 );
1337 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 );
1338 }
1339 }
1340
1341} /* TLan_SetMulticastList */
1342
1343
1344
1345/*****************************************************************************
1346******************************************************************************
1347
1348 ThunderLAN Driver Interrupt Vectors and Table
1349
1350 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN
1351 Programmer's Guide" for more informations on handling interrupts
6aa20a22 1352 generated by TLAN based adapters.
1da177e4
LT		 1353
1354******************************************************************************
1355*****************************************************************************/
1356
1357
1358 /***************************************************************
1359 * TLan_HandleInvalid
1360 *
1361 * Returns:
1362 * 0
1363 * Parms:
1364 * dev Device assigned the IRQ that was
1365 * raised.
1366 * host_int The contents of the HOST_INT
1367 * port.
1368 *
1369 * This function handles invalid interrupts. This should
1370 * never happen unless some other adapter is trying to use
1371 * the IRQ line assigned to the device.
1372 *
1373 **************************************************************/
1374
1375u32 TLan_HandleInvalid( struct net_device *dev, u16 host_int )
1376{
1377 /* printk( "TLAN: Invalid interrupt on %s.\n", dev->name ); */
1378 return 0;
1379
1380} /* TLan_HandleInvalid */
1381
1382
1383
1384
1385 /***************************************************************
1386 * TLan_HandleTxEOF
1387 *
1388 * Returns:
1389 * 1
1390 * Parms:
1391 * dev Device assigned the IRQ that was
1392 * raised.
1393 * host_int The contents of the HOST_INT
1394 * port.
1395 *
1396 * This function handles Tx EOF interrupts which are raised
1397 * by the adapter when it has completed sending the
1398 * contents of a buffer. If detemines which list/buffer
1399 * was completed and resets it. If the buffer was the last
1400 * in the channel (EOC), then the function checks to see if
1401 * another buffer is ready to send, and if so, sends a Tx
1402 * Go command. Finally, the driver activates/continues the
1403 * activity LED.
1404 *
1405 **************************************************************/
1406
1407u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1408{
1409 TLanPrivateInfo *priv = netdev_priv(dev);
1410 int eoc = 0;
1411 TLanList *head_list;
1412 dma_addr_t head_list_phys;
1413 u32 ack = 0;
1414 u16 tmpCStat;
6aa20a22 1415
1da177e4
LT		 1416 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1417 head_list = priv->txList + priv->txHead;
1418
1419 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1420 ack++;
1421 if ( ! bbuf ) {
1422 struct sk_buff *skb = TLan_GetSKB(head_list);
1423 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
1424 dev_kfree_skb_any(skb);
1425 head_list->buffer[8].address = 0;
1426 head_list->buffer[9].address = 0;
1427 }
6aa20a22 1428
1da177e4
LT		 1429 if ( tmpCStat & TLAN_CSTAT_EOC )
1430 eoc = 1;
6aa20a22 1431
1da177e4
LT		 1432 priv->stats.tx_bytes += head_list->frameSize;
1433
1434 head_list->cStat = TLAN_CSTAT_UNUSED;
6aa20a22
JG		 1435 netif_start_queue(dev);
1436 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
1da177e4
LT		 1437 head_list = priv->txList + priv->txHead;
1438 }
1439
1440 if (!ack)
1441 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n");
6aa20a22 1442
1da177e4
LT		 1443 if ( eoc ) {
1444 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1445 head_list = priv->txList + priv->txHead;
1446 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1447 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1448 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1449 ack |= TLAN_HC_GO;
1450 } else {
1451 priv->txInProgress = 0;
1452 }
1453 }
6aa20a22 1454
1da177e4
LT		 1455 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1456 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1457 if ( priv->timer.function == NULL ) {
1458 priv->timer.function = &TLan_Timer;
1459 priv->timer.data = (unsigned long) dev;
1460 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1461 priv->timerSetAt = jiffies;
1462 priv->timerType = TLAN_TIMER_ACTIVITY;
1463 add_timer(&priv->timer);
1464 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1465 priv->timerSetAt = jiffies;
1466 }
1467 }
1468
1469 return ack;
1470
1471} /* TLan_HandleTxEOF */
1472
1473
1474
1475
1476 /***************************************************************
1477 * TLan_HandleStatOverflow
1478 *
1479 * Returns:
1480 * 1
1481 * Parms:
1482 * dev Device assigned the IRQ that was
1483 * raised.
1484 * host_int The contents of the HOST_INT
1485 * port.
1486 *
1487 * This function handles the Statistics Overflow interrupt
1488 * which means that one or more of the TLAN statistics
1489 * registers has reached 1/2 capacity and needs to be read.
1490 *
1491 **************************************************************/
1492
1493u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
1494{
1495 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1496
1497 return 1;
1498
1499} /* TLan_HandleStatOverflow */
1500
1501
1502
1503
1504 /***************************************************************
1505 * TLan_HandleRxEOF
1506 *
1507 * Returns:
1508 * 1
1509 * Parms:
1510 * dev Device assigned the IRQ that was
1511 * raised.
1512 * host_int The contents of the HOST_INT
1513 * port.
1514 *
1515 * This function handles the Rx EOF interrupt which
1516 * indicates a frame has been received by the adapter from
1517 * the net and the frame has been transferred to memory.
1518 * The function determines the bounce buffer the frame has
1519 * been loaded into, creates a new sk_buff big enough to
1520 * hold the frame, and sends it to protocol stack. It
1521 * then resets the used buffer and appends it to the end
1522 * of the list. If the frame was the last in the Rx
1523 * channel (EOC), the function restarts the receive channel
1524 * by sending an Rx Go command to the adapter. Then it
1525 * activates/continues the activity LED.
1526 *
1527 **************************************************************/
1528
1529u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1530{
1531 TLanPrivateInfo *priv = netdev_priv(dev);
1532 u32 ack = 0;
1533 int eoc = 0;
1534 u8 *head_buffer;
1535 TLanList *head_list;
1536 struct sk_buff *skb;
1537 TLanList *tail_list;
1538 void *t;
1539 u32 frameSize;
1540 u16 tmpCStat;
1541 dma_addr_t head_list_phys;
1542
1543 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1544 head_list = priv->rxList + priv->rxHead;
1545 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
6aa20a22 1546
1da177e4
LT		 1547 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1548 frameSize = head_list->frameSize;
1549 ack++;
1550 if (tmpCStat & TLAN_CSTAT_EOC)
1551 eoc = 1;
6aa20a22 1552
1da177e4
LT		 1553 if (bbuf) {
1554 skb = dev_alloc_skb(frameSize + 7);
1555 if (skb == NULL)
1556 printk(KERN_INFO "TLAN: Couldn't allocate memory for received data.\n");
1557 else {
1558 head_buffer = priv->rxBuffer + (priv->rxHead * TLAN_MAX_FRAME_SIZE);
1559 skb->dev = dev;
1560 skb_reserve(skb, 2);
1561 t = (void *) skb_put(skb, frameSize);
6aa20a22 1562
1da177e4
LT		 1563 priv->stats.rx_bytes += head_list->frameSize;
1564
1565 memcpy( t, head_buffer, frameSize );
1566 skb->protocol = eth_type_trans( skb, dev );
1567 netif_rx( skb );
1568 }
1569 } else {
1570 struct sk_buff *new_skb;
6aa20a22 1571
1da177e4
LT		 1572 /*
1573 * I changed the algorithm here. What we now do
1574 * is allocate the new frame. If this fails we
1575 * simply recycle the frame.
1576 */
6aa20a22 1577
1da177e4 1578 new_skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
6aa20a22 1579
1da177e4
LT		 1580 if ( new_skb != NULL ) {
1581 skb = TLan_GetSKB(head_list);
1582 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1583 skb_trim( skb, frameSize );
1584
1585 priv->stats.rx_bytes += frameSize;
1586
1587 skb->protocol = eth_type_trans( skb, dev );
1588 netif_rx( skb );
6aa20a22 1589
1da177e4
LT		 1590 new_skb->dev = dev;
1591 skb_reserve( new_skb, 2 );
1592 t = (void *) skb_put( new_skb, TLAN_MAX_FRAME_SIZE );
1593 head_list->buffer[0].address = pci_map_single(priv->pciDev, new_skb->data, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1594 head_list->buffer[8].address = (u32) t;
1595 TLan_StoreSKB(head_list, new_skb);
6aa20a22 1596 } else
1da177e4
LT		 1597 printk(KERN_WARNING "TLAN: Couldn't allocate memory for received data.\n" );
1598 }
1599
1600 head_list->forward = 0;
1601 head_list->cStat = 0;
1602 tail_list = priv->rxList + priv->rxTail;
1603 tail_list->forward = head_list_phys;
1604
1605 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
1606 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
1607 head_list = priv->rxList + priv->rxHead;
1608 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1609 }
1610
1611 if (!ack)
1612 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n");
1da177e4
LT		 1613
1614
1615
6aa20a22
JG		 1616
1617 if ( eoc ) {
1da177e4
LT		 1618 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1619 head_list = priv->rxList + priv->rxHead;
1620 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1621 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1622 ack |= TLAN_HC_GO | TLAN_HC_RT;
1623 priv->rxEocCount++;
1624 }
1625
1626 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1627 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1628 if ( priv->timer.function == NULL ) {
1629 priv->timer.function = &TLan_Timer;
1630 priv->timer.data = (unsigned long) dev;
1631 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1632 priv->timerSetAt = jiffies;
1633 priv->timerType = TLAN_TIMER_ACTIVITY;
1634 add_timer(&priv->timer);
1635 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1636 priv->timerSetAt = jiffies;
1637 }
1638 }
1639
1640 dev->last_rx = jiffies;
6aa20a22 1641
1da177e4
LT		 1642 return ack;
1643
1644} /* TLan_HandleRxEOF */
1645
1646
1647
1648
1649 /***************************************************************
1650 * TLan_HandleDummy
1651 *
1652 * Returns:
1653 * 1
1654 * Parms:
1655 * dev Device assigned the IRQ that was
1656 * raised.
1657 * host_int The contents of the HOST_INT
1658 * port.
1659 *
1660 * This function handles the Dummy interrupt, which is
1661 * raised whenever a test interrupt is generated by setting
1662 * the Req_Int bit of HOST_CMD to 1.
1663 *
1664 **************************************************************/
1665
1666u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
1667{
1668 printk( "TLAN: Test interrupt on %s.\n", dev->name );
1669 return 1;
1670
1671} /* TLan_HandleDummy */
1672
1673
1674
1675
1676 /***************************************************************
1677 * TLan_HandleTxEOC
1678 *
1679 * Returns:
1680 * 1
1681 * Parms:
1682 * dev Device assigned the IRQ that was
1683 * raised.
1684 * host_int The contents of the HOST_INT
1685 * port.
1686 *
1687 * This driver is structured to determine EOC occurrences by
1688 * reading the CSTAT member of the list structure. Tx EOC
1689 * interrupts are disabled via the DIO INTDIS register.
1690 * However, TLAN chips before revision 3.0 didn't have this
1691 * functionality, so process EOC events if this is the
1692 * case.
1693 *
1694 **************************************************************/
1695
1696u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
1697{
1698 TLanPrivateInfo *priv = netdev_priv(dev);
1699 TLanList *head_list;
1700 dma_addr_t head_list_phys;
1701 u32 ack = 1;
6aa20a22 1702
1da177e4
LT		 1703 host_int = 0;
1704 if ( priv->tlanRev < 0x30 ) {
1705 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", priv->txHead, priv->txTail );
1706 head_list = priv->txList + priv->txHead;
1707 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1708 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1709 netif_stop_queue(dev);
1710 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1711 ack |= TLAN_HC_GO;
1712 } else {
1713 priv->txInProgress = 0;
1714 }
1715 }
1716
1717 return ack;
1718
1719} /* TLan_HandleTxEOC */
1720
1721
1722
1723
1724 /***************************************************************
1725 * TLan_HandleStatusCheck
1726 *
1727 * Returns:
1728 * 0 if Adapter check, 1 if Network Status check.
1729 * Parms:
1730 * dev Device assigned the IRQ that was
1731 * raised.
1732 * host_int The contents of the HOST_INT
1733 * port.
1734 *
1735 * This function handles Adapter Check/Network Status
1736 * interrupts generated by the adapter. It checks the
1737 * vector in the HOST_INT register to determine if it is
1738 * an Adapter Check interrupt. If so, it resets the
1739 * adapter. Otherwise it clears the status registers
1740 * and services the PHY.
1741 *
1742 **************************************************************/
1743
1744u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
6aa20a22 1745{
1da177e4
LT		 1746 TLanPrivateInfo *priv = netdev_priv(dev);
1747 u32 ack;
1748 u32 error;
1749 u8 net_sts;
1750 u32 phy;
1751 u16 tlphy_ctl;
1752 u16 tlphy_sts;
6aa20a22 1753
1da177e4
LT		 1754 ack = 1;
1755 if ( host_int & TLAN_HI_IV_MASK ) {
1756 netif_stop_queue( dev );
1757 error = inl( dev->base_addr + TLAN_CH_PARM );
1758 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error );
1759 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1760 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1761
1762 schedule_work(&priv->tlan_tqueue);
1763
1764 netif_wake_queue(dev);
1765 ack = 0;
1766 } else {
1767 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name );
1768 phy = priv->phy[priv->phyNum];
1769
1770 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1771 if ( net_sts ) {
1772 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
1773 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n", dev->name, (unsigned) net_sts );
1774 }
1775 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1776 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1777 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
1778 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) && ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1779 tlphy_ctl |= TLAN_TC_SWAPOL;
1780 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1781 } else if ( ( tlphy_sts & TLAN_TS_POLOK ) && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1782 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1783 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1784 }
1785
1786 if (debug) {
6aa20a22 1787 TLan_PhyPrint( dev );
1da177e4
LT		 1788 }
1789 }
1790 }
1791
1792 return ack;
1793
1794} /* TLan_HandleStatusCheck */
1795
1796
1797
1798
1799 /***************************************************************
1800 * TLan_HandleRxEOC
1801 *
1802 * Returns:
1803 * 1
1804 * Parms:
1805 * dev Device assigned the IRQ that was
1806 * raised.
1807 * host_int The contents of the HOST_INT
1808 * port.
1809 *
1810 * This driver is structured to determine EOC occurrences by
1811 * reading the CSTAT member of the list structure. Rx EOC
1812 * interrupts are disabled via the DIO INTDIS register.
1813 * However, TLAN chips before revision 3.0 didn't have this
1814 * CSTAT member or a INTDIS register, so if this chip is
1815 * pre-3.0, process EOC interrupts normally.
1816 *
1817 **************************************************************/
1818
1819u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1820{
1821 TLanPrivateInfo *priv = netdev_priv(dev);
1822 dma_addr_t head_list_phys;
1823 u32 ack = 1;
1824
1825 if ( priv->tlanRev < 0x30 ) {
1826 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", priv->rxHead, priv->rxTail );
1827 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1828 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1829 ack |= TLAN_HC_GO | TLAN_HC_RT;
1830 priv->rxEocCount++;
1831 }
1832
1833 return ack;
1834
1835} /* TLan_HandleRxEOC */
1836
1837
1838
1839
1840/*****************************************************************************
1841******************************************************************************
1842
1843 ThunderLAN Driver Timer Function
1844
1845******************************************************************************
1846*****************************************************************************/
1847
1848
1849 /***************************************************************
1850 * TLan_Timer
1851 *
1852 * Returns:
1853 * Nothing
1854 * Parms:
1855 * data A value given to add timer when
1856 * add_timer was called.
1857 *
1858 * This function handles timed functionality for the
1859 * TLAN driver. The two current timer uses are for
1860 * delaying for autonegotionation and driving the ACT LED.
1861 * - Autonegotiation requires being allowed about
1862 * 2 1/2 seconds before attempting to transmit a
1863 * packet. It would be a very bad thing to hang
1864 * the kernel this long, so the driver doesn't
1865 * allow transmission 'til after this time, for
1866 * certain PHYs. It would be much nicer if all
1867 * PHYs were interrupt-capable like the internal
1868 * PHY.
1869 * - The ACT LED, which shows adapter activity, is
1870 * driven by the driver, and so must be left on
1871 * for a short period to power up the LED so it
1872 * can be seen. This delay can be changed by
1873 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1874 * if desired. 100 ms produces a slightly
1875 * sluggish response.
1876 *
1877 **************************************************************/
1878
1879void TLan_Timer( unsigned long data )
1880{
1881 struct net_device *dev = (struct net_device *) data;
1882 TLanPrivateInfo *priv = netdev_priv(dev);
1883 u32 elapsed;
1884 unsigned long flags = 0;
1885
1886 priv->timer.function = NULL;
1887
1888 switch ( priv->timerType ) {
6aa20a22 1889#ifdef MONITOR
1da177e4
LT		 1890 case TLAN_TIMER_LINK_BEAT:
1891 TLan_PhyMonitor( dev );
1892 break;
1893#endif
1894 case TLAN_TIMER_PHY_PDOWN:
1895 TLan_PhyPowerDown( dev );
1896 break;
1897 case TLAN_TIMER_PHY_PUP:
1898 TLan_PhyPowerUp( dev );
1899 break;
1900 case TLAN_TIMER_PHY_RESET:
1901 TLan_PhyReset( dev );
1902 break;
1903 case TLAN_TIMER_PHY_START_LINK:
1904 TLan_PhyStartLink( dev );
1905 break;
1906 case TLAN_TIMER_PHY_FINISH_AN:
1907 TLan_PhyFinishAutoNeg( dev );
1908 break;
1909 case TLAN_TIMER_FINISH_RESET:
1910 TLan_FinishReset( dev );
1911 break;
1912 case TLAN_TIMER_ACTIVITY:
1913 spin_lock_irqsave(&priv->lock, flags);
1914 if ( priv->timer.function == NULL ) {
1915 elapsed = jiffies - priv->timerSetAt;
1916 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
1917 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
1918 } else {
1919 priv->timer.function = &TLan_Timer;
1920 priv->timer.expires = priv->timerSetAt + TLAN_TIMER_ACT_DELAY;
1921 spin_unlock_irqrestore(&priv->lock, flags);
1922 add_timer( &priv->timer );
1923 break;
1924 }
1925 }
1926 spin_unlock_irqrestore(&priv->lock, flags);
1927 break;
1928 default:
1929 break;
1930 }
1931
1932} /* TLan_Timer */
1933
1934
1935
1936
1937/*****************************************************************************
1938******************************************************************************
1939
1940 ThunderLAN Driver Adapter Related Routines
1941
1942******************************************************************************
1943*****************************************************************************/
1944
1945
1946 /***************************************************************
1947 * TLan_ResetLists
6aa20a22 1948 *
1da177e4
LT		 1949 * Returns:
1950 * Nothing
1951 * Parms:
1952 * dev The device structure with the list
1953 * stuctures to be reset.
1954 *
1955 * This routine sets the variables associated with managing
1956 * the TLAN lists to their initial values.
1957 *
1958 **************************************************************/
1959
1960void TLan_ResetLists( struct net_device *dev )
1961{
1962 TLanPrivateInfo *priv = netdev_priv(dev);
1963 int i;
1964 TLanList *list;
1965 dma_addr_t list_phys;
1966 struct sk_buff *skb;
1967 void *t = NULL;
1968
1969 priv->txHead = 0;
1970 priv->txTail = 0;
1971 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1972 list = priv->txList + i;
1973 list->cStat = TLAN_CSTAT_UNUSED;
1974 if ( bbuf ) {
1975 list->buffer[0].address = priv->txBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
1976 } else {
1977 list->buffer[0].address = 0;
1978 }
1979 list->buffer[2].count = 0;
1980 list->buffer[2].address = 0;
1981 list->buffer[8].address = 0;
1982 list->buffer[9].address = 0;
1983 }
1984
1985 priv->rxHead = 0;
1986 priv->rxTail = TLAN_NUM_RX_LISTS - 1;
1987 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
1988 list = priv->rxList + i;
1989 list_phys = priv->rxListDMA + sizeof(TLanList) * i;
1990 list->cStat = TLAN_CSTAT_READY;
1991 list->frameSize = TLAN_MAX_FRAME_SIZE;
1992 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
1993 if ( bbuf ) {
1994 list->buffer[0].address = priv->rxBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
1995 } else {
1996 skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
1997 if ( skb == NULL ) {
1998 printk( "TLAN: Couldn't allocate memory for received data.\n" );
1999 /* If this ever happened it would be a problem */
2000 } else {
2001 skb->dev = dev;
2002 skb_reserve( skb, 2 );
2003 t = (void *) skb_put( skb, TLAN_MAX_FRAME_SIZE );
2004 }
2005 list->buffer[0].address = pci_map_single(priv->pciDev, t, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2006 list->buffer[8].address = (u32) t;
2007 TLan_StoreSKB(list, skb);
2008 }
2009 list->buffer[1].count = 0;
2010 list->buffer[1].address = 0;
2011 if ( i < TLAN_NUM_RX_LISTS - 1 )
2012 list->forward = list_phys + sizeof(TLanList);
2013 else
2014 list->forward = 0;
2015 }
2016
2017} /* TLan_ResetLists */
2018
2019
2020void TLan_FreeLists( struct net_device *dev )
2021{
2022 TLanPrivateInfo *priv = netdev_priv(dev);
2023 int i;
2024 TLanList *list;
2025 struct sk_buff *skb;
2026
2027 if ( ! bbuf ) {
2028 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
2029 list = priv->txList + i;
2030 skb = TLan_GetSKB(list);
2031 if ( skb ) {
2032 pci_unmap_single(priv->pciDev, list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
2033 dev_kfree_skb_any( skb );
2034 list->buffer[8].address = 0;
2035 list->buffer[9].address = 0;
2036 }
2037 }
2038
2039 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2040 list = priv->rxList + i;
2041 skb = TLan_GetSKB(list);
2042 if ( skb ) {
2043 pci_unmap_single(priv->pciDev, list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2044 dev_kfree_skb_any( skb );
2045 list->buffer[8].address = 0;
2046 list->buffer[9].address = 0;
2047 }
2048 }
2049 }
2050} /* TLan_FreeLists */
2051
2052
2053
2054
2055 /***************************************************************
2056 * TLan_PrintDio
6aa20a22 2057 *
1da177e4
LT		 2058 * Returns:
2059 * Nothing
2060 * Parms:
2061 * io_base Base IO port of the device of
2062 * which to print DIO registers.
2063 *
2064 * This function prints out all the internal (DIO)
2065 * registers of a TLAN chip.
2066 *
2067 **************************************************************/
2068
2069void TLan_PrintDio( u16 io_base )
2070{
2071 u32 data0, data1;
2072 int i;
2073
2074 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n", io_base );
2075 printk( "TLAN: Off. +0 +4\n" );
2076 for ( i = 0; i < 0x4C; i+= 8 ) {
2077 data0 = TLan_DioRead32( io_base, i );
2078 data1 = TLan_DioRead32( io_base, i + 0x4 );
2079 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 );
2080 }
2081
2082} /* TLan_PrintDio */
2083
2084
2085
2086
2087 /***************************************************************
2088 * TLan_PrintList
6aa20a22 2089 *
1da177e4
LT		 2090 * Returns:
2091 * Nothing
2092 * Parms:
2093 * list A pointer to the TLanList structure to
2094 * be printed.
2095 * type A string to designate type of list,
2096 * "Rx" or "Tx".
2097 * num The index of the list.
2098 *
2099 * This function prints out the contents of the list
2100 * pointed to by the list parameter.
2101 *
2102 **************************************************************/
2103
2104void TLan_PrintList( TLanList *list, char *type, int num)
2105{
2106 int i;
2107
2108 printk( "TLAN: %s List %d at 0x%08x\n", type, num, (u32) list );
2109 printk( "TLAN: Forward = 0x%08x\n", list->forward );
2110 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat );
2111 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
2112 /* for ( i = 0; i < 10; i++ ) { */
2113 for ( i = 0; i < 2; i++ ) {
2114 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n", i, list->buffer[i].count, list->buffer[i].address );
2115 }
2116
2117} /* TLan_PrintList */
2118
2119
2120
2121
2122 /***************************************************************
2123 * TLan_ReadAndClearStats
2124 *
2125 * Returns:
2126 * Nothing
2127 * Parms:
2128 * dev Pointer to device structure of adapter
2129 * to which to read stats.
6aa20a22 2130 * record Flag indicating whether to add
1da177e4
LT		 2131 *
2132 * This functions reads all the internal status registers
2133 * of the TLAN chip, which clears them as a side effect.
2134 * It then either adds the values to the device's status
2135 * struct, or discards them, depending on whether record
2136 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2137 *
2138 **************************************************************/
2139
2140void TLan_ReadAndClearStats( struct net_device *dev, int record )
2141{
2142 TLanPrivateInfo *priv = netdev_priv(dev);
2143 u32 tx_good, tx_under;
2144 u32 rx_good, rx_over;
2145 u32 def_tx, crc, code;
2146 u32 multi_col, single_col;
2147 u32 excess_col, late_col, loss;
2148
2149 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2150 tx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2151 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2152 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2153 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2154
2155 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2156 rx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2157 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2158 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2159 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2160
1da177e4
LT		 2161 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR );
2162 def_tx = inb( dev->base_addr + TLAN_DIO_DATA );
2163 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2164 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2165 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2166
1da177e4
LT		 2167 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2168 multi_col = inb( dev->base_addr + TLAN_DIO_DATA );
2169 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2170 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2171 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8;
2172
2173 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2174 excess_col = inb( dev->base_addr + TLAN_DIO_DATA );
2175 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 );
2176 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2177
2178 if ( record ) {
2179 priv->stats.rx_packets += rx_good;
2180 priv->stats.rx_errors += rx_over + crc + code;
2181 priv->stats.tx_packets += tx_good;
2182 priv->stats.tx_errors += tx_under + loss;
2183 priv->stats.collisions += multi_col + single_col + excess_col + late_col;
2184
2185 priv->stats.rx_over_errors += rx_over;
2186 priv->stats.rx_crc_errors += crc;
2187 priv->stats.rx_frame_errors += code;
2188
2189 priv->stats.tx_aborted_errors += tx_under;
2190 priv->stats.tx_carrier_errors += loss;
2191 }
6aa20a22 2192
1da177e4
LT		 2193} /* TLan_ReadAndClearStats */
2194
2195
2196
2197
2198 /***************************************************************
2199 * TLan_Reset
2200 *
2201 * Returns:
2202 * 0
2203 * Parms:
2204 * dev Pointer to device structure of adapter
2205 * to be reset.
2206 *
2207 * This function resets the adapter and it's physical
2208 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2209 * Programmer's Guide" for details. The routine tries to
2210 * implement what is detailed there, though adjustments
2211 * have been made.
2212 *
2213 **************************************************************/
2214
2215void
2216TLan_ResetAdapter( struct net_device *dev )
2217{
2218 TLanPrivateInfo *priv = netdev_priv(dev);
2219 int i;
2220 u32 addr;
2221 u32 data;
2222 u8 data8;
2223
2224 priv->tlanFullDuplex = FALSE;
2225 priv->phyOnline=0;
2226 netif_carrier_off(dev);
2227
2228/* 1. Assert reset bit. */
2229
2230 data = inl(dev->base_addr + TLAN_HOST_CMD);
2231 data |= TLAN_HC_AD_RST;
2232 outl(data, dev->base_addr + TLAN_HOST_CMD);
6aa20a22 2233
1da177e4
LT		 2234 udelay(1000);
2235
2236/* 2. Turn off interrupts. ( Probably isn't necessary ) */
2237
2238 data = inl(dev->base_addr + TLAN_HOST_CMD);
2239 data |= TLAN_HC_INT_OFF;
2240 outl(data, dev->base_addr + TLAN_HOST_CMD);
2241
2242/* 3. Clear AREGs and HASHs. */
2243
2244 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) {
2245 TLan_DioWrite32( dev->base_addr, (u16) i, 0 );
2246 }
2247
2248/* 4. Setup NetConfig register. */
2249
2250 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2251 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2252
2253/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2254
2255 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD );
2256 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD );
2257
2258/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2259
2260 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR );
2261 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2262 TLan_SetBit( TLAN_NET_SIO_NMRST, addr );
2263
2264/* 7. Setup the remaining registers. */
2265
2266 if ( priv->tlanRev >= 0x30 ) {
2267 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2268 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 );
2269 }
2270 TLan_PhyDetect( dev );
2271 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
6aa20a22 2272
1da177e4
LT		 2273 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
2274 data |= TLAN_NET_CFG_BIT;
2275 if ( priv->aui == 1 ) {
2276 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a );
2277 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2278 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 );
2279 priv->tlanFullDuplex = TRUE;
2280 } else {
2281 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 );
2282 }
2283 }
2284
2285 if ( priv->phyNum == 0 ) {
2286 data |= TLAN_NET_CFG_PHY_EN;
2287 }
2288 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2289
2290 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2291 TLan_FinishReset( dev );
2292 } else {
2293 TLan_PhyPowerDown( dev );
2294 }
2295
2296} /* TLan_ResetAdapter */
2297
2298
2299
2300
2301void
2302TLan_FinishReset( struct net_device *dev )
2303{
2304 TLanPrivateInfo *priv = netdev_priv(dev);
2305 u8 data;
2306 u32 phy;
2307 u8 sio;
2308 u16 status;
2309 u16 partner;
2310 u16 tlphy_ctl;
2311 u16 tlphy_par;
2312 u16 tlphy_id1, tlphy_id2;
2313 int i;
2314
2315 phy = priv->phy[priv->phyNum];
2316
2317 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2318 if ( priv->tlanFullDuplex ) {
2319 data |= TLAN_NET_CMD_DUPLEX;
2320 }
2321 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
6aa20a22 2322 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
1da177e4 2323 if ( priv->phyNum == 0 ) {
6aa20a22 2324 data |= TLAN_NET_MASK_MASK7;
1da177e4
LT		 2325 }
2326 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data );
2327 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 );
2328 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 );
2329 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
6aa20a22 2330
1da177e4
LT		 2331 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || ( priv->aui ) ) {
2332 status = MII_GS_LINK;
2333 printk( "TLAN: %s: Link forced.\n", dev->name );
2334 } else {
2335 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2336 udelay( 1000 );
2337 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
6aa20a22 2338 if ( (status & MII_GS_LINK) && /* We only support link info on Nat.Sem. PHY's */
1da177e4
LT		 2339 (tlphy_id1 == NAT_SEM_ID1) &&
2340 (tlphy_id2 == NAT_SEM_ID2) ) {
2341 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner );
2342 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par );
6aa20a22 2343
1da177e4
LT		 2344 printk( "TLAN: %s: Link active with ", dev->name );
2345 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
6aa20a22 2346 printk( "forced 10%sMbps %s-Duplex\n",
1da177e4
LT		 2347 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2348 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2349 } else {
2350 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
2351 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2352 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2353 printk("TLAN: Partner capability: ");
2354 for (i = 5; i <= 10; i++)
2355 if (partner & (1<<i))
2356 printk("%s",media[i-5]);
2357 printk("\n");
2358 }
2359
2360 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
6aa20a22 2361#ifdef MONITOR
1da177e4
LT		 2362 /* We have link beat..for now anyway */
2363 priv->link = 1;
2364 /*Enabling link beat monitoring */
2365 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2366#endif
1da177e4
LT		 2367 } else if (status & MII_GS_LINK) {
2368 printk( "TLAN: %s: Link active\n", dev->name );
2369 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2370 }
2371 }
2372
2373 if ( priv->phyNum == 0 ) {
2374 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
2375 tlphy_ctl |= TLAN_TC_INTEN;
2376 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl );
2377 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO );
2378 sio |= TLAN_NET_SIO_MINTEN;
2379 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio );
2380 }
2381
2382 if ( status & MII_GS_LINK ) {
2383 TLan_SetMac( dev, 0, dev->dev_addr );
2384 priv->phyOnline = 1;
2385 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2386 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) {
2387 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2388 }
2389 outl( priv->rxListDMA, dev->base_addr + TLAN_CH_PARM );
2390 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2391 netif_carrier_on(dev);
2392 } else {
2393 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n", dev->name );
2394 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
2395 return;
2396 }
562faf46 2397 TLan_SetMulticastList(dev);
1da177e4
LT		 2398
2399} /* TLan_FinishReset */
2400
2401
2402
2403
2404 /***************************************************************
2405 * TLan_SetMac
2406 *
2407 * Returns:
2408 * Nothing
2409 * Parms:
2410 * dev Pointer to device structure of adapter
2411 * on which to change the AREG.
2412 * areg The AREG to set the address in (0 - 3).
2413 * mac A pointer to an array of chars. Each
2414 * element stores one byte of the address.
2415 * IE, it isn't in ascii.
2416 *
2417 * This function transfers a MAC address to one of the
2418 * TLAN AREGs (address registers). The TLAN chip locks
2419 * the register on writing to offset 0 and unlocks the
2420 * register after writing to offset 5. If NULL is passed
2421 * in mac, then the AREG is filled with 0's.
2422 *
2423 **************************************************************/
2424
2425void TLan_SetMac( struct net_device *dev, int areg, char *mac )
2426{
2427 int i;
6aa20a22 2428
1da177e4
LT		 2429 areg *= 6;
2430
2431 if ( mac != NULL ) {
2432 for ( i = 0; i < 6; i++ )
2433 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, mac[i] );
2434 } else {
2435 for ( i = 0; i < 6; i++ )
2436 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, 0 );
2437 }
2438
2439} /* TLan_SetMac */
2440
2441
2442
2443
2444/*****************************************************************************
2445******************************************************************************
2446
2447 ThunderLAN Driver PHY Layer Routines
2448
2449******************************************************************************
2450*****************************************************************************/
2451
2452
2453
2454 /*********************************************************************
2455 * TLan_PhyPrint
2456 *
2457 * Returns:
2458 * Nothing
2459 * Parms:
2460 * dev A pointer to the device structure of the
2461 * TLAN device having the PHYs to be detailed.
6aa20a22 2462 *
1da177e4
LT		 2463 * This function prints the registers a PHY (aka transceiver).
2464 *
2465 ********************************************************************/
2466
2467void TLan_PhyPrint( struct net_device *dev )
2468{
2469 TLanPrivateInfo *priv = netdev_priv(dev);
2470 u16 i, data0, data1, data2, data3, phy;
2471
2472 phy = priv->phy[priv->phyNum];
2473
2474 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2475 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name );
2476 } else if ( phy <= TLAN_PHY_MAX_ADDR ) {
2477 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy );
2478 printk( "TLAN: Off. +0 +1 +2 +3 \n" );
2479 for ( i = 0; i < 0x20; i+= 4 ) {
2480 printk( "TLAN: 0x%02x", i );
2481 TLan_MiiReadReg( dev, phy, i, &data0 );
2482 printk( " 0x%04hx", data0 );
2483 TLan_MiiReadReg( dev, phy, i + 1, &data1 );
2484 printk( " 0x%04hx", data1 );
2485 TLan_MiiReadReg( dev, phy, i + 2, &data2 );
2486 printk( " 0x%04hx", data2 );
2487 TLan_MiiReadReg( dev, phy, i + 3, &data3 );
2488 printk( " 0x%04hx\n", data3 );
2489 }
2490 } else {
2491 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name );
2492 }
2493
2494} /* TLan_PhyPrint */
2495
2496
2497
2498
2499 /*********************************************************************
2500 * TLan_PhyDetect
2501 *
2502 * Returns:
2503 * Nothing
2504 * Parms:
2505 * dev A pointer to the device structure of the adapter
2506 * for which the PHY needs determined.
2507 *
2508 * So far I've found that adapters which have external PHYs
2509 * may also use the internal PHY for part of the functionality.
2510 * (eg, AUI/Thinnet). This function finds out if this TLAN
2511 * chip has an internal PHY, and then finds the first external
2512 * PHY (starting from address 0) if it exists).
2513 *
2514 ********************************************************************/
2515
2516void TLan_PhyDetect( struct net_device *dev )
2517{
2518 TLanPrivateInfo *priv = netdev_priv(dev);
2519 u16 control;
2520 u16 hi;
2521 u16 lo;
2522 u32 phy;
2523
2524 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2525 priv->phyNum = 0xFFFF;
2526 return;
2527 }
2528
2529 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi );
6aa20a22 2530
1da177e4
LT		 2531 if ( hi != 0xFFFF ) {
2532 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2533 } else {
2534 priv->phy[0] = TLAN_PHY_NONE;
2535 }
2536
2537 priv->phy[1] = TLAN_PHY_NONE;
2538 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) {
2539 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2540 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2541 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
2542 if ( ( control != 0xFFFF ) || ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2543 TLAN_DBG( TLAN_DEBUG_GNRL, "PHY found at %02x %04x %04x %04x\n", phy, control, hi, lo );
2544 if ( ( priv->phy[1] == TLAN_PHY_NONE ) && ( phy != TLAN_PHY_MAX_ADDR ) ) {
2545 priv->phy[1] = phy;
2546 }
2547 }
2548 }
2549
2550 if ( priv->phy[1] != TLAN_PHY_NONE ) {
2551 priv->phyNum = 1;
2552 } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
2553 priv->phyNum = 0;
2554 } else {
2555 printk( "TLAN: Cannot initialize device, no PHY was found!\n" );
2556 }
2557
2558} /* TLan_PhyDetect */
2559
2560
2561
2562
2563void TLan_PhyPowerDown( struct net_device *dev )
2564{
2565 TLanPrivateInfo *priv = netdev_priv(dev);
2566 u16 value;
2567
2568 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name );
2569 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2570 TLan_MiiSync( dev->base_addr );
2571 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2572 if ( ( priv->phyNum == 0 ) && ( priv->phy[1] != TLAN_PHY_NONE ) && ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
2573 TLan_MiiSync( dev->base_addr );
2574 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2575 }
2576
2577 /* Wait for 50 ms and powerup
2578 * This is abitrary. It is intended to make sure the
2579 * transceiver settles.
2580 */
2581 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP );
2582
2583} /* TLan_PhyPowerDown */
2584
2585
2586
2587
2588void TLan_PhyPowerUp( struct net_device *dev )
2589{
2590 TLanPrivateInfo *priv = netdev_priv(dev);
2591 u16 value;
2592
2593 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name );
2594 TLan_MiiSync( dev->base_addr );
2595 value = MII_GC_LOOPBK;
2596 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2597 TLan_MiiSync(dev->base_addr);
2598 /* Wait for 500 ms and reset the
2599 * transceiver. The TLAN docs say both 50 ms and
2600 * 500 ms, so do the longer, just in case.
2601 */
2602 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET );
2603
2604} /* TLan_PhyPowerUp */
2605
2606
2607
2608
2609void TLan_PhyReset( struct net_device *dev )
2610{
2611 TLanPrivateInfo *priv = netdev_priv(dev);
2612 u16 phy;
2613 u16 value;
2614
2615 phy = priv->phy[priv->phyNum];
2616
2617 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name );
2618 TLan_MiiSync( dev->base_addr );
2619 value = MII_GC_LOOPBK | MII_GC_RESET;
2620 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value );
2621 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2622 while ( value & MII_GC_RESET ) {
2623 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2624 }
2625
2626 /* Wait for 500 ms and initialize.
2627 * I don't remember why I wait this long.
2628 * I've changed this to 50ms, as it seems long enough.
2629 */
2630 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK );
2631
2632} /* TLan_PhyReset */
2633
2634
2635
2636
2637void TLan_PhyStartLink( struct net_device *dev )
2638{
2639 TLanPrivateInfo *priv = netdev_priv(dev);
2640 u16 ability;
2641 u16 control;
2642 u16 data;
2643 u16 phy;
2644 u16 status;
2645 u16 tctl;
2646
2647 phy = priv->phy[priv->phyNum];
2648 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name );
2649 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2650 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability );
2651
6aa20a22 2652 if ( ( status & MII_GS_AUTONEG ) &&
1da177e4
LT		 2653 ( ! priv->aui ) ) {
2654 ability = status >> 11;
6aa20a22 2655 if ( priv->speed == TLAN_SPEED_10 &&
1da177e4
LT		 2656 priv->duplex == TLAN_DUPLEX_HALF) {
2657 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000);
2658 } else if ( priv->speed == TLAN_SPEED_10 &&
2659 priv->duplex == TLAN_DUPLEX_FULL) {
2660 priv->tlanFullDuplex = TRUE;
2661 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100);
2662 } else if ( priv->speed == TLAN_SPEED_100 &&
2663 priv->duplex == TLAN_DUPLEX_HALF) {
2664 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000);
2665 } else if ( priv->speed == TLAN_SPEED_100 &&
2666 priv->duplex == TLAN_DUPLEX_FULL) {
2667 priv->tlanFullDuplex = TRUE;
2668 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100);
2669 } else {
6aa20a22 2670
1da177e4
LT		 2671 /* Set Auto-Neg advertisement */
2672 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1);
2673 /* Enablee Auto-Neg */
2674 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 );
2675 /* Restart Auto-Neg */
2676 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 );
2677 /* Wait for 4 sec for autonegotiation
2678 * to complete. The max spec time is less than this
2679 * but the card need additional time to start AN.
2680 * .5 sec should be plenty extra.
2681 */
2682 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name );
2683 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN );
2684 return;
2685 }
6aa20a22
JG		 2686
2687 }
2688
1da177e4
LT		 2689 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
2690 priv->phyNum = 0;
2691 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2692 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2693 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2694 return;
2695 } else if ( priv->phyNum == 0 ) {
2696 control = 0;
2697 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl );
2698 if ( priv->aui ) {
2699 tctl |= TLAN_TC_AUISEL;
6aa20a22 2700 } else {
1da177e4
LT		 2701 tctl &= ~TLAN_TC_AUISEL;
2702 if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2703 control |= MII_GC_DUPLEX;
2704 priv->tlanFullDuplex = TRUE;
2705 }
2706 if ( priv->speed == TLAN_SPEED_100 ) {
2707 control |= MII_GC_SPEEDSEL;
2708 }
2709 }
2710 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control );
2711 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl );
2712 }
2713
2714 /* Wait for 2 sec to give the transceiver time
2715 * to establish link.
2716 */
2717 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET );
2718
2719} /* TLan_PhyStartLink */
2720
2721
2722
2723
2724void TLan_PhyFinishAutoNeg( struct net_device *dev )
2725{
2726 TLanPrivateInfo *priv = netdev_priv(dev);
2727 u16 an_adv;
2728 u16 an_lpa;
2729 u16 data;
2730 u16 mode;
2731 u16 phy;
2732 u16 status;
6aa20a22 2733
1da177e4
LT		 2734 phy = priv->phy[priv->phyNum];
2735
2736 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2737 udelay( 1000 );
2738 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2739
2740 if ( ! ( status & MII_GS_AUTOCMPLT ) ) {
2741 /* Wait for 8 sec to give the process
2742 * more time. Perhaps we should fail after a while.
2743 */
2744 if (!priv->neg_be_verbose++) {
2745 printk(KERN_INFO "TLAN: Giving autonegotiation more time.\n");
2746 printk(KERN_INFO "TLAN: Please check that your adapter has\n");
2747 printk(KERN_INFO "TLAN: been properly connected to a HUB or Switch.\n");
2748 printk(KERN_INFO "TLAN: Trying to establish link in the background...\n");
2749 }
2750 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN );
2751 return;
2752 }
2753
2754 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name );
2755 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv );
2756 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa );
2757 mode = an_adv & an_lpa & 0x03E0;
2758 if ( mode & 0x0100 ) {
2759 priv->tlanFullDuplex = TRUE;
2760 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) {
2761 priv->tlanFullDuplex = TRUE;
2762 }
2763
2764 if ( ( ! ( mode & 0x0180 ) ) && ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && ( priv->phyNum != 0 ) ) {
2765 priv->phyNum = 0;
2766 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2767 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2768 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2769 return;
2770 }
2771
2772 if ( priv->phyNum == 0 ) {
2773 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || ( an_adv & an_lpa & 0x0040 ) ) {
2774 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB | MII_GC_DUPLEX );
2775 printk( "TLAN: Starting internal PHY with FULL-DUPLEX\n" );
2776 } else {
2777 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
2778 printk( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
2779 }
2780 }
2781
2782 /* Wait for 100 ms. No reason in partiticular.
2783 */
2784 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET );
6aa20a22 2785
1da177e4
LT		 2786} /* TLan_PhyFinishAutoNeg */
2787
2788#ifdef MONITOR
2789
2790 /*********************************************************************
2791 *
2792 * TLan_phyMonitor
2793 *
6aa20a22 2794 * Returns:
1da177e4
LT		 2795 * None
2796 *
2797 * Params:
2798 * dev The device structure of this device.
2799 *
6aa20a22 2800 *
1da177e4
LT		 2801 * This function monitors PHY condition by reading the status
2802 * register via the MII bus. This can be used to give info
2803 * about link changes (up/down), and possible switch to alternate
2804 * media.
2805 *
2806 * ******************************************************************/
2807
2808void TLan_PhyMonitor( struct net_device *dev )
2809{
2810 TLanPrivateInfo *priv = netdev_priv(dev);
2811 u16 phy;
2812 u16 phy_status;
2813
2814 phy = priv->phy[priv->phyNum];
2815
2816 /* Get PHY status register */
2817 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status );
2818
2819 /* Check if link has been lost */
6aa20a22 2820 if (!(phy_status & MII_GS_LINK)) {
1da177e4
LT		 2821 if (priv->link) {
2822 priv->link = 0;
2823 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name);
7d17c1d6 2824 netif_carrier_off(dev);
1da177e4
LT		 2825 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2826 return;
2827 }
2828 }
2829
2830 /* Link restablished? */
2831 if ((phy_status & MII_GS_LINK) && !priv->link) {
2832 priv->link = 1;
2833 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name);
7d17c1d6 2834 netif_carrier_on(dev);
1da177e4
LT		 2835 }
2836
2837 /* Setup a new monitor */
2838 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2839}
1da177e4
LT		 2840
2841#endif /* MONITOR */
2842
2843
2844/*****************************************************************************
2845******************************************************************************
2846
2847 ThunderLAN Driver MII Routines
2848
2849 These routines are based on the information in Chap. 2 of the
2850 "ThunderLAN Programmer's Guide", pp. 15-24.
2851
2852******************************************************************************
2853*****************************************************************************/
2854
2855
2856 /***************************************************************
2857 * TLan_MiiReadReg
2858 *
2859 * Returns:
2860 * 0 if ack received ok
2861 * 1 otherwise.
2862 *
2863 * Parms:
2864 * dev The device structure containing
2865 * The io address and interrupt count
2866 * for this device.
2867 * phy The address of the PHY to be queried.
2868 * reg The register whose contents are to be
4a4efbde 2869 * retrieved.
1da177e4
LT		 2870 * val A pointer to a variable to store the
2871 * retrieved value.
2872 *
4a4efbde 2873 * This function uses the TLAN's MII bus to retrieve the contents
1da177e4
LT		 2874 * of a given register on a PHY. It sends the appropriate info
2875 * and then reads the 16-bit register value from the MII bus via
2876 * the TLAN SIO register.
2877 *
2878 **************************************************************/
2879
2880int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
2881{
2882 u8 nack;
2883 u16 sio, tmp;
2884 u32 i;
2885 int err;
2886 int minten;
2887 TLanPrivateInfo *priv = netdev_priv(dev);
2888 unsigned long flags = 0;
2889
2890 err = FALSE;
2891 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2892 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 2893
1da177e4
LT		 2894 if (!in_irq())
2895 spin_lock_irqsave(&priv->lock, flags);
2896
2897 TLan_MiiSync(dev->base_addr);
2898
2899 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2900 if ( minten )
2901 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio);
2902
2903 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2904 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */
2905 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2906 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2907
2908
2909 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */
2910
2911 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */
2912 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2913 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */
2914
2915 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */
2916 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */
2917 if (nack) { /* No ACK, so fake it */
2918 for (i = 0; i < 16; i++) {
2919 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2920 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2921 }
2922 tmp = 0xffff;
2923 err = TRUE;
2924 } else { /* ACK, so read data */
2925 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2926 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2927 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio))
2928 tmp |= i;
2929 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2930 }
2931 }
2932
2933
2934 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */
2935 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2936
2937 if ( minten )
2938 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio);
2939
2940 *val = tmp;
6aa20a22 2941
1da177e4
LT		 2942 if (!in_irq())
2943 spin_unlock_irqrestore(&priv->lock, flags);
2944
2945 return err;
2946
2947} /* TLan_MiiReadReg */
2948
2949
2950
2951
2952 /***************************************************************
2953 * TLan_MiiSendData
2954 *
2955 * Returns:
2956 * Nothing
2957 * Parms:
2958 * base_port The base IO port of the adapter in
2959 * question.
2960 * dev The address of the PHY to be queried.
2961 * data The value to be placed on the MII bus.
2962 * num_bits The number of bits in data that are to
2963 * be placed on the MII bus.
2964 *
2965 * This function sends on sequence of bits on the MII
2966 * configuration bus.
2967 *
2968 **************************************************************/
2969
2970void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
2971{
2972 u16 sio;
2973 u32 i;
2974
2975 if ( num_bits == 0 )
2976 return;
2977
2978 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
2979 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2980 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio );
2981
2982 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) {
2983 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
2984 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2985 if ( data & i )
2986 TLan_SetBit( TLAN_NET_SIO_MDATA, sio );
2987 else
2988 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio );
2989 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
2990 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2991 }
2992
2993} /* TLan_MiiSendData */
2994
2995
2996
2997
2998 /***************************************************************
2999 * TLan_MiiSync
3000 *
3001 * Returns:
3002 * Nothing
3003 * Parms:
3004 * base_port The base IO port of the adapter in
3005 * question.
3006 *
3007 * This functions syncs all PHYs in terms of the MII configuration
3008 * bus.
3009 *
3010 **************************************************************/
3011
3012void TLan_MiiSync( u16 base_port )
3013{
3014 int i;
3015 u16 sio;
3016
3017 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3018 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3019
3020 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio );
3021 for ( i = 0; i < 32; i++ ) {
3022 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3023 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3024 }
3025
3026} /* TLan_MiiSync */
3027
3028
3029
3030
3031 /***************************************************************
3032 * TLan_MiiWriteReg
3033 *
3034 * Returns:
3035 * Nothing
3036 * Parms:
3037 * dev The device structure for the device
3038 * to write to.
3039 * phy The address of the PHY to be written to.
3040 * reg The register whose contents are to be
3041 * written.
3042 * val The value to be written to the register.
3043 *
3044 * This function uses the TLAN's MII bus to write the contents of a
3045 * given register on a PHY. It sends the appropriate info and then
3046 * writes the 16-bit register value from the MII configuration bus
3047 * via the TLAN SIO register.
3048 *
3049 **************************************************************/
3050
3051void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
3052{
3053 u16 sio;
3054 int minten;
3055 unsigned long flags = 0;
3056 TLanPrivateInfo *priv = netdev_priv(dev);
3057
3058 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3059 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 3060
1da177e4
LT		 3061 if (!in_irq())
3062 spin_lock_irqsave(&priv->lock, flags);
3063
3064 TLan_MiiSync( dev->base_addr );
3065
3066 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
3067 if ( minten )
3068 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
3069
3070 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
3071 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */
3072 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
3073 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
3074
3075 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */
3076 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */
3077
3078 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */
3079 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3080
3081 if ( minten )
3082 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
6aa20a22 3083
1da177e4
LT		 3084 if (!in_irq())
3085 spin_unlock_irqrestore(&priv->lock, flags);
3086
3087} /* TLan_MiiWriteReg */
3088
3089
3090
3091
3092/*****************************************************************************
3093******************************************************************************
3094
3095 ThunderLAN Driver Eeprom routines
3096
3097 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A
3098 EEPROM. These functions are based on information in Microchip's
3099 data sheet. I don't know how well this functions will work with
3100 other EEPROMs.
3101
3102******************************************************************************
3103*****************************************************************************/
3104
3105
3106 /***************************************************************
3107 * TLan_EeSendStart
3108 *
3109 * Returns:
3110 * Nothing
6aa20a22 3111 * Parms:
1da177e4
LT		 3112 * io_base The IO port base address for the
3113 * TLAN device with the EEPROM to
3114 * use.
3115 *
3116 * This function sends a start cycle to an EEPROM attached
3117 * to a TLAN chip.
3118 *
3119 **************************************************************/
3120
3121void TLan_EeSendStart( u16 io_base )
3122{
3123 u16 sio;
3124
3125 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3126 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3127
3128 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3129 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3130 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3131 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3132 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3133
3134} /* TLan_EeSendStart */
3135
3136
3137
3138
3139 /***************************************************************
3140 * TLan_EeSendByte
3141 *
3142 * Returns:
3143 * If the correct ack was received, 0, otherwise 1
3144 * Parms: io_base The IO port base address for the
3145 * TLAN device with the EEPROM to
3146 * use.
3147 * data The 8 bits of information to
3148 * send to the EEPROM.
3149 * stop If TLAN_EEPROM_STOP is passed, a
3150 * stop cycle is sent after the
3151 * byte is sent after the ack is
3152 * read.
3153 *
3154 * This function sends a byte on the serial EEPROM line,
3155 * driving the clock to send each bit. The function then
3156 * reverses transmission direction and reads an acknowledge
3157 * bit.
3158 *
3159 **************************************************************/
3160
3161int TLan_EeSendByte( u16 io_base, u8 data, int stop )
3162{
3163 int err;
3164 u8 place;
3165 u16 sio;
3166
3167 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3168 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3169
3170 /* Assume clock is low, tx is enabled; */
3171 for ( place = 0x80; place != 0; place >>= 1 ) {
3172 if ( place & data )
3173 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3174 else
3175 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3176 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3177 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3178 }
3179 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3180 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3181 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio );
3182 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3183 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3184
3185 if ( ( ! err ) && stop ) {
3186 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3187 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3188 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3189 }
3190
3191 return ( err );
3192
3193} /* TLan_EeSendByte */
3194
3195
3196
3197
3198 /***************************************************************
3199 * TLan_EeReceiveByte
3200 *
3201 * Returns:
3202 * Nothing
3203 * Parms:
3204 * io_base The IO port base address for the
3205 * TLAN device with the EEPROM to
3206 * use.
3207 * data An address to a char to hold the
3208 * data sent from the EEPROM.
3209 * stop If TLAN_EEPROM_STOP is passed, a
3210 * stop cycle is sent after the
3211 * byte is received, and no ack is
3212 * sent.
3213 *
3214 * This function receives 8 bits of data from the EEPROM
3215 * over the serial link. It then sends and ack bit, or no
3216 * ack and a stop bit. This function is used to retrieve
3217 * data after the address of a byte in the EEPROM has been
3218 * sent.
3219 *
3220 **************************************************************/
3221
3222void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
3223{
3224 u8 place;
3225 u16 sio;
3226
3227 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3228 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3229 *data = 0;
3230
3231 /* Assume clock is low, tx is enabled; */
3232 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3233 for ( place = 0x80; place; place >>= 1 ) {
3234 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3235 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) )
3236 *data |= place;
3237 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3238 }
3239
3240 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3241 if ( ! stop ) {
3242 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */
3243 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3244 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3245 } else {
3246 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
3247 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3248 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3249 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3250 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3251 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3252 }
3253
3254} /* TLan_EeReceiveByte */
3255
3256
3257
3258
3259 /***************************************************************
3260 * TLan_EeReadByte
3261 *
3262 * Returns:
3263 * No error = 0, else, the stage at which the error
3264 * occurred.
3265 * Parms:
3266 * io_base The IO port base address for the
3267 * TLAN device with the EEPROM to
3268 * use.
3269 * ee_addr The address of the byte in the
3270 * EEPROM whose contents are to be
3271 * retrieved.
3272 * data An address to a char to hold the
3273 * data obtained from the EEPROM.
3274 *
3275 * This function reads a byte of information from an byte
3276 * cell in the EEPROM.
3277 *
3278 **************************************************************/
3279
3280int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
3281{
3282 int err;
3283 TLanPrivateInfo *priv = netdev_priv(dev);
3284 unsigned long flags = 0;
3285 int ret=0;
3286
3287 spin_lock_irqsave(&priv->lock, flags);
3288
3289 TLan_EeSendStart( dev->base_addr );
3290 err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK );
3291 if (err)
3292 {
3293 ret=1;
3294 goto fail;
3295 }
3296 err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK );
3297 if (err)
3298 {
3299 ret=2;
3300 goto fail;
3301 }
3302 TLan_EeSendStart( dev->base_addr );
3303 err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK );
3304 if (err)
3305 {
3306 ret=3;
3307 goto fail;
3308 }
3309 TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP );
3310fail:
3311 spin_unlock_irqrestore(&priv->lock, flags);
3312
3313 return ret;
3314
3315} /* TLan_EeReadByte */
3316
3317
3318
Linux kernel - Deliverables
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