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ipv6 ip6_tunnel: eliminate unused recursion field from ip6_tnl{}.
[deliverable/linux.git] / drivers / net / usb / asix.c
CommitLineData
2e55cc72
DB		 1/*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
933a27d3 3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
2e55cc72 4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
933a27d3 5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
2e55cc72
DB		 6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23// #define DEBUG // error path messages, extra info
24// #define VERBOSE // more; success messages
25
2e55cc72
DB		 26#include <linux/module.h>
27#include <linux/kmod.h>
2e55cc72
DB		 28#include <linux/init.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
31#include <linux/ethtool.h>
32#include <linux/workqueue.h>
33#include <linux/mii.h>
34#include <linux/usb.h>
35#include <linux/crc32.h>
3692e94f 36#include <linux/usb/usbnet.h>
2e55cc72 37
933a27d3
DH		 38#define DRIVER_VERSION "14-Jun-2006"
39static const char driver_name [] = "asix";
40
2e55cc72
DB		 41/* ASIX AX8817X based USB 2.0 Ethernet Devices */
42
43#define AX_CMD_SET_SW_MII 0x06
44#define AX_CMD_READ_MII_REG 0x07
45#define AX_CMD_WRITE_MII_REG 0x08
46#define AX_CMD_SET_HW_MII 0x0a
47#define AX_CMD_READ_EEPROM 0x0b
48#define AX_CMD_WRITE_EEPROM 0x0c
49#define AX_CMD_WRITE_ENABLE 0x0d
50#define AX_CMD_WRITE_DISABLE 0x0e
933a27d3 51#define AX_CMD_READ_RX_CTL 0x0f
2e55cc72
DB		 52#define AX_CMD_WRITE_RX_CTL 0x10
53#define AX_CMD_READ_IPG012 0x11
54#define AX_CMD_WRITE_IPG0 0x12
55#define AX_CMD_WRITE_IPG1 0x13
933a27d3 56#define AX_CMD_READ_NODE_ID 0x13
2e55cc72
DB		 57#define AX_CMD_WRITE_IPG2 0x14
58#define AX_CMD_WRITE_MULTI_FILTER 0x16
933a27d3 59#define AX88172_CMD_READ_NODE_ID 0x17
2e55cc72
DB		 60#define AX_CMD_READ_PHY_ID 0x19
61#define AX_CMD_READ_MEDIUM_STATUS 0x1a
62#define AX_CMD_WRITE_MEDIUM_MODE 0x1b
63#define AX_CMD_READ_MONITOR_MODE 0x1c
64#define AX_CMD_WRITE_MONITOR_MODE 0x1d
933a27d3 65#define AX_CMD_READ_GPIOS 0x1e
2e55cc72
DB		 66#define AX_CMD_WRITE_GPIOS 0x1f
67#define AX_CMD_SW_RESET 0x20
68#define AX_CMD_SW_PHY_STATUS 0x21
69#define AX_CMD_SW_PHY_SELECT 0x22
2e55cc72
DB		 70
71#define AX_MONITOR_MODE 0x01
72#define AX_MONITOR_LINK 0x02
73#define AX_MONITOR_MAGIC 0x04
74#define AX_MONITOR_HSFS 0x10
75
76/* AX88172 Medium Status Register values */
933a27d3
DH		 77#define AX88172_MEDIUM_FD 0x02
78#define AX88172_MEDIUM_TX 0x04
79#define AX88172_MEDIUM_FC 0x10
80#define AX88172_MEDIUM_DEFAULT \
81 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
2e55cc72
DB		 82
83#define AX_MCAST_FILTER_SIZE 8
84#define AX_MAX_MCAST 64
85
2e55cc72
DB		 86#define AX_SWRESET_CLEAR 0x00
87#define AX_SWRESET_RR 0x01
88#define AX_SWRESET_RT 0x02
89#define AX_SWRESET_PRTE 0x04
90#define AX_SWRESET_PRL 0x08
91#define AX_SWRESET_BZ 0x10
92#define AX_SWRESET_IPRL 0x20
93#define AX_SWRESET_IPPD 0x40
94
95#define AX88772_IPG0_DEFAULT 0x15
96#define AX88772_IPG1_DEFAULT 0x0c
97#define AX88772_IPG2_DEFAULT 0x12
98
933a27d3
DH		 99/* AX88772 & AX88178 Medium Mode Register */
100#define AX_MEDIUM_PF 0x0080
101#define AX_MEDIUM_JFE 0x0040
102#define AX_MEDIUM_TFC 0x0020
103#define AX_MEDIUM_RFC 0x0010
104#define AX_MEDIUM_ENCK 0x0008
105#define AX_MEDIUM_AC 0x0004
106#define AX_MEDIUM_FD 0x0002
107#define AX_MEDIUM_GM 0x0001
108#define AX_MEDIUM_SM 0x1000
109#define AX_MEDIUM_SBP 0x0800
110#define AX_MEDIUM_PS 0x0200
111#define AX_MEDIUM_RE 0x0100
112
113#define AX88178_MEDIUM_DEFAULT \
114 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
115 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
116 AX_MEDIUM_RE )
2e55cc72 117
933a27d3
DH		 118#define AX88772_MEDIUM_DEFAULT \
119 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
120 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
121 AX_MEDIUM_AC | AX_MEDIUM_RE )
122
123/* AX88772 & AX88178 RX_CTL values */
124#define AX_RX_CTL_SO 0x0080
125#define AX_RX_CTL_AP 0x0020
126#define AX_RX_CTL_AM 0x0010
127#define AX_RX_CTL_AB 0x0008
128#define AX_RX_CTL_SEP 0x0004
129#define AX_RX_CTL_AMALL 0x0002
130#define AX_RX_CTL_PRO 0x0001
131#define AX_RX_CTL_MFB_2048 0x0000
132#define AX_RX_CTL_MFB_4096 0x0100
133#define AX_RX_CTL_MFB_8192 0x0200
134#define AX_RX_CTL_MFB_16384 0x0300
135
136#define AX_DEFAULT_RX_CTL \
137 (AX_RX_CTL_SO | AX_RX_CTL_AB )
138
139/* GPIO 0 .. 2 toggles */
140#define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
141#define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
142#define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
143#define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
144#define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
145#define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
146#define AX_GPIO_RESERVED 0x40 /* Reserved */
147#define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
148
149#define AX_EEPROM_MAGIC 0xdeadbeef
150#define AX88172_EEPROM_LEN 0x40
151#define AX88772_EEPROM_LEN 0xff
152
153#define PHY_MODE_MARVELL 0x0000
154#define MII_MARVELL_LED_CTRL 0x0018
155#define MII_MARVELL_STATUS 0x001b
156#define MII_MARVELL_CTRL 0x0014
157
158#define MARVELL_LED_MANUAL 0x0019
159
160#define MARVELL_STATUS_HWCFG 0x0004
161
162#define MARVELL_CTRL_TXDELAY 0x0002
163#define MARVELL_CTRL_RXDELAY 0x0080
2e55cc72
DB		 164
165/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
48b1be6a 166struct asix_data {
2e55cc72 167 u8 multi_filter[AX_MCAST_FILTER_SIZE];
933a27d3
DH		 168 u8 phymode;
169 u8 ledmode;
170 u8 eeprom_len;
2e55cc72
DB		 171};
172
173struct ax88172_int_data {
51bf2976 174 __le16 res1;
2e55cc72 175 u8 link;
51bf2976 176 __le16 res2;
2e55cc72 177 u8 status;
51bf2976 178 __le16 res3;
2e55cc72
DB		 179} __attribute__ ((packed));
180
48b1be6a 181static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
2e55cc72
DB		 182 u16 size, void *data)
183{
51bf2976
AV		 184 void *buf;
185 int err = -ENOMEM;
186
60b86755
JP		 187 netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
188 cmd, value, index, size);
51bf2976
AV		 189
190 buf = kmalloc(size, GFP_KERNEL);
191 if (!buf)
192 goto out;
193
194 err = usb_control_msg(
2e55cc72
DB		 195 dev->udev,
196 usb_rcvctrlpipe(dev->udev, 0),
197 cmd,
198 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
199 value,
200 index,
51bf2976 201 buf,
2e55cc72
DB		 202 size,
203 USB_CTRL_GET_TIMEOUT);
94d43363 204 if (err == size)
51bf2976 205 memcpy(data, buf, size);
94d43363
RD		 206 else if (err >= 0)
207 err = -EINVAL;
51bf2976
AV		 208 kfree(buf);
209
210out:
211 return err;
2e55cc72
DB		 212}
213
48b1be6a 214static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
2e55cc72
DB		 215 u16 size, void *data)
216{
51bf2976
AV		 217 void *buf = NULL;
218 int err = -ENOMEM;
219
60b86755
JP		 220 netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
221 cmd, value, index, size);
51bf2976
AV		 222
223 if (data) {
224 buf = kmalloc(size, GFP_KERNEL);
225 if (!buf)
226 goto out;
227 memcpy(buf, data, size);
228 }
229
230 err = usb_control_msg(
2e55cc72
DB		 231 dev->udev,
232 usb_sndctrlpipe(dev->udev, 0),
233 cmd,
234 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
235 value,
236 index,
51bf2976 237 buf,
2e55cc72
DB		 238 size,
239 USB_CTRL_SET_TIMEOUT);
51bf2976
AV		 240 kfree(buf);
241
242out:
243 return err;
2e55cc72
DB		 244}
245
7d12e780 246static void asix_async_cmd_callback(struct urb *urb)
2e55cc72
DB		 247{
248 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
c94cb314 249 int status = urb->status;
2e55cc72 250
c94cb314 251 if (status < 0)
48b1be6a 252 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
c94cb314 253 status);
2e55cc72
DB		 254
255 kfree(req);
256 usb_free_urb(urb);
257}
258
933a27d3
DH		 259static void
260asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
261 u16 size, void *data)
262{
263 struct usb_ctrlrequest *req;
264 int status;
265 struct urb *urb;
266
60b86755
JP		 267 netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
268 cmd, value, index, size);
933a27d3 269 if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
60b86755 270 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
933a27d3
DH		 271 return;
272 }
273
274 if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
60b86755 275 netdev_err(dev->net, "Failed to allocate memory for control request\n");
933a27d3
DH		 276 usb_free_urb(urb);
277 return;
278 }
279
280 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
281 req->bRequest = cmd;
9aa742ef
ON		 282 req->wValue = cpu_to_le16(value);
283 req->wIndex = cpu_to_le16(index);
284 req->wLength = cpu_to_le16(size);
933a27d3
DH		 285
286 usb_fill_control_urb(urb, dev->udev,
287 usb_sndctrlpipe(dev->udev, 0),
288 (void *)req, data, size,
289 asix_async_cmd_callback, req);
290
291 if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
60b86755
JP		 292 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
293 status);
933a27d3
DH		 294 kfree(req);
295 usb_free_urb(urb);
296 }
297}
298
299static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
300{
301 u8 *head;
302 u32 header;
303 char *packet;
304 struct sk_buff *ax_skb;
305 u16 size;
306
307 head = (u8 *) skb->data;
308 memcpy(&header, head, sizeof(header));
309 le32_to_cpus(&header);
310 packet = head + sizeof(header);
311
312 skb_pull(skb, 4);
313
314 while (skb->len > 0) {
315 if ((short)(header & 0x0000ffff) !=
316 ~((short)((header & 0xffff0000) >> 16))) {
60b86755 317 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n");
933a27d3
DH		 318 }
319 /* get the packet length */
320 size = (u16) (header & 0x0000ffff);
321
322 if ((skb->len) - ((size + 1) & 0xfffe) == 0)
323 return 2;
324 if (size > ETH_FRAME_LEN) {
60b86755
JP		 325 netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
326 size);
933a27d3
DH		 327 return 0;
328 }
329 ax_skb = skb_clone(skb, GFP_ATOMIC);
330 if (ax_skb) {
331 ax_skb->len = size;
332 ax_skb->data = packet;
27a884dc 333 skb_set_tail_pointer(ax_skb, size);
933a27d3
DH		 334 usbnet_skb_return(dev, ax_skb);
335 } else {
336 return 0;
337 }
338
339 skb_pull(skb, (size + 1) & 0xfffe);
340
341 if (skb->len == 0)
342 break;
343
344 head = (u8 *) skb->data;
345 memcpy(&header, head, sizeof(header));
346 le32_to_cpus(&header);
347 packet = head + sizeof(header);
348 skb_pull(skb, 4);
349 }
350
351 if (skb->len < 0) {
60b86755
JP		 352 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n",
353 skb->len);
933a27d3
DH		 354 return 0;
355 }
356 return 1;
357}
358
359static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
360 gfp_t flags)
361{
362 int padlen;
363 int headroom = skb_headroom(skb);
364 int tailroom = skb_tailroom(skb);
365 u32 packet_len;
366 u32 padbytes = 0xffff0000;
367
368 padlen = ((skb->len + 4) % 512) ? 0 : 4;
369
8e95a202
JP		 370 if ((!skb_cloned(skb)) &&
371 ((headroom + tailroom) >= (4 + padlen))) {
933a27d3
DH		 372 if ((headroom < 4) || (tailroom < padlen)) {
373 skb->data = memmove(skb->head + 4, skb->data, skb->len);
27a884dc 374 skb_set_tail_pointer(skb, skb->len);
933a27d3
DH		 375 }
376 } else {
377 struct sk_buff *skb2;
378 skb2 = skb_copy_expand(skb, 4, padlen, flags);
379 dev_kfree_skb_any(skb);
380 skb = skb2;
381 if (!skb)
382 return NULL;
383 }
384
385 skb_push(skb, 4);
386 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
57e4f041 387 cpu_to_le32s(&packet_len);
27d7ff46 388 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
933a27d3
DH		 389
390 if ((skb->len % 512) == 0) {
57e4f041 391 cpu_to_le32s(&padbytes);
27a884dc 392 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
933a27d3
DH		 393 skb_put(skb, sizeof(padbytes));
394 }
395 return skb;
396}
397
398static void asix_status(struct usbnet *dev, struct urb *urb)
399{
400 struct ax88172_int_data *event;
401 int link;
402
403 if (urb->actual_length < 8)
404 return;
405
406 event = urb->transfer_buffer;
407 link = event->link & 0x01;
408 if (netif_carrier_ok(dev->net) != link) {
409 if (link) {
410 netif_carrier_on(dev->net);
411 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
412 } else
413 netif_carrier_off(dev->net);
60b86755 414 netdev_dbg(dev->net, "Link Status is: %d\n", link);
933a27d3
DH		 415 }
416}
417
48b1be6a
DH		 418static inline int asix_set_sw_mii(struct usbnet *dev)
419{
420 int ret;
421 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
422 if (ret < 0)
60b86755 423 netdev_err(dev->net, "Failed to enable software MII access\n");
48b1be6a
DH		 424 return ret;
425}
426
427static inline int asix_set_hw_mii(struct usbnet *dev)
428{
429 int ret;
430 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
431 if (ret < 0)
60b86755 432 netdev_err(dev->net, "Failed to enable hardware MII access\n");
48b1be6a
DH		 433 return ret;
434}
435
933a27d3 436static inline int asix_get_phy_addr(struct usbnet *dev)
48b1be6a 437{
51bf2976
AV		 438 u8 buf[2];
439 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
48b1be6a 440
60b86755 441 netdev_dbg(dev->net, "asix_get_phy_addr()\n");
933a27d3 442
51bf2976 443 if (ret < 0) {
60b86755 444 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
51bf2976 445 goto out;
48b1be6a 446 }
60b86755
JP		 447 netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
448 *((__le16 *)buf));
51bf2976
AV		 449 ret = buf[1];
450
451out:
48b1be6a
DH		 452 return ret;
453}
454
455static int asix_sw_reset(struct usbnet *dev, u8 flags)
456{
457 int ret;
458
459 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
460 if (ret < 0)
60b86755 461 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
933a27d3
DH		 462
463 return ret;
464}
48b1be6a 465
933a27d3
DH		 466static u16 asix_read_rx_ctl(struct usbnet *dev)
467{
51bf2976
AV		 468 __le16 v;
469 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
933a27d3 470
51bf2976 471 if (ret < 0) {
60b86755 472 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
51bf2976 473 goto out;
933a27d3 474 }
51bf2976
AV		 475 ret = le16_to_cpu(v);
476out:
48b1be6a
DH		 477 return ret;
478}
479
480static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
481{
482 int ret;
483
60b86755 484 netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
48b1be6a
DH		 485 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
486 if (ret < 0)
60b86755
JP		 487 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
488 mode, ret);
48b1be6a
DH		 489
490 return ret;
491}
492
933a27d3 493static u16 asix_read_medium_status(struct usbnet *dev)
2e55cc72 494{
51bf2976
AV		 495 __le16 v;
496 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
2e55cc72 497
51bf2976 498 if (ret < 0) {
60b86755
JP		 499 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
500 ret);
51bf2976 501 goto out;
2e55cc72 502 }
51bf2976
AV		 503 ret = le16_to_cpu(v);
504out:
933a27d3 505 return ret;
2e55cc72
DB		 506}
507
933a27d3 508static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
2e55cc72 509{
933a27d3 510 int ret;
2e55cc72 511
60b86755 512 netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
933a27d3
DH		 513 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
514 if (ret < 0)
60b86755
JP		 515 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
516 mode, ret);
2e55cc72 517
933a27d3
DH		 518 return ret;
519}
2e55cc72 520
933a27d3
DH		 521static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
522{
523 int ret;
2e55cc72 524
60b86755 525 netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
933a27d3
DH		 526 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
527 if (ret < 0)
60b86755
JP		 528 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
529 value, ret);
2e55cc72 530
933a27d3
DH		 531 if (sleep)
532 msleep(sleep);
533
534 return ret;
2e55cc72
DB		 535}
536
933a27d3
DH		 537/*
538 * AX88772 & AX88178 have a 16-bit RX_CTL value
539 */
48b1be6a 540static void asix_set_multicast(struct net_device *net)
2e55cc72
DB		 541{
542 struct usbnet *dev = netdev_priv(net);
48b1be6a 543 struct asix_data *data = (struct asix_data *)&dev->data;
933a27d3 544 u16 rx_ctl = AX_DEFAULT_RX_CTL;
2e55cc72
DB		 545
546 if (net->flags & IFF_PROMISC) {
933a27d3 547 rx_ctl |= AX_RX_CTL_PRO;
8e95a202 548 } else if (net->flags & IFF_ALLMULTI ||
4cd24eaf 549 netdev_mc_count(net) > AX_MAX_MCAST) {
933a27d3 550 rx_ctl |= AX_RX_CTL_AMALL;
4cd24eaf 551 } else if (netdev_mc_empty(net)) {
2e55cc72
DB		 552 /* just broadcast and directed */
553 } else {
554 /* We use the 20 byte dev->data
555 * for our 8 byte filter buffer
556 * to avoid allocating memory that
557 * is tricky to free later */
a92635dc 558 struct dev_mc_list *mc_list;
2e55cc72 559 u32 crc_bits;
2e55cc72
DB		 560
561 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
562
563 /* Build the multicast hash filter. */
a92635dc 564 netdev_for_each_mc_addr(mc_list, net) {
2e55cc72
DB		 565 crc_bits =
566 ether_crc(ETH_ALEN,
567 mc_list->dmi_addr) >> 26;
568 data->multi_filter[crc_bits >> 3] |=
569 1 << (crc_bits & 7);
2e55cc72
DB		 570 }
571
48b1be6a 572 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
2e55cc72
DB		 573 AX_MCAST_FILTER_SIZE, data->multi_filter);
574
933a27d3 575 rx_ctl |= AX_RX_CTL_AM;
2e55cc72
DB		 576 }
577
48b1be6a 578 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
2e55cc72
DB		 579}
580
48b1be6a 581static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
2e55cc72
DB		 582{
583 struct usbnet *dev = netdev_priv(netdev);
51bf2976 584 __le16 res;
2e55cc72 585
a9fc6338 586 mutex_lock(&dev->phy_mutex);
48b1be6a
DH		 587 asix_set_sw_mii(dev);
588 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
51bf2976 589 (__u16)loc, 2, &res);
48b1be6a 590 asix_set_hw_mii(dev);
a9fc6338 591 mutex_unlock(&dev->phy_mutex);
2e55cc72 592
60b86755
JP		 593 netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
594 phy_id, loc, le16_to_cpu(res));
2e55cc72 595
51bf2976 596 return le16_to_cpu(res);
2e55cc72
DB		 597}
598
599static void
48b1be6a 600asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
2e55cc72
DB		 601{
602 struct usbnet *dev = netdev_priv(netdev);
51bf2976 603 __le16 res = cpu_to_le16(val);
2e55cc72 604
60b86755
JP		 605 netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
606 phy_id, loc, val);
a9fc6338 607 mutex_lock(&dev->phy_mutex);
48b1be6a 608 asix_set_sw_mii(dev);
51bf2976 609 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
48b1be6a 610 asix_set_hw_mii(dev);
a9fc6338 611 mutex_unlock(&dev->phy_mutex);
2e55cc72
DB		 612}
613
933a27d3
DH		 614/* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
615static u32 asix_get_phyid(struct usbnet *dev)
2e55cc72 616{
933a27d3
DH		 617 int phy_reg;
618 u32 phy_id;
2e55cc72 619
933a27d3
DH		 620 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
621 if (phy_reg < 0)
622 return 0;
2e55cc72 623
933a27d3 624 phy_id = (phy_reg & 0xffff) << 16;
2e55cc72 625
933a27d3
DH		 626 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
627 if (phy_reg < 0)
628 return 0;
629
630 phy_id |= (phy_reg & 0xffff);
631
632 return phy_id;
2e55cc72
DB		 633}
634
635static void
48b1be6a 636asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
2e55cc72
DB		 637{
638 struct usbnet *dev = netdev_priv(net);
639 u8 opt;
640
48b1be6a 641 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
2e55cc72
DB		 642 wolinfo->supported = 0;
643 wolinfo->wolopts = 0;
644 return;
645 }
646 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
647 wolinfo->wolopts = 0;
648 if (opt & AX_MONITOR_MODE) {
649 if (opt & AX_MONITOR_LINK)
650 wolinfo->wolopts |= WAKE_PHY;
651 if (opt & AX_MONITOR_MAGIC)
652 wolinfo->wolopts |= WAKE_MAGIC;
653 }
654}
655
656static int
48b1be6a 657asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
2e55cc72
DB		 658{
659 struct usbnet *dev = netdev_priv(net);
660 u8 opt = 0;
2e55cc72
DB		 661
662 if (wolinfo->wolopts & WAKE_PHY)
663 opt |= AX_MONITOR_LINK;
664 if (wolinfo->wolopts & WAKE_MAGIC)
665 opt |= AX_MONITOR_MAGIC;
666 if (opt != 0)
667 opt |= AX_MONITOR_MODE;
668
48b1be6a 669 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
51bf2976 670 opt, 0, 0, NULL) < 0)
2e55cc72
DB		 671 return -EINVAL;
672
673 return 0;
674}
675
48b1be6a 676static int asix_get_eeprom_len(struct net_device *net)
2e55cc72 677{
933a27d3
DH		 678 struct usbnet *dev = netdev_priv(net);
679 struct asix_data *data = (struct asix_data *)&dev->data;
680
681 return data->eeprom_len;
2e55cc72
DB		 682}
683
48b1be6a 684static int asix_get_eeprom(struct net_device *net,
2e55cc72
DB		 685 struct ethtool_eeprom *eeprom, u8 *data)
686{
687 struct usbnet *dev = netdev_priv(net);
51bf2976 688 __le16 *ebuf = (__le16 *)data;
2e55cc72
DB		 689 int i;
690
691 /* Crude hack to ensure that we don't overwrite memory
692 * if an odd length is supplied
693 */
694 if (eeprom->len % 2)
695 return -EINVAL;
696
697 eeprom->magic = AX_EEPROM_MAGIC;
698
699 /* ax8817x returns 2 bytes from eeprom on read */
700 for (i=0; i < eeprom->len / 2; i++) {
48b1be6a 701 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
2e55cc72
DB		 702 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
703 return -EINVAL;
704 }
705 return 0;
706}
707
48b1be6a 708static void asix_get_drvinfo (struct net_device *net,
2e55cc72
DB		 709 struct ethtool_drvinfo *info)
710{
933a27d3
DH		 711 struct usbnet *dev = netdev_priv(net);
712 struct asix_data *data = (struct asix_data *)&dev->data;
713
2e55cc72
DB		 714 /* Inherit standard device info */
715 usbnet_get_drvinfo(net, info);
933a27d3
DH		 716 strncpy (info->driver, driver_name, sizeof info->driver);
717 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
718 info->eedump_len = data->eeprom_len;
2e55cc72
DB		 719}
720
933a27d3
DH		 721static u32 asix_get_link(struct net_device *net)
722{
723 struct usbnet *dev = netdev_priv(net);
724
725 return mii_link_ok(&dev->mii);
726}
727
728static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
729{
730 struct usbnet *dev = netdev_priv(net);
731
732 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
733}
734
735/* We need to override some ethtool_ops so we require our
736 own structure so we don't interfere with other usbnet
737 devices that may be connected at the same time. */
0fc0b732 738static const struct ethtool_ops ax88172_ethtool_ops = {
933a27d3
DH		 739 .get_drvinfo = asix_get_drvinfo,
740 .get_link = asix_get_link,
933a27d3 741 .get_msglevel = usbnet_get_msglevel,
2e55cc72 742 .set_msglevel = usbnet_set_msglevel,
48b1be6a
DH		 743 .get_wol = asix_get_wol,
744 .set_wol = asix_set_wol,
745 .get_eeprom_len = asix_get_eeprom_len,
746 .get_eeprom = asix_get_eeprom,
c41286fd
AB		 747 .get_settings = usbnet_get_settings,
748 .set_settings = usbnet_set_settings,
749 .nway_reset = usbnet_nway_reset,
2e55cc72
DB		 750};
751
933a27d3 752static void ax88172_set_multicast(struct net_device *net)
2e55cc72
DB		 753{
754 struct usbnet *dev = netdev_priv(net);
933a27d3
DH		 755 struct asix_data *data = (struct asix_data *)&dev->data;
756 u8 rx_ctl = 0x8c;
2e55cc72 757
933a27d3
DH		 758 if (net->flags & IFF_PROMISC) {
759 rx_ctl |= 0x01;
8e95a202 760 } else if (net->flags & IFF_ALLMULTI ||
4cd24eaf 761 netdev_mc_count(net) > AX_MAX_MCAST) {
933a27d3 762 rx_ctl |= 0x02;
4cd24eaf 763 } else if (netdev_mc_empty(net)) {
933a27d3
DH		 764 /* just broadcast and directed */
765 } else {
766 /* We use the 20 byte dev->data
767 * for our 8 byte filter buffer
768 * to avoid allocating memory that
769 * is tricky to free later */
a92635dc 770 struct dev_mc_list *mc_list;
933a27d3 771 u32 crc_bits;
933a27d3
DH		 772
773 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
774
775 /* Build the multicast hash filter. */
a92635dc 776 netdev_for_each_mc_addr(mc_list, net) {
933a27d3
DH		 777 crc_bits =
778 ether_crc(ETH_ALEN,
779 mc_list->dmi_addr) >> 26;
780 data->multi_filter[crc_bits >> 3] |=
781 1 << (crc_bits & 7);
933a27d3
DH		 782 }
783
784 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
785 AX_MCAST_FILTER_SIZE, data->multi_filter);
786
787 rx_ctl |= 0x10;
788 }
789
790 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
791}
792
793static int ax88172_link_reset(struct usbnet *dev)
794{
795 u8 mode;
796 struct ethtool_cmd ecmd;
797
798 mii_check_media(&dev->mii, 1, 1);
799 mii_ethtool_gset(&dev->mii, &ecmd);
800 mode = AX88172_MEDIUM_DEFAULT;
801
802 if (ecmd.duplex != DUPLEX_FULL)
803 mode |= ~AX88172_MEDIUM_FD;
804
60b86755
JP		 805 netdev_dbg(dev->net, "ax88172_link_reset() speed: %d duplex: %d setting mode to 0x%04x\n",
806 ecmd.speed, ecmd.duplex, mode);
933a27d3
DH		 807
808 asix_write_medium_mode(dev, mode);
809
810 return 0;
2e55cc72
DB		 811}
812
1703338c
SH		 813static const struct net_device_ops ax88172_netdev_ops = {
814 .ndo_open = usbnet_open,
815 .ndo_stop = usbnet_stop,
816 .ndo_start_xmit = usbnet_start_xmit,
817 .ndo_tx_timeout = usbnet_tx_timeout,
818 .ndo_change_mtu = usbnet_change_mtu,
819 .ndo_set_mac_address = eth_mac_addr,
820 .ndo_validate_addr = eth_validate_addr,
821 .ndo_do_ioctl = asix_ioctl,
822 .ndo_set_multicast_list = ax88172_set_multicast,
823};
824
48b1be6a 825static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
2e55cc72
DB		 826{
827 int ret = 0;
51bf2976 828 u8 buf[ETH_ALEN];
2e55cc72
DB		 829 int i;
830 unsigned long gpio_bits = dev->driver_info->data;
933a27d3
DH		 831 struct asix_data *data = (struct asix_data *)&dev->data;
832
833 data->eeprom_len = AX88172_EEPROM_LEN;
2e55cc72
DB		 834
835 usbnet_get_endpoints(dev,intf);
836
2e55cc72
DB		 837 /* Toggle the GPIOs in a manufacturer/model specific way */
838 for (i = 2; i >= 0; i--) {
48b1be6a 839 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
2e55cc72 840 (gpio_bits >> (i * 8)) & 0xff, 0, 0,
51bf2976
AV		 841 NULL)) < 0)
842 goto out;
2e55cc72
DB		 843 msleep(5);
844 }
845
933a27d3 846 if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
51bf2976 847 goto out;
2e55cc72
DB		 848
849 /* Get the MAC address */
933a27d3 850 if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
51bf2976 851 0, 0, ETH_ALEN, buf)) < 0) {
2e55cc72 852 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
51bf2976 853 goto out;
2e55cc72
DB		 854 }
855 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
856
2e55cc72
DB		 857 /* Initialize MII structure */
858 dev->mii.dev = dev->net;
48b1be6a
DH		 859 dev->mii.mdio_read = asix_mdio_read;
860 dev->mii.mdio_write = asix_mdio_write;
2e55cc72
DB		 861 dev->mii.phy_id_mask = 0x3f;
862 dev->mii.reg_num_mask = 0x1f;
933a27d3 863 dev->mii.phy_id = asix_get_phy_addr(dev);
2e55cc72 864
1703338c 865 dev->net->netdev_ops = &ax88172_netdev_ops;
48b1be6a 866 dev->net->ethtool_ops = &ax88172_ethtool_ops;
2e55cc72 867
933a27d3
DH		 868 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
869 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
2e55cc72
DB		 870 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
871 mii_nway_restart(&dev->mii);
872
873 return 0;
51bf2976
AV		 874
875out:
2e55cc72
DB		 876 return ret;
877}
878
0fc0b732 879static const struct ethtool_ops ax88772_ethtool_ops = {
48b1be6a 880 .get_drvinfo = asix_get_drvinfo,
933a27d3 881 .get_link = asix_get_link,
2e55cc72
DB		 882 .get_msglevel = usbnet_get_msglevel,
883 .set_msglevel = usbnet_set_msglevel,
48b1be6a
DH		 884 .get_wol = asix_get_wol,
885 .set_wol = asix_set_wol,
886 .get_eeprom_len = asix_get_eeprom_len,
887 .get_eeprom = asix_get_eeprom,
c41286fd
AB		 888 .get_settings = usbnet_get_settings,
889 .set_settings = usbnet_set_settings,
890 .nway_reset = usbnet_nway_reset,
2e55cc72
DB		 891};
892
933a27d3
DH		 893static int ax88772_link_reset(struct usbnet *dev)
894{
895 u16 mode;
896 struct ethtool_cmd ecmd;
897
898 mii_check_media(&dev->mii, 1, 1);
899 mii_ethtool_gset(&dev->mii, &ecmd);
900 mode = AX88772_MEDIUM_DEFAULT;
901
902 if (ecmd.speed != SPEED_100)
903 mode &= ~AX_MEDIUM_PS;
904
905 if (ecmd.duplex != DUPLEX_FULL)
906 mode &= ~AX_MEDIUM_FD;
907
60b86755
JP		 908 netdev_dbg(dev->net, "ax88772_link_reset() speed: %d duplex: %d setting mode to 0x%04x\n",
909 ecmd.speed, ecmd.duplex, mode);
933a27d3
DH		 910
911 asix_write_medium_mode(dev, mode);
912
913 return 0;
914}
915
1703338c
SH		 916static const struct net_device_ops ax88772_netdev_ops = {
917 .ndo_open = usbnet_open,
918 .ndo_stop = usbnet_stop,
919 .ndo_start_xmit = usbnet_start_xmit,
920 .ndo_tx_timeout = usbnet_tx_timeout,
921 .ndo_change_mtu = usbnet_change_mtu,
922 .ndo_set_mac_address = eth_mac_addr,
923 .ndo_validate_addr = eth_validate_addr,
924 .ndo_do_ioctl = asix_ioctl,
925 .ndo_set_multicast_list = asix_set_multicast,
926};
927
2e55cc72
DB		 928static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
929{
d0ffff8f 930 int ret, embd_phy;
933a27d3
DH		 931 u16 rx_ctl;
932 struct asix_data *data = (struct asix_data *)&dev->data;
51bf2976 933 u8 buf[ETH_ALEN];
933a27d3
DH		 934 u32 phyid;
935
936 data->eeprom_len = AX88772_EEPROM_LEN;
2e55cc72
DB		 937
938 usbnet_get_endpoints(dev,intf);
939
933a27d3
DH		 940 if ((ret = asix_write_gpio(dev,
941 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
51bf2976 942 goto out;
2e55cc72 943
d0ffff8f
AS		 944 /* 0x10 is the phy id of the embedded 10/100 ethernet phy */
945 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
48b1be6a 946 if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
51bf2976 947 embd_phy, 0, 0, NULL)) < 0) {
2e55cc72 948 dbg("Select PHY #1 failed: %d", ret);
51bf2976 949 goto out;
2e55cc72
DB		 950 }
951
d0ffff8f 952 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0)
51bf2976 953 goto out;
2e55cc72
DB		 954
955 msleep(150);
48b1be6a 956 if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
51bf2976 957 goto out;
2e55cc72
DB		 958
959 msleep(150);
d0ffff8f
AS		 960 if (embd_phy) {
961 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0)
51bf2976 962 goto out;
d0ffff8f
AS		 963 }
964 else {
965 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0)
51bf2976 966 goto out;
d0ffff8f 967 }
2e55cc72
DB		 968
969 msleep(150);
933a27d3
DH		 970 rx_ctl = asix_read_rx_ctl(dev);
971 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
972 if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
51bf2976 973 goto out;
2e55cc72 974
933a27d3
DH		 975 rx_ctl = asix_read_rx_ctl(dev);
976 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
977
2e55cc72 978 /* Get the MAC address */
933a27d3 979 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
2e55cc72
DB		 980 0, 0, ETH_ALEN, buf)) < 0) {
981 dbg("Failed to read MAC address: %d", ret);
51bf2976 982 goto out;
2e55cc72
DB		 983 }
984 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
985
2e55cc72
DB		 986 /* Initialize MII structure */
987 dev->mii.dev = dev->net;
48b1be6a
DH		 988 dev->mii.mdio_read = asix_mdio_read;
989 dev->mii.mdio_write = asix_mdio_write;
933a27d3
DH		 990 dev->mii.phy_id_mask = 0x1f;
991 dev->mii.reg_num_mask = 0x1f;
933a27d3
DH		 992 dev->mii.phy_id = asix_get_phy_addr(dev);
993
994 phyid = asix_get_phyid(dev);
995 dbg("PHYID=0x%08x", phyid);
2e55cc72 996
48b1be6a 997 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
51bf2976 998 goto out;
2e55cc72 999
2e55cc72 1000 msleep(150);
48b1be6a
DH		 1001
1002 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
51bf2976 1003 goto out;
2e55cc72 1004
48b1be6a 1005 msleep(150);
2e55cc72 1006
1703338c 1007 dev->net->netdev_ops = &ax88772_netdev_ops;
2e55cc72
DB		 1008 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1009
933a27d3
DH		 1010 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1011 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
2e55cc72
DB		 1012 ADVERTISE_ALL | ADVERTISE_CSMA);
1013 mii_nway_restart(&dev->mii);
1014
933a27d3 1015 if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
51bf2976 1016 goto out;
2e55cc72 1017
48b1be6a 1018 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
2e55cc72 1019 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
51bf2976 1020 AX88772_IPG2_DEFAULT, 0, NULL)) < 0) {
2e55cc72 1021 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
51bf2976 1022 goto out;
2e55cc72 1023 }
2e55cc72
DB		 1024
1025 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
933a27d3 1026 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
51bf2976 1027 goto out;
2e55cc72 1028
933a27d3
DH		 1029 rx_ctl = asix_read_rx_ctl(dev);
1030 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1031
1032 rx_ctl = asix_read_medium_status(dev);
1033 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1034
2e55cc72
DB		 1035 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1036 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1037 /* hard_mtu is still the default - the device does not support
1038 jumbo eth frames */
1039 dev->rx_urb_size = 2048;
1040 }
2e55cc72
DB		 1041 return 0;
1042
51bf2976 1043out:
2e55cc72
DB		 1044 return ret;
1045}
1046
933a27d3
DH		 1047static struct ethtool_ops ax88178_ethtool_ops = {
1048 .get_drvinfo = asix_get_drvinfo,
1049 .get_link = asix_get_link,
933a27d3
DH		 1050 .get_msglevel = usbnet_get_msglevel,
1051 .set_msglevel = usbnet_set_msglevel,
1052 .get_wol = asix_get_wol,
1053 .set_wol = asix_set_wol,
1054 .get_eeprom_len = asix_get_eeprom_len,
1055 .get_eeprom = asix_get_eeprom,
c41286fd
AB		 1056 .get_settings = usbnet_get_settings,
1057 .set_settings = usbnet_set_settings,
1058 .nway_reset = usbnet_nway_reset,
933a27d3
DH		 1059};
1060
1061static int marvell_phy_init(struct usbnet *dev)
2e55cc72 1062{
933a27d3
DH		 1063 struct asix_data *data = (struct asix_data *)&dev->data;
1064 u16 reg;
2e55cc72 1065
60b86755 1066 netdev_dbg(dev->net, "marvell_phy_init()\n");
2e55cc72 1067
933a27d3 1068 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
60b86755 1069 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
2e55cc72 1070
933a27d3
DH		 1071 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1072 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
2e55cc72 1073
933a27d3
DH		 1074 if (data->ledmode) {
1075 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1076 MII_MARVELL_LED_CTRL);
60b86755 1077 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
2e55cc72 1078
933a27d3
DH		 1079 reg &= 0xf8ff;
1080 reg |= (1 + 0x0100);
1081 asix_mdio_write(dev->net, dev->mii.phy_id,
1082 MII_MARVELL_LED_CTRL, reg);
2e55cc72 1083
933a27d3
DH		 1084 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1085 MII_MARVELL_LED_CTRL);
60b86755 1086 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
933a27d3
DH		 1087 reg &= 0xfc0f;
1088 }
2e55cc72 1089
933a27d3
DH		 1090 return 0;
1091}
1092
1093static int marvell_led_status(struct usbnet *dev, u16 speed)
1094{
1095 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1096
60b86755 1097 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
933a27d3
DH		 1098
1099 /* Clear out the center LED bits - 0x03F0 */
1100 reg &= 0xfc0f;
1101
1102 switch (speed) {
1103 case SPEED_1000:
1104 reg |= 0x03e0;
1105 break;
1106 case SPEED_100:
1107 reg |= 0x03b0;
1108 break;
1109 default:
1110 reg |= 0x02f0;
2e55cc72
DB		 1111 }
1112
60b86755 1113 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
933a27d3
DH		 1114 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1115
1116 return 0;
1117}
1118
1119static int ax88178_link_reset(struct usbnet *dev)
1120{
1121 u16 mode;
1122 struct ethtool_cmd ecmd;
1123 struct asix_data *data = (struct asix_data *)&dev->data;
1124
60b86755 1125 netdev_dbg(dev->net, "ax88178_link_reset()\n");
933a27d3
DH		 1126
1127 mii_check_media(&dev->mii, 1, 1);
1128 mii_ethtool_gset(&dev->mii, &ecmd);
1129 mode = AX88178_MEDIUM_DEFAULT;
1130
1131 if (ecmd.speed == SPEED_1000)
a7f75c0c 1132 mode |= AX_MEDIUM_GM;
933a27d3
DH		 1133 else if (ecmd.speed == SPEED_100)
1134 mode |= AX_MEDIUM_PS;
1135 else
1136 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1137
a7f75c0c
PK		 1138 mode |= AX_MEDIUM_ENCK;
1139
933a27d3
DH		 1140 if (ecmd.duplex == DUPLEX_FULL)
1141 mode |= AX_MEDIUM_FD;
1142 else
1143 mode &= ~AX_MEDIUM_FD;
1144
60b86755
JP		 1145 netdev_dbg(dev->net, "ax88178_link_reset() speed: %d duplex: %d setting mode to 0x%04x\n",
1146 ecmd.speed, ecmd.duplex, mode);
933a27d3
DH		 1147
1148 asix_write_medium_mode(dev, mode);
1149
1150 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1151 marvell_led_status(dev, ecmd.speed);
1152
1153 return 0;
1154}
1155
1156static void ax88178_set_mfb(struct usbnet *dev)
1157{
1158 u16 mfb = AX_RX_CTL_MFB_16384;
1159 u16 rxctl;
1160 u16 medium;
1161 int old_rx_urb_size = dev->rx_urb_size;
1162
1163 if (dev->hard_mtu < 2048) {
1164 dev->rx_urb_size = 2048;
1165 mfb = AX_RX_CTL_MFB_2048;
1166 } else if (dev->hard_mtu < 4096) {
1167 dev->rx_urb_size = 4096;
1168 mfb = AX_RX_CTL_MFB_4096;
1169 } else if (dev->hard_mtu < 8192) {
1170 dev->rx_urb_size = 8192;
1171 mfb = AX_RX_CTL_MFB_8192;
1172 } else if (dev->hard_mtu < 16384) {
1173 dev->rx_urb_size = 16384;
1174 mfb = AX_RX_CTL_MFB_16384;
2e55cc72 1175 }
933a27d3
DH		 1176
1177 rxctl = asix_read_rx_ctl(dev);
1178 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1179
1180 medium = asix_read_medium_status(dev);
1181 if (dev->net->mtu > 1500)
1182 medium |= AX_MEDIUM_JFE;
1183 else
1184 medium &= ~AX_MEDIUM_JFE;
1185 asix_write_medium_mode(dev, medium);
1186
1187 if (dev->rx_urb_size > old_rx_urb_size)
1188 usbnet_unlink_rx_urbs(dev);
2e55cc72
DB		 1189}
1190
933a27d3 1191static int ax88178_change_mtu(struct net_device *net, int new_mtu)
2e55cc72 1192{
933a27d3
DH		 1193 struct usbnet *dev = netdev_priv(net);
1194 int ll_mtu = new_mtu + net->hard_header_len + 4;
2e55cc72 1195
60b86755 1196 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
2e55cc72 1197
933a27d3
DH		 1198 if (new_mtu <= 0 || ll_mtu > 16384)
1199 return -EINVAL;
1200
1201 if ((ll_mtu % dev->maxpacket) == 0)
1202 return -EDOM;
1203
1204 net->mtu = new_mtu;
1205 dev->hard_mtu = net->mtu + net->hard_header_len;
1206 ax88178_set_mfb(dev);
1207
1208 return 0;
1209}
1210
1703338c
SH		 1211static const struct net_device_ops ax88178_netdev_ops = {
1212 .ndo_open = usbnet_open,
1213 .ndo_stop = usbnet_stop,
1214 .ndo_start_xmit = usbnet_start_xmit,
1215 .ndo_tx_timeout = usbnet_tx_timeout,
1216 .ndo_set_mac_address = eth_mac_addr,
1217 .ndo_validate_addr = eth_validate_addr,
1218 .ndo_set_multicast_list = asix_set_multicast,
1219 .ndo_do_ioctl = asix_ioctl,
1220 .ndo_change_mtu = ax88178_change_mtu,
1221};
1222
933a27d3
DH		 1223static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1224{
1225 struct asix_data *data = (struct asix_data *)&dev->data;
1226 int ret;
51bf2976
AV		 1227 u8 buf[ETH_ALEN];
1228 __le16 eeprom;
1229 u8 status;
933a27d3
DH		 1230 int gpio0 = 0;
1231 u32 phyid;
1232
1233 usbnet_get_endpoints(dev,intf);
1234
51bf2976
AV		 1235 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1236 dbg("GPIO Status: 0x%04x", status);
933a27d3
DH		 1237
1238 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1239 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1240 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1241
1242 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1243
51bf2976 1244 if (eeprom == cpu_to_le16(0xffff)) {
933a27d3
DH		 1245 data->phymode = PHY_MODE_MARVELL;
1246 data->ledmode = 0;
1247 gpio0 = 1;
2e55cc72 1248 } else {
51bf2976
AV		 1249 data->phymode = le16_to_cpu(eeprom) & 7;
1250 data->ledmode = le16_to_cpu(eeprom) >> 8;
1251 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
2e55cc72 1252 }
933a27d3 1253 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
2e55cc72 1254
933a27d3 1255 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
51bf2976 1256 if ((le16_to_cpu(eeprom) >> 8) != 1) {
933a27d3
DH		 1257 asix_write_gpio(dev, 0x003c, 30);
1258 asix_write_gpio(dev, 0x001c, 300);
1259 asix_write_gpio(dev, 0x003c, 30);
1260 } else {
1261 dbg("gpio phymode == 1 path");
1262 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1263 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1264 }
2e55cc72 1265
933a27d3
DH		 1266 asix_sw_reset(dev, 0);
1267 msleep(150);
1268
1269 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1270 msleep(150);
1271
1272 asix_write_rx_ctl(dev, 0);
1273
1274 /* Get the MAC address */
933a27d3
DH		 1275 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1276 0, 0, ETH_ALEN, buf)) < 0) {
1277 dbg("Failed to read MAC address: %d", ret);
51bf2976 1278 goto out;
2e55cc72 1279 }
933a27d3 1280 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
2e55cc72 1281
933a27d3
DH		 1282 /* Initialize MII structure */
1283 dev->mii.dev = dev->net;
1284 dev->mii.mdio_read = asix_mdio_read;
1285 dev->mii.mdio_write = asix_mdio_write;
1286 dev->mii.phy_id_mask = 0x1f;
1287 dev->mii.reg_num_mask = 0xff;
1288 dev->mii.supports_gmii = 1;
933a27d3 1289 dev->mii.phy_id = asix_get_phy_addr(dev);
1703338c
SH		 1290
1291 dev->net->netdev_ops = &ax88178_netdev_ops;
933a27d3 1292 dev->net->ethtool_ops = &ax88178_ethtool_ops;
2e55cc72 1293
933a27d3
DH		 1294 phyid = asix_get_phyid(dev);
1295 dbg("PHYID=0x%08x", phyid);
2e55cc72 1296
933a27d3
DH		 1297 if (data->phymode == PHY_MODE_MARVELL) {
1298 marvell_phy_init(dev);
1299 msleep(60);
1300 }
1301
1302 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1303 BMCR_RESET | BMCR_ANENABLE);
1304 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1305 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1306 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1307 ADVERTISE_1000FULL);
1308
1309 mii_nway_restart(&dev->mii);
1310
1311 if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0)
51bf2976 1312 goto out;
933a27d3
DH		 1313
1314 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
51bf2976 1315 goto out;
933a27d3
DH		 1316
1317 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1318 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1319 /* hard_mtu is still the default - the device does not support
1320 jumbo eth frames */
1321 dev->rx_urb_size = 2048;
1322 }
2e55cc72 1323 return 0;
933a27d3 1324
51bf2976 1325out:
933a27d3 1326 return ret;
2e55cc72
DB		 1327}
1328
1329static const struct driver_info ax8817x_info = {
1330 .description = "ASIX AX8817x USB 2.0 Ethernet",
48b1be6a
DH		 1331 .bind = ax88172_bind,
1332 .status = asix_status,
2e55cc72
DB		 1333 .link_reset = ax88172_link_reset,
1334 .reset = ax88172_link_reset,
37e8273c 1335 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB		 1336 .data = 0x00130103,
1337};
1338
1339static const struct driver_info dlink_dub_e100_info = {
1340 .description = "DLink DUB-E100 USB Ethernet",
48b1be6a
DH		 1341 .bind = ax88172_bind,
1342 .status = asix_status,
2e55cc72
DB		 1343 .link_reset = ax88172_link_reset,
1344 .reset = ax88172_link_reset,
37e8273c 1345 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB		 1346 .data = 0x009f9d9f,
1347};
1348
1349static const struct driver_info netgear_fa120_info = {
1350 .description = "Netgear FA-120 USB Ethernet",
48b1be6a
DH		 1351 .bind = ax88172_bind,
1352 .status = asix_status,
2e55cc72
DB		 1353 .link_reset = ax88172_link_reset,
1354 .reset = ax88172_link_reset,
37e8273c 1355 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB		 1356 .data = 0x00130103,
1357};
1358
1359static const struct driver_info hawking_uf200_info = {
1360 .description = "Hawking UF200 USB Ethernet",
48b1be6a
DH		 1361 .bind = ax88172_bind,
1362 .status = asix_status,
2e55cc72
DB		 1363 .link_reset = ax88172_link_reset,
1364 .reset = ax88172_link_reset,
37e8273c 1365 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB		 1366 .data = 0x001f1d1f,
1367};
1368
1369static const struct driver_info ax88772_info = {
1370 .description = "ASIX AX88772 USB 2.0 Ethernet",
1371 .bind = ax88772_bind,
48b1be6a 1372 .status = asix_status,
2e55cc72
DB		 1373 .link_reset = ax88772_link_reset,
1374 .reset = ax88772_link_reset,
37e8273c 1375 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
933a27d3
DH		 1376 .rx_fixup = asix_rx_fixup,
1377 .tx_fixup = asix_tx_fixup,
1378};
1379
1380static const struct driver_info ax88178_info = {
1381 .description = "ASIX AX88178 USB 2.0 Ethernet",
1382 .bind = ax88178_bind,
1383 .status = asix_status,
1384 .link_reset = ax88178_link_reset,
1385 .reset = ax88178_link_reset,
37e8273c 1386 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
933a27d3
DH		 1387 .rx_fixup = asix_rx_fixup,
1388 .tx_fixup = asix_tx_fixup,
2e55cc72
DB		 1389};
1390
1391static const struct usb_device_id products [] = {
1392{
1393 // Linksys USB200M
1394 USB_DEVICE (0x077b, 0x2226),
1395 .driver_info = (unsigned long) &ax8817x_info,
1396}, {
1397 // Netgear FA120
1398 USB_DEVICE (0x0846, 0x1040),
1399 .driver_info = (unsigned long) &netgear_fa120_info,
1400}, {
1401 // DLink DUB-E100
1402 USB_DEVICE (0x2001, 0x1a00),
1403 .driver_info = (unsigned long) &dlink_dub_e100_info,
1404}, {
1405 // Intellinet, ST Lab USB Ethernet
1406 USB_DEVICE (0x0b95, 0x1720),
1407 .driver_info = (unsigned long) &ax8817x_info,
1408}, {
1409 // Hawking UF200, TrendNet TU2-ET100
1410 USB_DEVICE (0x07b8, 0x420a),
1411 .driver_info = (unsigned long) &hawking_uf200_info,
1412}, {
39c4b38c
DH		 1413 // Billionton Systems, USB2AR
1414 USB_DEVICE (0x08dd, 0x90ff),
1415 .driver_info = (unsigned long) &ax8817x_info,
2e55cc72
DB		 1416}, {
1417 // ATEN UC210T
1418 USB_DEVICE (0x0557, 0x2009),
1419 .driver_info = (unsigned long) &ax8817x_info,
1420}, {
1421 // Buffalo LUA-U2-KTX
1422 USB_DEVICE (0x0411, 0x003d),
1423 .driver_info = (unsigned long) &ax8817x_info,
ac7b77f1
MD		 1424}, {
1425 // Buffalo LUA-U2-GT 10/100/1000
1426 USB_DEVICE (0x0411, 0x006e),
1427 .driver_info = (unsigned long) &ax88178_info,
2e55cc72
DB		 1428}, {
1429 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1430 USB_DEVICE (0x6189, 0x182d),
1431 .driver_info = (unsigned long) &ax8817x_info,
1432}, {
1433 // corega FEther USB2-TX
1434 USB_DEVICE (0x07aa, 0x0017),
1435 .driver_info = (unsigned long) &ax8817x_info,
1436}, {
1437 // Surecom EP-1427X-2
1438 USB_DEVICE (0x1189, 0x0893),
1439 .driver_info = (unsigned long) &ax8817x_info,
1440}, {
1441 // goodway corp usb gwusb2e
1442 USB_DEVICE (0x1631, 0x6200),
1443 .driver_info = (unsigned long) &ax8817x_info,
39c4b38c
DH		 1444}, {
1445 // JVC MP-PRX1 Port Replicator
1446 USB_DEVICE (0x04f1, 0x3008),
1447 .driver_info = (unsigned long) &ax8817x_info,
2e55cc72
DB		 1448}, {
1449 // ASIX AX88772 10/100
39c4b38c
DH		 1450 USB_DEVICE (0x0b95, 0x7720),
1451 .driver_info = (unsigned long) &ax88772_info,
7327413c
EW		 1452}, {
1453 // ASIX AX88178 10/100/1000
1454 USB_DEVICE (0x0b95, 0x1780),
933a27d3 1455 .driver_info = (unsigned long) &ax88178_info,
5e0f76c6
DH		 1456}, {
1457 // Linksys USB200M Rev 2
1458 USB_DEVICE (0x13b1, 0x0018),
1459 .driver_info = (unsigned long) &ax88772_info,
5732ce84
DH		 1460}, {
1461 // 0Q0 cable ethernet
1462 USB_DEVICE (0x1557, 0x7720),
1463 .driver_info = (unsigned long) &ax88772_info,
933a27d3
DH		 1464}, {
1465 // DLink DUB-E100 H/W Ver B1
1466 USB_DEVICE (0x07d1, 0x3c05),
1467 .driver_info = (unsigned long) &ax88772_info,
b923e7fc
DH		 1468}, {
1469 // DLink DUB-E100 H/W Ver B1 Alternate
1470 USB_DEVICE (0x2001, 0x3c05),
1471 .driver_info = (unsigned long) &ax88772_info,
933a27d3
DH		 1472}, {
1473 // Linksys USB1000
1474 USB_DEVICE (0x1737, 0x0039),
1475 .driver_info = (unsigned long) &ax88178_info,
b29cf31d
YH		 1476}, {
1477 // IO-DATA ETG-US2
1478 USB_DEVICE (0x04bb, 0x0930),
1479 .driver_info = (unsigned long) &ax88178_info,
2ed22bc2
DH		 1480}, {
1481 // Belkin F5D5055
1482 USB_DEVICE(0x050d, 0x5055),
1483 .driver_info = (unsigned long) &ax88178_info,
3d60efb5
AN		 1484}, {
1485 // Apple USB Ethernet Adapter
1486 USB_DEVICE(0x05ac, 0x1402),
1487 .driver_info = (unsigned long) &ax88772_info,
ccf95402
JC		 1488}, {
1489 // Cables-to-Go USB Ethernet Adapter
1490 USB_DEVICE(0x0b95, 0x772a),
1491 .driver_info = (unsigned long) &ax88772_info,
fef7cc08
GKH		 1492}, {
1493 // ABOCOM for pci
1494 USB_DEVICE(0x14ea, 0xab11),
1495 .driver_info = (unsigned long) &ax88178_info,
1496}, {
1497 // ASIX 88772a
1498 USB_DEVICE(0x0db0, 0xa877),
1499 .driver_info = (unsigned long) &ax88772_info,
2e55cc72
DB		 1500},
1501 { }, // END
1502};
1503MODULE_DEVICE_TABLE(usb, products);
1504
1505static struct usb_driver asix_driver = {
2e55cc72
DB		 1506 .name = "asix",
1507 .id_table = products,
1508 .probe = usbnet_probe,
1509 .suspend = usbnet_suspend,
1510 .resume = usbnet_resume,
1511 .disconnect = usbnet_disconnect,
a11a6544 1512 .supports_autosuspend = 1,
2e55cc72
DB		 1513};
1514
1515static int __init asix_init(void)
1516{
1517 return usb_register(&asix_driver);
1518}
1519module_init(asix_init);
1520
1521static void __exit asix_exit(void)
1522{
1523 usb_deregister(&asix_driver);
1524}
1525module_exit(asix_exit);
1526
1527MODULE_AUTHOR("David Hollis");
1528MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1529MODULE_LICENSE("GPL");
1530
Linux kernel - Deliverables
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