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Merge tag 'pci-v3.15-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaa...
[deliverable/linux.git] / drivers / net / usb / asix_devices.c
CommitLineData
2e55cc72
DB		 1/*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
933a27d3 3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
2e55cc72 4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
933a27d3 5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
2e55cc72
DB		 6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
9cb00073 19 * along with this program; if not, see <http://www.gnu.org/licenses/>.
2e55cc72
DB		 20 */
21
607740bc 22#include "asix.h"
933a27d3
DH		 23
24#define PHY_MODE_MARVELL 0x0000
25#define MII_MARVELL_LED_CTRL 0x0018
26#define MII_MARVELL_STATUS 0x001b
27#define MII_MARVELL_CTRL 0x0014
28
29#define MARVELL_LED_MANUAL 0x0019
30
31#define MARVELL_STATUS_HWCFG 0x0004
32
33#define MARVELL_CTRL_TXDELAY 0x0002
34#define MARVELL_CTRL_RXDELAY 0x0080
2e55cc72 35
3486140e 36#define PHY_MODE_RTL8211CL 0x000C
610d885d 37
2e55cc72 38struct ax88172_int_data {
51bf2976 39 __le16 res1;
2e55cc72 40 u8 link;
51bf2976 41 __le16 res2;
2e55cc72 42 u8 status;
51bf2976 43 __le16 res3;
ba2d3587 44} __packed;
2e55cc72 45
933a27d3
DH		 46static void asix_status(struct usbnet *dev, struct urb *urb)
47{
48 struct ax88172_int_data *event;
49 int link;
50
51 if (urb->actual_length < 8)
52 return;
53
54 event = urb->transfer_buffer;
55 link = event->link & 0x01;
56 if (netif_carrier_ok(dev->net) != link) {
eae65919 57 usbnet_link_change(dev, link, 1);
60b86755 58 netdev_dbg(dev->net, "Link Status is: %d\n", link);
933a27d3
DH		 59 }
60}
61
452b5ecd
JCPV		 62static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
63{
64 if (is_valid_ether_addr(addr)) {
65 memcpy(dev->net->dev_addr, addr, ETH_ALEN);
66 } else {
67 netdev_info(dev->net, "invalid hw address, using random\n");
68 eth_hw_addr_random(dev->net);
69 }
70}
71
933a27d3
DH		 72/* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
73static u32 asix_get_phyid(struct usbnet *dev)
2e55cc72 74{
933a27d3
DH		 75 int phy_reg;
76 u32 phy_id;
a77929a2 77 int i;
2e55cc72 78
a77929a2
GG		 79 /* Poll for the rare case the FW or phy isn't ready yet. */
80 for (i = 0; i < 100; i++) {
81 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
82 if (phy_reg != 0 && phy_reg != 0xFFFF)
83 break;
84 mdelay(1);
85 }
86
87 if (phy_reg <= 0 || phy_reg == 0xFFFF)
933a27d3 88 return 0;
2e55cc72 89
933a27d3 90 phy_id = (phy_reg & 0xffff) << 16;
2e55cc72 91
933a27d3
DH		 92 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
93 if (phy_reg < 0)
94 return 0;
95
96 phy_id |= (phy_reg & 0xffff);
97
98 return phy_id;
2e55cc72
DB		 99}
100
933a27d3
DH		 101static u32 asix_get_link(struct net_device *net)
102{
103 struct usbnet *dev = netdev_priv(net);
104
105 return mii_link_ok(&dev->mii);
106}
107
108static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
109{
110 struct usbnet *dev = netdev_priv(net);
111
112 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
113}
114
115/* We need to override some ethtool_ops so we require our
116 own structure so we don't interfere with other usbnet
117 devices that may be connected at the same time. */
0fc0b732 118static const struct ethtool_ops ax88172_ethtool_ops = {
933a27d3
DH		 119 .get_drvinfo = asix_get_drvinfo,
120 .get_link = asix_get_link,
933a27d3 121 .get_msglevel = usbnet_get_msglevel,
2e55cc72 122 .set_msglevel = usbnet_set_msglevel,
48b1be6a
DH		 123 .get_wol = asix_get_wol,
124 .set_wol = asix_set_wol,
125 .get_eeprom_len = asix_get_eeprom_len,
126 .get_eeprom = asix_get_eeprom,
cb7b24cd 127 .set_eeprom = asix_set_eeprom,
c41286fd
AB		 128 .get_settings = usbnet_get_settings,
129 .set_settings = usbnet_set_settings,
130 .nway_reset = usbnet_nway_reset,
2e55cc72
DB		 131};
132
933a27d3 133static void ax88172_set_multicast(struct net_device *net)
2e55cc72
DB		 134{
135 struct usbnet *dev = netdev_priv(net);
933a27d3
DH		 136 struct asix_data *data = (struct asix_data *)&dev->data;
137 u8 rx_ctl = 0x8c;
2e55cc72 138
933a27d3
DH		 139 if (net->flags & IFF_PROMISC) {
140 rx_ctl |= 0x01;
8e95a202 141 } else if (net->flags & IFF_ALLMULTI ||
4cd24eaf 142 netdev_mc_count(net) > AX_MAX_MCAST) {
933a27d3 143 rx_ctl |= 0x02;
4cd24eaf 144 } else if (netdev_mc_empty(net)) {
933a27d3
DH		 145 /* just broadcast and directed */
146 } else {
147 /* We use the 20 byte dev->data
148 * for our 8 byte filter buffer
149 * to avoid allocating memory that
150 * is tricky to free later */
22bedad3 151 struct netdev_hw_addr *ha;
933a27d3 152 u32 crc_bits;
933a27d3
DH		 153
154 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
155
156 /* Build the multicast hash filter. */
22bedad3
JP		 157 netdev_for_each_mc_addr(ha, net) {
158 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
933a27d3
DH		 159 data->multi_filter[crc_bits >> 3] |=
160 1 << (crc_bits & 7);
933a27d3
DH		 161 }
162
163 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
164 AX_MCAST_FILTER_SIZE, data->multi_filter);
165
166 rx_ctl |= 0x10;
167 }
168
169 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
170}
171
172static int ax88172_link_reset(struct usbnet *dev)
173{
174 u8 mode;
8ae6daca 175 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
933a27d3
DH		 176
177 mii_check_media(&dev->mii, 1, 1);
178 mii_ethtool_gset(&dev->mii, &ecmd);
179 mode = AX88172_MEDIUM_DEFAULT;
180
181 if (ecmd.duplex != DUPLEX_FULL)
182 mode |= ~AX88172_MEDIUM_FD;
183
8ae6daca
DD		 184 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
185 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
933a27d3
DH		 186
187 asix_write_medium_mode(dev, mode);
188
189 return 0;
2e55cc72
DB		 190}
191
1703338c
SH		 192static const struct net_device_ops ax88172_netdev_ops = {
193 .ndo_open = usbnet_open,
194 .ndo_stop = usbnet_stop,
195 .ndo_start_xmit = usbnet_start_xmit,
196 .ndo_tx_timeout = usbnet_tx_timeout,
197 .ndo_change_mtu = usbnet_change_mtu,
198 .ndo_set_mac_address = eth_mac_addr,
199 .ndo_validate_addr = eth_validate_addr,
200 .ndo_do_ioctl = asix_ioctl,
afc4b13d 201 .ndo_set_rx_mode = ax88172_set_multicast,
1703338c
SH		 202};
203
48b1be6a 204static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
2e55cc72
DB		 205{
206 int ret = 0;
51bf2976 207 u8 buf[ETH_ALEN];
2e55cc72
DB		 208 int i;
209 unsigned long gpio_bits = dev->driver_info->data;
210
211 usbnet_get_endpoints(dev,intf);
212
2e55cc72
DB		 213 /* Toggle the GPIOs in a manufacturer/model specific way */
214 for (i = 2; i >= 0; i--) {
83e1b918
GG		 215 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
216 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
217 if (ret < 0)
51bf2976 218 goto out;
2e55cc72
DB		 219 msleep(5);
220 }
221
83e1b918
GG		 222 ret = asix_write_rx_ctl(dev, 0x80);
223 if (ret < 0)
51bf2976 224 goto out;
2e55cc72
DB		 225
226 /* Get the MAC address */
83e1b918
GG		 227 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
228 if (ret < 0) {
49ae25b0
GKH		 229 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
230 ret);
51bf2976 231 goto out;
2e55cc72 232 }
452b5ecd
JCPV		 233
234 asix_set_netdev_dev_addr(dev, buf);
2e55cc72 235
2e55cc72
DB		 236 /* Initialize MII structure */
237 dev->mii.dev = dev->net;
48b1be6a
DH		 238 dev->mii.mdio_read = asix_mdio_read;
239 dev->mii.mdio_write = asix_mdio_write;
2e55cc72
DB		 240 dev->mii.phy_id_mask = 0x3f;
241 dev->mii.reg_num_mask = 0x1f;
933a27d3 242 dev->mii.phy_id = asix_get_phy_addr(dev);
2e55cc72 243
1703338c 244 dev->net->netdev_ops = &ax88172_netdev_ops;
48b1be6a 245 dev->net->ethtool_ops = &ax88172_ethtool_ops;
95162d65
ED		 246 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
247 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
2e55cc72 248
933a27d3
DH		 249 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
250 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
2e55cc72
DB		 251 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
252 mii_nway_restart(&dev->mii);
253
254 return 0;
51bf2976
AV		 255
256out:
2e55cc72
DB		 257 return ret;
258}
259
0fc0b732 260static const struct ethtool_ops ax88772_ethtool_ops = {
48b1be6a 261 .get_drvinfo = asix_get_drvinfo,
933a27d3 262 .get_link = asix_get_link,
2e55cc72
DB		 263 .get_msglevel = usbnet_get_msglevel,
264 .set_msglevel = usbnet_set_msglevel,
48b1be6a
DH		 265 .get_wol = asix_get_wol,
266 .set_wol = asix_set_wol,
267 .get_eeprom_len = asix_get_eeprom_len,
268 .get_eeprom = asix_get_eeprom,
cb7b24cd 269 .set_eeprom = asix_set_eeprom,
c41286fd
AB		 270 .get_settings = usbnet_get_settings,
271 .set_settings = usbnet_set_settings,
272 .nway_reset = usbnet_nway_reset,
2e55cc72
DB		 273};
274
933a27d3
DH		 275static int ax88772_link_reset(struct usbnet *dev)
276{
277 u16 mode;
8ae6daca 278 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
933a27d3
DH		 279
280 mii_check_media(&dev->mii, 1, 1);
281 mii_ethtool_gset(&dev->mii, &ecmd);
282 mode = AX88772_MEDIUM_DEFAULT;
283
8ae6daca 284 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
933a27d3
DH		 285 mode &= ~AX_MEDIUM_PS;
286
287 if (ecmd.duplex != DUPLEX_FULL)
288 mode &= ~AX_MEDIUM_FD;
289
8ae6daca
DD		 290 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
291 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
933a27d3
DH		 292
293 asix_write_medium_mode(dev, mode);
294
295 return 0;
296}
297
4ad1438f 298static int ax88772_reset(struct usbnet *dev)
2e55cc72 299{
8ef66bdc 300 struct asix_data *data = (struct asix_data *)&dev->data;
d0ffff8f 301 int ret, embd_phy;
933a27d3 302 u16 rx_ctl;
2e55cc72 303
83e1b918
GG		 304 ret = asix_write_gpio(dev,
305 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
306 if (ret < 0)
51bf2976 307 goto out;
2e55cc72 308
d0ffff8f 309 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
4ad1438f 310
83e1b918
GG		 311 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
312 if (ret < 0) {
49ae25b0 313 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
51bf2976 314 goto out;
2e55cc72
DB		 315 }
316
83e1b918
GG		 317 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
318 if (ret < 0)
51bf2976 319 goto out;
2e55cc72
DB		 320
321 msleep(150);
83e1b918
GG		 322
323 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
324 if (ret < 0)
51bf2976 325 goto out;
2e55cc72
DB		 326
327 msleep(150);
4ad1438f 328
d0ffff8f 329 if (embd_phy) {
83e1b918
GG		 330 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
331 if (ret < 0)
51bf2976 332 goto out;
83e1b918
GG		 333 } else {
334 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
335 if (ret < 0)
51bf2976 336 goto out;
d0ffff8f 337 }
2e55cc72
DB		 338
339 msleep(150);
933a27d3 340 rx_ctl = asix_read_rx_ctl(dev);
49ae25b0 341 netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
83e1b918
GG		 342 ret = asix_write_rx_ctl(dev, 0x0000);
343 if (ret < 0)
51bf2976 344 goto out;
2e55cc72 345
933a27d3 346 rx_ctl = asix_read_rx_ctl(dev);
49ae25b0 347 netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
933a27d3 348
83e1b918
GG		 349 ret = asix_sw_reset(dev, AX_SWRESET_PRL);
350 if (ret < 0)
51bf2976 351 goto out;
2e55cc72 352
2e55cc72 353 msleep(150);
48b1be6a 354
83e1b918
GG		 355 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
356 if (ret < 0)
51bf2976 357 goto out;
2e55cc72 358
48b1be6a 359 msleep(150);
2e55cc72 360
933a27d3
DH		 361 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
362 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
2e55cc72
DB		 363 ADVERTISE_ALL | ADVERTISE_CSMA);
364 mii_nway_restart(&dev->mii);
365
83e1b918
GG		 366 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
367 if (ret < 0)
51bf2976 368 goto out;
2e55cc72 369
83e1b918 370 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
2e55cc72 371 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
83e1b918
GG		 372 AX88772_IPG2_DEFAULT, 0, NULL);
373 if (ret < 0) {
49ae25b0 374 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
51bf2976 375 goto out;
2e55cc72 376 }
2e55cc72 377
8ef66bdc
JK		 378 /* Rewrite MAC address */
379 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
380 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
381 data->mac_addr);
382 if (ret < 0)
383 goto out;
384
2e55cc72 385 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
83e1b918
GG		 386 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
387 if (ret < 0)
51bf2976 388 goto out;
2e55cc72 389
933a27d3 390 rx_ctl = asix_read_rx_ctl(dev);
49ae25b0
GKH		 391 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
392 rx_ctl);
933a27d3
DH		 393
394 rx_ctl = asix_read_medium_status(dev);
49ae25b0
GKH		 395 netdev_dbg(dev->net,
396 "Medium Status is 0x%04x after all initializations\n",
397 rx_ctl);
933a27d3 398
4ad1438f
GG		 399 return 0;
400
401out:
402 return ret;
403
404}
405
406static const struct net_device_ops ax88772_netdev_ops = {
407 .ndo_open = usbnet_open,
408 .ndo_stop = usbnet_stop,
409 .ndo_start_xmit = usbnet_start_xmit,
410 .ndo_tx_timeout = usbnet_tx_timeout,
411 .ndo_change_mtu = usbnet_change_mtu,
412 .ndo_set_mac_address = asix_set_mac_address,
413 .ndo_validate_addr = eth_validate_addr,
414 .ndo_do_ioctl = asix_ioctl,
415 .ndo_set_rx_mode = asix_set_multicast,
416};
417
418static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
419{
5620df65 420 int ret, embd_phy, i;
4ad1438f
GG		 421 u8 buf[ETH_ALEN];
422 u32 phyid;
423
4ad1438f
GG		 424 usbnet_get_endpoints(dev,intf);
425
426 /* Get the MAC address */
5620df65
LS		 427 if (dev->driver_info->data & FLAG_EEPROM_MAC) {
428 for (i = 0; i < (ETH_ALEN >> 1); i++) {
429 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i,
430 0, 2, buf + i * 2);
431 if (ret < 0)
432 break;
433 }
434 } else {
435 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
436 0, 0, ETH_ALEN, buf);
437 }
438
83e1b918 439 if (ret < 0) {
49ae25b0 440 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
83e1b918 441 return ret;
4ad1438f 442 }
452b5ecd
JCPV		 443
444 asix_set_netdev_dev_addr(dev, buf);
4ad1438f
GG		 445
446 /* Initialize MII structure */
447 dev->mii.dev = dev->net;
448 dev->mii.mdio_read = asix_mdio_read;
449 dev->mii.mdio_write = asix_mdio_write;
450 dev->mii.phy_id_mask = 0x1f;
451 dev->mii.reg_num_mask = 0x1f;
452 dev->mii.phy_id = asix_get_phy_addr(dev);
453
4ad1438f
GG		 454 dev->net->netdev_ops = &ax88772_netdev_ops;
455 dev->net->ethtool_ops = &ax88772_ethtool_ops;
95162d65
ED		 456 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
457 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
4ad1438f 458
d3665188
GG		 459 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
460
461 /* Reset the PHY to normal operation mode */
462 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
463 if (ret < 0) {
49ae25b0 464 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
d3665188
GG		 465 return ret;
466 }
467
468 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
83e1b918
GG		 469 if (ret < 0)
470 return ret;
4ad1438f 471
d3665188
GG		 472 msleep(150);
473
474 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
475 if (ret < 0)
476 return ret;
477
478 msleep(150);
479
480 ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
481
482 /* Read PHYID register *AFTER* the PHY was reset properly */
483 phyid = asix_get_phyid(dev);
49ae25b0 484 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
d3665188 485
2e55cc72
DB		 486 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
487 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
488 /* hard_mtu is still the default - the device does not support
489 jumbo eth frames */
490 dev->rx_urb_size = 2048;
491 }
83e1b918 492
8b5b6f54
LS		 493 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
494 if (!dev->driver_priv)
495 return -ENOMEM;
496
2e55cc72 497 return 0;
2e55cc72
DB		 498}
499
ad327910 500static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
8b5b6f54
LS		 501{
502 if (dev->driver_priv)
503 kfree(dev->driver_priv);
504}
505
bc689c97 506static const struct ethtool_ops ax88178_ethtool_ops = {
933a27d3
DH		 507 .get_drvinfo = asix_get_drvinfo,
508 .get_link = asix_get_link,
933a27d3
DH		 509 .get_msglevel = usbnet_get_msglevel,
510 .set_msglevel = usbnet_set_msglevel,
511 .get_wol = asix_get_wol,
512 .set_wol = asix_set_wol,
513 .get_eeprom_len = asix_get_eeprom_len,
514 .get_eeprom = asix_get_eeprom,
cb7b24cd 515 .set_eeprom = asix_set_eeprom,
c41286fd
AB		 516 .get_settings = usbnet_get_settings,
517 .set_settings = usbnet_set_settings,
518 .nway_reset = usbnet_nway_reset,
933a27d3
DH		 519};
520
521static int marvell_phy_init(struct usbnet *dev)
2e55cc72 522{
933a27d3
DH		 523 struct asix_data *data = (struct asix_data *)&dev->data;
524 u16 reg;
2e55cc72 525
60b86755 526 netdev_dbg(dev->net, "marvell_phy_init()\n");
2e55cc72 527
933a27d3 528 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
60b86755 529 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
2e55cc72 530
933a27d3
DH		 531 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
532 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
2e55cc72 533
933a27d3
DH		 534 if (data->ledmode) {
535 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
536 MII_MARVELL_LED_CTRL);
60b86755 537 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
2e55cc72 538
933a27d3
DH		 539 reg &= 0xf8ff;
540 reg |= (1 + 0x0100);
541 asix_mdio_write(dev->net, dev->mii.phy_id,
542 MII_MARVELL_LED_CTRL, reg);
2e55cc72 543
933a27d3
DH		 544 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
545 MII_MARVELL_LED_CTRL);
60b86755 546 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
933a27d3
DH		 547 reg &= 0xfc0f;
548 }
2e55cc72 549
933a27d3
DH		 550 return 0;
551}
552
610d885d
GG		 553static int rtl8211cl_phy_init(struct usbnet *dev)
554{
555 struct asix_data *data = (struct asix_data *)&dev->data;
556
557 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
558
559 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
560 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
561 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
562 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
563 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
564
565 if (data->ledmode == 12) {
566 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
567 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
568 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
569 }
570
571 return 0;
572}
573
933a27d3
DH		 574static int marvell_led_status(struct usbnet *dev, u16 speed)
575{
576 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
577
60b86755 578 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
933a27d3
DH		 579
580 /* Clear out the center LED bits - 0x03F0 */
581 reg &= 0xfc0f;
582
583 switch (speed) {
584 case SPEED_1000:
585 reg |= 0x03e0;
586 break;
587 case SPEED_100:
588 reg |= 0x03b0;
589 break;
590 default:
591 reg |= 0x02f0;
2e55cc72
DB		 592 }
593
60b86755 594 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
933a27d3
DH		 595 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
596
597 return 0;
598}
599
610d885d
GG		 600static int ax88178_reset(struct usbnet *dev)
601{
602 struct asix_data *data = (struct asix_data *)&dev->data;
603 int ret;
604 __le16 eeprom;
605 u8 status;
606 int gpio0 = 0;
b2d3ad29 607 u32 phyid;
610d885d
GG		 608
609 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
49ae25b0 610 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
610d885d
GG		 611
612 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
613 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
614 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
615
49ae25b0 616 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
610d885d
GG		 617
618 if (eeprom == cpu_to_le16(0xffff)) {
619 data->phymode = PHY_MODE_MARVELL;
620 data->ledmode = 0;
621 gpio0 = 1;
622 } else {
b2d3ad29 623 data->phymode = le16_to_cpu(eeprom) & 0x7F;
610d885d
GG		 624 data->ledmode = le16_to_cpu(eeprom) >> 8;
625 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
626 }
49ae25b0 627 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
610d885d 628
b2d3ad29 629 /* Power up external GigaPHY through AX88178 GPIO pin */
610d885d
GG		 630 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
631 if ((le16_to_cpu(eeprom) >> 8) != 1) {
632 asix_write_gpio(dev, 0x003c, 30);
633 asix_write_gpio(dev, 0x001c, 300);
634 asix_write_gpio(dev, 0x003c, 30);
635 } else {
49ae25b0 636 netdev_dbg(dev->net, "gpio phymode == 1 path\n");
610d885d
GG		 637 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
638 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
639 }
640
b2d3ad29
GG		 641 /* Read PHYID register *AFTER* powering up PHY */
642 phyid = asix_get_phyid(dev);
49ae25b0 643 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
b2d3ad29
GG		 644
645 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
646 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
647
610d885d
GG		 648 asix_sw_reset(dev, 0);
649 msleep(150);
650
651 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
652 msleep(150);
653
654 asix_write_rx_ctl(dev, 0);
655
656 if (data->phymode == PHY_MODE_MARVELL) {
657 marvell_phy_init(dev);
658 msleep(60);
659 } else if (data->phymode == PHY_MODE_RTL8211CL)
660 rtl8211cl_phy_init(dev);
661
662 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
663 BMCR_RESET | BMCR_ANENABLE);
664 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
665 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
666 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
667 ADVERTISE_1000FULL);
668
669 mii_nway_restart(&dev->mii);
670
83e1b918
GG		 671 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
672 if (ret < 0)
673 return ret;
610d885d 674
71bc5d94
JK		 675 /* Rewrite MAC address */
676 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
677 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
678 data->mac_addr);
679 if (ret < 0)
680 return ret;
681
83e1b918
GG		 682 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
683 if (ret < 0)
684 return ret;
610d885d
GG		 685
686 return 0;
610d885d
GG		 687}
688
933a27d3
DH		 689static int ax88178_link_reset(struct usbnet *dev)
690{
691 u16 mode;
8ae6daca 692 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
933a27d3 693 struct asix_data *data = (struct asix_data *)&dev->data;
8ae6daca 694 u32 speed;
933a27d3 695
60b86755 696 netdev_dbg(dev->net, "ax88178_link_reset()\n");
933a27d3
DH		 697
698 mii_check_media(&dev->mii, 1, 1);
699 mii_ethtool_gset(&dev->mii, &ecmd);
700 mode = AX88178_MEDIUM_DEFAULT;
8ae6daca 701 speed = ethtool_cmd_speed(&ecmd);
933a27d3 702
8ae6daca 703 if (speed == SPEED_1000)
a7f75c0c 704 mode |= AX_MEDIUM_GM;
8ae6daca 705 else if (speed == SPEED_100)
933a27d3
DH		 706 mode |= AX_MEDIUM_PS;
707 else
708 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
709
a7f75c0c
PK		 710 mode |= AX_MEDIUM_ENCK;
711
933a27d3
DH		 712 if (ecmd.duplex == DUPLEX_FULL)
713 mode |= AX_MEDIUM_FD;
714 else
715 mode &= ~AX_MEDIUM_FD;
716
8ae6daca
DD		 717 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
718 speed, ecmd.duplex, mode);
933a27d3
DH		 719
720 asix_write_medium_mode(dev, mode);
721
722 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
8ae6daca 723 marvell_led_status(dev, speed);
933a27d3
DH		 724
725 return 0;
726}
727
728static void ax88178_set_mfb(struct usbnet *dev)
729{
730 u16 mfb = AX_RX_CTL_MFB_16384;
731 u16 rxctl;
732 u16 medium;
733 int old_rx_urb_size = dev->rx_urb_size;
734
735 if (dev->hard_mtu < 2048) {
736 dev->rx_urb_size = 2048;
737 mfb = AX_RX_CTL_MFB_2048;
738 } else if (dev->hard_mtu < 4096) {
739 dev->rx_urb_size = 4096;
740 mfb = AX_RX_CTL_MFB_4096;
741 } else if (dev->hard_mtu < 8192) {
742 dev->rx_urb_size = 8192;
743 mfb = AX_RX_CTL_MFB_8192;
744 } else if (dev->hard_mtu < 16384) {
745 dev->rx_urb_size = 16384;
746 mfb = AX_RX_CTL_MFB_16384;
2e55cc72 747 }
933a27d3
DH		 748
749 rxctl = asix_read_rx_ctl(dev);
750 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
751
752 medium = asix_read_medium_status(dev);
753 if (dev->net->mtu > 1500)
754 medium |= AX_MEDIUM_JFE;
755 else
756 medium &= ~AX_MEDIUM_JFE;
757 asix_write_medium_mode(dev, medium);
758
759 if (dev->rx_urb_size > old_rx_urb_size)
760 usbnet_unlink_rx_urbs(dev);
2e55cc72
DB		 761}
762
933a27d3 763static int ax88178_change_mtu(struct net_device *net, int new_mtu)
2e55cc72 764{
933a27d3
DH		 765 struct usbnet *dev = netdev_priv(net);
766 int ll_mtu = new_mtu + net->hard_header_len + 4;
2e55cc72 767
60b86755 768 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
2e55cc72 769
933a27d3
DH		 770 if (new_mtu <= 0 || ll_mtu > 16384)
771 return -EINVAL;
772
773 if ((ll_mtu % dev->maxpacket) == 0)
774 return -EDOM;
775
776 net->mtu = new_mtu;
777 dev->hard_mtu = net->mtu + net->hard_header_len;
778 ax88178_set_mfb(dev);
779
a88c32ae
ML		 780 /* max qlen depend on hard_mtu and rx_urb_size */
781 usbnet_update_max_qlen(dev);
782
933a27d3
DH		 783 return 0;
784}
785
1703338c
SH		 786static const struct net_device_ops ax88178_netdev_ops = {
787 .ndo_open = usbnet_open,
788 .ndo_stop = usbnet_stop,
789 .ndo_start_xmit = usbnet_start_xmit,
790 .ndo_tx_timeout = usbnet_tx_timeout,
7f29a3ba 791 .ndo_set_mac_address = asix_set_mac_address,
1703338c 792 .ndo_validate_addr = eth_validate_addr,
afc4b13d 793 .ndo_set_rx_mode = asix_set_multicast,
1703338c
SH		 794 .ndo_do_ioctl = asix_ioctl,
795 .ndo_change_mtu = ax88178_change_mtu,
796};
797
933a27d3
DH		 798static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
799{
933a27d3 800 int ret;
51bf2976 801 u8 buf[ETH_ALEN];
933a27d3
DH		 802
803 usbnet_get_endpoints(dev,intf);
804
933a27d3 805 /* Get the MAC address */
83e1b918
GG		 806 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
807 if (ret < 0) {
49ae25b0 808 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
83e1b918 809 return ret;
2e55cc72 810 }
452b5ecd
JCPV		 811
812 asix_set_netdev_dev_addr(dev, buf);
2e55cc72 813
933a27d3
DH		 814 /* Initialize MII structure */
815 dev->mii.dev = dev->net;
816 dev->mii.mdio_read = asix_mdio_read;
817 dev->mii.mdio_write = asix_mdio_write;
818 dev->mii.phy_id_mask = 0x1f;
819 dev->mii.reg_num_mask = 0xff;
820 dev->mii.supports_gmii = 1;
933a27d3 821 dev->mii.phy_id = asix_get_phy_addr(dev);
1703338c
SH		 822
823 dev->net->netdev_ops = &ax88178_netdev_ops;
933a27d3 824 dev->net->ethtool_ops = &ax88178_ethtool_ops;
2e55cc72 825
b2d3ad29
GG		 826 /* Blink LEDS so users know driver saw dongle */
827 asix_sw_reset(dev, 0);
828 msleep(150);
2e55cc72 829
b2d3ad29
GG		 830 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
831 msleep(150);
933a27d3
DH		 832
833 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
834 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
835 /* hard_mtu is still the default - the device does not support
836 jumbo eth frames */
837 dev->rx_urb_size = 2048;
838 }
933a27d3 839
8b5b6f54
LS		 840 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
841 if (!dev->driver_priv)
842 return -ENOMEM;
843
83e1b918 844 return 0;
2e55cc72
DB		 845}
846
847static const struct driver_info ax8817x_info = {
848 .description = "ASIX AX8817x USB 2.0 Ethernet",
48b1be6a
DH		 849 .bind = ax88172_bind,
850 .status = asix_status,
2e55cc72
DB		 851 .link_reset = ax88172_link_reset,
852 .reset = ax88172_link_reset,
37e8273c 853 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB		 854 .data = 0x00130103,
855};
856
857static const struct driver_info dlink_dub_e100_info = {
858 .description = "DLink DUB-E100 USB Ethernet",
48b1be6a
DH		 859 .bind = ax88172_bind,
860 .status = asix_status,
2e55cc72
DB		 861 .link_reset = ax88172_link_reset,
862 .reset = ax88172_link_reset,
37e8273c 863 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB		 864 .data = 0x009f9d9f,
865};
866
867static const struct driver_info netgear_fa120_info = {
868 .description = "Netgear FA-120 USB Ethernet",
48b1be6a
DH		 869 .bind = ax88172_bind,
870 .status = asix_status,
2e55cc72
DB		 871 .link_reset = ax88172_link_reset,
872 .reset = ax88172_link_reset,
37e8273c 873 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB		 874 .data = 0x00130103,
875};
876
877static const struct driver_info hawking_uf200_info = {
878 .description = "Hawking UF200 USB Ethernet",
48b1be6a
DH		 879 .bind = ax88172_bind,
880 .status = asix_status,
2e55cc72
DB		 881 .link_reset = ax88172_link_reset,
882 .reset = ax88172_link_reset,
37e8273c 883 .flags = FLAG_ETHER | FLAG_LINK_INTR,
2e55cc72
DB		 884 .data = 0x001f1d1f,
885};
886
887static const struct driver_info ax88772_info = {
888 .description = "ASIX AX88772 USB 2.0 Ethernet",
889 .bind = ax88772_bind,
8b5b6f54 890 .unbind = ax88772_unbind,
48b1be6a 891 .status = asix_status,
2e55cc72 892 .link_reset = ax88772_link_reset,
4ad1438f 893 .reset = ax88772_reset,
a9e0aca4 894 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
8b5b6f54 895 .rx_fixup = asix_rx_fixup_common,
933a27d3
DH		 896 .tx_fixup = asix_tx_fixup,
897};
898
5620df65
LS		 899static const struct driver_info ax88772b_info = {
900 .description = "ASIX AX88772B USB 2.0 Ethernet",
901 .bind = ax88772_bind,
8b5b6f54 902 .unbind = ax88772_unbind,
5620df65
LS		 903 .status = asix_status,
904 .link_reset = ax88772_link_reset,
905 .reset = ax88772_reset,
906 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
907 FLAG_MULTI_PACKET,
8b5b6f54 908 .rx_fixup = asix_rx_fixup_common,
5620df65
LS		 909 .tx_fixup = asix_tx_fixup,
910 .data = FLAG_EEPROM_MAC,
911};
912
933a27d3
DH		 913static const struct driver_info ax88178_info = {
914 .description = "ASIX AX88178 USB 2.0 Ethernet",
915 .bind = ax88178_bind,
8b5b6f54 916 .unbind = ax88772_unbind,
933a27d3
DH		 917 .status = asix_status,
918 .link_reset = ax88178_link_reset,
610d885d 919 .reset = ax88178_reset,
d43ff4cd
EG		 920 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
921 FLAG_MULTI_PACKET,
8b5b6f54 922 .rx_fixup = asix_rx_fixup_common,
933a27d3 923 .tx_fixup = asix_tx_fixup,
2e55cc72
DB		 924};
925
45af3fb4
GT		 926/*
927 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
928 * no-name packaging.
929 * USB device strings are:
930 * 1: Manufacturer: USBLINK
931 * 2: Product: HG20F9 USB2.0
932 * 3: Serial: 000003
933 * Appears to be compatible with Asix 88772B.
934 */
935static const struct driver_info hg20f9_info = {
936 .description = "HG20F9 USB 2.0 Ethernet",
937 .bind = ax88772_bind,
938 .unbind = ax88772_unbind,
939 .status = asix_status,
940 .link_reset = ax88772_link_reset,
941 .reset = ax88772_reset,
942 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
943 FLAG_MULTI_PACKET,
944 .rx_fixup = asix_rx_fixup_common,
945 .tx_fixup = asix_tx_fixup,
946 .data = FLAG_EEPROM_MAC,
947};
948
2e55cc72
DB		 949static const struct usb_device_id products [] = {
950{
951 // Linksys USB200M
952 USB_DEVICE (0x077b, 0x2226),
953 .driver_info = (unsigned long) &ax8817x_info,
954}, {
955 // Netgear FA120
956 USB_DEVICE (0x0846, 0x1040),
957 .driver_info = (unsigned long) &netgear_fa120_info,
958}, {
959 // DLink DUB-E100
960 USB_DEVICE (0x2001, 0x1a00),
961 .driver_info = (unsigned long) &dlink_dub_e100_info,
962}, {
963 // Intellinet, ST Lab USB Ethernet
964 USB_DEVICE (0x0b95, 0x1720),
965 .driver_info = (unsigned long) &ax8817x_info,
966}, {
967 // Hawking UF200, TrendNet TU2-ET100
968 USB_DEVICE (0x07b8, 0x420a),
969 .driver_info = (unsigned long) &hawking_uf200_info,
970}, {
39c4b38c
DH		 971 // Billionton Systems, USB2AR
972 USB_DEVICE (0x08dd, 0x90ff),
973 .driver_info = (unsigned long) &ax8817x_info,
2e55cc72
DB		 974}, {
975 // ATEN UC210T
976 USB_DEVICE (0x0557, 0x2009),
977 .driver_info = (unsigned long) &ax8817x_info,
978}, {
979 // Buffalo LUA-U2-KTX
980 USB_DEVICE (0x0411, 0x003d),
981 .driver_info = (unsigned long) &ax8817x_info,
ac7b77f1
MD		 982}, {
983 // Buffalo LUA-U2-GT 10/100/1000
984 USB_DEVICE (0x0411, 0x006e),
985 .driver_info = (unsigned long) &ax88178_info,
2e55cc72
DB		 986}, {
987 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
988 USB_DEVICE (0x6189, 0x182d),
989 .driver_info = (unsigned long) &ax8817x_info,
4e503919
JN		 990}, {
991 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
992 USB_DEVICE (0x0df6, 0x0056),
993 .driver_info = (unsigned long) &ax88178_info,
2e55cc72
DB		 994}, {
995 // corega FEther USB2-TX
996 USB_DEVICE (0x07aa, 0x0017),
997 .driver_info = (unsigned long) &ax8817x_info,
998}, {
999 // Surecom EP-1427X-2
1000 USB_DEVICE (0x1189, 0x0893),
1001 .driver_info = (unsigned long) &ax8817x_info,
1002}, {
1003 // goodway corp usb gwusb2e
1004 USB_DEVICE (0x1631, 0x6200),
1005 .driver_info = (unsigned long) &ax8817x_info,
39c4b38c
DH		 1006}, {
1007 // JVC MP-PRX1 Port Replicator
1008 USB_DEVICE (0x04f1, 0x3008),
1009 .driver_info = (unsigned long) &ax8817x_info,
66dc81ec
QP		 1010}, {
1011 // Lenovo U2L100P 10/100
1012 USB_DEVICE (0x17ef, 0x7203),
1013 .driver_info = (unsigned long) &ax88772_info,
30885909
MV		 1014}, {
1015 // ASIX AX88772B 10/100
1016 USB_DEVICE (0x0b95, 0x772b),
5620df65 1017 .driver_info = (unsigned long) &ax88772b_info,
2e55cc72
DB		 1018}, {
1019 // ASIX AX88772 10/100
39c4b38c
DH		 1020 USB_DEVICE (0x0b95, 0x7720),
1021 .driver_info = (unsigned long) &ax88772_info,
7327413c
EW		 1022}, {
1023 // ASIX AX88178 10/100/1000
1024 USB_DEVICE (0x0b95, 0x1780),
933a27d3 1025 .driver_info = (unsigned long) &ax88178_info,
f4680d3d
AE		 1026}, {
1027 // Logitec LAN-GTJ/U2A
1028 USB_DEVICE (0x0789, 0x0160),
1029 .driver_info = (unsigned long) &ax88178_info,
5e0f76c6
DH		 1030}, {
1031 // Linksys USB200M Rev 2
1032 USB_DEVICE (0x13b1, 0x0018),
1033 .driver_info = (unsigned long) &ax88772_info,
5732ce84
DH		 1034}, {
1035 // 0Q0 cable ethernet
1036 USB_DEVICE (0x1557, 0x7720),
1037 .driver_info = (unsigned long) &ax88772_info,
933a27d3
DH		 1038}, {
1039 // DLink DUB-E100 H/W Ver B1
1040 USB_DEVICE (0x07d1, 0x3c05),
1041 .driver_info = (unsigned long) &ax88772_info,
b923e7fc
DH		 1042}, {
1043 // DLink DUB-E100 H/W Ver B1 Alternate
1044 USB_DEVICE (0x2001, 0x3c05),
1045 .driver_info = (unsigned long) &ax88772_info,
ed3770a9
S		 1046}, {
1047 // DLink DUB-E100 H/W Ver C1
1048 USB_DEVICE (0x2001, 0x1a02),
1049 .driver_info = (unsigned long) &ax88772_info,
933a27d3
DH		 1050}, {
1051 // Linksys USB1000
1052 USB_DEVICE (0x1737, 0x0039),
1053 .driver_info = (unsigned long) &ax88178_info,
b29cf31d
YH		 1054}, {
1055 // IO-DATA ETG-US2
1056 USB_DEVICE (0x04bb, 0x0930),
1057 .driver_info = (unsigned long) &ax88178_info,
2ed22bc2
DH		 1058}, {
1059 // Belkin F5D5055
1060 USB_DEVICE(0x050d, 0x5055),
1061 .driver_info = (unsigned long) &ax88178_info,
3d60efb5
AN		 1062}, {
1063 // Apple USB Ethernet Adapter
1064 USB_DEVICE(0x05ac, 0x1402),
1065 .driver_info = (unsigned long) &ax88772_info,
ccf95402
JC		 1066}, {
1067 // Cables-to-Go USB Ethernet Adapter
1068 USB_DEVICE(0x0b95, 0x772a),
1069 .driver_info = (unsigned long) &ax88772_info,
fef7cc08
GKH		 1070}, {
1071 // ABOCOM for pci
1072 USB_DEVICE(0x14ea, 0xab11),
1073 .driver_info = (unsigned long) &ax88178_info,
1074}, {
1075 // ASIX 88772a
1076 USB_DEVICE(0x0db0, 0xa877),
1077 .driver_info = (unsigned long) &ax88772_info,
e8303a3b
AJ		 1078}, {
1079 // Asus USB Ethernet Adapter
1080 USB_DEVICE (0x0b95, 0x7e2b),
1081 .driver_info = (unsigned long) &ax88772_info,
16626b0c
CR		 1082}, {
1083 /* ASIX 88172a demo board */
1084 USB_DEVICE(0x0b95, 0x172a),
1085 .driver_info = (unsigned long) &ax88172a_info,
45af3fb4
GT		 1086}, {
1087 /*
1088 * USBLINK HG20F9 "USB 2.0 LAN"
1089 * Appears to have gazumped Linksys's manufacturer ID but
1090 * doesn't (yet) conflict with any known Linksys product.
1091 */
1092 USB_DEVICE(0x066b, 0x20f9),
1093 .driver_info = (unsigned long) &hg20f9_info,
2e55cc72
DB		 1094},
1095 { }, // END
1096};
1097MODULE_DEVICE_TABLE(usb, products);
1098
1099static struct usb_driver asix_driver = {
83e1b918 1100 .name = DRIVER_NAME,
2e55cc72
DB		 1101 .id_table = products,
1102 .probe = usbnet_probe,
1103 .suspend = usbnet_suspend,
1104 .resume = usbnet_resume,
1105 .disconnect = usbnet_disconnect,
a11a6544 1106 .supports_autosuspend = 1,
e1f12eb6 1107 .disable_hub_initiated_lpm = 1,
2e55cc72
DB		 1108};
1109
d632eb1b 1110module_usb_driver(asix_driver);
2e55cc72
DB		 1111
1112MODULE_AUTHOR("David Hollis");
4ad1438f 1113MODULE_VERSION(DRIVER_VERSION);
2e55cc72
DB		 1114MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1115MODULE_LICENSE("GPL");
1116
Linux kernel - Deliverables
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