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net/usb/r8152: make sure the USB buffer is DMA-able
[deliverable/linux.git] / drivers / net / usb / r8152.c
CommitLineData
ac718b69 1/*
2 * Copyright (c) 2013 Realtek Semiconductor Corp. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
7 *
8 */
9
10#include <linux/init.h>
11#include <linux/signal.h>
12#include <linux/slab.h>
13#include <linux/module.h>
ac718b69 14#include <linux/netdevice.h>
15#include <linux/etherdevice.h>
16#include <linux/mii.h>
17#include <linux/ethtool.h>
18#include <linux/usb.h>
19#include <linux/crc32.h>
20#include <linux/if_vlan.h>
21#include <linux/uaccess.h>
22
23/* Version Information */
24#define DRIVER_VERSION "v1.0.0 (2013/05/03)"
25#define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
26#define DRIVER_DESC "Realtek RTL8152 Based USB 2.0 Ethernet Adapters"
27#define MODULENAME "r8152"
28
29#define R8152_PHY_ID 32
30
31#define PLA_IDR 0xc000
32#define PLA_RCR 0xc010
33#define PLA_RMS 0xc016
34#define PLA_RXFIFO_CTRL0 0xc0a0
35#define PLA_RXFIFO_CTRL1 0xc0a4
36#define PLA_RXFIFO_CTRL2 0xc0a8
37#define PLA_FMC 0xc0b4
38#define PLA_CFG_WOL 0xc0b6
39#define PLA_MAR 0xcd00
40#define PAL_BDC_CR 0xd1a0
41#define PLA_LEDSEL 0xdd90
42#define PLA_LED_FEATURE 0xdd92
43#define PLA_PHYAR 0xde00
44#define PLA_GPHY_INTR_IMR 0xe022
45#define PLA_EEE_CR 0xe040
46#define PLA_EEEP_CR 0xe080
47#define PLA_MAC_PWR_CTRL 0xe0c0
48#define PLA_TCR0 0xe610
49#define PLA_TCR1 0xe612
50#define PLA_TXFIFO_CTRL 0xe618
51#define PLA_RSTTELLY 0xe800
52#define PLA_CR 0xe813
53#define PLA_CRWECR 0xe81c
54#define PLA_CONFIG5 0xe822
55#define PLA_PHY_PWR 0xe84c
56#define PLA_OOB_CTRL 0xe84f
57#define PLA_CPCR 0xe854
58#define PLA_MISC_0 0xe858
59#define PLA_MISC_1 0xe85a
60#define PLA_OCP_GPHY_BASE 0xe86c
61#define PLA_TELLYCNT 0xe890
62#define PLA_SFF_STS_7 0xe8de
63#define PLA_PHYSTATUS 0xe908
64#define PLA_BP_BA 0xfc26
65#define PLA_BP_0 0xfc28
66#define PLA_BP_1 0xfc2a
67#define PLA_BP_2 0xfc2c
68#define PLA_BP_3 0xfc2e
69#define PLA_BP_4 0xfc30
70#define PLA_BP_5 0xfc32
71#define PLA_BP_6 0xfc34
72#define PLA_BP_7 0xfc36
73
74#define USB_DEV_STAT 0xb808
75#define USB_USB_CTRL 0xd406
76#define USB_PHY_CTRL 0xd408
77#define USB_TX_AGG 0xd40a
78#define USB_RX_BUF_TH 0xd40c
79#define USB_USB_TIMER 0xd428
80#define USB_PM_CTRL_STATUS 0xd432
81#define USB_TX_DMA 0xd434
82#define USB_UPS_CTRL 0xd800
83#define USB_BP_BA 0xfc26
84#define USB_BP_0 0xfc28
85#define USB_BP_1 0xfc2a
86#define USB_BP_2 0xfc2c
87#define USB_BP_3 0xfc2e
88#define USB_BP_4 0xfc30
89#define USB_BP_5 0xfc32
90#define USB_BP_6 0xfc34
91#define USB_BP_7 0xfc36
92
93/* OCP Registers */
94#define OCP_ALDPS_CONFIG 0x2010
95#define OCP_EEE_CONFIG1 0x2080
96#define OCP_EEE_CONFIG2 0x2092
97#define OCP_EEE_CONFIG3 0x2094
98#define OCP_EEE_AR 0xa41a
99#define OCP_EEE_DATA 0xa41c
100
101/* PLA_RCR */
102#define RCR_AAP 0x00000001
103#define RCR_APM 0x00000002
104#define RCR_AM 0x00000004
105#define RCR_AB 0x00000008
106#define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
107
108/* PLA_RXFIFO_CTRL0 */
109#define RXFIFO_THR1_NORMAL 0x00080002
110#define RXFIFO_THR1_OOB 0x01800003
111
112/* PLA_RXFIFO_CTRL1 */
113#define RXFIFO_THR2_FULL 0x00000060
114#define RXFIFO_THR2_HIGH 0x00000038
115#define RXFIFO_THR2_OOB 0x0000004a
116
117/* PLA_RXFIFO_CTRL2 */
118#define RXFIFO_THR3_FULL 0x00000078
119#define RXFIFO_THR3_HIGH 0x00000048
120#define RXFIFO_THR3_OOB 0x0000005a
121
122/* PLA_TXFIFO_CTRL */
123#define TXFIFO_THR_NORMAL 0x00400008
124
125/* PLA_FMC */
126#define FMC_FCR_MCU_EN 0x0001
127
128/* PLA_EEEP_CR */
129#define EEEP_CR_EEEP_TX 0x0002
130
131/* PLA_TCR0 */
132#define TCR0_TX_EMPTY 0x0800
133#define TCR0_AUTO_FIFO 0x0080
134
135/* PLA_TCR1 */
136#define VERSION_MASK 0x7cf0
137
138/* PLA_CR */
139#define CR_RST 0x10
140#define CR_RE 0x08
141#define CR_TE 0x04
142
143/* PLA_CRWECR */
144#define CRWECR_NORAML 0x00
145#define CRWECR_CONFIG 0xc0
146
147/* PLA_OOB_CTRL */
148#define NOW_IS_OOB 0x80
149#define TXFIFO_EMPTY 0x20
150#define RXFIFO_EMPTY 0x10
151#define LINK_LIST_READY 0x02
152#define DIS_MCU_CLROOB 0x01
153#define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
154
155/* PLA_MISC_1 */
156#define RXDY_GATED_EN 0x0008
157
158/* PLA_SFF_STS_7 */
159#define RE_INIT_LL 0x8000
160#define MCU_BORW_EN 0x4000
161
162/* PLA_CPCR */
163#define CPCR_RX_VLAN 0x0040
164
165/* PLA_CFG_WOL */
166#define MAGIC_EN 0x0001
167
168/* PAL_BDC_CR */
169#define ALDPS_PROXY_MODE 0x0001
170
171/* PLA_CONFIG5 */
172#define LAN_WAKE_EN 0x0002
173
174/* PLA_LED_FEATURE */
175#define LED_MODE_MASK 0x0700
176
177/* PLA_PHY_PWR */
178#define TX_10M_IDLE_EN 0x0080
179#define PFM_PWM_SWITCH 0x0040
180
181/* PLA_MAC_PWR_CTRL */
182#define D3_CLK_GATED_EN 0x00004000
183#define MCU_CLK_RATIO 0x07010f07
184#define MCU_CLK_RATIO_MASK 0x0f0f0f0f
185
186/* PLA_GPHY_INTR_IMR */
187#define GPHY_STS_MSK 0x0001
188#define SPEED_DOWN_MSK 0x0002
189#define SPDWN_RXDV_MSK 0x0004
190#define SPDWN_LINKCHG_MSK 0x0008
191
192/* PLA_PHYAR */
193#define PHYAR_FLAG 0x80000000
194
195/* PLA_EEE_CR */
196#define EEE_RX_EN 0x0001
197#define EEE_TX_EN 0x0002
198
199/* USB_DEV_STAT */
200#define STAT_SPEED_MASK 0x0006
201#define STAT_SPEED_HIGH 0x0000
202#define STAT_SPEED_FULL 0x0001
203
204/* USB_TX_AGG */
205#define TX_AGG_MAX_THRESHOLD 0x03
206
207/* USB_RX_BUF_TH */
208#define RX_BUF_THR 0x7a120180
209
210/* USB_TX_DMA */
211#define TEST_MODE_DISABLE 0x00000001
212#define TX_SIZE_ADJUST1 0x00000100
213
214/* USB_UPS_CTRL */
215#define POWER_CUT 0x0100
216
217/* USB_PM_CTRL_STATUS */
218#define RWSUME_INDICATE 0x0001
219
220/* USB_USB_CTRL */
221#define RX_AGG_DISABLE 0x0010
222
223/* OCP_ALDPS_CONFIG */
224#define ENPWRSAVE 0x8000
225#define ENPDNPS 0x0200
226#define LINKENA 0x0100
227#define DIS_SDSAVE 0x0010
228
229/* OCP_EEE_CONFIG1 */
230#define RG_TXLPI_MSK_HFDUP 0x8000
231#define RG_MATCLR_EN 0x4000
232#define EEE_10_CAP 0x2000
233#define EEE_NWAY_EN 0x1000
234#define TX_QUIET_EN 0x0200
235#define RX_QUIET_EN 0x0100
236#define SDRISETIME 0x0010 /* bit 4 ~ 6 */
237#define RG_RXLPI_MSK_HFDUP 0x0008
238#define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
239
240/* OCP_EEE_CONFIG2 */
241#define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
242#define RG_DACQUIET_EN 0x0400
243#define RG_LDVQUIET_EN 0x0200
244#define RG_CKRSEL 0x0020
245#define RG_EEEPRG_EN 0x0010
246
247/* OCP_EEE_CONFIG3 */
248#define FST_SNR_EYE_R 0x1500 /* bit 7 ~ 15 */
249#define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
250#define MSK_PH 0x0006 /* bit 0 ~ 3 */
251
252/* OCP_EEE_AR */
253/* bit[15:14] function */
254#define FUN_ADDR 0x0000
255#define FUN_DATA 0x4000
256/* bit[4:0] device addr */
257#define DEVICE_ADDR 0x0007
258
259/* OCP_EEE_DATA */
260#define EEE_ADDR 0x003C
261#define EEE_DATA 0x0002
262
263enum rtl_register_content {
264 _100bps = 0x08,
265 _10bps = 0x04,
266 LINK_STATUS = 0x02,
267 FULL_DUP = 0x01,
268};
269
270#define RTL8152_REQT_READ 0xc0
271#define RTL8152_REQT_WRITE 0x40
272#define RTL8152_REQ_GET_REGS 0x05
273#define RTL8152_REQ_SET_REGS 0x05
274
275#define BYTE_EN_DWORD 0xff
276#define BYTE_EN_WORD 0x33
277#define BYTE_EN_BYTE 0x11
278#define BYTE_EN_SIX_BYTES 0x3f
279#define BYTE_EN_START_MASK 0x0f
280#define BYTE_EN_END_MASK 0xf0
281
282#define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
283#define RTL8152_TX_TIMEOUT (HZ)
284
285/* rtl8152 flags */
286enum rtl8152_flags {
287 RTL8152_UNPLUG = 0,
288 RX_URB_FAIL,
289 RTL8152_SET_RX_MODE,
290 WORK_ENABLE
291};
292
293/* Define these values to match your device */
294#define VENDOR_ID_REALTEK 0x0bda
295#define PRODUCT_ID_RTL8152 0x8152
296
297#define MCU_TYPE_PLA 0x0100
298#define MCU_TYPE_USB 0x0000
299
300struct rx_desc {
301 u32 opts1;
302#define RX_LEN_MASK 0x7fff
303 u32 opts2;
304 u32 opts3;
305 u32 opts4;
306 u32 opts5;
307 u32 opts6;
308};
309
310struct tx_desc {
311 u32 opts1;
312#define TX_FS (1 << 31) /* First segment of a packet */
313#define TX_LS (1 << 30) /* Final segment of a packet */
314#define TX_LEN_MASK 0xffff
315 u32 opts2;
316};
317
318struct r8152 {
319 unsigned long flags;
320 struct usb_device *udev;
321 struct tasklet_struct tl;
322 struct net_device *netdev;
323 struct urb *rx_urb, *tx_urb;
324 struct sk_buff *tx_skb, *rx_skb;
325 struct delayed_work schedule;
326 struct mii_if_info mii;
327 u32 msg_enable;
328 u16 ocp_base;
329 u8 version;
330 u8 speed;
331};
332
333enum rtl_version {
334 RTL_VER_UNKNOWN = 0,
335 RTL_VER_01,
336 RTL_VER_02
337};
338
339/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
340 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
341 */
342static const int multicast_filter_limit = 32;
343
344static
345int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
346{
31787f53 347 int ret;
348 void *tmp;
349
350 tmp = kmalloc(size, GFP_KERNEL);
351 if (!tmp)
352 return -ENOMEM;
353
354 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
ac718b69 355 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
31787f53 356 value, index, tmp, size, 500);
357
358 memcpy(data, tmp, size);
359 kfree(tmp);
360
361 return ret;
ac718b69 362}
363
364static
365int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
366{
31787f53 367 int ret;
368 void *tmp;
369
370 tmp = kmalloc(size, GFP_KERNEL);
371 if (!tmp)
372 return -ENOMEM;
373
374 memcpy(tmp, data, size);
375
376 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
ac718b69 377 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
31787f53 378 value, index, tmp, size, 500);
379
380 kfree(tmp);
381 return ret;
ac718b69 382}
383
384static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
385 void *data, u16 type)
386{
387 u16 limit = 64;
388 int ret = 0;
389
390 if (test_bit(RTL8152_UNPLUG, &tp->flags))
391 return -ENODEV;
392
393 /* both size and indix must be 4 bytes align */
394 if ((size & 3) || !size || (index & 3) || !data)
395 return -EPERM;
396
397 if ((u32)index + (u32)size > 0xffff)
398 return -EPERM;
399
400 while (size) {
401 if (size > limit) {
402 ret = get_registers(tp, index, type, limit, data);
403 if (ret < 0)
404 break;
405
406 index += limit;
407 data += limit;
408 size -= limit;
409 } else {
410 ret = get_registers(tp, index, type, size, data);
411 if (ret < 0)
412 break;
413
414 index += size;
415 data += size;
416 size = 0;
417 break;
418 }
419 }
420
421 return ret;
422}
423
424static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
425 u16 size, void *data, u16 type)
426{
427 int ret;
428 u16 byteen_start, byteen_end, byen;
429 u16 limit = 512;
430
431 if (test_bit(RTL8152_UNPLUG, &tp->flags))
432 return -ENODEV;
433
434 /* both size and indix must be 4 bytes align */
435 if ((size & 3) || !size || (index & 3) || !data)
436 return -EPERM;
437
438 if ((u32)index + (u32)size > 0xffff)
439 return -EPERM;
440
441 byteen_start = byteen & BYTE_EN_START_MASK;
442 byteen_end = byteen & BYTE_EN_END_MASK;
443
444 byen = byteen_start | (byteen_start << 4);
445 ret = set_registers(tp, index, type | byen, 4, data);
446 if (ret < 0)
447 goto error1;
448
449 index += 4;
450 data += 4;
451 size -= 4;
452
453 if (size) {
454 size -= 4;
455
456 while (size) {
457 if (size > limit) {
458 ret = set_registers(tp, index,
459 type | BYTE_EN_DWORD,
460 limit, data);
461 if (ret < 0)
462 goto error1;
463
464 index += limit;
465 data += limit;
466 size -= limit;
467 } else {
468 ret = set_registers(tp, index,
469 type | BYTE_EN_DWORD,
470 size, data);
471 if (ret < 0)
472 goto error1;
473
474 index += size;
475 data += size;
476 size = 0;
477 break;
478 }
479 }
480
481 byen = byteen_end | (byteen_end >> 4);
482 ret = set_registers(tp, index, type | byen, 4, data);
483 if (ret < 0)
484 goto error1;
485 }
486
487error1:
488 return ret;
489}
490
491static inline
492int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
493{
494 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
495}
496
497static inline
498int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
499{
500 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
501}
502
503static inline
504int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
505{
506 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
507}
508
509static inline
510int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
511{
512 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
513}
514
515static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
516{
517 u32 data;
518
519 if (type == MCU_TYPE_PLA)
520 pla_ocp_read(tp, index, sizeof(data), &data);
521 else
522 usb_ocp_read(tp, index, sizeof(data), &data);
523
524 return __le32_to_cpu(data);
525}
526
527static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
528{
529 if (type == MCU_TYPE_PLA)
530 pla_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(data), &data);
531 else
532 usb_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(data), &data);
533}
534
535static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
536{
537 u32 data;
538 u8 shift = index & 2;
539
540 index &= ~3;
541
542 if (type == MCU_TYPE_PLA)
543 pla_ocp_read(tp, index, sizeof(data), &data);
544 else
545 usb_ocp_read(tp, index, sizeof(data), &data);
546
547 data = __le32_to_cpu(data);
548 data >>= (shift * 8);
549 data &= 0xffff;
550
551 return (u16)data;
552}
553
554static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
555{
556 u32 tmp, mask = 0xffff;
557 u16 byen = BYTE_EN_WORD;
558 u8 shift = index & 2;
559
560 data &= mask;
561
562 if (index & 2) {
563 byen <<= shift;
564 mask <<= (shift * 8);
565 data <<= (shift * 8);
566 index &= ~3;
567 }
568
569 if (type == MCU_TYPE_PLA)
570 pla_ocp_read(tp, index, sizeof(tmp), &tmp);
571 else
572 usb_ocp_read(tp, index, sizeof(tmp), &tmp);
573
574 tmp = __le32_to_cpu(tmp) & ~mask;
575 tmp |= data;
576 tmp = __cpu_to_le32(tmp);
577
578 if (type == MCU_TYPE_PLA)
579 pla_ocp_write(tp, index, byen, sizeof(tmp), &tmp);
580 else
581 usb_ocp_write(tp, index, byen, sizeof(tmp), &tmp);
582}
583
584static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
585{
586 u32 data;
587 u8 shift = index & 3;
588
589 index &= ~3;
590
591 if (type == MCU_TYPE_PLA)
592 pla_ocp_read(tp, index, sizeof(data), &data);
593 else
594 usb_ocp_read(tp, index, sizeof(data), &data);
595
596 data = __le32_to_cpu(data);
597 data >>= (shift * 8);
598 data &= 0xff;
599
600 return (u8)data;
601}
602
603static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
604{
605 u32 tmp, mask = 0xff;
606 u16 byen = BYTE_EN_BYTE;
607 u8 shift = index & 3;
608
609 data &= mask;
610
611 if (index & 3) {
612 byen <<= shift;
613 mask <<= (shift * 8);
614 data <<= (shift * 8);
615 index &= ~3;
616 }
617
618 if (type == MCU_TYPE_PLA)
619 pla_ocp_read(tp, index, sizeof(tmp), &tmp);
620 else
621 usb_ocp_read(tp, index, sizeof(tmp), &tmp);
622
623 tmp = __le32_to_cpu(tmp) & ~mask;
624 tmp |= data;
625 tmp = __cpu_to_le32(tmp);
626
627 if (type == MCU_TYPE_PLA)
628 pla_ocp_write(tp, index, byen, sizeof(tmp), &tmp);
629 else
630 usb_ocp_write(tp, index, byen, sizeof(tmp), &tmp);
631}
632
633static void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
634{
635 u32 ocp_data;
636 int i;
637
638 ocp_data = PHYAR_FLAG | ((reg_addr & 0x1f) << 16) |
639 (value & 0xffff);
640
641 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data);
642
643 for (i = 20; i > 0; i--) {
644 udelay(25);
645 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR);
646 if (!(ocp_data & PHYAR_FLAG))
647 break;
648 }
649 udelay(20);
650}
651
652static int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
653{
654 u32 ocp_data;
655 int i;
656
657 ocp_data = (reg_addr & 0x1f) << 16;
658 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data);
659
660 for (i = 20; i > 0; i--) {
661 udelay(25);
662 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR);
663 if (ocp_data & PHYAR_FLAG)
664 break;
665 }
666 udelay(20);
667
668 if (!(ocp_data & PHYAR_FLAG))
669 return -EAGAIN;
670
671 return (u16)(ocp_data & 0xffff);
672}
673
674static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
675{
676 struct r8152 *tp = netdev_priv(netdev);
677
678 if (phy_id != R8152_PHY_ID)
679 return -EINVAL;
680
681 return r8152_mdio_read(tp, reg);
682}
683
684static
685void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
686{
687 struct r8152 *tp = netdev_priv(netdev);
688
689 if (phy_id != R8152_PHY_ID)
690 return;
691
692 r8152_mdio_write(tp, reg, val);
693}
694
695static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
696{
697 u16 ocp_base, ocp_index;
698
699 ocp_base = addr & 0xf000;
700 if (ocp_base != tp->ocp_base) {
701 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
702 tp->ocp_base = ocp_base;
703 }
704
705 ocp_index = (addr & 0x0fff) | 0xb000;
706 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
707}
708
709static inline void set_ethernet_addr(struct r8152 *tp)
710{
711 struct net_device *dev = tp->netdev;
31787f53 712 u8 node_id[8] = {0};
ac718b69 713
31787f53 714 if (pla_ocp_read(tp, PLA_IDR, sizeof(node_id), node_id) < 0)
ac718b69 715 netif_notice(tp, probe, dev, "inet addr fail\n");
716 else {
717 memcpy(dev->dev_addr, node_id, dev->addr_len);
718 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
719 }
ac718b69 720}
721
722static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
723{
724 struct r8152 *tp = netdev_priv(netdev);
725 struct sockaddr *addr = p;
726
727 if (!is_valid_ether_addr(addr->sa_data))
728 return -EADDRNOTAVAIL;
729
730 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
731
732 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
733 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
734 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
735
736 return 0;
737}
738
739static int alloc_all_urbs(struct r8152 *tp)
740{
741 tp->rx_urb = usb_alloc_urb(0, GFP_KERNEL);
742 if (!tp->rx_urb)
743 return 0;
744 tp->tx_urb = usb_alloc_urb(0, GFP_KERNEL);
745 if (!tp->tx_urb) {
746 usb_free_urb(tp->rx_urb);
747 return 0;
748 }
749
750 return 1;
751}
752
753static void free_all_urbs(struct r8152 *tp)
754{
755 usb_free_urb(tp->rx_urb);
756 usb_free_urb(tp->tx_urb);
757}
758
759static struct net_device_stats *rtl8152_get_stats(struct net_device *dev)
760{
761 return &dev->stats;
762}
763
764static void read_bulk_callback(struct urb *urb)
765{
766 struct r8152 *tp;
767 unsigned pkt_len;
768 struct sk_buff *skb;
769 struct net_device *netdev;
770 struct net_device_stats *stats;
771 int status = urb->status;
772 int result;
773 struct rx_desc *rx_desc;
774
775 tp = urb->context;
776 if (!tp)
777 return;
778 if (test_bit(RTL8152_UNPLUG, &tp->flags))
779 return;
780 netdev = tp->netdev;
781 if (!netif_device_present(netdev))
782 return;
783
784 stats = rtl8152_get_stats(netdev);
785 switch (status) {
786 case 0:
787 break;
788 case -ESHUTDOWN:
789 set_bit(RTL8152_UNPLUG, &tp->flags);
790 netif_device_detach(tp->netdev);
791 case -ENOENT:
792 return; /* the urb is in unlink state */
793 case -ETIME:
794 pr_warn_ratelimited("may be reset is needed?..\n");
795 goto goon;
796 default:
797 pr_warn_ratelimited("Rx status %d\n", status);
798 goto goon;
799 }
800
801 /* protect against short packets (tell me why we got some?!?) */
802 if (urb->actual_length < sizeof(*rx_desc))
803 goto goon;
804
805
806 rx_desc = (struct rx_desc *)urb->transfer_buffer;
807 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
808 if (urb->actual_length < sizeof(struct rx_desc) + pkt_len)
809 goto goon;
810
811 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
812 if (!skb)
813 goto goon;
814
815 memcpy(skb->data, tp->rx_skb->data + sizeof(struct rx_desc), pkt_len);
816 skb_put(skb, pkt_len);
817 skb->protocol = eth_type_trans(skb, netdev);
818 netif_rx(skb);
819 stats->rx_packets++;
820 stats->rx_bytes += pkt_len;
821goon:
822 usb_fill_bulk_urb(tp->rx_urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
823 tp->rx_skb->data, RTL8152_RMS + sizeof(struct rx_desc),
824 (usb_complete_t)read_bulk_callback, tp);
825 result = usb_submit_urb(tp->rx_urb, GFP_ATOMIC);
826 if (result == -ENODEV) {
827 netif_device_detach(tp->netdev);
828 } else if (result) {
829 set_bit(RX_URB_FAIL, &tp->flags);
830 goto resched;
831 } else {
832 clear_bit(RX_URB_FAIL, &tp->flags);
833 }
834
835 return;
836resched:
837 tasklet_schedule(&tp->tl);
838}
839
840static void rx_fixup(unsigned long data)
841{
842 struct r8152 *tp;
843 int status;
844
845 tp = (struct r8152 *)data;
846 if (!test_bit(WORK_ENABLE, &tp->flags))
847 return;
848
849 status = usb_submit_urb(tp->rx_urb, GFP_ATOMIC);
850 if (status == -ENODEV) {
851 netif_device_detach(tp->netdev);
852 } else if (status) {
853 set_bit(RX_URB_FAIL, &tp->flags);
854 goto tlsched;
855 } else {
856 clear_bit(RX_URB_FAIL, &tp->flags);
857 }
858
859 return;
860tlsched:
861 tasklet_schedule(&tp->tl);
862}
863
864static void write_bulk_callback(struct urb *urb)
865{
866 struct r8152 *tp;
867 int status = urb->status;
868
869 tp = urb->context;
870 if (!tp)
871 return;
872 dev_kfree_skb_irq(tp->tx_skb);
873 if (!netif_device_present(tp->netdev))
874 return;
875 if (status)
876 dev_info(&urb->dev->dev, "%s: Tx status %d\n",
877 tp->netdev->name, status);
878 tp->netdev->trans_start = jiffies;
879 netif_wake_queue(tp->netdev);
880}
881
882static void rtl8152_tx_timeout(struct net_device *netdev)
883{
884 struct r8152 *tp = netdev_priv(netdev);
885 struct net_device_stats *stats = rtl8152_get_stats(netdev);
886 netif_warn(tp, tx_err, netdev, "Tx timeout.\n");
887 usb_unlink_urb(tp->tx_urb);
888 stats->tx_errors++;
889}
890
891static void rtl8152_set_rx_mode(struct net_device *netdev)
892{
893 struct r8152 *tp = netdev_priv(netdev);
894
895 if (tp->speed & LINK_STATUS)
896 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
897}
898
899static void _rtl8152_set_rx_mode(struct net_device *netdev)
900{
901 struct r8152 *tp = netdev_priv(netdev);
31787f53 902 u32 mc_filter[2]; /* Multicast hash filter */
903 __le32 tmp[2];
ac718b69 904 u32 ocp_data;
905
ac718b69 906 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
907 netif_stop_queue(netdev);
908 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
909 ocp_data &= ~RCR_ACPT_ALL;
910 ocp_data |= RCR_AB | RCR_APM;
911
912 if (netdev->flags & IFF_PROMISC) {
913 /* Unconditionally log net taps. */
914 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
915 ocp_data |= RCR_AM | RCR_AAP;
916 mc_filter[1] = mc_filter[0] = 0xffffffff;
917 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
918 (netdev->flags & IFF_ALLMULTI)) {
919 /* Too many to filter perfectly -- accept all multicasts. */
920 ocp_data |= RCR_AM;
921 mc_filter[1] = mc_filter[0] = 0xffffffff;
922 } else {
923 struct netdev_hw_addr *ha;
924
925 mc_filter[1] = mc_filter[0] = 0;
926 netdev_for_each_mc_addr(ha, netdev) {
927 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
928 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
929 ocp_data |= RCR_AM;
930 }
931 }
932
31787f53 933 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
934 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
ac718b69 935
31787f53 936 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
ac718b69 937 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
938 netif_wake_queue(netdev);
ac718b69 939}
940
941static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
942 struct net_device *netdev)
943{
944 struct r8152 *tp = netdev_priv(netdev);
945 struct net_device_stats *stats = rtl8152_get_stats(netdev);
946 struct tx_desc *tx_desc;
3ff25e3c 947 unsigned int len;
948 int res;
ac718b69 949
950 netif_stop_queue(netdev);
951 len = skb->len;
952 if (skb_header_cloned(skb) || skb_headroom(skb) < sizeof(*tx_desc)) {
953 struct sk_buff *tx_skb;
954
955 tx_skb = skb_copy_expand(skb, sizeof(*tx_desc), 0, GFP_ATOMIC);
956 dev_kfree_skb_any(skb);
957 if (!tx_skb) {
958 stats->tx_dropped++;
959 netif_wake_queue(netdev);
960 return NETDEV_TX_OK;
961 }
962 skb = tx_skb;
963 }
964 tx_desc = (struct tx_desc *)skb_push(skb, sizeof(*tx_desc));
965 memset(tx_desc, 0, sizeof(*tx_desc));
966 tx_desc->opts1 = cpu_to_le32((len & TX_LEN_MASK) | TX_FS | TX_LS);
967 tp->tx_skb = skb;
968 skb_tx_timestamp(skb);
969 usb_fill_bulk_urb(tp->tx_urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
970 skb->data, skb->len,
971 (usb_complete_t)write_bulk_callback, tp);
972 res = usb_submit_urb(tp->tx_urb, GFP_ATOMIC);
973 if (res) {
974 /* Can we get/handle EPIPE here? */
975 if (res == -ENODEV) {
976 netif_device_detach(tp->netdev);
977 } else {
978 netif_warn(tp, tx_err, netdev,
979 "failed tx_urb %d\n", res);
980 stats->tx_errors++;
981 netif_start_queue(netdev);
982 }
983 } else {
984 stats->tx_packets++;
985 stats->tx_bytes += skb->len;
986 }
987
988 return NETDEV_TX_OK;
989}
990
991static void r8152b_reset_packet_filter(struct r8152 *tp)
992{
993 u32 ocp_data;
994
995 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
996 ocp_data &= ~FMC_FCR_MCU_EN;
997 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
998 ocp_data |= FMC_FCR_MCU_EN;
999 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1000}
1001
1002static void rtl8152_nic_reset(struct r8152 *tp)
1003{
1004 int i;
1005
1006 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1007
1008 for (i = 0; i < 1000; i++) {
1009 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1010 break;
1011 udelay(100);
1012 }
1013}
1014
1015static inline u8 rtl8152_get_speed(struct r8152 *tp)
1016{
1017 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1018}
1019
1020static int rtl8152_enable(struct r8152 *tp)
1021{
1022 u32 ocp_data;
1023 u8 speed;
1024
1025 speed = rtl8152_get_speed(tp);
1026 if (speed & _100bps) {
1027 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1028 ocp_data &= ~EEEP_CR_EEEP_TX;
1029 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1030 } else {
1031 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1032 ocp_data |= EEEP_CR_EEEP_TX;
1033 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1034 }
1035
1036 r8152b_reset_packet_filter(tp);
1037
1038 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
1039 ocp_data |= CR_RE | CR_TE;
1040 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
1041
1042 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1043 ocp_data &= ~RXDY_GATED_EN;
1044 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1045
1046 usb_fill_bulk_urb(tp->rx_urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1047 tp->rx_skb->data, RTL8152_RMS + sizeof(struct rx_desc),
1048 (usb_complete_t)read_bulk_callback, tp);
1049
1050 return usb_submit_urb(tp->rx_urb, GFP_KERNEL);
1051}
1052
1053static void rtl8152_disable(struct r8152 *tp)
1054{
1055 u32 ocp_data;
1056 int i;
1057
1058 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1059 ocp_data &= ~RCR_ACPT_ALL;
1060 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1061
1062 usb_kill_urb(tp->tx_urb);
1063
1064 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1065 ocp_data |= RXDY_GATED_EN;
1066 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1067
1068 for (i = 0; i < 1000; i++) {
1069 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1070 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
1071 break;
1072 mdelay(1);
1073 }
1074
1075 for (i = 0; i < 1000; i++) {
1076 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
1077 break;
1078 mdelay(1);
1079 }
1080
1081 usb_kill_urb(tp->rx_urb);
1082
1083 rtl8152_nic_reset(tp);
1084}
1085
1086static void r8152b_exit_oob(struct r8152 *tp)
1087{
1088 u32 ocp_data;
1089 int i;
1090
1091 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1092 ocp_data &= ~RCR_ACPT_ALL;
1093 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1094
1095 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1096 ocp_data |= RXDY_GATED_EN;
1097 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1098
1099 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1100 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
1101
1102 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1103 ocp_data &= ~NOW_IS_OOB;
1104 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1105
1106 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1107 ocp_data &= ~MCU_BORW_EN;
1108 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1109
1110 for (i = 0; i < 1000; i++) {
1111 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1112 if (ocp_data & LINK_LIST_READY)
1113 break;
1114 mdelay(1);
1115 }
1116
1117 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1118 ocp_data |= RE_INIT_LL;
1119 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1120
1121 for (i = 0; i < 1000; i++) {
1122 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1123 if (ocp_data & LINK_LIST_READY)
1124 break;
1125 mdelay(1);
1126 }
1127
1128 rtl8152_nic_reset(tp);
1129
1130 /* rx share fifo credit full threshold */
1131 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
1132
1133 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_DEV_STAT);
1134 ocp_data &= STAT_SPEED_MASK;
1135 if (ocp_data == STAT_SPEED_FULL) {
1136 /* rx share fifo credit near full threshold */
1137 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
1138 RXFIFO_THR2_FULL);
1139 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
1140 RXFIFO_THR3_FULL);
1141 } else {
1142 /* rx share fifo credit near full threshold */
1143 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
1144 RXFIFO_THR2_HIGH);
1145 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
1146 RXFIFO_THR3_HIGH);
1147 }
1148
1149 /* TX share fifo free credit full threshold */
1150 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
1151
1152 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
1153 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_BUF_THR);
1154 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
1155 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
1156
1157 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
1158 ocp_data &= ~CPCR_RX_VLAN;
1159 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
1160
1161 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
1162
1163 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
1164 ocp_data |= TCR0_AUTO_FIFO;
1165 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
1166}
1167
1168static void r8152b_enter_oob(struct r8152 *tp)
1169{
1170 u32 ocp_data;
1171 int i;
1172
1173 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1174 ocp_data &= ~NOW_IS_OOB;
1175 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1176
1177 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
1178 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
1179 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
1180
1181 rtl8152_disable(tp);
1182
1183 for (i = 0; i < 1000; i++) {
1184 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1185 if (ocp_data & LINK_LIST_READY)
1186 break;
1187 mdelay(1);
1188 }
1189
1190 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1191 ocp_data |= RE_INIT_LL;
1192 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1193
1194 for (i = 0; i < 1000; i++) {
1195 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1196 if (ocp_data & LINK_LIST_READY)
1197 break;
1198 mdelay(1);
1199 }
1200
1201 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
1202
1203 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
1204 ocp_data |= MAGIC_EN;
1205 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
1206
1207 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
1208 ocp_data |= CPCR_RX_VLAN;
1209 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
1210
1211 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
1212 ocp_data |= ALDPS_PROXY_MODE;
1213 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
1214
1215 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1216 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
1217 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1218
1219 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5, LAN_WAKE_EN);
1220
1221 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1222 ocp_data &= ~RXDY_GATED_EN;
1223 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1224
1225 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1226 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
1227 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1228}
1229
1230static void r8152b_disable_aldps(struct r8152 *tp)
1231{
1232 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
1233 msleep(20);
1234}
1235
1236static inline void r8152b_enable_aldps(struct r8152 *tp)
1237{
1238 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
1239 LINKENA | DIS_SDSAVE);
1240}
1241
1242static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
1243{
1244 u16 bmcr, anar;
1245 int ret = 0;
1246
1247 cancel_delayed_work_sync(&tp->schedule);
1248 anar = r8152_mdio_read(tp, MII_ADVERTISE);
1249 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
1250 ADVERTISE_100HALF | ADVERTISE_100FULL);
1251
1252 if (autoneg == AUTONEG_DISABLE) {
1253 if (speed == SPEED_10) {
1254 bmcr = 0;
1255 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1256 } else if (speed == SPEED_100) {
1257 bmcr = BMCR_SPEED100;
1258 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
1259 } else {
1260 ret = -EINVAL;
1261 goto out;
1262 }
1263
1264 if (duplex == DUPLEX_FULL)
1265 bmcr |= BMCR_FULLDPLX;
1266 } else {
1267 if (speed == SPEED_10) {
1268 if (duplex == DUPLEX_FULL)
1269 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1270 else
1271 anar |= ADVERTISE_10HALF;
1272 } else if (speed == SPEED_100) {
1273 if (duplex == DUPLEX_FULL) {
1274 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1275 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
1276 } else {
1277 anar |= ADVERTISE_10HALF;
1278 anar |= ADVERTISE_100HALF;
1279 }
1280 } else {
1281 ret = -EINVAL;
1282 goto out;
1283 }
1284
1285 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
1286 }
1287
1288 r8152_mdio_write(tp, MII_ADVERTISE, anar);
1289 r8152_mdio_write(tp, MII_BMCR, bmcr);
1290
1291out:
1292 schedule_delayed_work(&tp->schedule, 5 * HZ);
1293
1294 return ret;
1295}
1296
1297static void rtl8152_down(struct r8152 *tp)
1298{
1299 u32 ocp_data;
1300
1301 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
1302 ocp_data &= ~POWER_CUT;
1303 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
1304
1305 r8152b_disable_aldps(tp);
1306 r8152b_enter_oob(tp);
1307 r8152b_enable_aldps(tp);
1308}
1309
1310static void set_carrier(struct r8152 *tp)
1311{
1312 struct net_device *netdev = tp->netdev;
1313 u8 speed;
1314
1315 speed = rtl8152_get_speed(tp);
1316
1317 if (speed & LINK_STATUS) {
1318 if (!(tp->speed & LINK_STATUS)) {
1319 rtl8152_enable(tp);
1320 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1321 netif_carrier_on(netdev);
1322 }
1323 } else {
1324 if (tp->speed & LINK_STATUS) {
1325 netif_carrier_off(netdev);
1326 rtl8152_disable(tp);
1327 }
1328 }
1329 tp->speed = speed;
1330}
1331
1332static void rtl_work_func_t(struct work_struct *work)
1333{
1334 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
1335
1336 if (!test_bit(WORK_ENABLE, &tp->flags))
1337 goto out1;
1338
1339 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1340 goto out1;
1341
1342 set_carrier(tp);
1343
1344 if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
1345 _rtl8152_set_rx_mode(tp->netdev);
1346
1347 schedule_delayed_work(&tp->schedule, HZ);
1348
1349out1:
1350 return;
1351}
1352
1353static int rtl8152_open(struct net_device *netdev)
1354{
1355 struct r8152 *tp = netdev_priv(netdev);
1356 int res = 0;
1357
1358 tp->speed = rtl8152_get_speed(tp);
1359 if (tp->speed & LINK_STATUS) {
1360 res = rtl8152_enable(tp);
1361 if (res) {
1362 if (res == -ENODEV)
1363 netif_device_detach(tp->netdev);
1364
1365 netif_err(tp, ifup, netdev,
1366 "rtl8152_open failed: %d\n", res);
1367 return res;
1368 }
1369
1370 netif_carrier_on(netdev);
1371 } else {
1372 netif_stop_queue(netdev);
1373 netif_carrier_off(netdev);
1374 }
1375
1376 rtl8152_set_speed(tp, AUTONEG_ENABLE, SPEED_100, DUPLEX_FULL);
1377 netif_start_queue(netdev);
1378 set_bit(WORK_ENABLE, &tp->flags);
1379 schedule_delayed_work(&tp->schedule, 0);
1380
1381 return res;
1382}
1383
1384static int rtl8152_close(struct net_device *netdev)
1385{
1386 struct r8152 *tp = netdev_priv(netdev);
1387 int res = 0;
1388
1389 clear_bit(WORK_ENABLE, &tp->flags);
1390 cancel_delayed_work_sync(&tp->schedule);
1391 netif_stop_queue(netdev);
1392 rtl8152_disable(tp);
1393
1394 return res;
1395}
1396
1397static void rtl_clear_bp(struct r8152 *tp)
1398{
1399 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_0, 0);
1400 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_2, 0);
1401 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_4, 0);
1402 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_6, 0);
1403 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_0, 0);
1404 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_2, 0);
1405 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_4, 0);
1406 ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_6, 0);
1407 mdelay(3);
1408 ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_BA, 0);
1409 ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0);
1410}
1411
1412static void r8152b_enable_eee(struct r8152 *tp)
1413{
1414 u32 ocp_data;
1415
1416 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
1417 ocp_data |= EEE_RX_EN | EEE_TX_EN;
1418 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
1419 ocp_reg_write(tp, OCP_EEE_CONFIG1, RG_TXLPI_MSK_HFDUP | RG_MATCLR_EN |
1420 EEE_10_CAP | EEE_NWAY_EN |
1421 TX_QUIET_EN | RX_QUIET_EN |
1422 SDRISETIME | RG_RXLPI_MSK_HFDUP |
1423 SDFALLTIME);
1424 ocp_reg_write(tp, OCP_EEE_CONFIG2, RG_LPIHYS_NUM | RG_DACQUIET_EN |
1425 RG_LDVQUIET_EN | RG_CKRSEL |
1426 RG_EEEPRG_EN);
1427 ocp_reg_write(tp, OCP_EEE_CONFIG3, FST_SNR_EYE_R | RG_LFS_SEL | MSK_PH);
1428 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | DEVICE_ADDR);
1429 ocp_reg_write(tp, OCP_EEE_DATA, EEE_ADDR);
1430 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | DEVICE_ADDR);
1431 ocp_reg_write(tp, OCP_EEE_DATA, EEE_DATA);
1432 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
1433}
1434
1435static void r8152b_enable_fc(struct r8152 *tp)
1436{
1437 u16 anar;
1438
1439 anar = r8152_mdio_read(tp, MII_ADVERTISE);
1440 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1441 r8152_mdio_write(tp, MII_ADVERTISE, anar);
1442}
1443
1444static void r8152b_hw_phy_cfg(struct r8152 *tp)
1445{
1446 r8152_mdio_write(tp, MII_BMCR, BMCR_ANENABLE);
1447 r8152b_disable_aldps(tp);
1448}
1449
1450static void r8152b_init(struct r8152 *tp)
1451{
1452 u32 ocp_data;
1453 int i;
1454
1455 rtl_clear_bp(tp);
1456
1457 if (tp->version == RTL_VER_01) {
1458 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
1459 ocp_data &= ~LED_MODE_MASK;
1460 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
1461 }
1462
1463 r8152b_hw_phy_cfg(tp);
1464
1465 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
1466 ocp_data &= ~POWER_CUT;
1467 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
1468
1469 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
1470 ocp_data &= ~RWSUME_INDICATE;
1471 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
1472
1473 r8152b_exit_oob(tp);
1474
1475 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
1476 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
1477 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
1478 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
1479 ocp_data &= ~MCU_CLK_RATIO_MASK;
1480 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
1481 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
1482 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
1483 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
1484 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
1485
1486 r8152b_enable_eee(tp);
1487 r8152b_enable_aldps(tp);
1488 r8152b_enable_fc(tp);
1489
1490 r8152_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE |
1491 BMCR_ANRESTART);
1492 for (i = 0; i < 100; i++) {
1493 udelay(100);
1494 if (!(r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET))
1495 break;
1496 }
1497
1498 /* disable rx aggregation */
1499 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
1500 ocp_data |= RX_AGG_DISABLE;
1501 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
1502}
1503
1504static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
1505{
1506 struct r8152 *tp = usb_get_intfdata(intf);
1507
1508 netif_device_detach(tp->netdev);
1509
1510 if (netif_running(tp->netdev)) {
1511 clear_bit(WORK_ENABLE, &tp->flags);
1512 cancel_delayed_work_sync(&tp->schedule);
1513 }
1514
1515 rtl8152_down(tp);
1516
1517 return 0;
1518}
1519
1520static int rtl8152_resume(struct usb_interface *intf)
1521{
1522 struct r8152 *tp = usb_get_intfdata(intf);
1523
1524 r8152b_init(tp);
1525 netif_device_attach(tp->netdev);
1526 if (netif_running(tp->netdev)) {
1527 rtl8152_enable(tp);
1528 set_bit(WORK_ENABLE, &tp->flags);
1529 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1530 schedule_delayed_work(&tp->schedule, 0);
1531 }
1532
1533 return 0;
1534}
1535
1536static void rtl8152_get_drvinfo(struct net_device *netdev,
1537 struct ethtool_drvinfo *info)
1538{
1539 struct r8152 *tp = netdev_priv(netdev);
1540
1541 strncpy(info->driver, MODULENAME, ETHTOOL_BUSINFO_LEN);
1542 strncpy(info->version, DRIVER_VERSION, ETHTOOL_BUSINFO_LEN);
1543 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
1544}
1545
1546static
1547int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
1548{
1549 struct r8152 *tp = netdev_priv(netdev);
1550
1551 if (!tp->mii.mdio_read)
1552 return -EOPNOTSUPP;
1553
1554 return mii_ethtool_gset(&tp->mii, cmd);
1555}
1556
1557static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1558{
1559 struct r8152 *tp = netdev_priv(dev);
1560
1561 return rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
1562}
1563
1564static struct ethtool_ops ops = {
1565 .get_drvinfo = rtl8152_get_drvinfo,
1566 .get_settings = rtl8152_get_settings,
1567 .set_settings = rtl8152_set_settings,
1568 .get_link = ethtool_op_get_link,
1569};
1570
1571static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1572{
1573 struct r8152 *tp = netdev_priv(netdev);
1574 struct mii_ioctl_data *data = if_mii(rq);
1575 int res = 0;
1576
1577 switch (cmd) {
1578 case SIOCGMIIPHY:
1579 data->phy_id = R8152_PHY_ID; /* Internal PHY */
1580 break;
1581
1582 case SIOCGMIIREG:
1583 data->val_out = r8152_mdio_read(tp, data->reg_num);
1584 break;
1585
1586 case SIOCSMIIREG:
1587 if (!capable(CAP_NET_ADMIN)) {
1588 res = -EPERM;
1589 break;
1590 }
1591 r8152_mdio_write(tp, data->reg_num, data->val_in);
1592 break;
1593
1594 default:
1595 res = -EOPNOTSUPP;
1596 }
1597
1598 return res;
1599}
1600
1601static const struct net_device_ops rtl8152_netdev_ops = {
1602 .ndo_open = rtl8152_open,
1603 .ndo_stop = rtl8152_close,
1604 .ndo_do_ioctl = rtl8152_ioctl,
1605 .ndo_start_xmit = rtl8152_start_xmit,
1606 .ndo_tx_timeout = rtl8152_tx_timeout,
1607 .ndo_set_rx_mode = rtl8152_set_rx_mode,
1608 .ndo_set_mac_address = rtl8152_set_mac_address,
1609
1610 .ndo_change_mtu = eth_change_mtu,
1611 .ndo_validate_addr = eth_validate_addr,
1612};
1613
1614static void r8152b_get_version(struct r8152 *tp)
1615{
1616 u32 ocp_data;
1617 u16 version;
1618
1619 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
1620 version = (u16)(ocp_data & VERSION_MASK);
1621
1622 switch (version) {
1623 case 0x4c00:
1624 tp->version = RTL_VER_01;
1625 break;
1626 case 0x4c10:
1627 tp->version = RTL_VER_02;
1628 break;
1629 default:
1630 netif_info(tp, probe, tp->netdev,
1631 "Unknown version 0x%04x\n", version);
1632 break;
1633 }
1634}
1635
1636static int rtl8152_probe(struct usb_interface *intf,
1637 const struct usb_device_id *id)
1638{
1639 struct usb_device *udev = interface_to_usbdev(intf);
1640 struct r8152 *tp;
1641 struct net_device *netdev;
1642
1643 if (udev->actconfig->desc.bConfigurationValue != 1) {
1644 usb_driver_set_configuration(udev, 1);
1645 return -ENODEV;
1646 }
1647
1648 netdev = alloc_etherdev(sizeof(struct r8152));
1649 if (!netdev) {
1650 dev_err(&intf->dev, "Out of memory");
1651 return -ENOMEM;
1652 }
1653
1654 tp = netdev_priv(netdev);
1655 tp->msg_enable = 0x7FFF;
1656
1657 tasklet_init(&tp->tl, rx_fixup, (unsigned long)tp);
1658 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
1659
1660 tp->udev = udev;
1661 tp->netdev = netdev;
1662 netdev->netdev_ops = &rtl8152_netdev_ops;
1663 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
1664 netdev->features &= ~NETIF_F_IP_CSUM;
1665 SET_ETHTOOL_OPS(netdev, &ops);
1666 tp->speed = 0;
1667
1668 tp->mii.dev = netdev;
1669 tp->mii.mdio_read = read_mii_word;
1670 tp->mii.mdio_write = write_mii_word;
1671 tp->mii.phy_id_mask = 0x3f;
1672 tp->mii.reg_num_mask = 0x1f;
1673 tp->mii.phy_id = R8152_PHY_ID;
1674 tp->mii.supports_gmii = 0;
1675
1676 r8152b_get_version(tp);
1677 r8152b_init(tp);
1678 set_ethernet_addr(tp);
1679
1680 if (!alloc_all_urbs(tp)) {
1681 netif_err(tp, probe, netdev, "out of memory");
1682 goto out;
1683 }
1684
1685 tp->rx_skb = netdev_alloc_skb(netdev,
1686 RTL8152_RMS + sizeof(struct rx_desc));
1687 if (!tp->rx_skb)
1688 goto out1;
1689
1690 usb_set_intfdata(intf, tp);
1691 SET_NETDEV_DEV(netdev, &intf->dev);
1692
1693
1694 if (register_netdev(netdev) != 0) {
1695 netif_err(tp, probe, netdev, "couldn't register the device");
1696 goto out2;
1697 }
1698
1699 netif_info(tp, probe, netdev, "%s", DRIVER_VERSION);
1700
1701 return 0;
1702
1703out2:
1704 usb_set_intfdata(intf, NULL);
1705 dev_kfree_skb(tp->rx_skb);
1706out1:
1707 free_all_urbs(tp);
1708out:
1709 free_netdev(netdev);
1710 return -EIO;
1711}
1712
1713static void rtl8152_unload(struct r8152 *tp)
1714{
1715 u32 ocp_data;
1716
1717 if (tp->version != RTL_VER_01) {
1718 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
1719 ocp_data |= POWER_CUT;
1720 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
1721 }
1722
1723 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
1724 ocp_data &= ~RWSUME_INDICATE;
1725 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
1726}
1727
1728static void rtl8152_disconnect(struct usb_interface *intf)
1729{
1730 struct r8152 *tp = usb_get_intfdata(intf);
1731
1732 usb_set_intfdata(intf, NULL);
1733 if (tp) {
1734 set_bit(RTL8152_UNPLUG, &tp->flags);
1735 tasklet_kill(&tp->tl);
1736 unregister_netdev(tp->netdev);
1737 rtl8152_unload(tp);
1738 free_all_urbs(tp);
1739 if (tp->rx_skb)
1740 dev_kfree_skb(tp->rx_skb);
1741 free_netdev(tp->netdev);
1742 }
1743}
1744
1745/* table of devices that work with this driver */
1746static struct usb_device_id rtl8152_table[] = {
1747 {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)},
1748 {}
1749};
1750
1751MODULE_DEVICE_TABLE(usb, rtl8152_table);
1752
1753static struct usb_driver rtl8152_driver = {
1754 .name = MODULENAME,
1755 .probe = rtl8152_probe,
1756 .disconnect = rtl8152_disconnect,
1757 .id_table = rtl8152_table,
1758 .suspend = rtl8152_suspend,
1759 .resume = rtl8152_resume
1760};
1761
b4236daa 1762module_usb_driver(rtl8152_driver);
ac718b69 1763
1764MODULE_AUTHOR(DRIVER_AUTHOR);
1765MODULE_DESCRIPTION(DRIVER_DESC);
1766MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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