usbnet: smsc95xx: don't recover device if suspend fails in system sleep
[deliverable/linux.git] / drivers / net / usb / smsc75xx.c
CommitLineData
d0cad871
SG
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2010 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21#include <linux/module.h>
22#include <linux/kmod.h>
23#include <linux/init.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/mii.h>
28#include <linux/usb.h>
899a391b
SG
29#include <linux/bitrev.h>
30#include <linux/crc16.h>
d0cad871
SG
31#include <linux/crc32.h>
32#include <linux/usb/usbnet.h>
5a0e3ad6 33#include <linux/slab.h>
d0cad871
SG
34#include "smsc75xx.h"
35
36#define SMSC_CHIPNAME "smsc75xx"
37#define SMSC_DRIVER_VERSION "1.0.0"
38#define HS_USB_PKT_SIZE (512)
39#define FS_USB_PKT_SIZE (64)
40#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
41#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
42#define DEFAULT_BULK_IN_DELAY (0x00002000)
43#define MAX_SINGLE_PACKET_SIZE (9000)
44#define LAN75XX_EEPROM_MAGIC (0x7500)
45#define EEPROM_MAC_OFFSET (0x01)
46#define DEFAULT_TX_CSUM_ENABLE (true)
47#define DEFAULT_RX_CSUM_ENABLE (true)
48#define DEFAULT_TSO_ENABLE (true)
49#define SMSC75XX_INTERNAL_PHY_ID (1)
50#define SMSC75XX_TX_OVERHEAD (8)
51#define MAX_RX_FIFO_SIZE (20 * 1024)
52#define MAX_TX_FIFO_SIZE (12 * 1024)
53#define USB_VENDOR_ID_SMSC (0x0424)
54#define USB_PRODUCT_ID_LAN7500 (0x7500)
55#define USB_PRODUCT_ID_LAN7505 (0x7505)
ea1649de 56#define RXW_PADDING 2
f329ccdc 57#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
899a391b 58 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
d0cad871 59
b4cdea9c
SG
60#define SUSPEND_SUSPEND0 (0x01)
61#define SUSPEND_SUSPEND1 (0x02)
62#define SUSPEND_SUSPEND2 (0x04)
63#define SUSPEND_SUSPEND3 (0x08)
b4cdea9c
SG
64#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
65 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
66
d0cad871
SG
67struct smsc75xx_priv {
68 struct usbnet *dev;
69 u32 rfe_ctl;
6c636503 70 u32 wolopts;
d0cad871 71 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
d0cad871
SG
72 struct mutex dataport_mutex;
73 spinlock_t rfe_ctl_lock;
74 struct work_struct set_multicast;
b4cdea9c 75 u8 suspend_flags;
d0cad871
SG
76};
77
78struct usb_context {
79 struct usb_ctrlrequest req;
80 struct usbnet *dev;
81};
82
eb939922 83static bool turbo_mode = true;
d0cad871
SG
84module_param(turbo_mode, bool, 0644);
85MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
86
47bbea41
ML
87static int __must_check __smsc75xx_read_reg(struct usbnet *dev, u32 index,
88 u32 *data, int in_pm)
d0cad871 89{
2b2e41e3 90 u32 buf;
d0cad871 91 int ret;
47bbea41 92 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
d0cad871
SG
93
94 BUG_ON(!dev);
95
47bbea41
ML
96 if (!in_pm)
97 fn = usbnet_read_cmd;
98 else
99 fn = usbnet_read_cmd_nopm;
100
101 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
102 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
103 0, index, &buf, 4);
d0cad871 104 if (unlikely(ret < 0))
1e1d7412
JP
105 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
106 index, ret);
d0cad871 107
2b2e41e3
ML
108 le32_to_cpus(&buf);
109 *data = buf;
d0cad871
SG
110
111 return ret;
112}
113
47bbea41
ML
114static int __must_check __smsc75xx_write_reg(struct usbnet *dev, u32 index,
115 u32 data, int in_pm)
d0cad871 116{
2b2e41e3 117 u32 buf;
d0cad871 118 int ret;
47bbea41 119 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
d0cad871
SG
120
121 BUG_ON(!dev);
122
47bbea41
ML
123 if (!in_pm)
124 fn = usbnet_write_cmd;
125 else
126 fn = usbnet_write_cmd_nopm;
127
2b2e41e3
ML
128 buf = data;
129 cpu_to_le32s(&buf);
d0cad871 130
47bbea41
ML
131 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
132 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
133 0, index, &buf, 4);
d0cad871 134 if (unlikely(ret < 0))
1e1d7412
JP
135 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
136 index, ret);
d0cad871 137
d0cad871
SG
138 return ret;
139}
140
47bbea41
ML
141static int __must_check smsc75xx_read_reg_nopm(struct usbnet *dev, u32 index,
142 u32 *data)
143{
144 return __smsc75xx_read_reg(dev, index, data, 1);
145}
146
147static int __must_check smsc75xx_write_reg_nopm(struct usbnet *dev, u32 index,
148 u32 data)
149{
150 return __smsc75xx_write_reg(dev, index, data, 1);
151}
152
153static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
154 u32 *data)
155{
156 return __smsc75xx_read_reg(dev, index, data, 0);
157}
158
159static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
160 u32 data)
161{
162 return __smsc75xx_write_reg(dev, index, data, 0);
163}
164
d0cad871
SG
165/* Loop until the read is completed with timeout
166 * called with phy_mutex held */
f329ccdc
SG
167static __must_check int __smsc75xx_phy_wait_not_busy(struct usbnet *dev,
168 int in_pm)
d0cad871
SG
169{
170 unsigned long start_time = jiffies;
171 u32 val;
172 int ret;
173
174 do {
f329ccdc 175 ret = __smsc75xx_read_reg(dev, MII_ACCESS, &val, in_pm);
e3c678e6
SG
176 if (ret < 0) {
177 netdev_warn(dev->net, "Error reading MII_ACCESS\n");
178 return ret;
179 }
d0cad871
SG
180
181 if (!(val & MII_ACCESS_BUSY))
182 return 0;
183 } while (!time_after(jiffies, start_time + HZ));
184
185 return -EIO;
186}
187
f329ccdc
SG
188static int __smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
189 int in_pm)
d0cad871
SG
190{
191 struct usbnet *dev = netdev_priv(netdev);
192 u32 val, addr;
193 int ret;
194
195 mutex_lock(&dev->phy_mutex);
196
197 /* confirm MII not busy */
f329ccdc 198 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
e3c678e6
SG
199 if (ret < 0) {
200 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_read\n");
201 goto done;
202 }
d0cad871
SG
203
204 /* set the address, index & direction (read from PHY) */
205 phy_id &= dev->mii.phy_id_mask;
206 idx &= dev->mii.reg_num_mask;
207 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
208 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
cb8722d3 209 | MII_ACCESS_READ | MII_ACCESS_BUSY;
f329ccdc 210 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
e3c678e6
SG
211 if (ret < 0) {
212 netdev_warn(dev->net, "Error writing MII_ACCESS\n");
213 goto done;
214 }
d0cad871 215
f329ccdc 216 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
e3c678e6
SG
217 if (ret < 0) {
218 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
219 goto done;
220 }
d0cad871 221
f329ccdc 222 ret = __smsc75xx_read_reg(dev, MII_DATA, &val, in_pm);
e3c678e6
SG
223 if (ret < 0) {
224 netdev_warn(dev->net, "Error reading MII_DATA\n");
225 goto done;
226 }
d0cad871
SG
227
228 ret = (u16)(val & 0xFFFF);
229
230done:
231 mutex_unlock(&dev->phy_mutex);
232 return ret;
233}
234
f329ccdc
SG
235static void __smsc75xx_mdio_write(struct net_device *netdev, int phy_id,
236 int idx, int regval, int in_pm)
d0cad871
SG
237{
238 struct usbnet *dev = netdev_priv(netdev);
239 u32 val, addr;
240 int ret;
241
242 mutex_lock(&dev->phy_mutex);
243
244 /* confirm MII not busy */
f329ccdc 245 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
e3c678e6
SG
246 if (ret < 0) {
247 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_write\n");
248 goto done;
249 }
d0cad871
SG
250
251 val = regval;
f329ccdc 252 ret = __smsc75xx_write_reg(dev, MII_DATA, val, in_pm);
e3c678e6
SG
253 if (ret < 0) {
254 netdev_warn(dev->net, "Error writing MII_DATA\n");
255 goto done;
256 }
d0cad871
SG
257
258 /* set the address, index & direction (write to PHY) */
259 phy_id &= dev->mii.phy_id_mask;
260 idx &= dev->mii.reg_num_mask;
261 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
262 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
cb8722d3 263 | MII_ACCESS_WRITE | MII_ACCESS_BUSY;
f329ccdc 264 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
e3c678e6
SG
265 if (ret < 0) {
266 netdev_warn(dev->net, "Error writing MII_ACCESS\n");
267 goto done;
268 }
d0cad871 269
f329ccdc 270 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
e3c678e6
SG
271 if (ret < 0) {
272 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
273 goto done;
274 }
d0cad871
SG
275
276done:
277 mutex_unlock(&dev->phy_mutex);
278}
279
f329ccdc
SG
280static int smsc75xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
281 int idx)
282{
283 return __smsc75xx_mdio_read(netdev, phy_id, idx, 1);
284}
285
286static void smsc75xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
287 int idx, int regval)
288{
289 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 1);
290}
291
292static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
293{
294 return __smsc75xx_mdio_read(netdev, phy_id, idx, 0);
295}
296
297static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
298 int regval)
299{
300 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 0);
301}
302
d0cad871
SG
303static int smsc75xx_wait_eeprom(struct usbnet *dev)
304{
305 unsigned long start_time = jiffies;
306 u32 val;
307 int ret;
308
309 do {
310 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
e3c678e6
SG
311 if (ret < 0) {
312 netdev_warn(dev->net, "Error reading E2P_CMD\n");
313 return ret;
314 }
d0cad871
SG
315
316 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
317 break;
318 udelay(40);
319 } while (!time_after(jiffies, start_time + HZ));
320
321 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
1e1d7412 322 netdev_warn(dev->net, "EEPROM read operation timeout\n");
d0cad871
SG
323 return -EIO;
324 }
325
326 return 0;
327}
328
329static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
330{
331 unsigned long start_time = jiffies;
332 u32 val;
333 int ret;
334
335 do {
336 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
e3c678e6
SG
337 if (ret < 0) {
338 netdev_warn(dev->net, "Error reading E2P_CMD\n");
339 return ret;
340 }
d0cad871
SG
341
342 if (!(val & E2P_CMD_BUSY))
343 return 0;
344
345 udelay(40);
346 } while (!time_after(jiffies, start_time + HZ));
347
1e1d7412 348 netdev_warn(dev->net, "EEPROM is busy\n");
d0cad871
SG
349 return -EIO;
350}
351
352static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
353 u8 *data)
354{
355 u32 val;
356 int i, ret;
357
358 BUG_ON(!dev);
359 BUG_ON(!data);
360
361 ret = smsc75xx_eeprom_confirm_not_busy(dev);
362 if (ret)
363 return ret;
364
365 for (i = 0; i < length; i++) {
366 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
367 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
e3c678e6
SG
368 if (ret < 0) {
369 netdev_warn(dev->net, "Error writing E2P_CMD\n");
370 return ret;
371 }
d0cad871
SG
372
373 ret = smsc75xx_wait_eeprom(dev);
374 if (ret < 0)
375 return ret;
376
377 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
e3c678e6
SG
378 if (ret < 0) {
379 netdev_warn(dev->net, "Error reading E2P_DATA\n");
380 return ret;
381 }
d0cad871
SG
382
383 data[i] = val & 0xFF;
384 offset++;
385 }
386
387 return 0;
388}
389
390static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
391 u8 *data)
392{
393 u32 val;
394 int i, ret;
395
396 BUG_ON(!dev);
397 BUG_ON(!data);
398
399 ret = smsc75xx_eeprom_confirm_not_busy(dev);
400 if (ret)
401 return ret;
402
403 /* Issue write/erase enable command */
404 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
405 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
e3c678e6
SG
406 if (ret < 0) {
407 netdev_warn(dev->net, "Error writing E2P_CMD\n");
408 return ret;
409 }
d0cad871
SG
410
411 ret = smsc75xx_wait_eeprom(dev);
412 if (ret < 0)
413 return ret;
414
415 for (i = 0; i < length; i++) {
416
417 /* Fill data register */
418 val = data[i];
419 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
e3c678e6
SG
420 if (ret < 0) {
421 netdev_warn(dev->net, "Error writing E2P_DATA\n");
422 return ret;
423 }
d0cad871
SG
424
425 /* Send "write" command */
426 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
427 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
e3c678e6
SG
428 if (ret < 0) {
429 netdev_warn(dev->net, "Error writing E2P_CMD\n");
430 return ret;
431 }
d0cad871
SG
432
433 ret = smsc75xx_wait_eeprom(dev);
434 if (ret < 0)
435 return ret;
436
437 offset++;
438 }
439
440 return 0;
441}
442
443static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
444{
445 int i, ret;
446
447 for (i = 0; i < 100; i++) {
448 u32 dp_sel;
449 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
e3c678e6
SG
450 if (ret < 0) {
451 netdev_warn(dev->net, "Error reading DP_SEL\n");
452 return ret;
453 }
d0cad871
SG
454
455 if (dp_sel & DP_SEL_DPRDY)
456 return 0;
457
458 udelay(40);
459 }
460
1e1d7412 461 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out\n");
d0cad871
SG
462
463 return -EIO;
464}
465
466static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
467 u32 length, u32 *buf)
468{
469 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
470 u32 dp_sel;
471 int i, ret;
472
473 mutex_lock(&pdata->dataport_mutex);
474
475 ret = smsc75xx_dataport_wait_not_busy(dev);
e3c678e6
SG
476 if (ret < 0) {
477 netdev_warn(dev->net, "smsc75xx_dataport_write busy on entry\n");
478 goto done;
479 }
d0cad871
SG
480
481 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
e3c678e6
SG
482 if (ret < 0) {
483 netdev_warn(dev->net, "Error reading DP_SEL\n");
484 goto done;
485 }
d0cad871
SG
486
487 dp_sel &= ~DP_SEL_RSEL;
488 dp_sel |= ram_select;
489 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
e3c678e6
SG
490 if (ret < 0) {
491 netdev_warn(dev->net, "Error writing DP_SEL\n");
492 goto done;
493 }
d0cad871
SG
494
495 for (i = 0; i < length; i++) {
496 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
e3c678e6
SG
497 if (ret < 0) {
498 netdev_warn(dev->net, "Error writing DP_ADDR\n");
499 goto done;
500 }
d0cad871
SG
501
502 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
e3c678e6
SG
503 if (ret < 0) {
504 netdev_warn(dev->net, "Error writing DP_DATA\n");
505 goto done;
506 }
d0cad871
SG
507
508 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
e3c678e6
SG
509 if (ret < 0) {
510 netdev_warn(dev->net, "Error writing DP_CMD\n");
511 goto done;
512 }
d0cad871
SG
513
514 ret = smsc75xx_dataport_wait_not_busy(dev);
e3c678e6
SG
515 if (ret < 0) {
516 netdev_warn(dev->net, "smsc75xx_dataport_write timeout\n");
517 goto done;
518 }
d0cad871
SG
519 }
520
521done:
522 mutex_unlock(&pdata->dataport_mutex);
523 return ret;
524}
525
526/* returns hash bit number for given MAC address */
527static u32 smsc75xx_hash(char addr[ETH_ALEN])
528{
529 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
530}
531
532static void smsc75xx_deferred_multicast_write(struct work_struct *param)
533{
534 struct smsc75xx_priv *pdata =
535 container_of(param, struct smsc75xx_priv, set_multicast);
536 struct usbnet *dev = pdata->dev;
537 int ret;
538
1e1d7412
JP
539 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
540 pdata->rfe_ctl);
d0cad871
SG
541
542 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
543 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
544
545 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
e3c678e6
SG
546 if (ret < 0)
547 netdev_warn(dev->net, "Error writing RFE_CRL\n");
d0cad871
SG
548}
549
550static void smsc75xx_set_multicast(struct net_device *netdev)
551{
552 struct usbnet *dev = netdev_priv(netdev);
553 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
554 unsigned long flags;
555 int i;
556
557 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
558
559 pdata->rfe_ctl &=
560 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
561 pdata->rfe_ctl |= RFE_CTL_AB;
562
563 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
564 pdata->multicast_hash_table[i] = 0;
565
566 if (dev->net->flags & IFF_PROMISC) {
1e1d7412 567 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
d0cad871
SG
568 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
569 } else if (dev->net->flags & IFF_ALLMULTI) {
1e1d7412 570 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
d0cad871
SG
571 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
572 } else if (!netdev_mc_empty(dev->net)) {
22bedad3 573 struct netdev_hw_addr *ha;
d0cad871 574
1e1d7412 575 netif_dbg(dev, drv, dev->net, "receive multicast hash filter\n");
d0cad871
SG
576
577 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
578
22bedad3
JP
579 netdev_for_each_mc_addr(ha, netdev) {
580 u32 bitnum = smsc75xx_hash(ha->addr);
d0cad871
SG
581 pdata->multicast_hash_table[bitnum / 32] |=
582 (1 << (bitnum % 32));
583 }
584 } else {
1e1d7412 585 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
d0cad871
SG
586 pdata->rfe_ctl |= RFE_CTL_DPF;
587 }
588
589 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
590
591 /* defer register writes to a sleepable context */
592 schedule_work(&pdata->set_multicast);
593}
594
595static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
596 u16 lcladv, u16 rmtadv)
597{
598 u32 flow = 0, fct_flow = 0;
599 int ret;
600
601 if (duplex == DUPLEX_FULL) {
602 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
603
604 if (cap & FLOW_CTRL_TX) {
605 flow = (FLOW_TX_FCEN | 0xFFFF);
606 /* set fct_flow thresholds to 20% and 80% */
607 fct_flow = (8 << 8) | 32;
608 }
609
610 if (cap & FLOW_CTRL_RX)
611 flow |= FLOW_RX_FCEN;
612
1e1d7412
JP
613 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
614 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
615 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
d0cad871 616 } else {
1e1d7412 617 netif_dbg(dev, link, dev->net, "half duplex\n");
d0cad871
SG
618 }
619
620 ret = smsc75xx_write_reg(dev, FLOW, flow);
e3c678e6
SG
621 if (ret < 0) {
622 netdev_warn(dev->net, "Error writing FLOW\n");
623 return ret;
624 }
d0cad871
SG
625
626 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
e3c678e6
SG
627 if (ret < 0) {
628 netdev_warn(dev->net, "Error writing FCT_FLOW\n");
629 return ret;
630 }
d0cad871
SG
631
632 return 0;
633}
634
635static int smsc75xx_link_reset(struct usbnet *dev)
636{
637 struct mii_if_info *mii = &dev->mii;
8ae6daca 638 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
d0cad871
SG
639 u16 lcladv, rmtadv;
640 int ret;
641
4f94a929 642 /* write to clear phy interrupt status */
7749622d
SG
643 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC,
644 PHY_INT_SRC_CLEAR_ALL);
d0cad871
SG
645
646 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
e3c678e6
SG
647 if (ret < 0) {
648 netdev_warn(dev->net, "Error writing INT_STS\n");
649 return ret;
650 }
d0cad871
SG
651
652 mii_check_media(mii, 1, 1);
653 mii_ethtool_gset(&dev->mii, &ecmd);
654 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
655 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
656
1e1d7412
JP
657 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
658 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
d0cad871
SG
659
660 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
661}
662
663static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
664{
665 u32 intdata;
666
667 if (urb->actual_length != 4) {
1e1d7412
JP
668 netdev_warn(dev->net, "unexpected urb length %d\n",
669 urb->actual_length);
d0cad871
SG
670 return;
671 }
672
673 memcpy(&intdata, urb->transfer_buffer, 4);
674 le32_to_cpus(&intdata);
675
1e1d7412 676 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
d0cad871
SG
677
678 if (intdata & INT_ENP_PHY_INT)
679 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
680 else
1e1d7412
JP
681 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
682 intdata);
d0cad871
SG
683}
684
d0cad871
SG
685static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
686{
687 return MAX_EEPROM_SIZE;
688}
689
690static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
691 struct ethtool_eeprom *ee, u8 *data)
692{
693 struct usbnet *dev = netdev_priv(netdev);
694
695 ee->magic = LAN75XX_EEPROM_MAGIC;
696
697 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
698}
699
700static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
701 struct ethtool_eeprom *ee, u8 *data)
702{
703 struct usbnet *dev = netdev_priv(netdev);
704
705 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
1e1d7412
JP
706 netdev_warn(dev->net, "EEPROM: magic value mismatch: 0x%x\n",
707 ee->magic);
d0cad871
SG
708 return -EINVAL;
709 }
710
711 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
712}
713
6c636503
SG
714static void smsc75xx_ethtool_get_wol(struct net_device *net,
715 struct ethtool_wolinfo *wolinfo)
716{
717 struct usbnet *dev = netdev_priv(net);
718 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
719
720 wolinfo->supported = SUPPORTED_WAKE;
721 wolinfo->wolopts = pdata->wolopts;
722}
723
724static int smsc75xx_ethtool_set_wol(struct net_device *net,
725 struct ethtool_wolinfo *wolinfo)
726{
727 struct usbnet *dev = netdev_priv(net);
728 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
351f33d9 729 int ret;
6c636503
SG
730
731 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
351f33d9
SG
732
733 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
e3c678e6
SG
734 if (ret < 0)
735 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
351f33d9 736
e3c678e6 737 return ret;
6c636503
SG
738}
739
d0cad871
SG
740static const struct ethtool_ops smsc75xx_ethtool_ops = {
741 .get_link = usbnet_get_link,
742 .nway_reset = usbnet_nway_reset,
743 .get_drvinfo = usbnet_get_drvinfo,
744 .get_msglevel = usbnet_get_msglevel,
745 .set_msglevel = usbnet_set_msglevel,
746 .get_settings = usbnet_get_settings,
747 .set_settings = usbnet_set_settings,
748 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
749 .get_eeprom = smsc75xx_ethtool_get_eeprom,
750 .set_eeprom = smsc75xx_ethtool_set_eeprom,
6c636503
SG
751 .get_wol = smsc75xx_ethtool_get_wol,
752 .set_wol = smsc75xx_ethtool_set_wol,
d0cad871
SG
753};
754
755static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
756{
757 struct usbnet *dev = netdev_priv(netdev);
758
759 if (!netif_running(netdev))
760 return -EINVAL;
761
762 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
763}
764
765static void smsc75xx_init_mac_address(struct usbnet *dev)
766{
767 /* try reading mac address from EEPROM */
768 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
769 dev->net->dev_addr) == 0) {
770 if (is_valid_ether_addr(dev->net->dev_addr)) {
771 /* eeprom values are valid so use them */
772 netif_dbg(dev, ifup, dev->net,
1e1d7412 773 "MAC address read from EEPROM\n");
d0cad871
SG
774 return;
775 }
776 }
777
778 /* no eeprom, or eeprom values are invalid. generate random MAC */
f2cedb63 779 eth_hw_addr_random(dev->net);
1e1d7412 780 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
d0cad871
SG
781}
782
783static int smsc75xx_set_mac_address(struct usbnet *dev)
784{
785 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
786 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
787 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
788
789 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
e3c678e6
SG
790 if (ret < 0) {
791 netdev_warn(dev->net, "Failed to write RX_ADDRH: %d\n", ret);
792 return ret;
793 }
d0cad871
SG
794
795 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
e3c678e6
SG
796 if (ret < 0) {
797 netdev_warn(dev->net, "Failed to write RX_ADDRL: %d\n", ret);
798 return ret;
799 }
d0cad871
SG
800
801 addr_hi |= ADDR_FILTX_FB_VALID;
802 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
e3c678e6
SG
803 if (ret < 0) {
804 netdev_warn(dev->net, "Failed to write ADDR_FILTX: %d\n", ret);
805 return ret;
806 }
d0cad871
SG
807
808 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
e3c678e6
SG
809 if (ret < 0)
810 netdev_warn(dev->net, "Failed to write ADDR_FILTX+4: %d\n", ret);
d0cad871 811
e3c678e6 812 return ret;
d0cad871
SG
813}
814
815static int smsc75xx_phy_initialize(struct usbnet *dev)
816{
b140504a 817 int bmcr, ret, timeout = 0;
d0cad871
SG
818
819 /* Initialize MII structure */
820 dev->mii.dev = dev->net;
821 dev->mii.mdio_read = smsc75xx_mdio_read;
822 dev->mii.mdio_write = smsc75xx_mdio_write;
823 dev->mii.phy_id_mask = 0x1f;
824 dev->mii.reg_num_mask = 0x1f;
c0b92e4d 825 dev->mii.supports_gmii = 1;
d0cad871
SG
826 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
827
828 /* reset phy and wait for reset to complete */
829 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
830
831 do {
832 msleep(10);
833 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
e3c678e6
SG
834 if (bmcr < 0) {
835 netdev_warn(dev->net, "Error reading MII_BMCR\n");
836 return bmcr;
837 }
d0cad871 838 timeout++;
8a1d59d7 839 } while ((bmcr & BMCR_RESET) && (timeout < 100));
d0cad871
SG
840
841 if (timeout >= 100) {
1e1d7412 842 netdev_warn(dev->net, "timeout on PHY Reset\n");
d0cad871
SG
843 return -EIO;
844 }
845
846 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
847 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
848 ADVERTISE_PAUSE_ASYM);
c0b92e4d
SG
849 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
850 ADVERTISE_1000FULL);
d0cad871 851
b140504a
SG
852 /* read and write to clear phy interrupt status */
853 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
e3c678e6
SG
854 if (ret < 0) {
855 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
856 return ret;
857 }
858
b140504a 859 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff);
d0cad871
SG
860
861 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
862 PHY_INT_MASK_DEFAULT);
863 mii_nway_restart(&dev->mii);
864
1e1d7412 865 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
d0cad871
SG
866 return 0;
867}
868
869static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
870{
871 int ret = 0;
872 u32 buf;
873 bool rxenabled;
874
875 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
e3c678e6
SG
876 if (ret < 0) {
877 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
878 return ret;
879 }
d0cad871
SG
880
881 rxenabled = ((buf & MAC_RX_RXEN) != 0);
882
883 if (rxenabled) {
884 buf &= ~MAC_RX_RXEN;
885 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
e3c678e6
SG
886 if (ret < 0) {
887 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
888 return ret;
889 }
d0cad871
SG
890 }
891
892 /* add 4 to size for FCS */
893 buf &= ~MAC_RX_MAX_SIZE;
894 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
895
896 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
e3c678e6
SG
897 if (ret < 0) {
898 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
899 return ret;
900 }
d0cad871
SG
901
902 if (rxenabled) {
903 buf |= MAC_RX_RXEN;
904 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
e3c678e6
SG
905 if (ret < 0) {
906 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
907 return ret;
908 }
d0cad871
SG
909 }
910
911 return 0;
912}
913
914static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
915{
916 struct usbnet *dev = netdev_priv(netdev);
917
918 int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu);
e3c678e6
SG
919 if (ret < 0) {
920 netdev_warn(dev->net, "Failed to set mac rx frame length\n");
921 return ret;
922 }
d0cad871
SG
923
924 return usbnet_change_mtu(netdev, new_mtu);
925}
926
78e47fe4 927/* Enable or disable Rx checksum offload engine */
c8f44aff
MM
928static int smsc75xx_set_features(struct net_device *netdev,
929 netdev_features_t features)
78e47fe4
MM
930{
931 struct usbnet *dev = netdev_priv(netdev);
932 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
933 unsigned long flags;
934 int ret;
935
936 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
937
938 if (features & NETIF_F_RXCSUM)
939 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
940 else
941 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
942
943 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
944 /* it's racing here! */
945
946 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
e3c678e6
SG
947 if (ret < 0)
948 netdev_warn(dev->net, "Error writing RFE_CTL\n");
78e47fe4 949
e3c678e6 950 return ret;
78e47fe4
MM
951}
952
47bbea41 953static int smsc75xx_wait_ready(struct usbnet *dev, int in_pm)
8762cec8
SG
954{
955 int timeout = 0;
956
957 do {
958 u32 buf;
47bbea41
ML
959 int ret;
960
961 ret = __smsc75xx_read_reg(dev, PMT_CTL, &buf, in_pm);
962
e3c678e6
SG
963 if (ret < 0) {
964 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
965 return ret;
966 }
8762cec8
SG
967
968 if (buf & PMT_CTL_DEV_RDY)
969 return 0;
970
971 msleep(10);
972 timeout++;
973 } while (timeout < 100);
974
1e1d7412 975 netdev_warn(dev->net, "timeout waiting for device ready\n");
8762cec8
SG
976 return -EIO;
977}
978
d0cad871
SG
979static int smsc75xx_reset(struct usbnet *dev)
980{
981 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
982 u32 buf;
983 int ret = 0, timeout;
984
1e1d7412 985 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset\n");
d0cad871 986
47bbea41 987 ret = smsc75xx_wait_ready(dev, 0);
e3c678e6
SG
988 if (ret < 0) {
989 netdev_warn(dev->net, "device not ready in smsc75xx_reset\n");
990 return ret;
991 }
8762cec8 992
d0cad871 993 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
e3c678e6
SG
994 if (ret < 0) {
995 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
996 return ret;
997 }
d0cad871
SG
998
999 buf |= HW_CFG_LRST;
1000
1001 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
e3c678e6
SG
1002 if (ret < 0) {
1003 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1004 return ret;
1005 }
d0cad871
SG
1006
1007 timeout = 0;
1008 do {
1009 msleep(10);
1010 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
e3c678e6
SG
1011 if (ret < 0) {
1012 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1013 return ret;
1014 }
d0cad871
SG
1015 timeout++;
1016 } while ((buf & HW_CFG_LRST) && (timeout < 100));
1017
1018 if (timeout >= 100) {
1e1d7412 1019 netdev_warn(dev->net, "timeout on completion of Lite Reset\n");
d0cad871
SG
1020 return -EIO;
1021 }
1022
1e1d7412 1023 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY\n");
d0cad871
SG
1024
1025 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
e3c678e6
SG
1026 if (ret < 0) {
1027 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1028 return ret;
1029 }
d0cad871
SG
1030
1031 buf |= PMT_CTL_PHY_RST;
1032
1033 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
e3c678e6
SG
1034 if (ret < 0) {
1035 netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret);
1036 return ret;
1037 }
d0cad871
SG
1038
1039 timeout = 0;
1040 do {
1041 msleep(10);
1042 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
e3c678e6
SG
1043 if (ret < 0) {
1044 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1045 return ret;
1046 }
d0cad871
SG
1047 timeout++;
1048 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
1049
1050 if (timeout >= 100) {
1e1d7412 1051 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
d0cad871
SG
1052 return -EIO;
1053 }
1054
1e1d7412 1055 netif_dbg(dev, ifup, dev->net, "PHY reset complete\n");
d0cad871 1056
d0cad871 1057 ret = smsc75xx_set_mac_address(dev);
e3c678e6
SG
1058 if (ret < 0) {
1059 netdev_warn(dev->net, "Failed to set mac address\n");
1060 return ret;
1061 }
d0cad871 1062
1e1d7412
JP
1063 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
1064 dev->net->dev_addr);
d0cad871
SG
1065
1066 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
e3c678e6
SG
1067 if (ret < 0) {
1068 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1069 return ret;
1070 }
d0cad871 1071
1e1d7412
JP
1072 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
1073 buf);
d0cad871
SG
1074
1075 buf |= HW_CFG_BIR;
1076
1077 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
e3c678e6
SG
1078 if (ret < 0) {
1079 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1080 return ret;
1081 }
d0cad871
SG
1082
1083 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
e3c678e6
SG
1084 if (ret < 0) {
1085 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1086 return ret;
1087 }
d0cad871 1088
1e1d7412
JP
1089 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after writing HW_CFG_BIR: 0x%08x\n",
1090 buf);
d0cad871
SG
1091
1092 if (!turbo_mode) {
1093 buf = 0;
1094 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
1095 } else if (dev->udev->speed == USB_SPEED_HIGH) {
1096 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
1097 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
1098 } else {
1099 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
1100 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
1101 }
1102
1e1d7412
JP
1103 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
1104 (ulong)dev->rx_urb_size);
d0cad871
SG
1105
1106 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
e3c678e6
SG
1107 if (ret < 0) {
1108 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
1109 return ret;
1110 }
d0cad871
SG
1111
1112 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
e3c678e6
SG
1113 if (ret < 0) {
1114 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
1115 return ret;
1116 }
d0cad871
SG
1117
1118 netif_dbg(dev, ifup, dev->net,
1e1d7412 1119 "Read Value from BURST_CAP after writing: 0x%08x\n", buf);
d0cad871
SG
1120
1121 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
e3c678e6
SG
1122 if (ret < 0) {
1123 netdev_warn(dev->net, "Failed to write BULK_IN_DLY: %d\n", ret);
1124 return ret;
1125 }
d0cad871
SG
1126
1127 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
e3c678e6
SG
1128 if (ret < 0) {
1129 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
1130 return ret;
1131 }
d0cad871
SG
1132
1133 netif_dbg(dev, ifup, dev->net,
1e1d7412 1134 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", buf);
d0cad871
SG
1135
1136 if (turbo_mode) {
1137 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
e3c678e6
SG
1138 if (ret < 0) {
1139 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1140 return ret;
1141 }
d0cad871 1142
1e1d7412 1143 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
d0cad871
SG
1144
1145 buf |= (HW_CFG_MEF | HW_CFG_BCE);
1146
1147 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
e3c678e6
SG
1148 if (ret < 0) {
1149 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1150 return ret;
1151 }
d0cad871
SG
1152
1153 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
e3c678e6
SG
1154 if (ret < 0) {
1155 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1156 return ret;
1157 }
d0cad871 1158
1e1d7412 1159 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
d0cad871
SG
1160 }
1161
1162 /* set FIFO sizes */
1163 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
1164 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
e3c678e6
SG
1165 if (ret < 0) {
1166 netdev_warn(dev->net, "Failed to write FCT_RX_FIFO_END: %d\n", ret);
1167 return ret;
1168 }
d0cad871 1169
1e1d7412 1170 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x\n", buf);
d0cad871
SG
1171
1172 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
1173 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
e3c678e6
SG
1174 if (ret < 0) {
1175 netdev_warn(dev->net, "Failed to write FCT_TX_FIFO_END: %d\n", ret);
1176 return ret;
1177 }
d0cad871 1178
1e1d7412 1179 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x\n", buf);
d0cad871
SG
1180
1181 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
e3c678e6
SG
1182 if (ret < 0) {
1183 netdev_warn(dev->net, "Failed to write INT_STS: %d\n", ret);
1184 return ret;
1185 }
d0cad871
SG
1186
1187 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
e3c678e6
SG
1188 if (ret < 0) {
1189 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
1190 return ret;
1191 }
d0cad871 1192
1e1d7412 1193 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", buf);
d0cad871 1194
97138a1c 1195 ret = smsc75xx_read_reg(dev, E2P_CMD, &buf);
e3c678e6
SG
1196 if (ret < 0) {
1197 netdev_warn(dev->net, "Failed to read E2P_CMD: %d\n", ret);
1198 return ret;
1199 }
d0cad871 1200
97138a1c
SG
1201 /* only set default GPIO/LED settings if no EEPROM is detected */
1202 if (!(buf & E2P_CMD_LOADED)) {
1203 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
e3c678e6
SG
1204 if (ret < 0) {
1205 netdev_warn(dev->net, "Failed to read LED_GPIO_CFG: %d\n", ret);
1206 return ret;
1207 }
d0cad871 1208
97138a1c
SG
1209 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
1210 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
1211
1212 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
e3c678e6
SG
1213 if (ret < 0) {
1214 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG: %d\n", ret);
1215 return ret;
1216 }
97138a1c 1217 }
d0cad871
SG
1218
1219 ret = smsc75xx_write_reg(dev, FLOW, 0);
e3c678e6
SG
1220 if (ret < 0) {
1221 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
1222 return ret;
1223 }
d0cad871
SG
1224
1225 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
e3c678e6
SG
1226 if (ret < 0) {
1227 netdev_warn(dev->net, "Failed to write FCT_FLOW: %d\n", ret);
1228 return ret;
1229 }
d0cad871
SG
1230
1231 /* Don't need rfe_ctl_lock during initialisation */
1232 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
e3c678e6
SG
1233 if (ret < 0) {
1234 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret);
1235 return ret;
1236 }
d0cad871
SG
1237
1238 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
1239
1240 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
e3c678e6
SG
1241 if (ret < 0) {
1242 netdev_warn(dev->net, "Failed to write RFE_CTL: %d\n", ret);
1243 return ret;
1244 }
d0cad871
SG
1245
1246 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
e3c678e6
SG
1247 if (ret < 0) {
1248 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret);
1249 return ret;
1250 }
d0cad871 1251
1e1d7412
JP
1252 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x\n",
1253 pdata->rfe_ctl);
d0cad871
SG
1254
1255 /* Enable or disable checksum offload engines */
78e47fe4 1256 smsc75xx_set_features(dev->net, dev->net->features);
d0cad871
SG
1257
1258 smsc75xx_set_multicast(dev->net);
1259
1260 ret = smsc75xx_phy_initialize(dev);
e3c678e6
SG
1261 if (ret < 0) {
1262 netdev_warn(dev->net, "Failed to initialize PHY: %d\n", ret);
1263 return ret;
1264 }
d0cad871
SG
1265
1266 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
e3c678e6
SG
1267 if (ret < 0) {
1268 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
1269 return ret;
1270 }
d0cad871
SG
1271
1272 /* enable PHY interrupts */
1273 buf |= INT_ENP_PHY_INT;
1274
1275 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
e3c678e6
SG
1276 if (ret < 0) {
1277 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
1278 return ret;
1279 }
d0cad871 1280
2f3a081e
SG
1281 /* allow mac to detect speed and duplex from phy */
1282 ret = smsc75xx_read_reg(dev, MAC_CR, &buf);
e3c678e6
SG
1283 if (ret < 0) {
1284 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
1285 return ret;
1286 }
2f3a081e
SG
1287
1288 buf |= (MAC_CR_ADD | MAC_CR_ASD);
1289 ret = smsc75xx_write_reg(dev, MAC_CR, buf);
e3c678e6
SG
1290 if (ret < 0) {
1291 netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret);
1292 return ret;
1293 }
2f3a081e 1294
d0cad871 1295 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
e3c678e6
SG
1296 if (ret < 0) {
1297 netdev_warn(dev->net, "Failed to read MAC_TX: %d\n", ret);
1298 return ret;
1299 }
d0cad871
SG
1300
1301 buf |= MAC_TX_TXEN;
1302
1303 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
e3c678e6
SG
1304 if (ret < 0) {
1305 netdev_warn(dev->net, "Failed to write MAC_TX: %d\n", ret);
1306 return ret;
1307 }
d0cad871 1308
1e1d7412 1309 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x\n", buf);
d0cad871
SG
1310
1311 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
e3c678e6
SG
1312 if (ret < 0) {
1313 netdev_warn(dev->net, "Failed to read FCT_TX_CTL: %d\n", ret);
1314 return ret;
1315 }
d0cad871
SG
1316
1317 buf |= FCT_TX_CTL_EN;
1318
1319 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
e3c678e6
SG
1320 if (ret < 0) {
1321 netdev_warn(dev->net, "Failed to write FCT_TX_CTL: %d\n", ret);
1322 return ret;
1323 }
d0cad871 1324
1e1d7412 1325 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x\n", buf);
d0cad871
SG
1326
1327 ret = smsc75xx_set_rx_max_frame_length(dev, 1514);
e3c678e6
SG
1328 if (ret < 0) {
1329 netdev_warn(dev->net, "Failed to set max rx frame length\n");
1330 return ret;
1331 }
d0cad871
SG
1332
1333 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
e3c678e6
SG
1334 if (ret < 0) {
1335 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
1336 return ret;
1337 }
d0cad871
SG
1338
1339 buf |= MAC_RX_RXEN;
1340
1341 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
e3c678e6
SG
1342 if (ret < 0) {
1343 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
1344 return ret;
1345 }
d0cad871 1346
1e1d7412 1347 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x\n", buf);
d0cad871
SG
1348
1349 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
e3c678e6
SG
1350 if (ret < 0) {
1351 netdev_warn(dev->net, "Failed to read FCT_RX_CTL: %d\n", ret);
1352 return ret;
1353 }
d0cad871
SG
1354
1355 buf |= FCT_RX_CTL_EN;
1356
1357 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
e3c678e6
SG
1358 if (ret < 0) {
1359 netdev_warn(dev->net, "Failed to write FCT_RX_CTL: %d\n", ret);
1360 return ret;
1361 }
d0cad871 1362
1e1d7412 1363 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x\n", buf);
d0cad871 1364
1e1d7412 1365 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0\n");
d0cad871
SG
1366 return 0;
1367}
1368
1369static const struct net_device_ops smsc75xx_netdev_ops = {
1370 .ndo_open = usbnet_open,
1371 .ndo_stop = usbnet_stop,
1372 .ndo_start_xmit = usbnet_start_xmit,
1373 .ndo_tx_timeout = usbnet_tx_timeout,
1374 .ndo_change_mtu = smsc75xx_change_mtu,
1375 .ndo_set_mac_address = eth_mac_addr,
1376 .ndo_validate_addr = eth_validate_addr,
1377 .ndo_do_ioctl = smsc75xx_ioctl,
afc4b13d 1378 .ndo_set_rx_mode = smsc75xx_set_multicast,
78e47fe4 1379 .ndo_set_features = smsc75xx_set_features,
d0cad871
SG
1380};
1381
1382static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1383{
1384 struct smsc75xx_priv *pdata = NULL;
1385 int ret;
1386
1387 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1388
1389 ret = usbnet_get_endpoints(dev, intf);
e3c678e6
SG
1390 if (ret < 0) {
1391 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1392 return ret;
1393 }
d0cad871
SG
1394
1395 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
38673c82 1396 GFP_KERNEL);
d0cad871
SG
1397
1398 pdata = (struct smsc75xx_priv *)(dev->data[0]);
38673c82 1399 if (!pdata)
d0cad871 1400 return -ENOMEM;
d0cad871
SG
1401
1402 pdata->dev = dev;
1403
1404 spin_lock_init(&pdata->rfe_ctl_lock);
1405 mutex_init(&pdata->dataport_mutex);
1406
1407 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1408
78e47fe4
MM
1409 if (DEFAULT_TX_CSUM_ENABLE) {
1410 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1411 if (DEFAULT_TSO_ENABLE)
1412 dev->net->features |= NETIF_F_SG |
1413 NETIF_F_TSO | NETIF_F_TSO6;
1414 }
1415 if (DEFAULT_RX_CSUM_ENABLE)
1416 dev->net->features |= NETIF_F_RXCSUM;
d0cad871 1417
78e47fe4
MM
1418 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1419 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_RXCSUM;
d0cad871 1420
481705a1
SG
1421 ret = smsc75xx_wait_ready(dev, 0);
1422 if (ret < 0) {
1423 netdev_warn(dev->net, "device not ready in smsc75xx_bind\n");
1424 return ret;
1425 }
1426
1427 smsc75xx_init_mac_address(dev);
1428
d0cad871
SG
1429 /* Init all registers */
1430 ret = smsc75xx_reset(dev);
e3c678e6
SG
1431 if (ret < 0) {
1432 netdev_warn(dev->net, "smsc75xx_reset error %d\n", ret);
1433 return ret;
1434 }
d0cad871
SG
1435
1436 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1437 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1438 dev->net->flags |= IFF_MULTICAST;
1439 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
a99ff7d0 1440 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
d0cad871
SG
1441 return 0;
1442}
1443
1444static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1445{
1446 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1447 if (pdata) {
1e1d7412 1448 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
d0cad871
SG
1449 kfree(pdata);
1450 pdata = NULL;
1451 dev->data[0] = 0;
1452 }
1453}
1454
899a391b
SG
1455static u16 smsc_crc(const u8 *buffer, size_t len)
1456{
1457 return bitrev16(crc16(0xFFFF, buffer, len));
1458}
1459
1460static int smsc75xx_write_wuff(struct usbnet *dev, int filter, u32 wuf_cfg,
1461 u32 wuf_mask1)
1462{
1463 int cfg_base = WUF_CFGX + filter * 4;
1464 int mask_base = WUF_MASKX + filter * 16;
1465 int ret;
1466
1467 ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg);
e3c678e6
SG
1468 if (ret < 0) {
1469 netdev_warn(dev->net, "Error writing WUF_CFGX\n");
1470 return ret;
1471 }
899a391b
SG
1472
1473 ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1);
e3c678e6
SG
1474 if (ret < 0) {
1475 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1476 return ret;
1477 }
899a391b
SG
1478
1479 ret = smsc75xx_write_reg(dev, mask_base + 4, 0);
e3c678e6
SG
1480 if (ret < 0) {
1481 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1482 return ret;
1483 }
899a391b
SG
1484
1485 ret = smsc75xx_write_reg(dev, mask_base + 8, 0);
e3c678e6
SG
1486 if (ret < 0) {
1487 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1488 return ret;
1489 }
899a391b
SG
1490
1491 ret = smsc75xx_write_reg(dev, mask_base + 12, 0);
e3c678e6
SG
1492 if (ret < 0) {
1493 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1494 return ret;
1495 }
899a391b
SG
1496
1497 return 0;
1498}
1499
9deb2757
SG
1500static int smsc75xx_enter_suspend0(struct usbnet *dev)
1501{
b4cdea9c 1502 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
9deb2757
SG
1503 u32 val;
1504 int ret;
1505
1506 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
e3c678e6
SG
1507 if (ret < 0) {
1508 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1509 return ret;
1510 }
9deb2757
SG
1511
1512 val &= (~(PMT_CTL_SUS_MODE | PMT_CTL_PHY_RST));
1513 val |= PMT_CTL_SUS_MODE_0 | PMT_CTL_WOL_EN | PMT_CTL_WUPS;
1514
1515 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
e3c678e6
SG
1516 if (ret < 0) {
1517 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1518 return ret;
1519 }
9deb2757 1520
351f33d9 1521 pdata->suspend_flags |= SUSPEND_SUSPEND0;
b4cdea9c 1522
9deb2757
SG
1523 return 0;
1524}
1525
f329ccdc
SG
1526static int smsc75xx_enter_suspend1(struct usbnet *dev)
1527{
b4cdea9c 1528 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
f329ccdc
SG
1529 u32 val;
1530 int ret;
1531
1532 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
e3c678e6
SG
1533 if (ret < 0) {
1534 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1535 return ret;
1536 }
f329ccdc
SG
1537
1538 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1539 val |= PMT_CTL_SUS_MODE_1;
1540
1541 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
e3c678e6
SG
1542 if (ret < 0) {
1543 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1544 return ret;
1545 }
f329ccdc
SG
1546
1547 /* clear wol status, enable energy detection */
1548 val &= ~PMT_CTL_WUPS;
1549 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
1550
1551 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
e3c678e6
SG
1552 if (ret < 0) {
1553 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1554 return ret;
1555 }
f329ccdc 1556
351f33d9 1557 pdata->suspend_flags |= SUSPEND_SUSPEND1;
b4cdea9c 1558
f329ccdc
SG
1559 return 0;
1560}
1561
9deb2757
SG
1562static int smsc75xx_enter_suspend2(struct usbnet *dev)
1563{
b4cdea9c 1564 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
9deb2757
SG
1565 u32 val;
1566 int ret;
1567
1568 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
e3c678e6
SG
1569 if (ret < 0) {
1570 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1571 return ret;
1572 }
9deb2757
SG
1573
1574 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1575 val |= PMT_CTL_SUS_MODE_2;
1576
1577 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
e3c678e6
SG
1578 if (ret < 0) {
1579 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1580 return ret;
1581 }
9deb2757 1582
b4cdea9c
SG
1583 pdata->suspend_flags |= SUSPEND_SUSPEND2;
1584
1585 return 0;
1586}
1587
1588static int smsc75xx_enter_suspend3(struct usbnet *dev)
1589{
1590 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1591 u32 val;
1592 int ret;
1593
1594 ret = smsc75xx_read_reg_nopm(dev, FCT_RX_CTL, &val);
e3c678e6
SG
1595 if (ret < 0) {
1596 netdev_warn(dev->net, "Error reading FCT_RX_CTL\n");
1597 return ret;
1598 }
b4cdea9c
SG
1599
1600 if (val & FCT_RX_CTL_RXUSED) {
1601 netdev_dbg(dev->net, "rx fifo not empty in autosuspend\n");
1602 return -EBUSY;
1603 }
1604
1605 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
e3c678e6
SG
1606 if (ret < 0) {
1607 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1608 return ret;
1609 }
b4cdea9c
SG
1610
1611 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1612 val |= PMT_CTL_SUS_MODE_3 | PMT_CTL_RES_CLR_WKP_EN;
1613
1614 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
e3c678e6
SG
1615 if (ret < 0) {
1616 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1617 return ret;
1618 }
b4cdea9c
SG
1619
1620 /* clear wol status */
1621 val &= ~PMT_CTL_WUPS;
1622 val |= PMT_CTL_WUPS_WOL;
1623
1624 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
e3c678e6
SG
1625 if (ret < 0) {
1626 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1627 return ret;
1628 }
b4cdea9c 1629
351f33d9 1630 pdata->suspend_flags |= SUSPEND_SUSPEND3;
b4cdea9c 1631
9deb2757
SG
1632 return 0;
1633}
1634
f329ccdc
SG
1635static int smsc75xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
1636{
1637 struct mii_if_info *mii = &dev->mii;
1638 int ret;
1639
1640 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
1641
1642 /* read to clear */
1643 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
e3c678e6
SG
1644 if (ret < 0) {
1645 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
1646 return ret;
1647 }
f329ccdc
SG
1648
1649 /* enable interrupt source */
1650 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
e3c678e6
SG
1651 if (ret < 0) {
1652 netdev_warn(dev->net, "Error reading PHY_INT_MASK\n");
1653 return ret;
1654 }
f329ccdc
SG
1655
1656 ret |= mask;
1657
1658 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
1659
1660 return 0;
1661}
1662
1663static int smsc75xx_link_ok_nopm(struct usbnet *dev)
1664{
1665 struct mii_if_info *mii = &dev->mii;
1666 int ret;
1667
1668 /* first, a dummy read, needed to latch some MII phys */
1669 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
e3c678e6
SG
1670 if (ret < 0) {
1671 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1672 return ret;
1673 }
f329ccdc
SG
1674
1675 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
e3c678e6
SG
1676 if (ret < 0) {
1677 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1678 return ret;
1679 }
f329ccdc
SG
1680
1681 return !!(ret & BMSR_LSTATUS);
1682}
1683
b4cdea9c
SG
1684static int smsc75xx_autosuspend(struct usbnet *dev, u32 link_up)
1685{
1686 int ret;
1687
1688 if (!netif_running(dev->net)) {
1689 /* interface is ifconfig down so fully power down hw */
1690 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
1691 return smsc75xx_enter_suspend2(dev);
1692 }
1693
1694 if (!link_up) {
1695 /* link is down so enter EDPD mode */
1696 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
1697
1698 /* enable PHY wakeup events for if cable is attached */
1699 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1700 PHY_INT_MASK_ANEG_COMP);
e3c678e6
SG
1701 if (ret < 0) {
1702 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1703 return ret;
1704 }
b4cdea9c
SG
1705
1706 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1707 return smsc75xx_enter_suspend1(dev);
1708 }
1709
1710 /* enable PHY wakeup events so we remote wakeup if cable is pulled */
1711 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1712 PHY_INT_MASK_LINK_DOWN);
e3c678e6
SG
1713 if (ret < 0) {
1714 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1715 return ret;
1716 }
b4cdea9c
SG
1717
1718 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
1719 return smsc75xx_enter_suspend3(dev);
1720}
1721
16c79a04
SG
1722static int smsc75xx_suspend(struct usb_interface *intf, pm_message_t message)
1723{
1724 struct usbnet *dev = usb_get_intfdata(intf);
6c636503 1725 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
f329ccdc 1726 u32 val, link_up;
16c79a04 1727 int ret;
16c79a04 1728
16c79a04 1729 ret = usbnet_suspend(intf, message);
e3c678e6
SG
1730 if (ret < 0) {
1731 netdev_warn(dev->net, "usbnet_suspend error\n");
1732 return ret;
1733 }
16c79a04 1734
b4cdea9c
SG
1735 if (pdata->suspend_flags) {
1736 netdev_warn(dev->net, "error during last resume\n");
1737 pdata->suspend_flags = 0;
1738 }
1739
f329ccdc
SG
1740 /* determine if link is up using only _nopm functions */
1741 link_up = smsc75xx_link_ok_nopm(dev);
1742
b4cdea9c
SG
1743 if (message.event == PM_EVENT_AUTO_SUSPEND) {
1744 ret = smsc75xx_autosuspend(dev, link_up);
1745 goto done;
1746 }
1747
1748 /* if we get this far we're not autosuspending */
f329ccdc
SG
1749 /* if no wol options set, or if link is down and we're not waking on
1750 * PHY activity, enter lowest power SUSPEND2 mode
1751 */
1752 if (!(pdata->wolopts & SUPPORTED_WAKE) ||
1753 !(link_up || (pdata->wolopts & WAKE_PHY))) {
1e1d7412 1754 netdev_info(dev->net, "entering SUSPEND2 mode\n");
6c636503
SG
1755
1756 /* disable energy detect (link up) & wake up events */
47bbea41 1757 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
e3c678e6
SG
1758 if (ret < 0) {
1759 netdev_warn(dev->net, "Error reading WUCSR\n");
1760 goto done;
1761 }
6c636503
SG
1762
1763 val &= ~(WUCSR_MPEN | WUCSR_WUEN);
1764
47bbea41 1765 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
e3c678e6
SG
1766 if (ret < 0) {
1767 netdev_warn(dev->net, "Error writing WUCSR\n");
1768 goto done;
1769 }
6c636503 1770
47bbea41 1771 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
e3c678e6
SG
1772 if (ret < 0) {
1773 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1774 goto done;
1775 }
6c636503
SG
1776
1777 val &= ~(PMT_CTL_ED_EN | PMT_CTL_WOL_EN);
1778
47bbea41 1779 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
e3c678e6
SG
1780 if (ret < 0) {
1781 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1782 goto done;
1783 }
6c636503 1784
eacdd6c2
SG
1785 ret = smsc75xx_enter_suspend2(dev);
1786 goto done;
6c636503
SG
1787 }
1788
f329ccdc
SG
1789 if (pdata->wolopts & WAKE_PHY) {
1790 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1791 (PHY_INT_MASK_ANEG_COMP | PHY_INT_MASK_LINK_DOWN));
e3c678e6
SG
1792 if (ret < 0) {
1793 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1794 goto done;
1795 }
f329ccdc
SG
1796
1797 /* if link is down then configure EDPD and enter SUSPEND1,
1798 * otherwise enter SUSPEND0 below
1799 */
1800 if (!link_up) {
1801 struct mii_if_info *mii = &dev->mii;
1802 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1803
1804 /* enable energy detect power-down mode */
1805 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id,
1806 PHY_MODE_CTRL_STS);
e3c678e6
SG
1807 if (ret < 0) {
1808 netdev_warn(dev->net, "Error reading PHY_MODE_CTRL_STS\n");
1809 goto done;
1810 }
f329ccdc
SG
1811
1812 ret |= MODE_CTRL_STS_EDPWRDOWN;
1813
1814 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id,
1815 PHY_MODE_CTRL_STS, ret);
1816
1817 /* enter SUSPEND1 mode */
eacdd6c2
SG
1818 ret = smsc75xx_enter_suspend1(dev);
1819 goto done;
f329ccdc
SG
1820 }
1821 }
1822
899a391b
SG
1823 if (pdata->wolopts & (WAKE_MCAST | WAKE_ARP)) {
1824 int i, filter = 0;
1825
1826 /* disable all filters */
1827 for (i = 0; i < WUF_NUM; i++) {
47bbea41 1828 ret = smsc75xx_write_reg_nopm(dev, WUF_CFGX + i * 4, 0);
e3c678e6
SG
1829 if (ret < 0) {
1830 netdev_warn(dev->net, "Error writing WUF_CFGX\n");
1831 goto done;
1832 }
899a391b
SG
1833 }
1834
1835 if (pdata->wolopts & WAKE_MCAST) {
1836 const u8 mcast[] = {0x01, 0x00, 0x5E};
1e1d7412 1837 netdev_info(dev->net, "enabling multicast detection\n");
899a391b
SG
1838
1839 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_MULTICAST
1840 | smsc_crc(mcast, 3);
1841 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0007);
e3c678e6
SG
1842 if (ret < 0) {
1843 netdev_warn(dev->net, "Error writing wakeup filter\n");
1844 goto done;
1845 }
899a391b
SG
1846 }
1847
1848 if (pdata->wolopts & WAKE_ARP) {
1849 const u8 arp[] = {0x08, 0x06};
1e1d7412 1850 netdev_info(dev->net, "enabling ARP detection\n");
899a391b
SG
1851
1852 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_ALL | (0x0C << 16)
1853 | smsc_crc(arp, 2);
1854 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0003);
e3c678e6
SG
1855 if (ret < 0) {
1856 netdev_warn(dev->net, "Error writing wakeup filter\n");
1857 goto done;
1858 }
899a391b
SG
1859 }
1860
1861 /* clear any pending pattern match packet status */
47bbea41 1862 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
e3c678e6
SG
1863 if (ret < 0) {
1864 netdev_warn(dev->net, "Error reading WUCSR\n");
1865 goto done;
1866 }
899a391b
SG
1867
1868 val |= WUCSR_WUFR;
1869
47bbea41 1870 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
e3c678e6
SG
1871 if (ret < 0) {
1872 netdev_warn(dev->net, "Error writing WUCSR\n");
1873 goto done;
1874 }
899a391b 1875
1e1d7412 1876 netdev_info(dev->net, "enabling packet match detection\n");
47bbea41 1877 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
e3c678e6
SG
1878 if (ret < 0) {
1879 netdev_warn(dev->net, "Error reading WUCSR\n");
1880 goto done;
1881 }
899a391b
SG
1882
1883 val |= WUCSR_WUEN;
1884
47bbea41 1885 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
e3c678e6
SG
1886 if (ret < 0) {
1887 netdev_warn(dev->net, "Error writing WUCSR\n");
1888 goto done;
1889 }
899a391b 1890 } else {
1e1d7412 1891 netdev_info(dev->net, "disabling packet match detection\n");
47bbea41 1892 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
e3c678e6
SG
1893 if (ret < 0) {
1894 netdev_warn(dev->net, "Error reading WUCSR\n");
1895 goto done;
1896 }
6c636503 1897
899a391b 1898 val &= ~WUCSR_WUEN;
16c79a04 1899
47bbea41 1900 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
e3c678e6
SG
1901 if (ret < 0) {
1902 netdev_warn(dev->net, "Error writing WUCSR\n");
1903 goto done;
1904 }
6c636503
SG
1905 }
1906
899a391b 1907 /* disable magic, bcast & unicast wakeup sources */
47bbea41 1908 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
e3c678e6
SG
1909 if (ret < 0) {
1910 netdev_warn(dev->net, "Error reading WUCSR\n");
1911 goto done;
1912 }
6c636503 1913
899a391b
SG
1914 val &= ~(WUCSR_MPEN | WUCSR_BCST_EN | WUCSR_PFDA_EN);
1915
47bbea41 1916 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
e3c678e6
SG
1917 if (ret < 0) {
1918 netdev_warn(dev->net, "Error writing WUCSR\n");
1919 goto done;
1920 }
899a391b 1921
f329ccdc
SG
1922 if (pdata->wolopts & WAKE_PHY) {
1923 netdev_info(dev->net, "enabling PHY wakeup\n");
1924
1925 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
e3c678e6
SG
1926 if (ret < 0) {
1927 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1928 goto done;
1929 }
f329ccdc
SG
1930
1931 /* clear wol status, enable energy detection */
1932 val &= ~PMT_CTL_WUPS;
1933 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
1934
1935 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
e3c678e6
SG
1936 if (ret < 0) {
1937 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1938 goto done;
1939 }
f329ccdc
SG
1940 }
1941
6c636503 1942 if (pdata->wolopts & WAKE_MAGIC) {
1e1d7412 1943 netdev_info(dev->net, "enabling magic packet wakeup\n");
47bbea41 1944 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
e3c678e6
SG
1945 if (ret < 0) {
1946 netdev_warn(dev->net, "Error reading WUCSR\n");
1947 goto done;
1948 }
899a391b
SG
1949
1950 /* clear any pending magic packet status */
1951 val |= WUCSR_MPR | WUCSR_MPEN;
1952
47bbea41 1953 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
e3c678e6
SG
1954 if (ret < 0) {
1955 netdev_warn(dev->net, "Error writing WUCSR\n");
1956 goto done;
1957 }
6c636503
SG
1958 }
1959
899a391b 1960 if (pdata->wolopts & WAKE_BCAST) {
1e1d7412 1961 netdev_info(dev->net, "enabling broadcast detection\n");
47bbea41 1962 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
e3c678e6
SG
1963 if (ret < 0) {
1964 netdev_warn(dev->net, "Error reading WUCSR\n");
1965 goto done;
1966 }
6c636503 1967
899a391b 1968 val |= WUCSR_BCAST_FR | WUCSR_BCST_EN;
16c79a04 1969
47bbea41 1970 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
e3c678e6
SG
1971 if (ret < 0) {
1972 netdev_warn(dev->net, "Error writing WUCSR\n");
1973 goto done;
1974 }
899a391b 1975 }
6c636503 1976
899a391b 1977 if (pdata->wolopts & WAKE_UCAST) {
1e1d7412 1978 netdev_info(dev->net, "enabling unicast detection\n");
47bbea41 1979 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
e3c678e6
SG
1980 if (ret < 0) {
1981 netdev_warn(dev->net, "Error reading WUCSR\n");
1982 goto done;
1983 }
899a391b
SG
1984
1985 val |= WUCSR_WUFR | WUCSR_PFDA_EN;
6c636503 1986
47bbea41 1987 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
e3c678e6
SG
1988 if (ret < 0) {
1989 netdev_warn(dev->net, "Error writing WUCSR\n");
1990 goto done;
1991 }
899a391b
SG
1992 }
1993
1994 /* enable receiver to enable frame reception */
47bbea41 1995 ret = smsc75xx_read_reg_nopm(dev, MAC_RX, &val);
e3c678e6
SG
1996 if (ret < 0) {
1997 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
1998 goto done;
1999 }
6c636503
SG
2000
2001 val |= MAC_RX_RXEN;
2002
47bbea41 2003 ret = smsc75xx_write_reg_nopm(dev, MAC_RX, val);
e3c678e6
SG
2004 if (ret < 0) {
2005 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
2006 goto done;
2007 }
6c636503
SG
2008
2009 /* some wol options are enabled, so enter SUSPEND0 */
1e1d7412 2010 netdev_info(dev->net, "entering SUSPEND0 mode\n");
eacdd6c2
SG
2011 ret = smsc75xx_enter_suspend0(dev);
2012
2013done:
2014 if (ret)
2015 usbnet_resume(intf);
2016 return ret;
16c79a04
SG
2017}
2018
2019static int smsc75xx_resume(struct usb_interface *intf)
2020{
2021 struct usbnet *dev = usb_get_intfdata(intf);
6c636503 2022 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
b4cdea9c 2023 u8 suspend_flags = pdata->suspend_flags;
16c79a04
SG
2024 int ret;
2025 u32 val;
2026
b4cdea9c 2027 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
16c79a04 2028
b4cdea9c
SG
2029 /* do this first to ensure it's cleared even in error case */
2030 pdata->suspend_flags = 0;
2031
b4cdea9c 2032 if (suspend_flags & SUSPEND_ALLMODES) {
899a391b 2033 /* Disable wakeup sources */
47bbea41 2034 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
e3c678e6
SG
2035 if (ret < 0) {
2036 netdev_warn(dev->net, "Error reading WUCSR\n");
2037 return ret;
2038 }
16c79a04 2039
899a391b
SG
2040 val &= ~(WUCSR_WUEN | WUCSR_MPEN | WUCSR_PFDA_EN
2041 | WUCSR_BCST_EN);
16c79a04 2042
47bbea41 2043 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
e3c678e6
SG
2044 if (ret < 0) {
2045 netdev_warn(dev->net, "Error writing WUCSR\n");
2046 return ret;
2047 }
6c636503
SG
2048
2049 /* clear wake-up status */
47bbea41 2050 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
e3c678e6
SG
2051 if (ret < 0) {
2052 netdev_warn(dev->net, "Error reading PMT_CTL\n");
2053 return ret;
2054 }
6c636503
SG
2055
2056 val &= ~PMT_CTL_WOL_EN;
2057 val |= PMT_CTL_WUPS;
2058
47bbea41 2059 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
e3c678e6
SG
2060 if (ret < 0) {
2061 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2062 return ret;
2063 }
b4cdea9c
SG
2064 }
2065
2066 if (suspend_flags & SUSPEND_SUSPEND2) {
1e1d7412 2067 netdev_info(dev->net, "resuming from SUSPEND2\n");
6c636503 2068
47bbea41 2069 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
e3c678e6
SG
2070 if (ret < 0) {
2071 netdev_warn(dev->net, "Error reading PMT_CTL\n");
2072 return ret;
2073 }
6c636503
SG
2074
2075 val |= PMT_CTL_PHY_PWRUP;
2076
47bbea41 2077 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
e3c678e6
SG
2078 if (ret < 0) {
2079 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2080 return ret;
2081 }
6c636503 2082 }
16c79a04 2083
47bbea41 2084 ret = smsc75xx_wait_ready(dev, 1);
e3c678e6
SG
2085 if (ret < 0) {
2086 netdev_warn(dev->net, "device not ready in smsc75xx_resume\n");
2087 return ret;
2088 }
16c79a04
SG
2089
2090 return usbnet_resume(intf);
2091}
2092
78e47fe4
MM
2093static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
2094 u32 rx_cmd_a, u32 rx_cmd_b)
d0cad871 2095{
78e47fe4
MM
2096 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2097 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
d0cad871
SG
2098 skb->ip_summed = CHECKSUM_NONE;
2099 } else {
2100 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
2101 skb->ip_summed = CHECKSUM_COMPLETE;
2102 }
2103}
2104
2105static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
2106{
d0cad871
SG
2107 while (skb->len > 0) {
2108 u32 rx_cmd_a, rx_cmd_b, align_count, size;
2109 struct sk_buff *ax_skb;
2110 unsigned char *packet;
2111
2112 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
2113 le32_to_cpus(&rx_cmd_a);
2114 skb_pull(skb, 4);
2115
2116 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
2117 le32_to_cpus(&rx_cmd_b);
ea1649de 2118 skb_pull(skb, 4 + RXW_PADDING);
d0cad871
SG
2119
2120 packet = skb->data;
2121
2122 /* get the packet length */
ea1649de
NE
2123 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING;
2124 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
d0cad871
SG
2125
2126 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
2127 netif_dbg(dev, rx_err, dev->net,
1e1d7412 2128 "Error rx_cmd_a=0x%08x\n", rx_cmd_a);
d0cad871
SG
2129 dev->net->stats.rx_errors++;
2130 dev->net->stats.rx_dropped++;
2131
2132 if (rx_cmd_a & RX_CMD_A_FCS)
2133 dev->net->stats.rx_crc_errors++;
2134 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
2135 dev->net->stats.rx_frame_errors++;
2136 } else {
2137 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
2138 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
2139 netif_dbg(dev, rx_err, dev->net,
1e1d7412
JP
2140 "size err rx_cmd_a=0x%08x\n",
2141 rx_cmd_a);
d0cad871
SG
2142 return 0;
2143 }
2144
2145 /* last frame in this batch */
2146 if (skb->len == size) {
78e47fe4
MM
2147 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
2148 rx_cmd_b);
d0cad871
SG
2149
2150 skb_trim(skb, skb->len - 4); /* remove fcs */
2151 skb->truesize = size + sizeof(struct sk_buff);
2152
2153 return 1;
2154 }
2155
2156 ax_skb = skb_clone(skb, GFP_ATOMIC);
2157 if (unlikely(!ax_skb)) {
1e1d7412 2158 netdev_warn(dev->net, "Error allocating skb\n");
d0cad871
SG
2159 return 0;
2160 }
2161
2162 ax_skb->len = size;
2163 ax_skb->data = packet;
2164 skb_set_tail_pointer(ax_skb, size);
2165
78e47fe4
MM
2166 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
2167 rx_cmd_b);
d0cad871
SG
2168
2169 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
2170 ax_skb->truesize = size + sizeof(struct sk_buff);
2171
2172 usbnet_skb_return(dev, ax_skb);
2173 }
2174
2175 skb_pull(skb, size);
2176
2177 /* padding bytes before the next frame starts */
2178 if (skb->len)
2179 skb_pull(skb, align_count);
2180 }
2181
2182 if (unlikely(skb->len < 0)) {
1e1d7412 2183 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
d0cad871
SG
2184 return 0;
2185 }
2186
2187 return 1;
2188}
2189
2190static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
2191 struct sk_buff *skb, gfp_t flags)
2192{
2193 u32 tx_cmd_a, tx_cmd_b;
2194
2195 skb_linearize(skb);
2196
2197 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) {
2198 struct sk_buff *skb2 =
2199 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags);
2200 dev_kfree_skb_any(skb);
2201 skb = skb2;
2202 if (!skb)
2203 return NULL;
2204 }
2205
2206 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
2207
2208 if (skb->ip_summed == CHECKSUM_PARTIAL)
2209 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
2210
2211 if (skb_is_gso(skb)) {
2212 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
2213 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
2214
2215 tx_cmd_a |= TX_CMD_A_LSO;
2216 } else {
2217 tx_cmd_b = 0;
2218 }
2219
2220 skb_push(skb, 4);
2221 cpu_to_le32s(&tx_cmd_b);
2222 memcpy(skb->data, &tx_cmd_b, 4);
2223
2224 skb_push(skb, 4);
2225 cpu_to_le32s(&tx_cmd_a);
2226 memcpy(skb->data, &tx_cmd_a, 4);
2227
2228 return skb;
2229}
2230
b4cdea9c
SG
2231static int smsc75xx_manage_power(struct usbnet *dev, int on)
2232{
2233 dev->intf->needs_remote_wakeup = on;
2234 return 0;
2235}
2236
d0cad871
SG
2237static const struct driver_info smsc75xx_info = {
2238 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
2239 .bind = smsc75xx_bind,
2240 .unbind = smsc75xx_unbind,
2241 .link_reset = smsc75xx_link_reset,
2242 .reset = smsc75xx_reset,
2243 .rx_fixup = smsc75xx_rx_fixup,
2244 .tx_fixup = smsc75xx_tx_fixup,
2245 .status = smsc75xx_status,
b4cdea9c 2246 .manage_power = smsc75xx_manage_power,
7bdd305e 2247 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
d0cad871
SG
2248};
2249
2250static const struct usb_device_id products[] = {
2251 {
2252 /* SMSC7500 USB Gigabit Ethernet Device */
2253 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
2254 .driver_info = (unsigned long) &smsc75xx_info,
2255 },
2256 {
2257 /* SMSC7500 USB Gigabit Ethernet Device */
2258 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
2259 .driver_info = (unsigned long) &smsc75xx_info,
2260 },
2261 { }, /* END */
2262};
2263MODULE_DEVICE_TABLE(usb, products);
2264
2265static struct usb_driver smsc75xx_driver = {
2266 .name = SMSC_CHIPNAME,
2267 .id_table = products,
2268 .probe = usbnet_probe,
16c79a04
SG
2269 .suspend = smsc75xx_suspend,
2270 .resume = smsc75xx_resume,
2271 .reset_resume = smsc75xx_resume,
d0cad871 2272 .disconnect = usbnet_disconnect,
e1f12eb6 2273 .disable_hub_initiated_lpm = 1,
b4cdea9c 2274 .supports_autosuspend = 1,
d0cad871
SG
2275};
2276
d632eb1b 2277module_usb_driver(smsc75xx_driver);
d0cad871
SG
2278
2279MODULE_AUTHOR("Nancy Lin");
90b24cfb 2280MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
d0cad871
SG
2281MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
2282MODULE_LICENSE("GPL");
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